1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 enum cmp_type /* comparison type */
27 CMP_SI, /* compare integers */
28 CMP_SF, /* compare single precision floats */
29 CMP_DF, /* compare double precision floats */
30 CMP_MAX /* max comparison type */
33 /* For long call handling. */
34 extern unsigned long total_code_bytes;
36 /* Which processor to schedule for. */
48 /* For -mschedule= option. */
49 extern const char *pa_cpu_string;
50 extern enum processor_type pa_cpu;
52 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
54 /* Which architecture to generate code for. */
56 enum architecture_type
65 /* For -march= option. */
66 extern const char *pa_arch_string;
67 extern enum architecture_type pa_arch;
69 /* Print subsidiary information on the compiler version in use. */
71 #define TARGET_VERSION fputs (" (hppa)", stderr);
73 /* Run-time compilation parameters selecting different hardware subsets. */
75 extern int target_flags;
77 /* compile code for HP-PA 1.1 ("Snake"). */
81 /* Disable all FP registers (they all become fixed). This may be necessary
82 for compiling kernels which perform lazy context switching of FP regs.
83 Note if you use this option and try to perform floating point operations
84 the compiler will abort! */
86 #define MASK_DISABLE_FPREGS 2
87 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
89 /* Generate code which assumes that all space register are equivalent.
90 Triggers aggressive unscaled index addressing and faster
91 builtin_return_address. */
92 #define MASK_NO_SPACE_REGS 4
93 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
95 /* Allow unconditional jumps in the delay slots of call instructions. */
96 #define MASK_JUMP_IN_DELAY 8
97 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
99 /* Disable indexed addressing modes. */
100 #define MASK_DISABLE_INDEXING 32
101 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
103 /* Emit code which follows the new portable runtime calling conventions
104 HP wants everyone to use for ELF objects. If at all possible you want
105 to avoid this since it's a performance loss for non-prototyped code.
107 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
108 long-call stubs which is quite expensive. */
109 #define MASK_PORTABLE_RUNTIME 64
110 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
112 /* Emit directives only understood by GAS. This allows parameter
113 relocations to work for static functions. There is no way
114 to make them work the HP assembler at this time. */
116 #define TARGET_GAS (target_flags & MASK_GAS)
118 /* Emit code for processors which do not have an FPU. */
119 #define MASK_SOFT_FLOAT 256
120 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
122 /* Use 3-insn load/store sequences for access to large data segments
123 in shared libraries on hpux10. */
124 #define MASK_LONG_LOAD_STORE 512
125 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
127 /* Use a faster sequence for indirect calls. This assumes that calls
128 through function pointers will never cross a space boundary, and
129 that the executable is not dynamically linked. Such assumptions
130 are generally safe for building kernels and statically linked
131 executables. Code compiled with this option will fail miserably if
132 the executable is dynamically linked or uses nested functions! */
133 #define MASK_FAST_INDIRECT_CALLS 1024
134 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
136 /* Generate code with big switch statements to avoid out of range branches
137 occurring within the switch table. */
138 #define MASK_BIG_SWITCH 2048
139 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
141 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
142 true when this is true. */
143 #define MASK_PA_20 4096
145 /* Generate cpp defines for server I/O. */
146 #define MASK_SIO 8192
147 #define TARGET_SIO (target_flags & MASK_SIO)
149 /* Assume GNU linker by default. */
150 #define MASK_GNU_LD 16384
151 #ifndef TARGET_GNU_LD
152 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
155 /* Force generation of long calls. */
156 #define MASK_LONG_CALLS 32768
157 #ifndef TARGET_LONG_CALLS
158 #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
162 #define TARGET_PA_10 (target_flags & (MASK_PA_11 | MASK_PA_20) == 0)
166 #define TARGET_PA_11 (target_flags & MASK_PA_11)
170 #define TARGET_PA_20 (target_flags & MASK_PA_20)
173 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
175 #define TARGET_64BIT 0
178 /* Generate code for ELF32 ABI. */
180 #define TARGET_ELF32 0
183 /* Generate code for SOM 32bit ABI. */
188 /* The following three defines are potential target switches. The current
189 defines are optimal given the current capabilities of GAS and GNU ld. */
191 /* Define to a C expression evaluating to true to use long absolute calls.
192 Currently, only the HP assembler and SOM linker support long absolute
193 calls. They are used only in non-pic code. */
194 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
196 /* Define to a C expression evaluating to true to use long pic symbol
197 difference calls. This is a call variant similar to the long pic
198 pc-relative call. Long pic symbol difference calls are only used with
199 the HP SOM linker. Currently, only the HP assembler supports these
200 calls. GAS doesn't allow an arbritrary difference of two symbols. */
201 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS)
203 /* Define to a C expression evaluating to true to use long pic
204 pc-relative calls. Long pic pc-relative calls are only used with
205 GAS. Currently, they are usable for calls within a module but
206 not for external calls. */
207 #define TARGET_LONG_PIC_PCREL_CALL 0
209 /* Macro to define tables used to set the flags. This is a
210 list in braces of target switches with each switch being
211 { "NAME", VALUE, "HELP_STRING" }. VALUE is the bits to set,
212 or minus the bits to clear. An empty string NAME is used to
213 identify the default VALUE. Do not mark empty strings for
216 #define TARGET_SWITCHES \
217 {{ "snake", MASK_PA_11, \
218 N_("Generate PA1.1 code") }, \
219 { "nosnake", -(MASK_PA_11 | MASK_PA_20), \
220 N_("Generate PA1.0 code") }, \
221 { "pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), \
222 N_("Generate PA1.0 code") }, \
223 { "pa-risc-1-1", MASK_PA_11, \
224 N_("Generate PA1.1 code") }, \
225 { "pa-risc-2-0", MASK_PA_20, \
226 N_("Generate PA2.0 code (requires binutils 2.10 or later)") }, \
227 { "disable-fpregs", MASK_DISABLE_FPREGS, \
228 N_("Disable FP regs") }, \
229 { "no-disable-fpregs", -MASK_DISABLE_FPREGS, \
230 N_("Do not disable FP regs") }, \
231 { "no-space-regs", MASK_NO_SPACE_REGS, \
232 N_("Disable space regs") }, \
233 { "space-regs", -MASK_NO_SPACE_REGS, \
234 N_("Do not disable space regs") }, \
235 { "jump-in-delay", MASK_JUMP_IN_DELAY, \
236 N_("Put jumps in call delay slots") }, \
237 { "no-jump-in-delay", -MASK_JUMP_IN_DELAY, \
238 N_("Do not put jumps in call delay slots") }, \
239 { "disable-indexing", MASK_DISABLE_INDEXING, \
240 N_("Disable indexed addressing") }, \
241 { "no-disable-indexing", -MASK_DISABLE_INDEXING, \
242 N_("Do not disable indexed addressing") }, \
243 { "portable-runtime", MASK_PORTABLE_RUNTIME, \
244 N_("Use portable calling conventions") }, \
245 { "no-portable-runtime", -MASK_PORTABLE_RUNTIME, \
246 N_("Do not use portable calling conventions") }, \
248 N_("Assume code will be assembled by GAS") }, \
249 { "no-gas", -MASK_GAS, \
250 N_("Do not assume code will be assembled by GAS") }, \
251 { "soft-float", MASK_SOFT_FLOAT, \
252 N_("Use software floating point") }, \
253 { "no-soft-float", -MASK_SOFT_FLOAT, \
254 N_("Do not use software floating point") }, \
255 { "long-load-store", MASK_LONG_LOAD_STORE, \
256 N_("Emit long load/store sequences") }, \
257 { "no-long-load-store", -MASK_LONG_LOAD_STORE, \
258 N_("Do not emit long load/store sequences") }, \
259 { "fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, \
260 N_("Generate fast indirect calls") }, \
261 { "no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, \
262 N_("Do not generate fast indirect calls") }, \
263 { "big-switch", MASK_BIG_SWITCH, \
264 N_("Generate code for huge switch statements") }, \
265 { "no-big-switch", -MASK_BIG_SWITCH, \
266 N_("Do not generate code for huge switch statements") }, \
267 { "long-calls", MASK_LONG_CALLS, \
268 N_("Always generate long calls") }, \
269 { "no-long-calls", -MASK_LONG_CALLS, \
270 N_("Generate long calls only when needed") }, \
272 N_("Enable linker optimizations") }, \
274 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
277 #ifndef TARGET_DEFAULT
278 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
281 #ifndef TARGET_CPU_DEFAULT
282 #define TARGET_CPU_DEFAULT 0
285 #ifndef SUBTARGET_SWITCHES
286 #define SUBTARGET_SWITCHES
289 #ifndef TARGET_SCHED_DEFAULT
290 #define TARGET_SCHED_DEFAULT "8000"
293 #define TARGET_OPTIONS \
295 { "schedule=", &pa_cpu_string, \
296 N_("Specify CPU for scheduling purposes") }, \
297 { "arch=", &pa_arch_string, \
298 N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later.") }\
301 /* Specify the dialect of assembler to use. New mnemonics is dialect one
302 and the old mnemonics are dialect zero. */
303 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
305 #define OVERRIDE_OPTIONS override_options ()
307 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
308 code duplication we simply include this file and override as needed. */
311 /* We do not have to be compatible with dbx, so we enable gdb extensions
313 #define DEFAULT_GDB_EXTENSIONS 1
315 /* This used to be zero (no max length), but big enums and such can
316 cause huge strings which killed gas.
318 We also have to avoid lossage in dbxout.c -- it does not compute the
319 string size accurately, so we are real conservative here. */
320 #undef DBX_CONTIN_LENGTH
321 #define DBX_CONTIN_LENGTH 3000
323 /* Only labels should ever begin in column zero. */
324 #define ASM_STABS_OP "\t.stabs\t"
325 #define ASM_STABN_OP "\t.stabn\t"
327 /* GDB always assumes the current function's frame begins at the value
328 of the stack pointer upon entry to the current function. Accessing
329 local variables and parameters passed on the stack is done using the
330 base of the frame + an offset provided by GCC.
332 For functions which have frame pointers this method works fine;
333 the (frame pointer) == (stack pointer at function entry) and GCC provides
334 an offset relative to the frame pointer.
336 This loses for functions without a frame pointer; GCC provides an offset
337 which is relative to the stack pointer after adjusting for the function's
338 frame size. GDB would prefer the offset to be relative to the value of
339 the stack pointer at the function's entry. Yuk! */
340 #define DEBUGGER_AUTO_OFFSET(X) \
341 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
342 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
344 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
345 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
346 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
348 #define TARGET_CPU_CPP_BUILTINS() \
350 builtin_assert("cpu=hppa"); \
351 builtin_assert("machine=hppa"); \
352 builtin_define("__hppa"); \
353 builtin_define("__hppa__"); \
356 builtin_define("_LP64"); \
357 builtin_define("__LP64__"); \
360 builtin_define("_PA_RISC2_0"); \
361 else if (TARGET_PA_11) \
362 builtin_define("_PA_RISC1_1"); \
364 builtin_define("_PA_RISC1_0"); \
367 /* An old set of OS defines for various BSD-like systems. */
368 #define TARGET_OS_CPP_BUILTINS() \
371 builtin_define_std ("REVARGV"); \
372 builtin_define_std ("hp800"); \
373 builtin_define_std ("hp9000"); \
374 builtin_define_std ("hp9k8"); \
375 if (c_language != clk_cplusplus \
377 builtin_define ("hppa"); \
378 builtin_define_std ("spectrum"); \
379 builtin_define_std ("unix"); \
380 builtin_assert ("system=bsd"); \
381 builtin_assert ("system=unix"); \
385 #define CC1_SPEC "%{pg:} %{p:}"
387 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
389 /* We don't want -lg. */
391 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
394 /* This macro defines command-line switches that modify the default
397 The definition is be an initializer for an array of structures. Each
398 array element has have three elements: the switch name, one of the
399 enumeration codes ADD or DELETE to indicate whether the string should be
400 inserted or deleted, and the string to be inserted or deleted. */
401 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
403 /* Make gcc agree with <machine/ansi.h> */
405 #define SIZE_TYPE "unsigned int"
406 #define PTRDIFF_TYPE "int"
407 #define WCHAR_TYPE "unsigned int"
408 #define WCHAR_TYPE_SIZE 32
410 /* Show we can debug even without a frame pointer. */
411 #define CAN_DEBUG_WITHOUT_FP
413 /* Machine dependent reorg pass. */
414 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
417 /* target machine storage layout */
419 /* Define this macro if it is advisable to hold scalars in registers
420 in a wider mode than that declared by the program. In such cases,
421 the value is constrained to be within the bounds of the declared
422 type, but kept valid in the wider mode. The signedness of the
423 extension may differ from that of the type. */
425 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
426 if (GET_MODE_CLASS (MODE) == MODE_INT \
427 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
430 /* Define this if most significant bit is lowest numbered
431 in instructions that operate on numbered bit-fields. */
432 #define BITS_BIG_ENDIAN 1
434 /* Define this if most significant byte of a word is the lowest numbered. */
435 /* That is true on the HP-PA. */
436 #define BYTES_BIG_ENDIAN 1
438 /* Define this if most significant word of a multiword number is lowest
440 #define WORDS_BIG_ENDIAN 1
442 #define MAX_BITS_PER_WORD 64
443 #define MAX_LONG_TYPE_SIZE 32
445 /* Width of a word, in units (bytes). */
446 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
447 #define MIN_UNITS_PER_WORD 4
449 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
450 #define PARM_BOUNDARY BITS_PER_WORD
452 /* Largest alignment required for any stack parameter, in bits.
453 Don't define this if it is equal to PARM_BOUNDARY */
454 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
456 /* Boundary (in *bits*) on which stack pointer is always aligned;
457 certain optimizations in combine depend on this.
459 GCC for the PA always rounds its stacks to a 8 * STACK_BOUNDARY
460 boundary, but that happens late in the compilation process. */
461 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
463 #define PREFERRED_STACK_BOUNDARY (8 * STACK_BOUNDARY)
465 /* Allocation boundary (in *bits*) for the code of a function. */
466 #define FUNCTION_BOUNDARY BITS_PER_WORD
468 /* Alignment of field after `int : 0' in a structure. */
469 #define EMPTY_FIELD_BOUNDARY 32
471 /* Every structure's size must be a multiple of this. */
472 #define STRUCTURE_SIZE_BOUNDARY 8
474 /* A bit-field declared as `int' forces `int' alignment for the struct. */
475 #define PCC_BITFIELD_TYPE_MATTERS 1
477 /* No data type wants to be aligned rounder than this. */
478 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
480 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
481 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
482 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
484 /* Make arrays of chars word-aligned for the same reasons. */
485 #define DATA_ALIGNMENT(TYPE, ALIGN) \
486 (TREE_CODE (TYPE) == ARRAY_TYPE \
487 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
488 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
490 /* Set this nonzero if move instructions will actually fail to work
491 when given unaligned data. */
492 #define STRICT_ALIGNMENT 1
494 /* Generate calls to memcpy, memcmp and memset. */
495 #define TARGET_MEM_FUNCTIONS
497 /* Value is 1 if it is a good idea to tie two pseudo registers
498 when one has mode MODE1 and one has mode MODE2.
499 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
500 for any hard reg, then this must be 0 for correct output. */
501 #define MODES_TIEABLE_P(MODE1, MODE2) \
502 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
504 /* Specify the registers used for certain standard purposes.
505 The values of these macros are register numbers. */
507 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
508 /* #define PC_REGNUM */
510 /* Register to use for pushing function arguments. */
511 #define STACK_POINTER_REGNUM 30
513 /* Base register for access to local variables of the function. */
514 #define FRAME_POINTER_REGNUM 3
516 /* Value should be nonzero if functions must have frame pointers. */
517 #define FRAME_POINTER_REQUIRED \
518 (current_function_calls_alloca)
520 /* C statement to store the difference between the frame pointer
521 and the stack pointer values immediately after the function prologue.
523 Note, we always pretend that this is a leaf function because if
524 it's not, there's no point in trying to eliminate the
525 frame pointer. If it is a leaf function, we guessed right! */
526 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
527 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
529 /* Base register for access to arguments of the function. */
530 #define ARG_POINTER_REGNUM 3
532 /* Register in which static-chain is passed to a function. */
533 #define STATIC_CHAIN_REGNUM 29
535 /* Register which holds offset table for position-independent
538 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
539 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
541 /* Function to return the rtx used to save the pic offset table register
542 across function calls. */
543 extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void));
545 #define DEFAULT_PCC_STRUCT_RETURN 0
547 /* SOM ABI says that objects larger than 64 bits are returned in memory.
548 PA64 ABI says that objects larger than 128 bits are returned in memory.
549 Note, int_size_in_bytes can return -1 if the size of the object is
550 variable or larger than the maximum value that can be expressed as
551 a HOST_WIDE_INT. It can also return zero for an empty type. The
552 simplest way to handle variable and empty types is to pass them in
553 memory. This avoids problems in defining the boundaries of argument
554 slots, allocating registers, etc. */
555 #define RETURN_IN_MEMORY(TYPE) \
556 (int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8) \
557 || int_size_in_bytes (TYPE) <= 0)
559 /* Register in which address to store a structure value
560 is passed to a function. */
561 #define STRUCT_VALUE_REGNUM 28
563 /* Describe how we implement __builtin_eh_return. */
564 #define EH_RETURN_DATA_REGNO(N) \
565 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
566 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
567 #define EH_RETURN_HANDLER_RTX \
568 gen_rtx_MEM (word_mode, \
569 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
570 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
573 /* Offset from the argument pointer register value to the top of
574 stack. This is different from FIRST_PARM_OFFSET because of the
576 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
578 /* The letters I, J, K, L and M in a register constraint string
579 can be used to stand for particular ranges of immediate operands.
580 This macro defines what the ranges are.
581 C is the letter, and VALUE is a constant value.
582 Return 1 if VALUE is in the range specified by C.
584 `I' is used for the 11 bit constants.
585 `J' is used for the 14 bit constants.
586 `K' is used for values that can be moved with a zdepi insn.
587 `L' is used for the 5 bit constants.
589 `N' is used for values with the least significant 11 bits equal to zero
590 and when sign extended from 32 to 64 bits the
591 value does not change.
592 `O' is used for numbers n such that n+1 is a power of 2.
595 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
596 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
597 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
598 : (C) == 'K' ? zdepi_cint_p (VALUE) \
599 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
600 : (C) == 'M' ? (VALUE) == 0 \
601 : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
602 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
603 == (HOST_WIDE_INT) -1 << 31)) \
604 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
605 : (C) == 'P' ? and_mask_p (VALUE) \
608 /* Similar, but for floating or large integer constants, and defining letters
609 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
611 For PA, `G' is the floating-point constant zero. `H' is undefined. */
613 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
614 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
615 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
618 /* The class value for index registers, and the one for base regs. */
619 #define INDEX_REG_CLASS GENERAL_REGS
620 #define BASE_REG_CLASS GENERAL_REGS
622 #define FP_REG_CLASS_P(CLASS) \
623 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
625 /* True if register is floating-point. */
626 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
628 /* Given an rtx X being reloaded into a reg required to be
629 in class CLASS, return the class of reg to actually use.
630 In general this is just CLASS; but on some machines
631 in some cases it is preferable to use a more restrictive class. */
632 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
634 /* Return the register class of a scratch register needed to copy IN into
635 or out of a register in CLASS in MODE. If it can be done directly
638 Avoid doing any work for the common case calls. */
640 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
641 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
642 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
643 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
645 /* On the PA it is not possible to directly move data between
646 GENERAL_REGS and FP_REGS. */
647 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
648 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
650 /* Return the stack location to use for secondary memory needed reloads. */
651 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
652 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
655 /* Stack layout; function entry, exit and calling. */
657 /* Define this if pushing a word on the stack
658 makes the stack pointer a smaller address. */
659 /* #define STACK_GROWS_DOWNWARD */
661 /* Believe it or not. */
662 #define ARGS_GROW_DOWNWARD
664 /* Define this if the nominal address of the stack frame
665 is at the high-address end of the local variables;
666 that is, each additional local variable allocated
667 goes at a more negative offset in the frame. */
668 /* #define FRAME_GROWS_DOWNWARD */
670 /* Offset within stack frame to start allocating local variables at.
671 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
672 first local allocated. Otherwise, it is the offset to the BEGINNING
673 of the first local allocated. The start of the locals must lie on
674 a STACK_BOUNDARY or else the frame size of leaf functions will not
676 #define STARTING_FRAME_OFFSET (TARGET_64BIT ? 16 : 8)
678 /* If we generate an insn to push BYTES bytes,
679 this says how many the stack pointer really advances by.
680 On the HP-PA, don't define this because there are no push insns. */
681 /* #define PUSH_ROUNDING(BYTES) */
683 /* Offset of first parameter from the argument pointer register value.
684 This value will be negated because the arguments grow down.
685 Also note that on STACK_GROWS_UPWARD machines (such as this one)
686 this is the distance from the frame pointer to the end of the first
687 argument, not it's beginning. To get the real offset of the first
688 argument, the size of the argument must be added. */
690 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
692 /* When a parameter is passed in a register, stack space is still
694 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
696 /* Define this if the above stack space is to be considered part of the
697 space allocated by the caller. */
698 #define OUTGOING_REG_PARM_STACK_SPACE
700 /* Keep the stack pointer constant throughout the function.
701 This is both an optimization and a necessity: longjmp
702 doesn't behave itself when the stack pointer moves within
704 #define ACCUMULATE_OUTGOING_ARGS 1
706 /* The weird HPPA calling conventions require a minimum of 48 bytes on
707 the stack: 16 bytes for register saves, and 32 bytes for magic.
708 This is the difference between the logical top of stack and the
710 #define STACK_POINTER_OFFSET \
711 (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
713 #define STACK_DYNAMIC_OFFSET(FNDECL) \
715 ? (STACK_POINTER_OFFSET) \
716 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
718 /* Value is 1 if returning from a function call automatically
719 pops the arguments described by the number-of-args field in the call.
720 FUNDECL is the declaration node of the function (as a tree),
721 FUNTYPE is the data type of the function (as a tree),
722 or for a library call it is an identifier node for the subroutine name. */
724 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
726 /* Define how to find the value returned by a function.
727 VALTYPE is the data type of the value (as a tree).
728 If the precise function being called is known, FUNC is its FUNCTION_DECL;
729 otherwise, FUNC is 0. */
731 #define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
733 /* Define how to find the value returned by a library function
734 assuming the value has mode MODE. */
736 #define LIBCALL_VALUE(MODE) \
738 (! TARGET_SOFT_FLOAT \
739 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
741 /* 1 if N is a possible register number for a function value
742 as seen by the caller. */
744 #define FUNCTION_VALUE_REGNO_P(N) \
745 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
748 /* Define a data type for recording info about an argument list
749 during the scan of that argument list. This data type should
750 hold all necessary information about the function itself
751 and about the args processed so far, enough to enable macros
752 such as FUNCTION_ARG to determine where the next arg should go.
754 On the HP-PA, this is a single integer, which is a number of words
755 of arguments scanned so far (including the invisible argument,
756 if any, which holds the structure-value-address).
757 Thus 4 or more means all following args should go on the stack. */
759 struct hppa_args {int words, nargs_prototype, indirect; };
761 #define CUMULATIVE_ARGS struct hppa_args
763 /* Initialize a variable CUM of type CUMULATIVE_ARGS
764 for a call to a function whose data type is FNTYPE.
765 For a library call, FNTYPE is 0. */
767 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
769 (CUM).indirect = INDIRECT, \
770 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
771 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
772 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
773 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
778 /* Similar, but when scanning the definition of a procedure. We always
779 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
781 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
783 (CUM).indirect = 0, \
784 (CUM).nargs_prototype = 1000
786 /* Figure out the size in words of the function argument. The size
787 returned by this macro should always be greater than zero because
788 we pass variable and zero sized objects by reference. */
790 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
791 ((((MODE) != BLKmode \
792 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
793 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
795 /* Update the data in CUM to advance over an argument
796 of mode MODE and data type TYPE.
797 (TYPE is null for libcalls where that information may not be available.) */
799 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
800 { (CUM).nargs_prototype--; \
801 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
802 + (((CUM).words & 01) && (TYPE) != 0 \
803 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
806 /* Determine where to put an argument to a function.
807 Value is zero to push the argument on the stack,
808 or a hard register in which to store the argument.
810 MODE is the argument's machine mode.
811 TYPE is the data type of the argument (as a tree).
812 This is null for libcalls where that information may
814 CUM is a variable of type CUMULATIVE_ARGS which gives info about
815 the preceding args and about the function being called.
816 NAMED is nonzero if this argument is a named parameter
817 (otherwise it is an extra parameter matching an ellipsis).
819 On the HP-PA the first four words of args are normally in registers
820 and the rest are pushed. But any arg that won't entirely fit in regs
823 Arguments passed in registers are either 1 or 2 words long.
825 The caller must make a distinction between calls to explicitly named
826 functions and calls through pointers to functions -- the conventions
827 are different! Calls through pointers to functions only use general
828 registers for the first four argument words.
830 Of course all this is different for the portable runtime model
831 HP wants everyone to use for ELF. Ugh. Here's a quick description
832 of how it's supposed to work.
834 1) callee side remains unchanged. It expects integer args to be
835 in the integer registers, float args in the float registers and
836 unnamed args in integer registers.
838 2) caller side now depends on if the function being called has
839 a prototype in scope (rather than if it's being called indirectly).
841 2a) If there is a prototype in scope, then arguments are passed
842 according to their type (ints in integer registers, floats in float
843 registers, unnamed args in integer registers.
845 2b) If there is no prototype in scope, then floating point arguments
846 are passed in both integer and float registers. egad.
848 FYI: The portable parameter passing conventions are almost exactly like
849 the standard parameter passing conventions on the RS6000. That's why
850 you'll see lots of similar code in rs6000.h. */
852 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
854 /* Do not expect to understand this without reading it several times. I'm
855 tempted to try and simply it, but I worry about breaking something. */
857 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
858 function_arg (&CUM, MODE, TYPE, NAMED, 0)
860 /* Nonzero if we do not know how to pass TYPE solely in registers. */
861 #define MUST_PASS_IN_STACK(MODE,TYPE) \
863 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
864 || TREE_ADDRESSABLE (TYPE)))
866 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
867 function_arg (&CUM, MODE, TYPE, NAMED, 1)
869 /* For an arg passed partly in registers and partly in memory,
870 this is the number of registers used.
871 For args passed entirely in registers or entirely in memory, zero. */
873 /* For PA32 there are never split arguments. PA64, on the other hand, can
874 pass arguments partially in registers and partially in memory. */
875 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
876 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
878 /* If defined, a C expression that gives the alignment boundary, in
879 bits, of an argument with the specified mode and type. If it is
880 not defined, `PARM_BOUNDARY' is used for all arguments. */
882 /* Arguments larger than one word are double word aligned. */
884 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
886 ? (integer_zerop (TYPE_SIZE (TYPE)) \
887 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
888 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
889 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
890 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
892 /* In the 32-bit runtime, arguments larger than eight bytes are passed
893 by invisible reference. As a GCC extension, we also pass anything
894 with a zero or variable size by reference.
896 The 64-bit runtime does not describe passing any types by invisible
897 reference. The internals of GCC can't currently handle passing
898 empty structures, and zero or variable length arrays when they are
899 not passed entirely on the stack or by reference. Thus, as a GCC
900 extension, we pass these types by reference. The HP compiler doesn't
901 support these types, so hopefully there shouldn't be any compatibility
902 issues. This may have to be revisited when HP releases a C99 compiler
903 or updates the ABI. */
904 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
906 ? ((TYPE) && int_size_in_bytes (TYPE) <= 0) \
907 : (((TYPE) && (int_size_in_bytes (TYPE) > 8 \
908 || int_size_in_bytes (TYPE) <= 0)) \
909 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
911 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
912 FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)
915 extern GTY(()) rtx hppa_compare_op0;
916 extern GTY(()) rtx hppa_compare_op1;
917 extern enum cmp_type hppa_branch_type;
919 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
920 as assembly via FUNCTION_PROFILER. Just output a local label.
921 We can't use the function label because the GAS SOM target can't
922 handle the difference of a global symbol and a local symbol. */
924 #ifndef FUNC_BEGIN_PROLOG_LABEL
925 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
928 #define FUNCTION_PROFILER(FILE, LABEL) \
929 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
931 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
932 void hppa_profile_hook PARAMS ((int label_no));
934 /* The profile counter if emitted must come before the prologue. */
935 #define PROFILE_BEFORE_PROLOGUE 1
937 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
938 the stack pointer does not matter. The value is tested only in
939 functions that have frame pointers.
940 No definition is equivalent to always zero. */
942 extern int may_call_alloca;
944 #define EXIT_IGNORE_STACK \
945 (get_frame_size () != 0 \
946 || current_function_calls_alloca || current_function_outgoing_args_size)
948 /* Output assembler code for a block containing the constant parts
949 of a trampoline, leaving space for the variable parts.\
951 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
952 and then branches to the specified routine.
954 This code template is copied from text segment to stack location
955 and then patched with INITIALIZE_TRAMPOLINE to contain
956 valid values, and then entered as a subroutine.
958 It is best to keep this as small as possible to avoid having to
959 flush multiple lines in the cache. */
961 #define TRAMPOLINE_TEMPLATE(FILE) \
963 if (! TARGET_64BIT) \
965 fputs ("\tldw 36(%r22),%r21\n", FILE); \
966 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
967 if (ASSEMBLER_DIALECT == 0) \
968 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
970 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
971 fputs ("\tldw 4(%r21),%r19\n", FILE); \
972 fputs ("\tldw 0(%r21),%r21\n", FILE); \
973 fputs ("\tldsid (%r21),%r1\n", FILE); \
974 fputs ("\tmtsp %r1,%sr0\n", FILE); \
975 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
976 fputs ("\tldw 40(%r22),%r29\n", FILE); \
977 fputs ("\t.word 0\n", FILE); \
978 fputs ("\t.word 0\n", FILE); \
979 fputs ("\t.word 0\n", FILE); \
980 fputs ("\t.word 0\n", FILE); \
984 fputs ("\t.dword 0\n", FILE); \
985 fputs ("\t.dword 0\n", FILE); \
986 fputs ("\t.dword 0\n", FILE); \
987 fputs ("\t.dword 0\n", FILE); \
988 fputs ("\tmfia %r31\n", FILE); \
989 fputs ("\tldd 24(%r31),%r1\n", FILE); \
990 fputs ("\tldd 24(%r1),%r27\n", FILE); \
991 fputs ("\tldd 16(%r1),%r1\n", FILE); \
992 fputs ("\tbve (%r1)\n", FILE); \
993 fputs ("\tldd 32(%r31),%r31\n", FILE); \
994 fputs ("\t.dword 0 ; fptr\n", FILE); \
995 fputs ("\t.dword 0 ; static link\n", FILE); \
999 /* Length in units of the trampoline for entering a nested function.
1001 Flush the cache entries corresponding to the first and last addresses
1002 of the trampoline. This is necessary as the trampoline may cross two
1005 If the code part of the trampoline ever grows to > 32 bytes, then it
1006 will become necessary to hack on the cacheflush pattern in pa.md. */
1008 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
1010 /* Emit RTL insns to initialize the variable parts of a trampoline.
1011 FNADDR is an RTX for the address of the function's pure code.
1012 CXT is an RTX for the static chain value for the function.
1014 Move the function address to the trampoline template at offset 36.
1015 Move the static chain value to trampoline template at offset 40.
1016 Move the trampoline address to trampoline template at offset 44.
1017 Move r19 to trampoline template at offset 48. The latter two
1018 words create a plabel for the indirect call to the trampoline. */
1020 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1022 if (! TARGET_64BIT) \
1024 rtx start_addr, end_addr; \
1026 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1027 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1028 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1029 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1030 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
1031 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
1032 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
1033 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
1034 gen_rtx_REG (Pmode, 19)); \
1035 /* fdc and fic only use registers for the address to flush, \
1036 they do not accept integer displacements. */ \
1037 start_addr = force_reg (Pmode, (TRAMP)); \
1038 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1039 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1040 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1041 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1042 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1046 rtx start_addr, end_addr; \
1048 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
1049 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1050 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
1051 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1052 /* Create a fat pointer for the trampoline. */ \
1053 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1054 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1055 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1056 end_addr = gen_rtx_REG (Pmode, 27); \
1057 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1058 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1059 /* fdc and fic only use registers for the address to flush, \
1060 they do not accept integer displacements. */ \
1061 start_addr = force_reg (Pmode, (TRAMP)); \
1062 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1063 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1064 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1065 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1066 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1070 /* Perform any machine-specific adjustment in the address of the trampoline.
1071 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1072 Adjust the trampoline address to point to the plabel at offset 44. */
1074 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1075 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1077 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1078 reference the 4 integer arg registers and 4 fp arg registers.
1079 Ordinarily they are not call used registers, but they are for
1080 _builtin_saveregs, so we must make this explicit. */
1082 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1084 /* Implement `va_start' for varargs and stdarg. */
1086 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1087 hppa_va_start (valist, nextarg)
1089 /* Implement `va_arg'. */
1091 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1092 hppa_va_arg (valist, type)
1094 /* Addressing modes, and classification of registers for them.
1096 Using autoincrement addressing modes on PA8000 class machines is
1099 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1100 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1102 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1103 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1105 /* Macros to check register numbers against specific register classes. */
1107 /* These assume that REGNO is a hard or pseudo reg number.
1108 They give nonzero only if REGNO is a hard reg of the suitable class
1109 or a pseudo reg currently allocated to a suitable hard reg.
1110 Since they use reg_renumber, they are safe only once reg_renumber
1111 has been allocated, which happens in local-alloc.c. */
1113 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1114 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1115 #define REGNO_OK_FOR_BASE_P(REGNO) \
1116 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1117 #define REGNO_OK_FOR_FP_P(REGNO) \
1118 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1120 /* Now macros that check whether X is a register and also,
1121 strictly, whether it is in a specified class.
1123 These macros are specific to the HP-PA, and may be used only
1124 in code for printing assembler insns and in conditions for
1125 define_optimization. */
1127 /* 1 if X is an fp register. */
1129 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1131 /* Maximum number of registers that can appear in a valid memory address. */
1133 #define MAX_REGS_PER_ADDRESS 2
1135 /* Recognize any constant value that is a valid address except
1136 for symbolic addresses. We get better CSE by rejecting them
1137 here and allowing hppa_legitimize_address to break them up. We
1138 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1140 #define CONSTANT_ADDRESS_P(X) \
1141 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1142 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1143 || GET_CODE (X) == HIGH) \
1144 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1146 /* Include all constant integers and constant doubles, but not
1147 floating-point, except for floating-point zero.
1149 Reject LABEL_REFs if we're not using gas or the new HP assembler.
1151 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need
1153 #ifndef NEW_HP_ASSEMBLER
1154 #define NEW_HP_ASSEMBLER 0
1156 #define LEGITIMATE_CONSTANT_P(X) \
1157 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1158 || (X) == CONST0_RTX (GET_MODE (X))) \
1159 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
1160 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
1161 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
1162 && !(HOST_BITS_PER_WIDE_INT <= 32 \
1163 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
1164 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
1165 || cint_ok_for_move (INTVAL (X)))) \
1166 && !function_label_operand (X, VOIDmode))
1168 /* Subroutine for EXTRA_CONSTRAINT.
1170 Return 1 iff OP is a pseudo which did not get a hard register and
1171 we are running the reload pass. */
1173 #define IS_RELOADING_PSEUDO_P(OP) \
1174 ((reload_in_progress \
1175 && GET_CODE (OP) == REG \
1176 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1177 && reg_renumber [REGNO (OP)] < 0))
1179 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1181 For the HPPA, `Q' means that this is a memory operand but not a
1182 symbolic memory operand. Note that an unassigned pseudo register
1183 is such a memory operand. Needed because reload will generate
1184 these things in insns and then not re-recognize the insns, causing
1185 constrain_operands to fail.
1187 `R' is used for scaled indexed addresses.
1189 `S' is the constant 31.
1191 `T' is for fp loads and stores. */
1192 #define EXTRA_CONSTRAINT(OP, C) \
1194 (IS_RELOADING_PSEUDO_P (OP) \
1195 || (GET_CODE (OP) == MEM \
1196 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1197 || reload_in_progress) \
1198 && ! symbolic_memory_operand (OP, VOIDmode) \
1199 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1200 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1201 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1203 (GET_CODE (OP) == MEM \
1204 && GET_CODE (XEXP (OP, 0)) == PLUS \
1205 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1206 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1207 && (move_operand (OP, GET_MODE (OP)) \
1208 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1209 || reload_in_progress)) \
1211 (GET_CODE (OP) == MEM \
1212 /* Using DFmode forces only short displacements \
1213 to be recognized as valid in reg+d addresses. \
1214 However, this is not necessary for PA2.0 since\
1215 it has long FP loads/stores. \
1217 FIXME: the ELF32 linker clobbers the LSB of \
1218 the FP register number in {fldw,fstw} insns. \
1219 Thus, we only allow long FP loads/stores on \
1221 && memory_address_p ((TARGET_PA_20 \
1226 && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \
1227 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1228 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\
1229 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC\
1230 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1231 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1232 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1233 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
1235 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
1237 (GET_CODE (OP) == MEM \
1238 && GET_CODE (XEXP (OP, 0)) == LO_SUM \
1239 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1240 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
1241 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
1242 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1244 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
1247 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1248 and check its validity for a certain class.
1249 We have two alternate definitions for each of them.
1250 The usual definition accepts all pseudo regs; the other rejects
1251 them unless they have been allocated suitable hard regs.
1252 The symbol REG_OK_STRICT causes the latter definition to be used.
1254 Most source files want to accept pseudo regs in the hope that
1255 they will get allocated to the class that the insn wants them to be in.
1256 Source files for reload pass need to be strict.
1257 After reload, it makes no difference, since pseudo regs have
1258 been eliminated by then. */
1260 #ifndef REG_OK_STRICT
1262 /* Nonzero if X is a hard reg that can be used as an index
1263 or if it is a pseudo reg. */
1264 #define REG_OK_FOR_INDEX_P(X) \
1265 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1266 /* Nonzero if X is a hard reg that can be used as a base reg
1267 or if it is a pseudo reg. */
1268 #define REG_OK_FOR_BASE_P(X) \
1269 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1273 /* Nonzero if X is a hard reg that can be used as an index. */
1274 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1275 /* Nonzero if X is a hard reg that can be used as a base reg. */
1276 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1280 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1281 that is a valid memory address for an instruction.
1282 The MODE argument is the machine mode for the MEM expression
1283 that wants to use this address.
1285 On the HP-PA, the actual legitimate addresses must be
1286 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1287 But we can treat a SYMBOL_REF as legitimate if it is part of this
1288 function's constant-pool, because such addresses can actually
1289 be output as REG+SMALLINT.
1291 Note we only allow 5 bit immediates for access to a constant address;
1292 doing so avoids losing for loading/storing a FP register at an address
1293 which will not fit in 5 bits. */
1295 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1296 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1298 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1299 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1301 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1302 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1304 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1305 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1307 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1309 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1310 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1311 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1312 && REG_P (XEXP (X, 0)) \
1313 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1315 else if (GET_CODE (X) == PLUS) \
1317 rtx base = 0, index = 0; \
1318 if (REG_P (XEXP (X, 0)) \
1319 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1320 base = XEXP (X, 0), index = XEXP (X, 1); \
1321 else if (REG_P (XEXP (X, 1)) \
1322 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1323 base = XEXP (X, 1), index = XEXP (X, 0); \
1325 if (GET_CODE (index) == CONST_INT \
1326 && ((INT_14_BITS (index) \
1327 && (TARGET_SOFT_FLOAT \
1329 && ((MODE == SFmode \
1330 && (INTVAL (index) % 4) == 0)\
1331 || (MODE == DFmode \
1332 && (INTVAL (index) % 8) == 0)))\
1333 || ((MODE) != SFmode && (MODE) != DFmode))) \
1334 || INT_5_BITS (index))) \
1336 if (! TARGET_SOFT_FLOAT \
1337 && ! TARGET_DISABLE_INDEXING \
1339 && ((MODE) == SFmode || (MODE) == DFmode) \
1340 && GET_CODE (index) == MULT \
1341 && GET_CODE (XEXP (index, 0)) == REG \
1342 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1343 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1344 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
1347 else if (GET_CODE (X) == LO_SUM \
1348 && GET_CODE (XEXP (X, 0)) == REG \
1349 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1350 && CONSTANT_P (XEXP (X, 1)) \
1351 && (TARGET_SOFT_FLOAT \
1352 /* We can allow symbolic LO_SUM addresses\
1356 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1357 || ((MODE) != SFmode \
1358 && (MODE) != DFmode))) \
1360 else if (GET_CODE (X) == LO_SUM \
1361 && GET_CODE (XEXP (X, 0)) == SUBREG \
1362 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1363 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1364 && CONSTANT_P (XEXP (X, 1)) \
1365 && (TARGET_SOFT_FLOAT \
1366 /* We can allow symbolic LO_SUM addresses\
1370 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1371 || ((MODE) != SFmode \
1372 && (MODE) != DFmode))) \
1374 else if (GET_CODE (X) == LABEL_REF \
1375 || (GET_CODE (X) == CONST_INT \
1376 && INT_5_BITS (X))) \
1378 /* Needed for -fPIC */ \
1379 else if (GET_CODE (X) == LO_SUM \
1380 && GET_CODE (XEXP (X, 0)) == REG \
1381 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1382 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1383 && (TARGET_SOFT_FLOAT \
1384 || (TARGET_PA_20 && !TARGET_ELF32) \
1385 || ((MODE) != SFmode \
1386 && (MODE) != DFmode))) \
1390 /* Look for machine dependent ways to make the invalid address AD a
1393 For the PA, transform:
1395 memory(X + <large int>)
1399 if (<large int> & mask) >= 16
1400 Y = (<large int> & ~mask) + mask + 1 Round up.
1402 Y = (<large int> & ~mask) Round down.
1404 memory (Z + (<large int> - Y));
1406 This makes reload inheritance and reload_cse work better since Z
1409 There may be more opportunities to improve code with this hook. */
1410 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1412 int offset, newoffset, mask; \
1413 rtx new, temp = NULL_RTX; \
1415 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1416 ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \
1419 && GET_CODE (AD) == PLUS) \
1420 temp = simplify_binary_operation (PLUS, Pmode, \
1421 XEXP (AD, 0), XEXP (AD, 1)); \
1423 new = temp ? temp : AD; \
1426 && GET_CODE (new) == PLUS \
1427 && GET_CODE (XEXP (new, 0)) == REG \
1428 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1430 offset = INTVAL (XEXP ((new), 1)); \
1432 /* Choose rounding direction. Round up if we are >= halfway. */ \
1433 if ((offset & mask) >= ((mask + 1) / 2)) \
1434 newoffset = (offset & ~mask) + mask + 1; \
1436 newoffset = offset & ~mask; \
1438 if (newoffset != 0 \
1439 && VAL_14_BITS_P (newoffset)) \
1442 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1443 GEN_INT (newoffset)); \
1444 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1445 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1446 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1456 /* Try machine-dependent ways of modifying an illegitimate address
1457 to be legitimate. If we find one, return the new, valid address.
1458 This macro is used in only one place: `memory_address' in explow.c.
1460 OLDX is the address as it was before break_out_memory_refs was called.
1461 In some cases it is useful to look at this to decide what needs to be done.
1463 MODE and WIN are passed so that this macro can use
1464 GO_IF_LEGITIMATE_ADDRESS.
1466 It is always safe for this macro to do nothing. It exists to recognize
1467 opportunities to optimize the output. */
1469 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1470 { rtx orig_x = (X); \
1471 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1472 if ((X) != orig_x && memory_address_p (MODE, X)) \
1475 /* Go to LABEL if ADDR (a legitimate address expression)
1476 has an effect that depends on the machine mode it is used for. */
1478 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1479 if (GET_CODE (ADDR) == PRE_DEC \
1480 || GET_CODE (ADDR) == POST_DEC \
1481 || GET_CODE (ADDR) == PRE_INC \
1482 || GET_CODE (ADDR) == POST_INC) \
1485 #define TARGET_ASM_SELECT_SECTION pa_select_section
1487 /* Define this macro if references to a symbol must be treated
1488 differently depending on something about the variable or
1489 function named by the symbol (such as what section it is in).
1491 The macro definition, if any, is executed immediately after the
1492 rtl for DECL or other node is created.
1493 The value of the rtl will be a `mem' whose address is a
1496 The usual thing for this macro to do is to a flag in the
1497 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1498 name string in the `symbol_ref' (if one bit is not enough
1501 On the HP-PA we use this to indicate if a symbol is in text or
1502 data space. Also, function labels need special treatment. */
1504 #define TEXT_SPACE_P(DECL)\
1505 (TREE_CODE (DECL) == FUNCTION_DECL \
1506 || (TREE_CODE (DECL) == VAR_DECL \
1507 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1508 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1510 || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \
1511 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1513 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1515 /* Specify the machine mode that this machine uses
1516 for the index in the tablejump instruction. */
1517 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1519 /* Jump tables must be 32 bit aligned, no matter the size of the element. */
1520 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1522 /* Define this as 1 if `char' should by default be signed; else as 0. */
1523 #define DEFAULT_SIGNED_CHAR 1
1525 /* Max number of bytes we can move from memory to memory
1526 in one reasonably fast instruction. */
1529 /* Higher than the default as we prefer to use simple move insns
1530 (better scheduling and delay slot filling) and because our
1531 built-in block move is really a 2X unrolled loop.
1533 Believe it or not, this has to be big enough to allow for copying all
1534 arguments passed in registers to avoid infinite recursion during argument
1535 setup for a function call. Why? Consider how we copy the stack slots
1536 reserved for parameters when they may be trashed by a call. */
1537 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1539 /* Define if operations between registers always perform the operation
1540 on the full register even if a narrower mode is specified. */
1541 #define WORD_REGISTER_OPERATIONS
1543 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1544 will either zero-extend or sign-extend. The value of this macro should
1545 be the code that says which one of the two operations is implicitly
1546 done, NIL if none. */
1547 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1549 /* Nonzero if access to memory by bytes is slow and undesirable. */
1550 #define SLOW_BYTE_ACCESS 1
1552 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1553 is done just by pretending it is already truncated. */
1554 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1556 /* We assume that the store-condition-codes instructions store 0 for false
1557 and some other value for true. This is the value stored for true. */
1559 #define STORE_FLAG_VALUE 1
1561 /* When a prototype says `char' or `short', really pass an `int'. */
1562 #define PROMOTE_PROTOTYPES 1
1563 #define PROMOTE_FUNCTION_RETURN 1
1565 /* Specify the machine mode that pointers have.
1566 After generation of rtl, the compiler makes no further distinction
1567 between pointers and any other objects of this machine mode. */
1568 #define Pmode word_mode
1570 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1571 return the mode to be used for the comparison. For floating-point, CCFPmode
1572 should be used. CC_NOOVmode should be used when the first operand is a
1573 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1575 #define SELECT_CC_MODE(OP,X,Y) \
1576 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1578 /* A function address in a call instruction
1579 is a byte address (for indexing purposes)
1580 so give the MEM rtx a byte's mode. */
1581 #define FUNCTION_MODE SImode
1583 /* Define this if addresses of constant functions
1584 shouldn't be put through pseudo regs where they can be cse'd.
1585 Desirable on machines where ordinary constants are expensive
1586 but a CALL with constant address is cheap. */
1587 #define NO_FUNCTION_CSE
1589 /* Define this to be nonzero if shift instructions ignore all but the low-order
1591 #define SHIFT_COUNT_TRUNCATED 1
1593 /* Compute the cost of computing a constant rtl expression RTX
1594 whose rtx-code is CODE. The body of this macro is a portion
1595 of a switch statement. If the code is computed here,
1596 return it with a return statement. Otherwise, break from the switch. */
1598 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1600 if (INTVAL (RTX) == 0) return 0; \
1601 if (INT_14_BITS (RTX)) return 1; \
1608 case CONST_DOUBLE: \
1609 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
1610 && OUTER_CODE != SET) \
1615 #define ADDRESS_COST(RTX) \
1616 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1618 /* Compute extra cost of moving data between one register class
1621 Make moves from SAR so expensive they should never happen. We used to
1622 have 0xffff here, but that generates overflow in rare cases.
1624 Copies involving a FP register and a non-FP register are relatively
1625 expensive because they must go through memory.
1627 Other copies are reasonably cheap. */
1628 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1629 (CLASS1 == SHIFT_REGS ? 0x100 \
1630 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1631 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1635 /* Provide the costs of a rtl expression. This is in the body of a
1636 switch on CODE. The purpose for the cost of MULT is to encourage
1637 `synth_mult' to find a synthetic multiply when reasonable. */
1639 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1641 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1642 return COSTS_N_INSNS (3); \
1643 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1644 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1646 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1647 return COSTS_N_INSNS (14); \
1651 return COSTS_N_INSNS (60); \
1652 case PLUS: /* this includes shNadd insns */ \
1654 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1655 return COSTS_N_INSNS (3); \
1656 return COSTS_N_INSNS (1); \
1660 return COSTS_N_INSNS (1);
1662 /* Adjust the cost of branches. */
1663 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1665 /* Handling the special cases is going to get too complicated for a macro,
1666 just call `pa_adjust_insn_length' to do the real work. */
1667 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1668 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1670 /* Millicode insns are actually function calls with some special
1671 constraints on arguments and register usage.
1673 Millicode calls always expect their arguments in the integer argument
1674 registers, and always return their result in %r29 (ret1). They
1675 are expected to clobber their arguments, %r1, %r29, and the return
1676 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1678 This macro tells reorg that the references to arguments and
1679 millicode calls do not appear to happen until after the millicode call.
1680 This allows reorg to put insns which set the argument registers into the
1681 delay slot of the millicode call -- thus they act more like traditional
1684 Note we can not consider side effects of the insn to be delayed because
1685 the branch and link insn will clobber the return pointer. If we happened
1686 to use the return pointer in the delay slot of the call, then we lose.
1688 get_attr_type will try to recognize the given insn, so make sure to
1689 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1691 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1694 /* Control the assembler format that we output. */
1696 /* Output to assembler file text saying following lines
1697 may contain character constants, extra white space, comments, etc. */
1699 #define ASM_APP_ON ""
1701 /* Output to assembler file text saying following lines
1702 no longer contain unusual constructs. */
1704 #define ASM_APP_OFF ""
1706 /* Output deferred plabels at the end of the file. */
1708 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
1710 /* This is how to output the definition of a user-level label named NAME,
1711 such as the label on a static function or variable NAME. */
1713 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1714 do { assemble_name (FILE, NAME); \
1715 fputc ('\n', FILE); } while (0)
1717 /* This is how to output a reference to a user-level label named NAME.
1718 `assemble_name' uses this. */
1720 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1722 const char *xname = (NAME); \
1723 if (FUNCTION_NAME_P (NAME)) \
1725 if (xname[0] == '*') \
1728 fputs (user_label_prefix, FILE); \
1729 fputs (xname, FILE); \
1732 /* This is how to store into the string LABEL
1733 the symbol_ref name of an internal numbered label where
1734 PREFIX is the class of label and NUM is the number within the class.
1735 This is suitable for output with `assemble_name'. */
1737 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1738 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1740 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1742 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1743 output_ascii ((FILE), (P), (SIZE))
1745 /* This is how to output an element of a case-vector that is absolute.
1746 Note that this method makes filling these branch delay slots
1749 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1750 if (TARGET_BIG_SWITCH) \
1751 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1753 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1755 /* Jump tables are executable code and live in the TEXT section on the PA. */
1756 #define JUMP_TABLES_IN_TEXT_SECTION 1
1758 /* This is how to output an element of a case-vector that is relative.
1759 This must be defined correctly as it is used when generating PIC code.
1761 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1762 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1763 rather than a table of absolute addresses. */
1765 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1766 if (TARGET_BIG_SWITCH) \
1767 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1769 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1771 /* This is how to output an assembler line
1772 that says to advance the location counter
1773 to a multiple of 2**LOG bytes. */
1775 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1776 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1778 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1779 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1781 /* This says how to output an assembler line to define a global common symbol
1782 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1784 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1786 assemble_name ((FILE), (NAME)); \
1787 fputs ("\t.comm ", (FILE)); \
1788 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1790 /* This says how to output an assembler line to define a local common symbol
1791 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1793 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1795 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1796 assemble_name ((FILE), (NAME)); \
1797 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1799 #define ASM_PN_FORMAT "%s___%lu"
1801 /* All HP assemblers use "!" to separate logical lines. */
1802 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1804 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1805 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1807 /* Print operand X (an rtx) in assembler syntax to file FILE.
1808 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1809 For `%' followed by punctuation, CODE is the punctuation and X is null.
1811 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1812 and an immediate zero should be represented as `r0'.
1814 Several % codes are defined:
1816 C compare conditions
1817 N extract conditions
1818 M modifier to handle preincrement addressing for memory refs.
1819 F modifier to handle preincrement addressing for fp memory refs */
1821 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1824 /* Print a memory address as an operand to reference that memory location. */
1826 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1827 { register rtx addr = ADDR; \
1828 register rtx base; \
1830 switch (GET_CODE (addr)) \
1833 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1836 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1837 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1838 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1839 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1842 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
1845 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1846 fputs ("R'", FILE); \
1847 else if (flag_pic == 0) \
1848 fputs ("RR'", FILE); \
1850 fputs ("RT'", FILE); \
1851 output_global_address (FILE, XEXP (addr, 1), 0); \
1852 fputs ("(", FILE); \
1853 output_operand (XEXP (addr, 0), 0); \
1854 fputs (")", FILE); \
1857 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
1858 fprintf (FILE, "(%%r0)"); \
1861 output_addr_const (FILE, addr); \
1865 /* Find the return address associated with the frame given by
1867 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1868 (return_addr_rtx (COUNT, FRAMEADDR))
1870 /* Used to mask out junk bits from the return address, such as
1871 processor state, interrupt status, condition codes and the like. */
1872 #define MASK_RETURN_ADDR \
1873 /* The privilege level is in the two low order bits, mask em out \
1874 of the return address. */ \
1877 /* The number of Pmode words for the setjmp buffer. */
1878 #define JMP_BUF_SIZE 50
1880 #define PREDICATE_CODES \
1881 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1882 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
1883 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
1884 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1885 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1886 {"reg_before_reload_operand", {REG, MEM}}, \
1887 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1888 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \
1890 {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \
1891 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
1892 {"pic_label_operand", {LABEL_REF, CONST}}, \
1893 {"fp_reg_operand", {REG}}, \
1894 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1895 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
1896 {"pre_cint_operand", {CONST_INT}}, \
1897 {"post_cint_operand", {CONST_INT}}, \
1898 {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1899 {"ireg_or_int5_operand", {CONST_INT, REG}}, \
1900 {"int5_operand", {CONST_INT}}, \
1901 {"uint5_operand", {CONST_INT}}, \
1902 {"int11_operand", {CONST_INT}}, \
1903 {"uint32_operand", {CONST_INT, \
1904 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
1905 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1906 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1907 {"ior_operand", {CONST_INT}}, \
1908 {"lhs_lshift_cint_operand", {CONST_INT}}, \
1909 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
1910 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1911 {"pc_or_label_operand", {PC, LABEL_REF}}, \
1912 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
1913 {"shadd_operand", {CONST_INT}}, \
1914 {"basereg_operand", {REG}}, \
1915 {"div_operand", {REG, CONST_INT}}, \
1916 {"ireg_operand", {REG}}, \
1917 {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \
1919 {"movb_comparison_operator", {EQ, NE, LT, GE}},
1921 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
1922 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1923 "__canonicalize_funcptr_for_compare"
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