1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 enum cmp_type /* comparison type */
27 CMP_SI, /* compare integers */
28 CMP_SF, /* compare single precision floats */
29 CMP_DF, /* compare double precision floats */
30 CMP_MAX /* max comparison type */
33 /* For long call handling. */
34 extern unsigned long total_code_bytes;
36 /* Which processor to schedule for. */
48 /* For -mschedule= option. */
49 extern const char *pa_cpu_string;
50 extern enum processor_type pa_cpu;
52 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
54 /* Which architecture to generate code for. */
56 enum architecture_type
65 /* For -march= option. */
66 extern const char *pa_arch_string;
67 extern enum architecture_type pa_arch;
69 /* Print subsidiary information on the compiler version in use. */
71 #define TARGET_VERSION fputs (" (hppa)", stderr);
73 /* Run-time compilation parameters selecting different hardware subsets. */
75 extern int target_flags;
77 /* compile code for HP-PA 1.1 ("Snake"). */
81 /* Disable all FP registers (they all become fixed). This may be necessary
82 for compiling kernels which perform lazy context switching of FP regs.
83 Note if you use this option and try to perform floating point operations
84 the compiler will abort! */
86 #define MASK_DISABLE_FPREGS 2
87 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
89 /* Generate code which assumes that all space register are equivalent.
90 Triggers aggressive unscaled index addressing and faster
91 builtin_return_address. */
92 #define MASK_NO_SPACE_REGS 4
93 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
95 /* Allow unconditional jumps in the delay slots of call instructions. */
96 #define MASK_JUMP_IN_DELAY 8
97 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
99 /* Disable indexed addressing modes. */
100 #define MASK_DISABLE_INDEXING 32
101 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
103 /* Emit code which follows the new portable runtime calling conventions
104 HP wants everyone to use for ELF objects. If at all possible you want
105 to avoid this since it's a performance loss for non-prototyped code.
107 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
108 long-call stubs which is quite expensive. */
109 #define MASK_PORTABLE_RUNTIME 64
110 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
112 /* Emit directives only understood by GAS. This allows parameter
113 relocations to work for static functions. There is no way
114 to make them work the HP assembler at this time. */
116 #define TARGET_GAS (target_flags & MASK_GAS)
118 /* Emit code for processors which do not have an FPU. */
119 #define MASK_SOFT_FLOAT 256
120 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
122 /* Use 3-insn load/store sequences for access to large data segments
123 in shared libraries on hpux10. */
124 #define MASK_LONG_LOAD_STORE 512
125 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
127 /* Use a faster sequence for indirect calls. This assumes that calls
128 through function pointers will never cross a space boundary, and
129 that the executable is not dynamically linked. Such assumptions
130 are generally safe for building kernels and statically linked
131 executables. Code compiled with this option will fail miserably if
132 the executable is dynamically linked or uses nested functions! */
133 #define MASK_FAST_INDIRECT_CALLS 1024
134 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
136 /* Generate code with big switch statements to avoid out of range branches
137 occurring within the switch table. */
138 #define MASK_BIG_SWITCH 2048
139 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
141 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
142 true when this is true. */
143 #define MASK_PA_20 4096
145 /* Generate cpp defines for server I/O. */
146 #define MASK_SIO 8192
147 #define TARGET_SIO (target_flags & MASK_SIO)
149 /* Assume GNU linker by default. */
150 #define MASK_GNU_LD 16384
151 #ifndef TARGET_GNU_LD
152 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
155 /* Force generation of long calls. */
156 #define MASK_LONG_CALLS 32768
157 #ifndef TARGET_LONG_CALLS
158 #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
162 #define TARGET_PA_10 (target_flags & (MASK_PA_11 | MASK_PA_20) == 0)
166 #define TARGET_PA_11 (target_flags & MASK_PA_11)
170 #define TARGET_PA_20 (target_flags & MASK_PA_20)
173 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
175 #define TARGET_64BIT 0
178 /* Generate code for ELF32 ABI. */
180 #define TARGET_ELF32 0
183 /* Generate code for SOM 32bit ABI. */
188 /* The following three defines are potential target switches. The current
189 defines are optimal given the current capabilities of GAS and GNU ld. */
191 /* Define to a C expression evaluating to true to use long absolute calls.
192 Currently, only the HP assembler and SOM linker support long absolute
193 calls. They are used only in non-pic code. */
194 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
196 /* Define to a C expression evaluating to true to use long pic symbol
197 difference calls. This is a call variant similar to the long pic
198 pc-relative call. Long pic symbol difference calls are only used with
199 the HP SOM linker. Currently, only the HP assembler supports these
200 calls. GAS doesn't allow an arbritrary difference of two symbols. */
201 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS)
203 /* Define to a C expression evaluating to true to use long pic
204 pc-relative calls. Long pic pc-relative calls are only used with
205 GAS. Currently, they are usable for calls within a module but
206 not for external calls. */
207 #define TARGET_LONG_PIC_PCREL_CALL 0
209 /* Define to a C expression evaluating to true to use SOM secondary
210 definition symbols for weak support. Linker support for secondary
211 definition symbols is buggy prior to HP-UX 11.X. */
212 #define TARGET_SOM_SDEF 0
214 /* Macro to define tables used to set the flags. This is a
215 list in braces of target switches with each switch being
216 { "NAME", VALUE, "HELP_STRING" }. VALUE is the bits to set,
217 or minus the bits to clear. An empty string NAME is used to
218 identify the default VALUE. Do not mark empty strings for
221 #define TARGET_SWITCHES \
222 {{ "snake", MASK_PA_11, \
223 N_("Generate PA1.1 code") }, \
224 { "nosnake", -(MASK_PA_11 | MASK_PA_20), \
225 N_("Generate PA1.0 code") }, \
226 { "pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), \
227 N_("Generate PA1.0 code") }, \
228 { "pa-risc-1-1", MASK_PA_11, \
229 N_("Generate PA1.1 code") }, \
230 { "pa-risc-2-0", MASK_PA_20, \
231 N_("Generate PA2.0 code (requires binutils 2.10 or later)") }, \
232 { "disable-fpregs", MASK_DISABLE_FPREGS, \
233 N_("Disable FP regs") }, \
234 { "no-disable-fpregs", -MASK_DISABLE_FPREGS, \
235 N_("Do not disable FP regs") }, \
236 { "no-space-regs", MASK_NO_SPACE_REGS, \
237 N_("Disable space regs") }, \
238 { "space-regs", -MASK_NO_SPACE_REGS, \
239 N_("Do not disable space regs") }, \
240 { "jump-in-delay", MASK_JUMP_IN_DELAY, \
241 N_("Put jumps in call delay slots") }, \
242 { "no-jump-in-delay", -MASK_JUMP_IN_DELAY, \
243 N_("Do not put jumps in call delay slots") }, \
244 { "disable-indexing", MASK_DISABLE_INDEXING, \
245 N_("Disable indexed addressing") }, \
246 { "no-disable-indexing", -MASK_DISABLE_INDEXING, \
247 N_("Do not disable indexed addressing") }, \
248 { "portable-runtime", MASK_PORTABLE_RUNTIME, \
249 N_("Use portable calling conventions") }, \
250 { "no-portable-runtime", -MASK_PORTABLE_RUNTIME, \
251 N_("Do not use portable calling conventions") }, \
253 N_("Assume code will be assembled by GAS") }, \
254 { "no-gas", -MASK_GAS, \
255 N_("Do not assume code will be assembled by GAS") }, \
256 { "soft-float", MASK_SOFT_FLOAT, \
257 N_("Use software floating point") }, \
258 { "no-soft-float", -MASK_SOFT_FLOAT, \
259 N_("Do not use software floating point") }, \
260 { "long-load-store", MASK_LONG_LOAD_STORE, \
261 N_("Emit long load/store sequences") }, \
262 { "no-long-load-store", -MASK_LONG_LOAD_STORE, \
263 N_("Do not emit long load/store sequences") }, \
264 { "fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, \
265 N_("Generate fast indirect calls") }, \
266 { "no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, \
267 N_("Do not generate fast indirect calls") }, \
268 { "big-switch", MASK_BIG_SWITCH, \
269 N_("Generate code for huge switch statements") }, \
270 { "no-big-switch", -MASK_BIG_SWITCH, \
271 N_("Do not generate code for huge switch statements") }, \
272 { "long-calls", MASK_LONG_CALLS, \
273 N_("Always generate long calls") }, \
274 { "no-long-calls", -MASK_LONG_CALLS, \
275 N_("Generate long calls only when needed") }, \
277 N_("Enable linker optimizations") }, \
279 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
282 #ifndef TARGET_DEFAULT
283 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
286 #ifndef TARGET_CPU_DEFAULT
287 #define TARGET_CPU_DEFAULT 0
290 #ifndef SUBTARGET_SWITCHES
291 #define SUBTARGET_SWITCHES
294 #ifndef TARGET_SCHED_DEFAULT
295 #define TARGET_SCHED_DEFAULT "8000"
298 #define TARGET_OPTIONS \
300 { "schedule=", &pa_cpu_string, \
301 N_("Specify CPU for scheduling purposes") }, \
302 { "arch=", &pa_arch_string, \
303 N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later.") }\
306 /* Specify the dialect of assembler to use. New mnemonics is dialect one
307 and the old mnemonics are dialect zero. */
308 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
310 #define OVERRIDE_OPTIONS override_options ()
312 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
313 code duplication we simply include this file and override as needed. */
316 /* We do not have to be compatible with dbx, so we enable gdb extensions
318 #define DEFAULT_GDB_EXTENSIONS 1
320 /* This used to be zero (no max length), but big enums and such can
321 cause huge strings which killed gas.
323 We also have to avoid lossage in dbxout.c -- it does not compute the
324 string size accurately, so we are real conservative here. */
325 #undef DBX_CONTIN_LENGTH
326 #define DBX_CONTIN_LENGTH 3000
328 /* Only labels should ever begin in column zero. */
329 #define ASM_STABS_OP "\t.stabs\t"
330 #define ASM_STABN_OP "\t.stabn\t"
332 /* GDB always assumes the current function's frame begins at the value
333 of the stack pointer upon entry to the current function. Accessing
334 local variables and parameters passed on the stack is done using the
335 base of the frame + an offset provided by GCC.
337 For functions which have frame pointers this method works fine;
338 the (frame pointer) == (stack pointer at function entry) and GCC provides
339 an offset relative to the frame pointer.
341 This loses for functions without a frame pointer; GCC provides an offset
342 which is relative to the stack pointer after adjusting for the function's
343 frame size. GDB would prefer the offset to be relative to the value of
344 the stack pointer at the function's entry. Yuk! */
345 #define DEBUGGER_AUTO_OFFSET(X) \
346 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
347 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
349 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
350 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
351 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
353 #define TARGET_CPU_CPP_BUILTINS() \
355 builtin_assert("cpu=hppa"); \
356 builtin_assert("machine=hppa"); \
357 builtin_define("__hppa"); \
358 builtin_define("__hppa__"); \
361 builtin_define("_LP64"); \
362 builtin_define("__LP64__"); \
365 builtin_define("_PA_RISC2_0"); \
366 else if (TARGET_PA_11) \
367 builtin_define("_PA_RISC1_1"); \
369 builtin_define("_PA_RISC1_0"); \
372 /* An old set of OS defines for various BSD-like systems. */
373 #define TARGET_OS_CPP_BUILTINS() \
376 builtin_define_std ("REVARGV"); \
377 builtin_define_std ("hp800"); \
378 builtin_define_std ("hp9000"); \
379 builtin_define_std ("hp9k8"); \
380 if (c_language != clk_cplusplus \
382 builtin_define ("hppa"); \
383 builtin_define_std ("spectrum"); \
384 builtin_define_std ("unix"); \
385 builtin_assert ("system=bsd"); \
386 builtin_assert ("system=unix"); \
390 #define CC1_SPEC "%{pg:} %{p:}"
392 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
394 /* We don't want -lg. */
396 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
399 /* This macro defines command-line switches that modify the default
402 The definition is be an initializer for an array of structures. Each
403 array element has have three elements: the switch name, one of the
404 enumeration codes ADD or DELETE to indicate whether the string should be
405 inserted or deleted, and the string to be inserted or deleted. */
406 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
408 /* Make gcc agree with <machine/ansi.h> */
410 #define SIZE_TYPE "unsigned int"
411 #define PTRDIFF_TYPE "int"
412 #define WCHAR_TYPE "unsigned int"
413 #define WCHAR_TYPE_SIZE 32
415 /* Show we can debug even without a frame pointer. */
416 #define CAN_DEBUG_WITHOUT_FP
418 /* Machine dependent reorg pass. */
419 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
422 /* target machine storage layout */
424 /* Define this macro if it is advisable to hold scalars in registers
425 in a wider mode than that declared by the program. In such cases,
426 the value is constrained to be within the bounds of the declared
427 type, but kept valid in the wider mode. The signedness of the
428 extension may differ from that of the type. */
430 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
431 if (GET_MODE_CLASS (MODE) == MODE_INT \
432 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
435 /* Define this if most significant bit is lowest numbered
436 in instructions that operate on numbered bit-fields. */
437 #define BITS_BIG_ENDIAN 1
439 /* Define this if most significant byte of a word is the lowest numbered. */
440 /* That is true on the HP-PA. */
441 #define BYTES_BIG_ENDIAN 1
443 /* Define this if most significant word of a multiword number is lowest
445 #define WORDS_BIG_ENDIAN 1
447 #define MAX_BITS_PER_WORD 64
448 #define MAX_LONG_TYPE_SIZE 32
450 /* Width of a word, in units (bytes). */
451 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
452 #define MIN_UNITS_PER_WORD 4
454 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
455 #define PARM_BOUNDARY BITS_PER_WORD
457 /* Largest alignment required for any stack parameter, in bits.
458 Don't define this if it is equal to PARM_BOUNDARY */
459 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
461 /* Boundary (in *bits*) on which stack pointer is always aligned;
462 certain optimizations in combine depend on this.
464 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
465 the stack on the 32 and 64-bit ports, respectively. However, we
466 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
467 in main. Thus, we treat the former as the preferred alignment. */
468 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
469 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
471 /* Allocation boundary (in *bits*) for the code of a function. */
472 #define FUNCTION_BOUNDARY BITS_PER_WORD
474 /* Alignment of field after `int : 0' in a structure. */
475 #define EMPTY_FIELD_BOUNDARY 32
477 /* Every structure's size must be a multiple of this. */
478 #define STRUCTURE_SIZE_BOUNDARY 8
480 /* A bit-field declared as `int' forces `int' alignment for the struct. */
481 #define PCC_BITFIELD_TYPE_MATTERS 1
483 /* No data type wants to be aligned rounder than this. */
484 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
486 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
487 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
488 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
490 /* Make arrays of chars word-aligned for the same reasons. */
491 #define DATA_ALIGNMENT(TYPE, ALIGN) \
492 (TREE_CODE (TYPE) == ARRAY_TYPE \
493 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
494 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
496 /* Set this nonzero if move instructions will actually fail to work
497 when given unaligned data. */
498 #define STRICT_ALIGNMENT 1
500 /* Generate calls to memcpy, memcmp and memset. */
501 #define TARGET_MEM_FUNCTIONS
503 /* Value is 1 if it is a good idea to tie two pseudo registers
504 when one has mode MODE1 and one has mode MODE2.
505 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
506 for any hard reg, then this must be 0 for correct output. */
507 #define MODES_TIEABLE_P(MODE1, MODE2) \
508 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
510 /* Specify the registers used for certain standard purposes.
511 The values of these macros are register numbers. */
513 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
514 /* #define PC_REGNUM */
516 /* Register to use for pushing function arguments. */
517 #define STACK_POINTER_REGNUM 30
519 /* Base register for access to local variables of the function. */
520 #define FRAME_POINTER_REGNUM 3
522 /* Value should be nonzero if functions must have frame pointers. */
523 #define FRAME_POINTER_REQUIRED \
524 (current_function_calls_alloca)
526 /* C statement to store the difference between the frame pointer
527 and the stack pointer values immediately after the function prologue.
529 Note, we always pretend that this is a leaf function because if
530 it's not, there's no point in trying to eliminate the
531 frame pointer. If it is a leaf function, we guessed right! */
532 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
533 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
535 /* Base register for access to arguments of the function. */
536 #define ARG_POINTER_REGNUM 3
538 /* Register in which static-chain is passed to a function. */
539 #define STATIC_CHAIN_REGNUM 29
541 /* Register which holds offset table for position-independent
544 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
545 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
547 /* Function to return the rtx used to save the pic offset table register
548 across function calls. */
549 extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void));
551 #define DEFAULT_PCC_STRUCT_RETURN 0
553 /* SOM ABI says that objects larger than 64 bits are returned in memory.
554 PA64 ABI says that objects larger than 128 bits are returned in memory.
555 Note, int_size_in_bytes can return -1 if the size of the object is
556 variable or larger than the maximum value that can be expressed as
557 a HOST_WIDE_INT. It can also return zero for an empty type. The
558 simplest way to handle variable and empty types is to pass them in
559 memory. This avoids problems in defining the boundaries of argument
560 slots, allocating registers, etc. */
561 #define RETURN_IN_MEMORY(TYPE) \
562 (int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8) \
563 || int_size_in_bytes (TYPE) <= 0)
565 /* Register in which address to store a structure value
566 is passed to a function. */
567 #define STRUCT_VALUE_REGNUM 28
569 /* Describe how we implement __builtin_eh_return. */
570 #define EH_RETURN_DATA_REGNO(N) \
571 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
572 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
573 #define EH_RETURN_HANDLER_RTX \
574 gen_rtx_MEM (word_mode, \
575 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
576 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
579 /* Offset from the argument pointer register value to the top of
580 stack. This is different from FIRST_PARM_OFFSET because of the
582 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
584 /* The letters I, J, K, L and M in a register constraint string
585 can be used to stand for particular ranges of immediate operands.
586 This macro defines what the ranges are.
587 C is the letter, and VALUE is a constant value.
588 Return 1 if VALUE is in the range specified by C.
590 `I' is used for the 11 bit constants.
591 `J' is used for the 14 bit constants.
592 `K' is used for values that can be moved with a zdepi insn.
593 `L' is used for the 5 bit constants.
595 `N' is used for values with the least significant 11 bits equal to zero
596 and when sign extended from 32 to 64 bits the
597 value does not change.
598 `O' is used for numbers n such that n+1 is a power of 2.
601 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
602 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
603 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
604 : (C) == 'K' ? zdepi_cint_p (VALUE) \
605 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
606 : (C) == 'M' ? (VALUE) == 0 \
607 : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
608 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
609 == (HOST_WIDE_INT) -1 << 31)) \
610 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
611 : (C) == 'P' ? and_mask_p (VALUE) \
614 /* Similar, but for floating or large integer constants, and defining letters
615 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
617 For PA, `G' is the floating-point constant zero. `H' is undefined. */
619 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
620 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
621 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
624 /* The class value for index registers, and the one for base regs. */
625 #define INDEX_REG_CLASS GENERAL_REGS
626 #define BASE_REG_CLASS GENERAL_REGS
628 #define FP_REG_CLASS_P(CLASS) \
629 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
631 /* True if register is floating-point. */
632 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
634 /* Given an rtx X being reloaded into a reg required to be
635 in class CLASS, return the class of reg to actually use.
636 In general this is just CLASS; but on some machines
637 in some cases it is preferable to use a more restrictive class. */
638 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
640 /* Return the register class of a scratch register needed to copy IN into
641 or out of a register in CLASS in MODE. If it can be done directly
644 Avoid doing any work for the common case calls. */
646 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
647 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
648 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
649 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
651 /* On the PA it is not possible to directly move data between
652 GENERAL_REGS and FP_REGS. */
653 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
654 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
656 /* Return the stack location to use for secondary memory needed reloads. */
657 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
658 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
661 /* Stack layout; function entry, exit and calling. */
663 /* Define this if pushing a word on the stack
664 makes the stack pointer a smaller address. */
665 /* #define STACK_GROWS_DOWNWARD */
667 /* Believe it or not. */
668 #define ARGS_GROW_DOWNWARD
670 /* Define this if the nominal address of the stack frame
671 is at the high-address end of the local variables;
672 that is, each additional local variable allocated
673 goes at a more negative offset in the frame. */
674 /* #define FRAME_GROWS_DOWNWARD */
676 /* Offset within stack frame to start allocating local variables at.
677 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
678 first local allocated. Otherwise, it is the offset to the BEGINNING
679 of the first local allocated.
681 On the 32-bit ports, we reserve one slot for the previous frame
682 pointer and one fill slot. The fill slot is for compatibility
683 with HP compiled programs. On the 64-bit ports, we reserve one
684 slot for the previous frame pointer. */
685 #define STARTING_FRAME_OFFSET 8
687 /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
688 of the stack. The default is to align it to STACK_BOUNDARY. */
689 #define STACK_ALIGNMENT_NEEDED 0
691 /* If we generate an insn to push BYTES bytes,
692 this says how many the stack pointer really advances by.
693 On the HP-PA, don't define this because there are no push insns. */
694 /* #define PUSH_ROUNDING(BYTES) */
696 /* Offset of first parameter from the argument pointer register value.
697 This value will be negated because the arguments grow down.
698 Also note that on STACK_GROWS_UPWARD machines (such as this one)
699 this is the distance from the frame pointer to the end of the first
700 argument, not it's beginning. To get the real offset of the first
701 argument, the size of the argument must be added. */
703 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
705 /* When a parameter is passed in a register, stack space is still
707 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
709 /* Define this if the above stack space is to be considered part of the
710 space allocated by the caller. */
711 #define OUTGOING_REG_PARM_STACK_SPACE
713 /* Keep the stack pointer constant throughout the function.
714 This is both an optimization and a necessity: longjmp
715 doesn't behave itself when the stack pointer moves within
717 #define ACCUMULATE_OUTGOING_ARGS 1
719 /* The weird HPPA calling conventions require a minimum of 48 bytes on
720 the stack: 16 bytes for register saves, and 32 bytes for magic.
721 This is the difference between the logical top of stack and the
723 #define STACK_POINTER_OFFSET \
724 (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
726 #define STACK_DYNAMIC_OFFSET(FNDECL) \
728 ? (STACK_POINTER_OFFSET) \
729 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
731 /* Value is 1 if returning from a function call automatically
732 pops the arguments described by the number-of-args field in the call.
733 FUNDECL is the declaration node of the function (as a tree),
734 FUNTYPE is the data type of the function (as a tree),
735 or for a library call it is an identifier node for the subroutine name. */
737 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
739 /* Define how to find the value returned by a function.
740 VALTYPE is the data type of the value (as a tree).
741 If the precise function being called is known, FUNC is its FUNCTION_DECL;
742 otherwise, FUNC is 0. */
744 #define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
746 /* Define how to find the value returned by a library function
747 assuming the value has mode MODE. */
749 #define LIBCALL_VALUE(MODE) \
751 (! TARGET_SOFT_FLOAT \
752 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
754 /* 1 if N is a possible register number for a function value
755 as seen by the caller. */
757 #define FUNCTION_VALUE_REGNO_P(N) \
758 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
761 /* Define a data type for recording info about an argument list
762 during the scan of that argument list. This data type should
763 hold all necessary information about the function itself
764 and about the args processed so far, enough to enable macros
765 such as FUNCTION_ARG to determine where the next arg should go.
767 On the HP-PA, this is a single integer, which is a number of words
768 of arguments scanned so far (including the invisible argument,
769 if any, which holds the structure-value-address).
770 Thus 4 or more means all following args should go on the stack. */
772 struct hppa_args {int words, nargs_prototype, indirect; };
774 #define CUMULATIVE_ARGS struct hppa_args
776 /* Initialize a variable CUM of type CUMULATIVE_ARGS
777 for a call to a function whose data type is FNTYPE.
778 For a library call, FNTYPE is 0. */
780 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL) \
782 (CUM).indirect = (FNTYPE) && !(FNDECL), \
783 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
784 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
785 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
786 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
791 /* Similar, but when scanning the definition of a procedure. We always
792 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
794 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
796 (CUM).indirect = 0, \
797 (CUM).nargs_prototype = 1000
799 /* Figure out the size in words of the function argument. The size
800 returned by this macro should always be greater than zero because
801 we pass variable and zero sized objects by reference. */
803 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
804 ((((MODE) != BLKmode \
805 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
806 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
808 /* Update the data in CUM to advance over an argument
809 of mode MODE and data type TYPE.
810 (TYPE is null for libcalls where that information may not be available.) */
812 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
813 { (CUM).nargs_prototype--; \
814 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
815 + (((CUM).words & 01) && (TYPE) != 0 \
816 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
819 /* Determine where to put an argument to a function.
820 Value is zero to push the argument on the stack,
821 or a hard register in which to store the argument.
823 MODE is the argument's machine mode.
824 TYPE is the data type of the argument (as a tree).
825 This is null for libcalls where that information may
827 CUM is a variable of type CUMULATIVE_ARGS which gives info about
828 the preceding args and about the function being called.
829 NAMED is nonzero if this argument is a named parameter
830 (otherwise it is an extra parameter matching an ellipsis).
832 On the HP-PA the first four words of args are normally in registers
833 and the rest are pushed. But any arg that won't entirely fit in regs
836 Arguments passed in registers are either 1 or 2 words long.
838 The caller must make a distinction between calls to explicitly named
839 functions and calls through pointers to functions -- the conventions
840 are different! Calls through pointers to functions only use general
841 registers for the first four argument words.
843 Of course all this is different for the portable runtime model
844 HP wants everyone to use for ELF. Ugh. Here's a quick description
845 of how it's supposed to work.
847 1) callee side remains unchanged. It expects integer args to be
848 in the integer registers, float args in the float registers and
849 unnamed args in integer registers.
851 2) caller side now depends on if the function being called has
852 a prototype in scope (rather than if it's being called indirectly).
854 2a) If there is a prototype in scope, then arguments are passed
855 according to their type (ints in integer registers, floats in float
856 registers, unnamed args in integer registers.
858 2b) If there is no prototype in scope, then floating point arguments
859 are passed in both integer and float registers. egad.
861 FYI: The portable parameter passing conventions are almost exactly like
862 the standard parameter passing conventions on the RS6000. That's why
863 you'll see lots of similar code in rs6000.h. */
865 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
867 /* Do not expect to understand this without reading it several times. I'm
868 tempted to try and simply it, but I worry about breaking something. */
870 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
871 function_arg (&CUM, MODE, TYPE, NAMED, 0)
873 /* Nonzero if we do not know how to pass TYPE solely in registers. */
874 #define MUST_PASS_IN_STACK(MODE,TYPE) \
876 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
877 || TREE_ADDRESSABLE (TYPE)))
879 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
880 function_arg (&CUM, MODE, TYPE, NAMED, 1)
882 /* For an arg passed partly in registers and partly in memory,
883 this is the number of registers used.
884 For args passed entirely in registers or entirely in memory, zero. */
886 /* For PA32 there are never split arguments. PA64, on the other hand, can
887 pass arguments partially in registers and partially in memory. */
888 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
889 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
891 /* If defined, a C expression that gives the alignment boundary, in
892 bits, of an argument with the specified mode and type. If it is
893 not defined, `PARM_BOUNDARY' is used for all arguments. */
895 /* Arguments larger than one word are double word aligned. */
897 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
899 ? (integer_zerop (TYPE_SIZE (TYPE)) \
900 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
901 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
902 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
903 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
905 /* In the 32-bit runtime, arguments larger than eight bytes are passed
906 by invisible reference. As a GCC extension, we also pass anything
907 with a zero or variable size by reference.
909 The 64-bit runtime does not describe passing any types by invisible
910 reference. The internals of GCC can't currently handle passing
911 empty structures, and zero or variable length arrays when they are
912 not passed entirely on the stack or by reference. Thus, as a GCC
913 extension, we pass these types by reference. The HP compiler doesn't
914 support these types, so hopefully there shouldn't be any compatibility
915 issues. This may have to be revisited when HP releases a C99 compiler
916 or updates the ABI. */
917 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
919 ? ((TYPE) && int_size_in_bytes (TYPE) <= 0) \
920 : (((TYPE) && (int_size_in_bytes (TYPE) > 8 \
921 || int_size_in_bytes (TYPE) <= 0)) \
922 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
924 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
925 FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)
928 extern GTY(()) rtx hppa_compare_op0;
929 extern GTY(()) rtx hppa_compare_op1;
930 extern enum cmp_type hppa_branch_type;
932 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
933 as assembly via FUNCTION_PROFILER. Just output a local label.
934 We can't use the function label because the GAS SOM target can't
935 handle the difference of a global symbol and a local symbol. */
937 #ifndef FUNC_BEGIN_PROLOG_LABEL
938 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
941 #define FUNCTION_PROFILER(FILE, LABEL) \
942 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
944 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
945 void hppa_profile_hook PARAMS ((int label_no));
947 /* The profile counter if emitted must come before the prologue. */
948 #define PROFILE_BEFORE_PROLOGUE 1
950 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
951 the stack pointer does not matter. The value is tested only in
952 functions that have frame pointers.
953 No definition is equivalent to always zero. */
955 extern int may_call_alloca;
957 #define EXIT_IGNORE_STACK \
958 (get_frame_size () != 0 \
959 || current_function_calls_alloca || current_function_outgoing_args_size)
961 /* Output assembler code for a block containing the constant parts
962 of a trampoline, leaving space for the variable parts.\
964 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
965 and then branches to the specified routine.
967 This code template is copied from text segment to stack location
968 and then patched with INITIALIZE_TRAMPOLINE to contain
969 valid values, and then entered as a subroutine.
971 It is best to keep this as small as possible to avoid having to
972 flush multiple lines in the cache. */
974 #define TRAMPOLINE_TEMPLATE(FILE) \
976 if (! TARGET_64BIT) \
978 fputs ("\tldw 36(%r22),%r21\n", FILE); \
979 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
980 if (ASSEMBLER_DIALECT == 0) \
981 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
983 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
984 fputs ("\tldw 4(%r21),%r19\n", FILE); \
985 fputs ("\tldw 0(%r21),%r21\n", FILE); \
986 fputs ("\tldsid (%r21),%r1\n", FILE); \
987 fputs ("\tmtsp %r1,%sr0\n", FILE); \
988 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
989 fputs ("\tldw 40(%r22),%r29\n", FILE); \
990 fputs ("\t.word 0\n", FILE); \
991 fputs ("\t.word 0\n", FILE); \
992 fputs ("\t.word 0\n", FILE); \
993 fputs ("\t.word 0\n", FILE); \
997 fputs ("\t.dword 0\n", FILE); \
998 fputs ("\t.dword 0\n", FILE); \
999 fputs ("\t.dword 0\n", FILE); \
1000 fputs ("\t.dword 0\n", FILE); \
1001 fputs ("\tmfia %r31\n", FILE); \
1002 fputs ("\tldd 24(%r31),%r1\n", FILE); \
1003 fputs ("\tldd 24(%r1),%r27\n", FILE); \
1004 fputs ("\tldd 16(%r1),%r1\n", FILE); \
1005 fputs ("\tbve (%r1)\n", FILE); \
1006 fputs ("\tldd 32(%r31),%r31\n", FILE); \
1007 fputs ("\t.dword 0 ; fptr\n", FILE); \
1008 fputs ("\t.dword 0 ; static link\n", FILE); \
1012 /* Length in units of the trampoline for entering a nested function.
1014 Flush the cache entries corresponding to the first and last addresses
1015 of the trampoline. This is necessary as the trampoline may cross two
1018 If the code part of the trampoline ever grows to > 32 bytes, then it
1019 will become necessary to hack on the cacheflush pattern in pa.md. */
1021 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
1023 /* Emit RTL insns to initialize the variable parts of a trampoline.
1024 FNADDR is an RTX for the address of the function's pure code.
1025 CXT is an RTX for the static chain value for the function.
1027 Move the function address to the trampoline template at offset 36.
1028 Move the static chain value to trampoline template at offset 40.
1029 Move the trampoline address to trampoline template at offset 44.
1030 Move r19 to trampoline template at offset 48. The latter two
1031 words create a plabel for the indirect call to the trampoline. */
1033 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1035 if (! TARGET_64BIT) \
1037 rtx start_addr, end_addr; \
1039 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1040 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1041 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1042 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1043 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
1044 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
1045 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
1046 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
1047 gen_rtx_REG (Pmode, 19)); \
1048 /* fdc and fic only use registers for the address to flush, \
1049 they do not accept integer displacements. */ \
1050 start_addr = force_reg (Pmode, (TRAMP)); \
1051 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1052 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1053 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1054 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1055 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1059 rtx start_addr, end_addr; \
1061 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
1062 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1063 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
1064 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1065 /* Create a fat pointer for the trampoline. */ \
1066 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1067 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1068 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1069 end_addr = gen_rtx_REG (Pmode, 27); \
1070 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1071 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1072 /* fdc and fic only use registers for the address to flush, \
1073 they do not accept integer displacements. */ \
1074 start_addr = force_reg (Pmode, (TRAMP)); \
1075 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1076 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1077 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1078 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1079 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1083 /* Perform any machine-specific adjustment in the address of the trampoline.
1084 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1085 Adjust the trampoline address to point to the plabel at offset 44. */
1087 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1088 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1090 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1091 reference the 4 integer arg registers and 4 fp arg registers.
1092 Ordinarily they are not call used registers, but they are for
1093 _builtin_saveregs, so we must make this explicit. */
1095 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1097 /* Implement `va_start' for varargs and stdarg. */
1099 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1100 hppa_va_start (valist, nextarg)
1102 /* Implement `va_arg'. */
1104 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1105 hppa_va_arg (valist, type)
1107 /* Addressing modes, and classification of registers for them.
1109 Using autoincrement addressing modes on PA8000 class machines is
1112 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1113 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1115 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1116 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1118 /* Macros to check register numbers against specific register classes. */
1120 /* These assume that REGNO is a hard or pseudo reg number.
1121 They give nonzero only if REGNO is a hard reg of the suitable class
1122 or a pseudo reg currently allocated to a suitable hard reg.
1123 Since they use reg_renumber, they are safe only once reg_renumber
1124 has been allocated, which happens in local-alloc.c. */
1126 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1127 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1128 #define REGNO_OK_FOR_BASE_P(REGNO) \
1129 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1130 #define REGNO_OK_FOR_FP_P(REGNO) \
1131 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1133 /* Now macros that check whether X is a register and also,
1134 strictly, whether it is in a specified class.
1136 These macros are specific to the HP-PA, and may be used only
1137 in code for printing assembler insns and in conditions for
1138 define_optimization. */
1140 /* 1 if X is an fp register. */
1142 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1144 /* Maximum number of registers that can appear in a valid memory address. */
1146 #define MAX_REGS_PER_ADDRESS 2
1148 /* Recognize any constant value that is a valid address except
1149 for symbolic addresses. We get better CSE by rejecting them
1150 here and allowing hppa_legitimize_address to break them up. We
1151 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1153 #define CONSTANT_ADDRESS_P(X) \
1154 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1155 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1156 || GET_CODE (X) == HIGH) \
1157 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1159 /* Include all constant integers and constant doubles, but not
1160 floating-point, except for floating-point zero.
1162 Reject LABEL_REFs if we're not using gas or the new HP assembler.
1164 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need
1166 #ifndef NEW_HP_ASSEMBLER
1167 #define NEW_HP_ASSEMBLER 0
1169 #define LEGITIMATE_CONSTANT_P(X) \
1170 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1171 || (X) == CONST0_RTX (GET_MODE (X))) \
1172 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
1173 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
1174 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
1175 && !(HOST_BITS_PER_WIDE_INT <= 32 \
1176 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
1177 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
1178 || cint_ok_for_move (INTVAL (X)))) \
1179 && !function_label_operand (X, VOIDmode))
1181 /* Subroutine for EXTRA_CONSTRAINT.
1183 Return 1 iff OP is a pseudo which did not get a hard register and
1184 we are running the reload pass. */
1186 #define IS_RELOADING_PSEUDO_P(OP) \
1187 ((reload_in_progress \
1188 && GET_CODE (OP) == REG \
1189 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1190 && reg_renumber [REGNO (OP)] < 0))
1192 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1194 For the HPPA, `Q' means that this is a memory operand but not a
1195 symbolic memory operand. Note that an unassigned pseudo register
1196 is such a memory operand. Needed because reload will generate
1197 these things in insns and then not re-recognize the insns, causing
1198 constrain_operands to fail.
1200 `R' is used for scaled indexed addresses.
1202 `S' is the constant 31.
1204 `T' is for fp loads and stores. */
1205 #define EXTRA_CONSTRAINT(OP, C) \
1207 (IS_RELOADING_PSEUDO_P (OP) \
1208 || (GET_CODE (OP) == MEM \
1209 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1210 || reload_in_progress) \
1211 && ! symbolic_memory_operand (OP, VOIDmode) \
1212 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1213 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1214 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1216 (GET_CODE (OP) == MEM \
1217 && GET_CODE (XEXP (OP, 0)) == PLUS \
1218 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1219 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1220 && (move_operand (OP, GET_MODE (OP)) \
1221 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1222 || reload_in_progress)) \
1224 (GET_CODE (OP) == MEM \
1225 /* Using DFmode forces only short displacements \
1226 to be recognized as valid in reg+d addresses. \
1227 However, this is not necessary for PA2.0 since\
1228 it has long FP loads/stores. \
1230 FIXME: the ELF32 linker clobbers the LSB of \
1231 the FP register number in {fldw,fstw} insns. \
1232 Thus, we only allow long FP loads/stores on \
1234 && memory_address_p ((TARGET_PA_20 \
1239 && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \
1240 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1241 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\
1242 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC\
1243 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1244 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1245 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1246 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
1248 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
1250 (GET_CODE (OP) == MEM \
1251 && GET_CODE (XEXP (OP, 0)) == LO_SUM \
1252 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1253 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
1254 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
1255 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1257 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
1260 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1261 and check its validity for a certain class.
1262 We have two alternate definitions for each of them.
1263 The usual definition accepts all pseudo regs; the other rejects
1264 them unless they have been allocated suitable hard regs.
1265 The symbol REG_OK_STRICT causes the latter definition to be used.
1267 Most source files want to accept pseudo regs in the hope that
1268 they will get allocated to the class that the insn wants them to be in.
1269 Source files for reload pass need to be strict.
1270 After reload, it makes no difference, since pseudo regs have
1271 been eliminated by then. */
1273 #ifndef REG_OK_STRICT
1275 /* Nonzero if X is a hard reg that can be used as an index
1276 or if it is a pseudo reg. */
1277 #define REG_OK_FOR_INDEX_P(X) \
1278 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1279 /* Nonzero if X is a hard reg that can be used as a base reg
1280 or if it is a pseudo reg. */
1281 #define REG_OK_FOR_BASE_P(X) \
1282 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1286 /* Nonzero if X is a hard reg that can be used as an index. */
1287 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1288 /* Nonzero if X is a hard reg that can be used as a base reg. */
1289 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1293 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1294 that is a valid memory address for an instruction.
1295 The MODE argument is the machine mode for the MEM expression
1296 that wants to use this address.
1298 On the HP-PA, the actual legitimate addresses must be
1299 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1300 But we can treat a SYMBOL_REF as legitimate if it is part of this
1301 function's constant-pool, because such addresses can actually
1302 be output as REG+SMALLINT.
1304 Note we only allow 5 bit immediates for access to a constant address;
1305 doing so avoids losing for loading/storing a FP register at an address
1306 which will not fit in 5 bits. */
1308 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1309 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1311 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1312 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1314 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1315 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1317 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1318 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1320 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1322 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1323 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1324 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1325 && REG_P (XEXP (X, 0)) \
1326 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1328 else if (GET_CODE (X) == PLUS) \
1330 rtx base = 0, index = 0; \
1331 if (REG_P (XEXP (X, 0)) \
1332 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1333 base = XEXP (X, 0), index = XEXP (X, 1); \
1334 else if (REG_P (XEXP (X, 1)) \
1335 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1336 base = XEXP (X, 1), index = XEXP (X, 0); \
1338 if (GET_CODE (index) == CONST_INT \
1339 && ((INT_14_BITS (index) \
1340 && (TARGET_SOFT_FLOAT \
1342 && ((MODE == SFmode \
1343 && (INTVAL (index) % 4) == 0)\
1344 || (MODE == DFmode \
1345 && (INTVAL (index) % 8) == 0)))\
1346 || ((MODE) != SFmode && (MODE) != DFmode))) \
1347 || INT_5_BITS (index))) \
1349 if (! TARGET_SOFT_FLOAT \
1350 && ! TARGET_DISABLE_INDEXING \
1352 && ((MODE) == SFmode || (MODE) == DFmode) \
1353 && GET_CODE (index) == MULT \
1354 && GET_CODE (XEXP (index, 0)) == REG \
1355 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1356 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1357 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
1360 else if (GET_CODE (X) == LO_SUM \
1361 && GET_CODE (XEXP (X, 0)) == REG \
1362 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1363 && CONSTANT_P (XEXP (X, 1)) \
1364 && (TARGET_SOFT_FLOAT \
1365 /* We can allow symbolic LO_SUM addresses\
1369 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1370 || ((MODE) != SFmode \
1371 && (MODE) != DFmode))) \
1373 else if (GET_CODE (X) == LO_SUM \
1374 && GET_CODE (XEXP (X, 0)) == SUBREG \
1375 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1376 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1377 && CONSTANT_P (XEXP (X, 1)) \
1378 && (TARGET_SOFT_FLOAT \
1379 /* We can allow symbolic LO_SUM addresses\
1383 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1384 || ((MODE) != SFmode \
1385 && (MODE) != DFmode))) \
1387 else if (GET_CODE (X) == LABEL_REF \
1388 || (GET_CODE (X) == CONST_INT \
1389 && INT_5_BITS (X))) \
1391 /* Needed for -fPIC */ \
1392 else if (GET_CODE (X) == LO_SUM \
1393 && GET_CODE (XEXP (X, 0)) == REG \
1394 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1395 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1396 && (TARGET_SOFT_FLOAT \
1397 || (TARGET_PA_20 && !TARGET_ELF32) \
1398 || ((MODE) != SFmode \
1399 && (MODE) != DFmode))) \
1403 /* Look for machine dependent ways to make the invalid address AD a
1406 For the PA, transform:
1408 memory(X + <large int>)
1412 if (<large int> & mask) >= 16
1413 Y = (<large int> & ~mask) + mask + 1 Round up.
1415 Y = (<large int> & ~mask) Round down.
1417 memory (Z + (<large int> - Y));
1419 This makes reload inheritance and reload_cse work better since Z
1422 There may be more opportunities to improve code with this hook. */
1423 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1425 int offset, newoffset, mask; \
1426 rtx new, temp = NULL_RTX; \
1428 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1429 ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \
1432 && GET_CODE (AD) == PLUS) \
1433 temp = simplify_binary_operation (PLUS, Pmode, \
1434 XEXP (AD, 0), XEXP (AD, 1)); \
1436 new = temp ? temp : AD; \
1439 && GET_CODE (new) == PLUS \
1440 && GET_CODE (XEXP (new, 0)) == REG \
1441 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1443 offset = INTVAL (XEXP ((new), 1)); \
1445 /* Choose rounding direction. Round up if we are >= halfway. */ \
1446 if ((offset & mask) >= ((mask + 1) / 2)) \
1447 newoffset = (offset & ~mask) + mask + 1; \
1449 newoffset = offset & ~mask; \
1451 if (newoffset != 0 \
1452 && VAL_14_BITS_P (newoffset)) \
1455 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1456 GEN_INT (newoffset)); \
1457 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1458 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1459 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1469 /* Try machine-dependent ways of modifying an illegitimate address
1470 to be legitimate. If we find one, return the new, valid address.
1471 This macro is used in only one place: `memory_address' in explow.c.
1473 OLDX is the address as it was before break_out_memory_refs was called.
1474 In some cases it is useful to look at this to decide what needs to be done.
1476 MODE and WIN are passed so that this macro can use
1477 GO_IF_LEGITIMATE_ADDRESS.
1479 It is always safe for this macro to do nothing. It exists to recognize
1480 opportunities to optimize the output. */
1482 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1483 { rtx orig_x = (X); \
1484 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1485 if ((X) != orig_x && memory_address_p (MODE, X)) \
1488 /* Go to LABEL if ADDR (a legitimate address expression)
1489 has an effect that depends on the machine mode it is used for. */
1491 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1492 if (GET_CODE (ADDR) == PRE_DEC \
1493 || GET_CODE (ADDR) == POST_DEC \
1494 || GET_CODE (ADDR) == PRE_INC \
1495 || GET_CODE (ADDR) == POST_INC) \
1498 #define TARGET_ASM_SELECT_SECTION pa_select_section
1500 /* Define this macro if references to a symbol must be treated
1501 differently depending on something about the variable or
1502 function named by the symbol (such as what section it is in).
1504 The macro definition, if any, is executed immediately after the
1505 rtl for DECL or other node is created.
1506 The value of the rtl will be a `mem' whose address is a
1509 The usual thing for this macro to do is to a flag in the
1510 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1511 name string in the `symbol_ref' (if one bit is not enough
1514 On the HP-PA we use this to indicate if a symbol is in text or
1515 data space. Also, function labels need special treatment. */
1517 #define TEXT_SPACE_P(DECL)\
1518 (TREE_CODE (DECL) == FUNCTION_DECL \
1519 || (TREE_CODE (DECL) == VAR_DECL \
1520 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1521 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1523 || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \
1524 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1526 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1528 /* Specify the machine mode that this machine uses
1529 for the index in the tablejump instruction. */
1530 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1532 /* Jump tables must be 32 bit aligned, no matter the size of the element. */
1533 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1535 /* Define this as 1 if `char' should by default be signed; else as 0. */
1536 #define DEFAULT_SIGNED_CHAR 1
1538 /* Max number of bytes we can move from memory to memory
1539 in one reasonably fast instruction. */
1542 /* Higher than the default as we prefer to use simple move insns
1543 (better scheduling and delay slot filling) and because our
1544 built-in block move is really a 2X unrolled loop.
1546 Believe it or not, this has to be big enough to allow for copying all
1547 arguments passed in registers to avoid infinite recursion during argument
1548 setup for a function call. Why? Consider how we copy the stack slots
1549 reserved for parameters when they may be trashed by a call. */
1550 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1552 /* Define if operations between registers always perform the operation
1553 on the full register even if a narrower mode is specified. */
1554 #define WORD_REGISTER_OPERATIONS
1556 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1557 will either zero-extend or sign-extend. The value of this macro should
1558 be the code that says which one of the two operations is implicitly
1559 done, NIL if none. */
1560 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1562 /* Nonzero if access to memory by bytes is slow and undesirable. */
1563 #define SLOW_BYTE_ACCESS 1
1565 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1566 is done just by pretending it is already truncated. */
1567 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1569 /* We assume that the store-condition-codes instructions store 0 for false
1570 and some other value for true. This is the value stored for true. */
1572 #define STORE_FLAG_VALUE 1
1574 /* When a prototype says `char' or `short', really pass an `int'. */
1575 #define PROMOTE_PROTOTYPES 1
1576 #define PROMOTE_FUNCTION_RETURN 1
1578 /* Specify the machine mode that pointers have.
1579 After generation of rtl, the compiler makes no further distinction
1580 between pointers and any other objects of this machine mode. */
1581 #define Pmode word_mode
1583 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1584 return the mode to be used for the comparison. For floating-point, CCFPmode
1585 should be used. CC_NOOVmode should be used when the first operand is a
1586 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1588 #define SELECT_CC_MODE(OP,X,Y) \
1589 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1591 /* A function address in a call instruction
1592 is a byte address (for indexing purposes)
1593 so give the MEM rtx a byte's mode. */
1594 #define FUNCTION_MODE SImode
1596 /* Define this if addresses of constant functions
1597 shouldn't be put through pseudo regs where they can be cse'd.
1598 Desirable on machines where ordinary constants are expensive
1599 but a CALL with constant address is cheap. */
1600 #define NO_FUNCTION_CSE
1602 /* Define this to be nonzero if shift instructions ignore all but the low-order
1604 #define SHIFT_COUNT_TRUNCATED 1
1606 /* Compute extra cost of moving data between one register class
1609 Make moves from SAR so expensive they should never happen. We used to
1610 have 0xffff here, but that generates overflow in rare cases.
1612 Copies involving a FP register and a non-FP register are relatively
1613 expensive because they must go through memory.
1615 Other copies are reasonably cheap. */
1616 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1617 (CLASS1 == SHIFT_REGS ? 0x100 \
1618 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1619 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1622 /* Adjust the cost of branches. */
1623 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1625 /* Handling the special cases is going to get too complicated for a macro,
1626 just call `pa_adjust_insn_length' to do the real work. */
1627 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1628 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1630 /* Millicode insns are actually function calls with some special
1631 constraints on arguments and register usage.
1633 Millicode calls always expect their arguments in the integer argument
1634 registers, and always return their result in %r29 (ret1). They
1635 are expected to clobber their arguments, %r1, %r29, and the return
1636 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1638 This macro tells reorg that the references to arguments and
1639 millicode calls do not appear to happen until after the millicode call.
1640 This allows reorg to put insns which set the argument registers into the
1641 delay slot of the millicode call -- thus they act more like traditional
1644 Note we can not consider side effects of the insn to be delayed because
1645 the branch and link insn will clobber the return pointer. If we happened
1646 to use the return pointer in the delay slot of the call, then we lose.
1648 get_attr_type will try to recognize the given insn, so make sure to
1649 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1651 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1654 /* Control the assembler format that we output. */
1656 /* Output to assembler file text saying following lines
1657 may contain character constants, extra white space, comments, etc. */
1659 #define ASM_APP_ON ""
1661 /* Output to assembler file text saying following lines
1662 no longer contain unusual constructs. */
1664 #define ASM_APP_OFF ""
1666 /* Output deferred plabels at the end of the file. */
1668 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
1670 /* This is how to output the definition of a user-level label named NAME,
1671 such as the label on a static function or variable NAME. */
1673 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1674 do { assemble_name (FILE, NAME); \
1675 fputc ('\n', FILE); } while (0)
1677 /* This is how to output a reference to a user-level label named NAME.
1678 `assemble_name' uses this. */
1680 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1682 const char *xname = (NAME); \
1683 if (FUNCTION_NAME_P (NAME)) \
1685 if (xname[0] == '*') \
1688 fputs (user_label_prefix, FILE); \
1689 fputs (xname, FILE); \
1692 /* This is how to store into the string LABEL
1693 the symbol_ref name of an internal numbered label where
1694 PREFIX is the class of label and NUM is the number within the class.
1695 This is suitable for output with `assemble_name'. */
1697 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1698 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1700 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1702 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1703 output_ascii ((FILE), (P), (SIZE))
1705 /* This is how to output an element of a case-vector that is absolute.
1706 Note that this method makes filling these branch delay slots
1709 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1710 if (TARGET_BIG_SWITCH) \
1711 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1713 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1715 /* Jump tables are executable code and live in the TEXT section on the PA. */
1716 #define JUMP_TABLES_IN_TEXT_SECTION 1
1718 /* This is how to output an element of a case-vector that is relative.
1719 This must be defined correctly as it is used when generating PIC code.
1721 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1722 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1723 rather than a table of absolute addresses. */
1725 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1726 if (TARGET_BIG_SWITCH) \
1727 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1729 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1731 /* This is how to output an assembler line
1732 that says to advance the location counter
1733 to a multiple of 2**LOG bytes. */
1735 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1736 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1738 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1739 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1741 /* This says how to output an assembler line to define a global common symbol
1742 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1744 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1746 assemble_name ((FILE), (NAME)); \
1747 fputs ("\t.comm ", (FILE)); \
1748 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1750 /* This says how to output an assembler line to define a local common symbol
1751 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1753 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1755 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1756 assemble_name ((FILE), (NAME)); \
1757 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1759 #define ASM_PN_FORMAT "%s___%lu"
1761 /* All HP assemblers use "!" to separate logical lines. */
1762 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1764 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1765 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1767 /* Print operand X (an rtx) in assembler syntax to file FILE.
1768 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1769 For `%' followed by punctuation, CODE is the punctuation and X is null.
1771 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1772 and an immediate zero should be represented as `r0'.
1774 Several % codes are defined:
1776 C compare conditions
1777 N extract conditions
1778 M modifier to handle preincrement addressing for memory refs.
1779 F modifier to handle preincrement addressing for fp memory refs */
1781 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1784 /* Print a memory address as an operand to reference that memory location. */
1786 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1787 { register rtx addr = ADDR; \
1788 register rtx base; \
1790 switch (GET_CODE (addr)) \
1793 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1796 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1797 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1798 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1799 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1802 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
1805 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1806 fputs ("R'", FILE); \
1807 else if (flag_pic == 0) \
1808 fputs ("RR'", FILE); \
1810 fputs ("RT'", FILE); \
1811 output_global_address (FILE, XEXP (addr, 1), 0); \
1812 fputs ("(", FILE); \
1813 output_operand (XEXP (addr, 0), 0); \
1814 fputs (")", FILE); \
1817 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
1818 fprintf (FILE, "(%%r0)"); \
1821 output_addr_const (FILE, addr); \
1825 /* Find the return address associated with the frame given by
1827 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1828 (return_addr_rtx (COUNT, FRAMEADDR))
1830 /* Used to mask out junk bits from the return address, such as
1831 processor state, interrupt status, condition codes and the like. */
1832 #define MASK_RETURN_ADDR \
1833 /* The privilege level is in the two low order bits, mask em out \
1834 of the return address. */ \
1837 /* The number of Pmode words for the setjmp buffer. */
1838 #define JMP_BUF_SIZE 50
1840 #define PREDICATE_CODES \
1841 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1842 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
1843 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
1844 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1845 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1846 {"reg_before_reload_operand", {REG, MEM}}, \
1847 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1848 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \
1850 {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \
1851 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
1852 {"pic_label_operand", {LABEL_REF, CONST}}, \
1853 {"fp_reg_operand", {REG}}, \
1854 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1855 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
1856 {"pre_cint_operand", {CONST_INT}}, \
1857 {"post_cint_operand", {CONST_INT}}, \
1858 {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1859 {"ireg_or_int5_operand", {CONST_INT, REG}}, \
1860 {"int5_operand", {CONST_INT}}, \
1861 {"uint5_operand", {CONST_INT}}, \
1862 {"int11_operand", {CONST_INT}}, \
1863 {"uint32_operand", {CONST_INT, \
1864 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
1865 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1866 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1867 {"ior_operand", {CONST_INT}}, \
1868 {"lhs_lshift_cint_operand", {CONST_INT}}, \
1869 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
1870 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1871 {"pc_or_label_operand", {PC, LABEL_REF}}, \
1872 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
1873 {"shadd_operand", {CONST_INT}}, \
1874 {"basereg_operand", {REG}}, \
1875 {"div_operand", {REG, CONST_INT}}, \
1876 {"ireg_operand", {REG}}, \
1877 {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \
1879 {"movb_comparison_operator", {EQ, NE, LT, GE}},
1881 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
1882 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1883 "__canonicalize_funcptr_for_compare"
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