1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 enum cmp_type /* comparison type */
26 CMP_SI, /* compare integers */
27 CMP_SF, /* compare single precision floats */
28 CMP_DF, /* compare double precision floats */
29 CMP_MAX /* max comparison type */
32 /* For long call handling. */
33 extern unsigned int total_code_bytes;
35 /* Which processor to schedule for. */
44 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
46 /* For -mschedule= option. */
47 extern char *pa_cpu_string;
48 extern enum processor_type pa_cpu;
50 /* Print subsidiary information on the compiler version in use. */
52 #define TARGET_VERSION fputs (" (hppa)", stderr);
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags;
58 /* compile code for HP-PA 1.1 ("Snake") */
60 #define TARGET_SNAKE (target_flags & 1)
62 /* Disable all FP registers (they all become fixed). This may be necessary
63 for compiling kernels which perform lazy context switching of FP regs.
64 Note if you use this option and try to perform floating point operations
65 the compiler will abort! */
67 #define TARGET_DISABLE_FPREGS (target_flags & 2)
69 /* Generate code which assumes that calls through function pointers will
70 never cross a space boundary. Such assumptions are generally safe for
71 building kernels and statically linked executables. Code compiled with
72 this option will fail miserably if the executable is dynamically linked
73 or uses nested functions!
75 This is also used to trigger agressive unscaled index addressing. */
76 #define TARGET_NO_SPACE_REGS (target_flags & 4)
78 /* Allow unconditional jumps in the delay slots of call instructions. */
79 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
81 /* Optimize for space. Currently this only turns on out of line
82 prologues and epilogues. */
83 #define TARGET_SPACE (target_flags & 16)
85 /* Disable indexed addressing modes. */
87 #define TARGET_DISABLE_INDEXING (target_flags & 32)
89 /* Emit code which follows the new portable runtime calling conventions
90 HP wants everyone to use for ELF objects. If at all possible you want
91 to avoid this since it's a performance loss for non-prototyped code.
93 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
94 long-call stubs which is quite expensive. */
96 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
98 /* Emit directives only understood by GAS. This allows parameter
99 relocations to work for static functions. There is no way
100 to make them work the HP assembler at this time. */
102 #define TARGET_GAS (target_flags & 128)
104 /* Emit code for processors which do not have an FPU. */
106 #define TARGET_SOFT_FLOAT (target_flags & 256)
108 /* Use 3-insn load/store sequences for access to large data segments
109 in shared libraries on hpux10. */
110 #define TARGET_LONG_LOAD_STORE (target_flags & 512)
112 /* Macro to define tables used to set the flags.
113 This is a list in braces of pairs in braces,
114 each pair being { "NAME", VALUE }
115 where VALUE is the bits to set or minus the bits to clear.
116 An empty string NAME is used to identify the default VALUE. */
118 #define TARGET_SWITCHES \
121 {"pa-risc-1-0", -1}, \
122 {"pa-risc-1-1", 1}, \
123 {"disable-fpregs", 2}, \
124 {"no-disable-fpregs", -2}, \
125 {"no-space-regs", 4}, \
126 {"space-regs", -4}, \
127 {"jump-in-delay", 8}, \
128 {"no-jump-in-delay", -8}, \
131 {"disable-indexing", 32}, \
132 {"no-disable-indexing", -32},\
133 {"portable-runtime", 64}, \
134 {"no-portable-runtime", -64},\
137 {"soft-float", 256}, \
138 {"no-soft-float", -256}, \
139 {"long-load-store", 512}, \
140 {"no-long-load-store", -512},\
142 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
144 #ifndef TARGET_DEFAULT
145 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
148 #ifndef TARGET_CPU_DEFAULT
149 #define TARGET_CPU_DEFAULT 0
152 #define TARGET_OPTIONS \
154 { "schedule=", &pa_cpu_string }\
157 #define OVERRIDE_OPTIONS override_options ()
159 #define DBX_DEBUGGING_INFO
160 #define DEFAULT_GDB_EXTENSIONS 1
162 /* This is the way other stabs-in-XXX tools do things. We will be
164 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
166 /* Likewise for linenos.
168 We make the first line stab special to avoid adding several
169 gross hacks to GAS. */
170 #undef ASM_OUTPUT_SOURCE_LINE
171 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
172 { static int sym_lineno = 1; \
173 static tree last_function_decl = NULL; \
174 if (current_function_decl == last_function_decl) \
175 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
177 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
180 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
181 last_function_decl = current_function_decl; \
184 /* But, to make this work, we have to output the stabs for the function
186 #define DBX_FUNCTION_FIRST
188 /* Only labels should ever begin in column zero. */
189 #define ASM_STABS_OP "\t.stabs"
190 #define ASM_STABN_OP "\t.stabn"
192 /* GDB always assumes the current function's frame begins at the value
193 of the stack pointer upon entry to the current function. Accessing
194 local variables and parameters passed on the stack is done using the
195 base of the frame + an offset provided by GCC.
197 For functions which have frame pointers this method works fine;
198 the (frame pointer) == (stack pointer at function entry) and GCC provides
199 an offset relative to the frame pointer.
201 This loses for functions without a frame pointer; GCC provides an offset
202 which is relative to the stack pointer after adjusting for the function's
203 frame size. GDB would prefer the offset to be relative to the value of
204 the stack pointer at the function's entry. Yuk! */
205 #define DEBUGGER_AUTO_OFFSET(X) \
206 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
207 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
209 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
210 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
211 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
213 /* gdb needs a null N_SO at the end of each file for scattered loading. */
215 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
216 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
218 if (!TARGET_PORTABLE_RUNTIME) \
219 fputs ("\t.SPACE $TEXT$\n\t.NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n", FILE); \
221 fprintf (FILE, "%s\n", TEXT_SECTION_ASM_OP); \
223 "\t.stabs \"\",%d,0,0,L$text_end0000\nL$text_end0000:\n", N_SO)
225 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & 1) == 0
226 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
227 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}\
228 %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}"
230 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}} %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}"
233 /* Defines for a K&R CC */
235 #define CC1_SPEC "%{pg:} %{p:}"
237 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
239 /* We don't want -lg. */
241 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
244 /* Allow $ in identifiers. */
245 #define DOLLARS_IN_IDENTIFIERS 2
247 /* Make gcc agree with <machine/ansi.h> */
249 #define SIZE_TYPE "unsigned int"
250 #define PTRDIFF_TYPE "int"
251 #define WCHAR_TYPE "unsigned int"
252 #define WCHAR_TYPE_SIZE 32
254 /* Show we can debug even without a frame pointer. */
255 #define CAN_DEBUG_WITHOUT_FP
257 /* Machine dependent reorg pass. */
258 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
260 /* Names to predefine in the preprocessor for this target machine. */
262 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
264 /* HPUX has a program 'chatr' to list the dependencies of dynamically
265 linked executables and shared libraries. */
266 #define LDD_SUFFIX "chatr"
267 /* Look for lines like "dynamic /usr/lib/X11R5/libX11.sl"
268 or "static /usr/lib/X11R5/libX11.sl". */
269 #define PARSE_LDD_OUTPUT(PTR) \
271 while (*PTR == ' ') PTR++; \
272 if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
274 PTR += sizeof ("dynamic") - 1; \
275 while (*p == ' ') PTR++; \
277 else if (strncmp (PTR, "static", sizeof ("static") - 1) == 0) \
279 PTR += sizeof ("static") - 1; \
280 while (*p == ' ') PTR++; \
286 /* target machine storage layout */
288 /* Define for cross-compilation from a host with a different float format
289 or endianness (e.g. VAX, x86). */
290 #define REAL_ARITHMETIC
292 /* Define this macro if it is advisable to hold scalars in registers
293 in a wider mode than that declared by the program. In such cases,
294 the value is constrained to be within the bounds of the declared
295 type, but kept valid in the wider mode. The signedness of the
296 extension may differ from that of the type. */
298 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
299 if (GET_MODE_CLASS (MODE) == MODE_INT \
300 && GET_MODE_SIZE (MODE) < 4) \
303 /* Define this if most significant bit is lowest numbered
304 in instructions that operate on numbered bit-fields. */
305 #define BITS_BIG_ENDIAN 1
307 /* Define this if most significant byte of a word is the lowest numbered. */
308 /* That is true on the HP-PA. */
309 #define BYTES_BIG_ENDIAN 1
311 /* Define this if most significant word of a multiword number is lowest
313 #define WORDS_BIG_ENDIAN 1
315 /* number of bits in an addressable storage unit */
316 #define BITS_PER_UNIT 8
318 /* Width in bits of a "word", which is the contents of a machine register.
319 Note that this is not necessarily the width of data type `int';
320 if using 16-bit ints on a 68000, this would still be 32.
321 But on a machine with 16-bit registers, this would be 16. */
322 #define BITS_PER_WORD 32
324 /* Width of a word, in units (bytes). */
325 #define UNITS_PER_WORD 4
327 /* Width in bits of a pointer.
328 See also the macro `Pmode' defined below. */
329 #define POINTER_SIZE 32
331 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
332 #define PARM_BOUNDARY 32
334 /* Largest alignment required for any stack parameter, in bits.
335 Don't define this if it is equal to PARM_BOUNDARY */
336 #define MAX_PARM_BOUNDARY 64
338 /* Boundary (in *bits*) on which stack pointer is always aligned;
339 certain optimizations in combine depend on this.
341 GCC for the PA always rounds its stacks to a 512bit boundary,
342 but that happens late in the compilation process. */
343 #define STACK_BOUNDARY 64
345 /* Allocation boundary (in *bits*) for the code of a function. */
346 #define FUNCTION_BOUNDARY 32
348 /* Alignment of field after `int : 0' in a structure. */
349 #define EMPTY_FIELD_BOUNDARY 32
351 /* Every structure's size must be a multiple of this. */
352 #define STRUCTURE_SIZE_BOUNDARY 8
354 /* A bitfield declared as `int' forces `int' alignment for the struct. */
355 #define PCC_BITFIELD_TYPE_MATTERS 1
357 /* No data type wants to be aligned rounder than this. */
358 #define BIGGEST_ALIGNMENT 64
360 /* The .align directive in the HP assembler allows up to a 32 alignment. */
361 #define MAX_OFILE_ALIGNMENT 32768
363 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
364 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
365 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
367 /* Make arrays of chars word-aligned for the same reasons. */
368 #define DATA_ALIGNMENT(TYPE, ALIGN) \
369 (TREE_CODE (TYPE) == ARRAY_TYPE \
370 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
371 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
374 /* Set this nonzero if move instructions will actually fail to work
375 when given unaligned data. */
376 #define STRICT_ALIGNMENT 1
378 /* Generate calls to memcpy, memcmp and memset. */
379 #define TARGET_MEM_FUNCTIONS
381 /* Standard register usage. */
383 /* Number of actual hardware registers.
384 The hardware registers are assigned numbers for the compiler
385 from 0 to just below FIRST_PSEUDO_REGISTER.
386 All registers that the compiler knows about must be given numbers,
387 even those that are not normally considered general registers.
389 HP-PA 1.0 has 32 fullword registers and 16 floating point
390 registers. The floating point registers hold either word or double
393 16 additional registers are reserved.
395 HP-PA 1.1 has 32 fullword registers and 32 floating point
396 registers. However, the floating point registers behave
397 differently: the left and right halves of registers are addressable
398 as 32 bit registers. So, we will set things up like the 68k which
399 has different fp units: define separate register sets for the 1.0
402 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
405 /* 1 for registers that have pervasive standard uses
406 and are not available for the register allocator.
408 On the HP-PA, these are:
409 Reg 0 = 0 (hardware). However, 0 is used for condition code,
411 Reg 1 = ADDIL target/Temporary (hardware).
412 Reg 2 = Return Pointer
413 Reg 3 = Frame Pointer
414 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
415 Reg 4-18 = Preserved Registers
416 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
417 Reg 20-22 = Temporary Registers
418 Reg 23-26 = Temporary/Parameter Registers
419 Reg 27 = Global Data Pointer (hp)
420 Reg 28 = Temporary/???/Return Value register
421 Reg 29 = Temporary/Static Chain/Return Value register #2
422 Reg 30 = stack pointer
423 Reg 31 = Temporary/Millicode Return Pointer (hp)
425 Freg 0-3 = Status Registers -- Not known to the compiler.
426 Freg 4-7 = Arguments/Return Value
427 Freg 8-11 = Temporary Registers
428 Freg 12-15 = Preserved Registers
430 Freg 16-31 = Reserved
432 On the Snake, fp regs are
434 Freg 0-3 = Status Registers -- Not known to the compiler.
435 Freg 4L-7R = Arguments/Return Value
436 Freg 8L-11R = Temporary Registers
437 Freg 12L-21R = Preserved Registers
438 Freg 22L-31R = Temporary Registers
442 #define FIXED_REGISTERS \
443 {0, 0, 0, 0, 0, 0, 0, 0, \
444 0, 0, 0, 0, 0, 0, 0, 0, \
445 0, 0, 0, 0, 0, 0, 0, 0, \
446 0, 0, 0, 1, 0, 0, 1, 0, \
448 0, 0, 0, 0, 0, 0, 0, 0, \
449 0, 0, 0, 0, 0, 0, 0, 0, \
450 0, 0, 0, 0, 0, 0, 0, 0, \
451 0, 0, 0, 0, 0, 0, 0, 0, \
452 0, 0, 0, 0, 0, 0, 0, 0, \
453 0, 0, 0, 0, 0, 0, 0, 0, \
454 0, 0, 0, 0, 0, 0, 0, 0, \
457 /* 1 for registers not available across function calls.
458 These must include the FIXED_REGISTERS and also any
459 registers that can be used without being saved.
460 The latter must include the registers where values are returned
461 and the register where structure-value addresses are passed.
462 Aside from that, you can include as many other registers as you like. */
463 #define CALL_USED_REGISTERS \
464 {1, 1, 1, 0, 0, 0, 0, 0, \
465 0, 0, 0, 0, 0, 0, 0, 0, \
466 0, 0, 0, 1, 1, 1, 1, 1, \
467 1, 1, 1, 1, 1, 1, 1, 1, \
469 1, 1, 1, 1, 1, 1, 1, 1, \
470 1, 1, 1, 1, 1, 1, 1, 1, \
471 0, 0, 0, 0, 0, 0, 0, 0, \
472 0, 0, 0, 0, 0, 0, 0, 0, \
473 0, 0, 0, 0, 1, 1, 1, 1, \
474 1, 1, 1, 1, 1, 1, 1, 1, \
475 1, 1, 1, 1, 1, 1, 1, 1, \
478 #define CONDITIONAL_REGISTER_USAGE \
482 for (i = 56; i < 88; i++) \
483 fixed_regs[i] = call_used_regs[i] = 1; \
484 for (i = 33; i < 88; i += 2) \
485 fixed_regs[i] = call_used_regs[i] = 1; \
487 if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
489 for (i = 32; i < 88; i++) \
490 fixed_regs[i] = call_used_regs[i] = 1; \
494 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
495 fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
499 /* Allocate the call used registers first. This should minimize
500 the number of registers that need to be saved (as call used
501 registers will generally not be allocated across a call).
503 Experimentation has shown slightly better results by allocating
504 FP registers first. */
506 #define REG_ALLOC_ORDER \
508 /* caller-saved fp regs. */ \
509 68, 69, 70, 71, 72, 73, 74, 75, \
510 76, 77, 78, 79, 80, 81, 82, 83, \
512 40, 41, 42, 43, 44, 45, 46, 47, \
513 32, 33, 34, 35, 36, 37, 38, 39, \
514 /* caller-saved general regs. */ \
515 19, 20, 21, 22, 23, 24, 25, 26, \
517 /* callee-saved fp regs. */ \
518 48, 49, 50, 51, 52, 53, 54, 55, \
519 56, 57, 58, 59, 60, 61, 62, 63, \
521 /* callee-saved general regs. */ \
522 3, 4, 5, 6, 7, 8, 9, 10, \
523 11, 12, 13, 14, 15, 16, 17, 18, \
524 /* special registers. */ \
528 /* True if register is floating-point. */
529 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
531 /* Return number of consecutive hard regs needed starting at reg REGNO
532 to hold something of mode MODE.
533 This is ordinarily the length in words of a value of mode MODE
534 but can be less for certain modes in special long registers.
536 On the HP-PA, ordinary registers hold 32 bits worth;
537 The floating point registers are 64 bits wide. Snake fp regs are 32
539 #define HARD_REGNO_NREGS(REGNO, MODE) \
540 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
541 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
543 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
544 On the HP-PA, the cpu registers can hold any mode. We
545 force this to be an even register is it cannot hold the full mode. */
546 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
547 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
548 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
549 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
550 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
551 /* Make wide modes be in aligned registers. */ \
552 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
554 /* Value is 1 if it is a good idea to tie two pseudo registers
555 when one has mode MODE1 and one has mode MODE2.
556 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
557 for any hard reg, then this must be 0 for correct output. */
558 #define MODES_TIEABLE_P(MODE1, MODE2) \
559 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
561 /* Specify the registers used for certain standard purposes.
562 The values of these macros are register numbers. */
564 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
565 /* #define PC_REGNUM */
567 /* Register to use for pushing function arguments. */
568 #define STACK_POINTER_REGNUM 30
570 /* Base register for access to local variables of the function. */
571 #define FRAME_POINTER_REGNUM 3
573 /* Value should be nonzero if functions must have frame pointers. */
574 #define FRAME_POINTER_REQUIRED \
575 (current_function_calls_alloca)
577 /* C statement to store the difference between the frame pointer
578 and the stack pointer values immediately after the function prologue.
580 Note, we always pretend that this is a leaf function because if
581 it's not, there's no point in trying to eliminate the
582 frame pointer. If it is a leaf function, we guessed right! */
583 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
584 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
586 /* Base register for access to arguments of the function. */
587 #define ARG_POINTER_REGNUM 3
589 /* Register in which static-chain is passed to a function. */
591 #define STATIC_CHAIN_REGNUM 29
593 /* Register which holds offset table for position-independent
596 #define PIC_OFFSET_TABLE_REGNUM 19
597 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
599 /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it
600 can be restore across function calls. */
601 #define PIC_OFFSET_TABLE_REGNUM_SAVED 4
603 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
604 #define DEFAULT_PCC_STRUCT_RETURN 0
605 #define RETURN_IN_MEMORY(TYPE) \
606 (int_size_in_bytes (TYPE) > 8)
608 /* Register in which address to store a structure value
609 is passed to a function. */
610 #define STRUCT_VALUE_REGNUM 28
612 /* Define the classes of registers for register constraints in the
613 machine description. Also define ranges of constants.
615 One of the classes must always be named ALL_REGS and include all hard regs.
616 If there is more than one class, another class must be named NO_REGS
617 and contain no registers.
619 The name GENERAL_REGS must be the name of a class (or an alias for
620 another name such as ALL_REGS). This is the class of registers
621 that is allowed by "g" or "r" in a register constraint.
622 Also, registers outside this class are allocated only when
623 instructions express preferences for them.
625 The classes must be numbered in nondecreasing order; that is,
626 a larger-numbered class must never be contained completely
627 in a smaller-numbered class.
629 For any two classes, it is very desirable that there be another
630 class that represents their union. */
632 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
633 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
634 fmpyadd and fmpysub are restricted. */
636 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
637 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
639 #define N_REG_CLASSES (int) LIM_REG_CLASSES
641 /* Give names of register classes as strings for dump file. */
643 #define REG_CLASS_NAMES \
644 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
645 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
647 /* Define which registers fit in which classes.
648 This is an initializer for a vector of HARD_REG_SET
649 of length N_REG_CLASSES. Register 0, the "condition code" register,
652 #define REG_CLASS_CONTENTS \
653 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
654 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
655 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
656 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
657 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
658 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
659 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
661 /* The same information, inverted:
662 Return the class number of the smallest class containing
663 reg number REGNO. This could be a conditional expression
664 or could index an array. */
666 #define REGNO_REG_CLASS(REGNO) \
667 ((REGNO) == 0 ? NO_REGS \
668 : (REGNO) == 1 ? R1_REGS \
669 : (REGNO) < 32 ? GENERAL_REGS \
670 : (REGNO) < 88 ? FP_REGS \
673 /* The class value for index registers, and the one for base regs. */
674 #define INDEX_REG_CLASS GENERAL_REGS
675 #define BASE_REG_CLASS GENERAL_REGS
677 #define FP_REG_CLASS_P(CLASS) \
680 /* Get reg_class from a letter such as appears in the machine description. */
681 /* Keep 'x' for backward compatibility with user asm. */
682 #define REG_CLASS_FROM_LETTER(C) \
683 ((C) == 'f' ? FP_REGS : \
684 (C) == 'x' ? FP_REGS : \
685 (C) == 'q' ? SHIFT_REGS : \
686 (C) == 'a' ? R1_REGS : \
687 (C) == 'Z' ? ALL_REGS : NO_REGS)
689 /* The letters I, J, K, L and M in a register constraint string
690 can be used to stand for particular ranges of immediate operands.
691 This macro defines what the ranges are.
692 C is the letter, and VALUE is a constant value.
693 Return 1 if VALUE is in the range specified by C.
695 `I' is used for the 11 bit constants.
696 `J' is used for the 14 bit constants.
697 `K' is used for values that can be moved with a zdepi insn.
698 `L' is used for the 5 bit constants.
700 `N' is used for values with the least significant 11 bits equal to zero.
701 `O' is used for numbers n such that n+1 is a power of 2.
704 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
705 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
706 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
707 : (C) == 'K' ? zdepi_cint_p (VALUE) \
708 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
709 : (C) == 'M' ? (VALUE) == 0 \
710 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
711 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
712 : (C) == 'P' ? and_mask_p (VALUE) \
715 /* Similar, but for floating or large integer constants, and defining letters
716 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
718 For PA, `G' is the floating-point constant zero. `H' is undefined. */
720 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
721 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
722 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
725 /* Given an rtx X being reloaded into a reg required to be
726 in class CLASS, return the class of reg to actually use.
727 In general this is just CLASS; but on some machines
728 in some cases it is preferable to use a more restrictive class. */
729 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
731 /* Return the register class of a scratch register needed to copy IN into
732 or out of a register in CLASS in MODE. If it can be done directly
735 Avoid doing any work for the common case calls. */
737 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
738 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
739 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
740 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
742 /* On the PA it is not possible to directly move data between
743 GENERAL_REGS and FP_REGS. */
744 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
745 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
747 /* Return the stack location to use for secondary memory needed reloads. */
748 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
749 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
751 /* Return the maximum number of consecutive registers
752 needed to represent mode MODE in a register of class CLASS. */
753 #define CLASS_MAX_NREGS(CLASS, MODE) \
754 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
755 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
757 /* Stack layout; function entry, exit and calling. */
759 /* Define this if pushing a word on the stack
760 makes the stack pointer a smaller address. */
761 /* #define STACK_GROWS_DOWNWARD */
763 /* Believe it or not. */
764 #define ARGS_GROW_DOWNWARD
766 /* Define this if the nominal address of the stack frame
767 is at the high-address end of the local variables;
768 that is, each additional local variable allocated
769 goes at a more negative offset in the frame. */
770 /* #define FRAME_GROWS_DOWNWARD */
772 /* Offset within stack frame to start allocating local variables at.
773 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
774 first local allocated. Otherwise, it is the offset to the BEGINNING
775 of the first local allocated. */
776 #define STARTING_FRAME_OFFSET 8
778 /* If we generate an insn to push BYTES bytes,
779 this says how many the stack pointer really advances by.
780 On the HP-PA, don't define this because there are no push insns. */
781 /* #define PUSH_ROUNDING(BYTES) */
783 /* Offset of first parameter from the argument pointer register value.
784 This value will be negated because the arguments grow down.
785 Also note that on STACK_GROWS_UPWARD machines (such as this one)
786 this is the distance from the frame pointer to the end of the first
787 argument, not it's beginning. To get the real offset of the first
788 argument, the size of the argument must be added.
790 ??? Have to check on this.*/
792 #define FIRST_PARM_OFFSET(FNDECL) -32
794 /* Absolute value of offset from top-of-stack address to location to store the
795 function parameter if it can't go in a register.
796 Addresses for following parameters are computed relative to this one. */
797 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
800 /* When a parameter is passed in a register, stack space is still
802 #define REG_PARM_STACK_SPACE(DECL) 16
804 /* Define this if the above stack space is to be considered part of the
805 space allocated by the caller. */
806 #define OUTGOING_REG_PARM_STACK_SPACE
808 /* Keep the stack pointer constant throughout the function.
809 This is both an optimization and a necessity: longjmp
810 doesn't behave itself when the stack pointer moves within
812 #define ACCUMULATE_OUTGOING_ARGS
814 /* The weird HPPA calling conventions require a minimum of 48 bytes on
815 the stack: 16 bytes for register saves, and 32 bytes for magic.
816 This is the difference between the logical top of stack and the
818 #define STACK_POINTER_OFFSET -32
820 #define STACK_DYNAMIC_OFFSET(FNDECL) \
821 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
823 /* Value is 1 if returning from a function call automatically
824 pops the arguments described by the number-of-args field in the call.
825 FUNDECL is the declaration node of the function (as a tree),
826 FUNTYPE is the data type of the function (as a tree),
827 or for a library call it is an identifier node for the subroutine name. */
829 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
831 /* Define how to find the value returned by a function.
832 VALTYPE is the data type of the value (as a tree).
833 If the precise function being called is known, FUNC is its FUNCTION_DECL;
834 otherwise, FUNC is 0. */
836 /* On the HP-PA the value is found in register(s) 28(-29), unless
837 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
840 #define FUNCTION_VALUE(VALTYPE, FUNC) \
841 gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
842 && (TYPE_MODE (VALTYPE) == SFmode || \
843 TYPE_MODE (VALTYPE) == DFmode)) ? \
846 /* Define how to find the value returned by a library function
847 assuming the value has mode MODE. */
849 #define LIBCALL_VALUE(MODE) \
850 gen_rtx (REG, MODE, \
851 (! TARGET_SOFT_FLOAT \
852 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
854 /* 1 if N is a possible register number for a function value
855 as seen by the caller. */
857 #define FUNCTION_VALUE_REGNO_P(N) \
858 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
860 /* 1 if N is a possible register number for function argument passing. */
862 #define FUNCTION_ARG_REGNO_P(N) \
863 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
865 /* Define a data type for recording info about an argument list
866 during the scan of that argument list. This data type should
867 hold all necessary information about the function itself
868 and about the args processed so far, enough to enable macros
869 such as FUNCTION_ARG to determine where the next arg should go.
871 On the HP-PA, this is a single integer, which is a number of words
872 of arguments scanned so far (including the invisible argument,
873 if any, which holds the structure-value-address).
874 Thus 4 or more means all following args should go on the stack. */
876 struct hppa_args {int words, nargs_prototype, indirect; };
878 #define CUMULATIVE_ARGS struct hppa_args
880 /* Initialize a variable CUM of type CUMULATIVE_ARGS
881 for a call to a function whose data type is FNTYPE.
882 For a library call, FNTYPE is 0. */
884 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
886 (CUM).indirect = INDIRECT, \
887 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
888 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
889 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
890 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
895 /* Similar, but when scanning the definition of a procedure. We always
896 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
898 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
900 (CUM).indirect = 0, \
901 (CUM).nargs_prototype = 1000
903 /* Figure out the size in words of the function argument. */
905 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
906 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
908 /* Update the data in CUM to advance over an argument
909 of mode MODE and data type TYPE.
910 (TYPE is null for libcalls where that information may not be available.) */
912 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
913 { (CUM).nargs_prototype--; \
914 ((((CUM).words & 01) && (TYPE) != 0 \
915 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
917 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
920 /* Determine where to put an argument to a function.
921 Value is zero to push the argument on the stack,
922 or a hard register in which to store the argument.
924 MODE is the argument's machine mode.
925 TYPE is the data type of the argument (as a tree).
926 This is null for libcalls where that information may
928 CUM is a variable of type CUMULATIVE_ARGS which gives info about
929 the preceding args and about the function being called.
930 NAMED is nonzero if this argument is a named parameter
931 (otherwise it is an extra parameter matching an ellipsis).
933 On the HP-PA the first four words of args are normally in registers
934 and the rest are pushed. But any arg that won't entirely fit in regs
937 Arguments passed in registers are either 1 or 2 words long.
939 The caller must make a distinction between calls to explicitly named
940 functions and calls through pointers to functions -- the conventions
941 are different! Calls through pointers to functions only use general
942 registers for the first four argument words.
944 Of course all this is different for the portable runtime model
945 HP wants everyone to use for ELF. Ugh. Here's a quick description
946 of how it's supposed to work.
948 1) callee side remains unchanged. It expects integer args to be
949 in the integer registers, float args in the float registers and
950 unnamed args in integer registers.
952 2) caller side now depends on if the function being called has
953 a prototype in scope (rather than if it's being called indirectly).
955 2a) If there is a prototype in scope, then arguments are passed
956 according to their type (ints in integer registers, floats in float
957 registers, unnamed args in integer registers.
959 2b) If there is no prototype in scope, then floating point arguments
960 are passed in both integer and float registers. egad.
962 FYI: The portable parameter passing conventions are almost exactly like
963 the standard parameter passing conventions on the RS6000. That's why
964 you'll see lots of similar code in rs6000.h. */
966 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
968 /* Do not expect to understand this without reading it several times. I'm
969 tempted to try and simply it, but I worry about breaking something. */
971 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
972 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
973 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
974 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
975 || (CUM).nargs_prototype > 0) \
976 ? gen_rtx (REG, (MODE), \
977 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
978 ? (((!(CUM).indirect \
979 || TARGET_PORTABLE_RUNTIME) \
980 && (MODE) == DFmode \
981 && ! TARGET_SOFT_FLOAT) \
982 ? ((CUM).words ? 38 : 34) \
983 : ((CUM).words ? 23 : 25)) \
984 : (((!(CUM).indirect \
985 || TARGET_PORTABLE_RUNTIME) \
986 && (MODE) == SFmode \
987 && ! TARGET_SOFT_FLOAT) \
988 ? (32 + 2 * (CUM).words) \
989 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
991 /* We are calling a non-prototyped function with floating point \
992 arguments using the portable conventions. */ \
993 : gen_rtx (PARALLEL, (MODE), \
996 gen_rtx (EXPR_LIST, VOIDmode, \
997 gen_rtx (REG, (MODE), \
998 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
999 ? ((CUM).words ? 38 : 34) \
1000 : (32 + 2 * (CUM).words))), \
1002 gen_rtx (EXPR_LIST, VOIDmode, \
1003 gen_rtx (REG, (MODE), \
1004 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1005 ? ((CUM).words ? 23 : 25) \
1006 : (27 - (CUM).words - \
1007 FUNCTION_ARG_SIZE ((MODE), \
1010 /* Pass this parameter in the stack. */ \
1013 /* For an arg passed partly in registers and partly in memory,
1014 this is the number of registers used.
1015 For args passed entirely in registers or entirely in memory, zero. */
1017 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
1019 /* If defined, a C expression that gives the alignment boundary, in
1020 bits, of an argument with the specified mode and type. If it is
1021 not defined, `PARM_BOUNDARY' is used for all arguments. */
1023 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1025 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
1026 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1028 : GET_MODE_ALIGNMENT(MODE)))
1030 /* Arguments larger than eight bytes are passed by invisible reference */
1032 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1033 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1035 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
1036 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1039 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
1040 extern enum cmp_type hppa_branch_type;
1042 /* Output the label for a function definition. */
1043 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1044 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1045 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
1046 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
1048 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1049 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
1050 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
1053 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, NAME) \
1056 STRIP_NAME_ENCODING (name, NAME); \
1057 if (!TARGET_PORTABLE_RUNTIME && TARGET_GAS && in_section == in_text) \
1058 fputs ("\t.NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n", FILE); \
1059 else if (! TARGET_PORTABLE_RUNTIME && TARGET_GAS) \
1061 "\t.SUBSPA %s\n", name); \
1064 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1065 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1066 tree tree_type = TREE_TYPE (DECL); \
1069 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1070 { extern int current_function_varargs; \
1071 if (TREE_PUBLIC (DECL)) \
1073 fputs ("\t.EXPORT ", FILE); \
1074 assemble_name (FILE, NAME); \
1075 fputs (",ENTRY,PRIV_LEV=3", FILE); \
1079 fputs ("\t.PARAM ", FILE); \
1080 assemble_name (FILE, NAME); \
1082 if (TARGET_PORTABLE_RUNTIME) \
1084 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1085 fputs ("RTNVAL=NO\n", FILE); \
1088 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1089 parm = TREE_CHAIN (parm)) \
1091 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1092 && ! TARGET_SOFT_FLOAT) \
1093 fprintf (FILE, ",ARGW%d=FR", i++); \
1094 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1095 && ! TARGET_SOFT_FLOAT) \
1100 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1108 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1109 DECL_ARG_TYPE (parm)); \
1110 /* Passing structs by invisible reference uses \
1111 one general register. */ \
1113 || TREE_ADDRESSABLE (DECL_ARG_TYPE (parm))) \
1115 if (arg_size == 2 && i <= 2) \
1118 fprintf (FILE, ",ARGW%d=GR", i++); \
1119 fprintf (FILE, ",ARGW%d=GR", i++); \
1121 else if (arg_size == 1) \
1122 fprintf (FILE, ",ARGW%d=GR", i++); \
1127 /* anonymous args */ \
1128 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1129 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1130 != void_type_node)) \
1131 || current_function_varargs) \
1133 for (; i < 4; i++) \
1134 fprintf (FILE, ",ARGW%d=GR", i); \
1136 if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1137 fputs (",RTNVAL=FR", FILE); \
1138 else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1139 fputs (",RTNVAL=FU", FILE); \
1140 else if (fntype != void_type_node) \
1141 fputs (",RTNVAL=GR", FILE); \
1142 fputs ("\n", FILE); \
1145 /* This macro generates the assembly code for function entry.
1146 FILE is a stdio stream to output the code to.
1147 SIZE is an int: how many units of temporary storage to allocate.
1148 Refer to the array `regs_ever_live' to determine which registers
1149 to save; `regs_ever_live[I]' is nonzero if register number I
1150 is ever used in the function. This macro is responsible for
1151 knowing which registers should not be saved even if used. */
1153 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1154 of memory. If any fpu reg is used in the function, we allocate
1155 such a block here, at the bottom of the frame, just in case it's needed.
1157 If this function is a leaf procedure, then we may choose not
1158 to do a "save" insn. The decision about whether or not
1159 to do this is made in regclass.c. */
1161 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1162 output_function_prologue (FILE, SIZE)
1164 /* Output assembler code to FILE to increment profiler label # LABELNO
1165 for profiling a function entry.
1167 Because HPUX _mcount is so different, we actually emit the
1168 profiling code in function_prologue. This just stores LABELNO for
1171 #define PROFILE_BEFORE_PROLOGUE
1172 #define FUNCTION_PROFILER(FILE, LABELNO) \
1173 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1175 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1176 the stack pointer does not matter. The value is tested only in
1177 functions that have frame pointers.
1178 No definition is equivalent to always zero. */
1180 extern int may_call_alloca;
1181 extern int current_function_pretend_args_size;
1183 #define EXIT_IGNORE_STACK \
1184 (get_frame_size () != 0 \
1185 || current_function_calls_alloca || current_function_outgoing_args_size)
1188 /* This macro generates the assembly code for function exit,
1189 on machines that need it. If FUNCTION_EPILOGUE is not defined
1190 then individual return instructions are generated for each
1191 return statement. Args are same as for FUNCTION_PROLOGUE.
1193 The function epilogue should not depend on the current stack pointer!
1194 It should use the frame pointer only. This is mandatory because
1195 of alloca; we also take advantage of it to omit stack adjustments
1196 before returning. */
1198 /* This declaration is needed due to traditional/ANSI
1199 incompatibilities which cannot be #ifdefed away
1200 because they occur inside of macros. Sigh. */
1201 extern union tree_node *current_function_decl;
1203 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1204 output_function_epilogue (FILE, SIZE)
1206 /* Output assembler code for a block containing the constant parts
1207 of a trampoline, leaving space for the variable parts.\
1209 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1210 and then branches to the specified routine.
1212 This code template is copied from text segment to stack location
1213 and then patched with INITIALIZE_TRAMPOLINE to contain
1214 valid values, and then entered as a subroutine.
1216 It is best to keep this as small as possible to avoid having to
1217 flush multiple lines in the cache. */
1219 #define TRAMPOLINE_TEMPLATE(FILE) \
1221 fputs ("\tldw 36(0,%r22),%r21\n", FILE); \
1222 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
1223 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
1224 fputs ("\tldw 4(0,%r21),%r19\n", FILE); \
1225 fputs ("\tldw 0(0,%r21),%r21\n", FILE); \
1226 fputs ("\tldsid (0,%r21),%r1\n", FILE); \
1227 fputs ("\tmtsp %r1,%sr0\n", FILE); \
1228 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
1229 fputs ("\tldw 40(0,%r22),%r29\n", FILE); \
1230 fputs ("\t.word 0\n", FILE); \
1231 fputs ("\t.word 0\n", FILE); \
1234 /* Length in units of the trampoline for entering a nested function.
1236 Flush the cache entries corresponding to the first and last addresses
1237 of the trampoline. This is necessary as the trampoline may cross two
1240 If the code part of the trampoline ever grows to > 32 bytes, then it
1241 will become necessary to hack on the cacheflush pattern in pa.md. */
1243 #define TRAMPOLINE_SIZE (11 * 4)
1245 /* Emit RTL insns to initialize the variable parts of a trampoline.
1246 FNADDR is an RTX for the address of the function's pure code.
1247 CXT is an RTX for the static chain value for the function.
1249 Move the function address to the trampoline template at offset 12.
1250 Move the static chain value to trampoline template at offset 16. */
1252 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1254 rtx start_addr, end_addr; \
1256 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1257 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1258 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1259 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1260 /* fdc and fic only use registers for the address to flush, \
1261 they do not accept integer displacements. */ \
1262 start_addr = force_reg (SImode, (TRAMP)); \
1263 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1264 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1265 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1266 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1267 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1270 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1271 reference the 4 integer arg registers and 4 fp arg registers.
1272 Ordinarily they are not call used registers, but they are for
1273 _builtin_saveregs, so we must make this explicit. */
1275 extern struct rtx_def *hppa_builtin_saveregs ();
1276 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) hppa_builtin_saveregs (ARGLIST)
1279 /* Addressing modes, and classification of registers for them. */
1281 #define HAVE_POST_INCREMENT
1282 #define HAVE_POST_DECREMENT
1284 #define HAVE_PRE_DECREMENT
1285 #define HAVE_PRE_INCREMENT
1287 /* Macros to check register numbers against specific register classes. */
1289 /* These assume that REGNO is a hard or pseudo reg number.
1290 They give nonzero only if REGNO is a hard reg of the suitable class
1291 or a pseudo reg currently allocated to a suitable hard reg.
1292 Since they use reg_renumber, they are safe only once reg_renumber
1293 has been allocated, which happens in local-alloc.c. */
1295 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1296 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1297 #define REGNO_OK_FOR_BASE_P(REGNO) \
1298 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1299 #define REGNO_OK_FOR_FP_P(REGNO) \
1300 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1302 /* Now macros that check whether X is a register and also,
1303 strictly, whether it is in a specified class.
1305 These macros are specific to the the HP-PA, and may be used only
1306 in code for printing assembler insns and in conditions for
1307 define_optimization. */
1309 /* 1 if X is an fp register. */
1311 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1313 /* Maximum number of registers that can appear in a valid memory address. */
1315 #define MAX_REGS_PER_ADDRESS 2
1317 /* Recognize any constant value that is a valid address except
1318 for symbolic addresses. We get better CSE by rejecting them
1319 here and allowing hppa_legitimize_address to break them up. We
1320 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1322 #define CONSTANT_ADDRESS_P(X) \
1323 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1324 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1325 || GET_CODE (X) == HIGH) \
1326 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1328 /* Include all constant integers and constant doubles, but not
1329 floating-point, except for floating-point zero. */
1331 #define LEGITIMATE_CONSTANT_P(X) \
1332 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1333 || (X) == CONST0_RTX (GET_MODE (X))) \
1334 && !(flag_pic && function_label_operand (X, VOIDmode)))
1336 /* Subroutine for EXTRA_CONSTRAINT.
1338 Return 1 iff OP is a pseudo which did not get a hard register and
1339 we are running the reload pass. */
1341 #define IS_RELOADING_PSEUDO_P(OP) \
1342 ((reload_in_progress \
1343 && GET_CODE (OP) == REG \
1344 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1345 && reg_renumber [REGNO (OP)] < 0))
1347 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1349 For the HPPA, `Q' means that this is a memory operand but not a
1350 symbolic memory operand. Note that an unassigned pseudo register
1351 is such a memory operand. Needed because reload will generate
1352 these things in insns and then not re-recognize the insns, causing
1353 constrain_operands to fail.
1359 `T' is for fp loads and stores. */
1360 #define EXTRA_CONSTRAINT(OP, C) \
1362 (IS_RELOADING_PSEUDO_P (OP) \
1363 || (GET_CODE (OP) == MEM \
1364 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1365 && ! symbolic_memory_operand (OP, VOIDmode) \
1366 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1367 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1368 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1370 (GET_CODE (OP) == MEM \
1371 && GET_CODE (XEXP (OP, 0)) == PLUS \
1372 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1373 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1374 && (move_operand (OP, GET_MODE (OP)) \
1375 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))))\
1377 (GET_CODE (OP) == MEM \
1378 /* Using DFmode forces only short displacements \
1379 to be recognized as valid in reg+d addresses. */\
1380 && memory_address_p (DFmode, XEXP (OP, 0)) \
1381 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1382 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1383 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))) : 0)))
1385 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1386 and check its validity for a certain class.
1387 We have two alternate definitions for each of them.
1388 The usual definition accepts all pseudo regs; the other rejects
1389 them unless they have been allocated suitable hard regs.
1390 The symbol REG_OK_STRICT causes the latter definition to be used.
1392 Most source files want to accept pseudo regs in the hope that
1393 they will get allocated to the class that the insn wants them to be in.
1394 Source files for reload pass need to be strict.
1395 After reload, it makes no difference, since pseudo regs have
1396 been eliminated by then. */
1398 #ifndef REG_OK_STRICT
1400 /* Nonzero if X is a hard reg that can be used as an index
1401 or if it is a pseudo reg. */
1402 #define REG_OK_FOR_INDEX_P(X) \
1403 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1404 /* Nonzero if X is a hard reg that can be used as a base reg
1405 or if it is a pseudo reg. */
1406 #define REG_OK_FOR_BASE_P(X) \
1407 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1411 /* Nonzero if X is a hard reg that can be used as an index. */
1412 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1413 /* Nonzero if X is a hard reg that can be used as a base reg. */
1414 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1418 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1419 that is a valid memory address for an instruction.
1420 The MODE argument is the machine mode for the MEM expression
1421 that wants to use this address.
1423 On the HP-PA, the actual legitimate addresses must be
1424 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1425 But we can treat a SYMBOL_REF as legitimate if it is part of this
1426 function's constant-pool, because such addresses can actually
1427 be output as REG+SMALLINT.
1429 Note we only allow 5 bit immediates for access to a constant address;
1430 doing so avoids losing for loading/storing a FP register at an address
1431 which will not fit in 5 bits. */
1433 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1434 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1436 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1437 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1439 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1440 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1442 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1443 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1445 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1447 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1448 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1449 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1450 && REG_P (XEXP (X, 0)) \
1451 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1453 else if (GET_CODE (X) == PLUS) \
1455 rtx base = 0, index; \
1456 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1458 if (GET_CODE (XEXP (X, 1)) == REG \
1459 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1461 else if (flag_pic == 1 \
1462 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1465 else if (REG_P (XEXP (X, 0)) \
1466 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1467 base = XEXP (X, 0), index = XEXP (X, 1); \
1468 else if (REG_P (XEXP (X, 1)) \
1469 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1470 base = XEXP (X, 1), index = XEXP (X, 0); \
1472 if (GET_CODE (index) == CONST_INT \
1473 && ((INT_14_BITS (index) \
1474 && (TARGET_SOFT_FLOAT \
1475 || ((MODE) != SFmode && (MODE) != DFmode))) \
1476 || INT_5_BITS (index))) \
1479 && (mode == SFmode || mode == DFmode) \
1480 && GET_CODE (index) == MULT \
1481 && GET_CODE (XEXP (index, 0)) == REG \
1482 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1483 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1484 && INTVAL (XEXP (index, 1)) == (mode == SFmode ? 4 : 8)\
1485 && shadd_operand (XEXP (index, 1), VOIDmode)) \
1488 else if (GET_CODE (X) == LO_SUM \
1489 && GET_CODE (XEXP (X, 0)) == REG \
1490 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1491 && CONSTANT_P (XEXP (X, 1)) \
1492 && (TARGET_SOFT_FLOAT \
1493 || ((MODE) != SFmode \
1494 && (MODE) != DFmode))) \
1496 else if (GET_CODE (X) == LO_SUM \
1497 && GET_CODE (XEXP (X, 0)) == SUBREG \
1498 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1499 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1500 && CONSTANT_P (XEXP (X, 1)) \
1501 && (TARGET_SOFT_FLOAT \
1502 || ((MODE) != SFmode \
1503 && (MODE) != DFmode))) \
1505 else if (GET_CODE (X) == LABEL_REF \
1506 || (GET_CODE (X) == CONST_INT \
1507 && INT_5_BITS (X))) \
1509 /* Needed for -fPIC */ \
1510 else if (GET_CODE (X) == LO_SUM \
1511 && GET_CODE (XEXP (X, 0)) == REG \
1512 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1513 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1517 /* Try machine-dependent ways of modifying an illegitimate address
1518 to be legitimate. If we find one, return the new, valid address.
1519 This macro is used in only one place: `memory_address' in explow.c.
1521 OLDX is the address as it was before break_out_memory_refs was called.
1522 In some cases it is useful to look at this to decide what needs to be done.
1524 MODE and WIN are passed so that this macro can use
1525 GO_IF_LEGITIMATE_ADDRESS.
1527 It is always safe for this macro to do nothing. It exists to recognize
1528 opportunities to optimize the output. */
1530 extern struct rtx_def *hppa_legitimize_address ();
1531 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1532 { rtx orig_x = (X); \
1533 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1534 if ((X) != orig_x && memory_address_p (MODE, X)) \
1537 /* Go to LABEL if ADDR (a legitimate address expression)
1538 has an effect that depends on the machine mode it is used for. */
1540 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1541 if (GET_CODE (ADDR) == PRE_DEC \
1542 || GET_CODE (ADDR) == POST_DEC \
1543 || GET_CODE (ADDR) == PRE_INC \
1544 || GET_CODE (ADDR) == POST_INC) \
1547 /* Define this macro if references to a symbol must be treated
1548 differently depending on something about the variable or
1549 function named by the symbol (such as what section it is in).
1551 The macro definition, if any, is executed immediately after the
1552 rtl for DECL or other node is created.
1553 The value of the rtl will be a `mem' whose address is a
1556 The usual thing for this macro to do is to a flag in the
1557 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1558 name string in the `symbol_ref' (if one bit is not enough
1561 On the HP-PA we use this to indicate if a symbol is in text or
1562 data space. Also, function labels need special treatment. */
1564 #define TEXT_SPACE_P(DECL)\
1565 (TREE_CODE (DECL) == FUNCTION_DECL \
1566 || (TREE_CODE (DECL) == VAR_DECL \
1567 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1568 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1570 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1571 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1573 #define FUNCTION_NAME_P(NAME) \
1574 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1576 #define ENCODE_SECTION_INFO(DECL)\
1578 { if (TEXT_SPACE_P (DECL)) \
1580 if (TREE_CODE (DECL) == FUNCTION_DECL \
1581 || TREE_CODE (DECL) == VAR_DECL) \
1582 _rtl = DECL_RTL (DECL); \
1584 _rtl = TREE_CST_RTL (DECL); \
1585 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1586 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1587 hppa_encode_label (XEXP (DECL_RTL (DECL), 0), 0);\
1592 /* Store the user-specified part of SYMBOL_NAME in VAR.
1593 This is sort of inverse to ENCODE_SECTION_INFO. */
1595 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1596 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1597 1 + (SYMBOL_NAME)[1] == '@'\
1598 : (SYMBOL_NAME)[0] == '@'))
1600 /* On hpux10, the linker will give an error if we have a reference
1601 in the read-only data section to a symbol defined in a shared
1602 library. Therefore, expressions that might require a reloc can
1603 not be placed in the read-only data section. */
1604 #define SELECT_SECTION(EXP,RELOC) \
1605 if (TREE_CODE (EXP) == VAR_DECL \
1606 && TREE_READONLY (EXP) \
1607 && !TREE_THIS_VOLATILE (EXP) \
1608 && DECL_INITIAL (EXP) \
1609 && (DECL_INITIAL (EXP) == error_mark_node \
1610 || TREE_CONSTANT (DECL_INITIAL (EXP))) \
1612 readonly_data_section (); \
1613 else if (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'c' \
1614 && !(TREE_CODE (EXP) == STRING_CST && flag_writable_strings) \
1616 readonly_data_section (); \
1620 /* Arghh. This is used for stuff in the constant pool; this may include
1621 function addresses on the PA, which during PIC code generation must
1622 reside in the data space. Unfortunately, there's no way to determine
1623 if a particular label in the constant pool refers to a function address.
1624 So just force everything into the data space during PIC generation. */
1625 #define SELECT_RTX_SECTION(RTX,MODE) \
1629 readonly_data_section ();
1631 /* Specify the machine mode that this machine uses
1632 for the index in the tablejump instruction. */
1633 #define CASE_VECTOR_MODE DImode
1635 /* Define this if the tablejump instruction expects the table
1636 to contain offsets from the address of the table.
1637 Do not define this if the table should contain absolute addresses. */
1638 /* #define CASE_VECTOR_PC_RELATIVE */
1640 #define CASE_DROPS_THROUGH
1641 /* Specify the tree operation to be used to convert reals to integers. */
1642 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1644 /* This is the kind of divide that is easiest to do in the general case. */
1645 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1647 /* Define this as 1 if `char' should by default be signed; else as 0. */
1648 #define DEFAULT_SIGNED_CHAR 1
1650 /* Max number of bytes we can move from memory to memory
1651 in one reasonably fast instruction. */
1654 /* Higher than the default as we prefer to use simple move insns
1655 (better scheduling and delay slot filling) and because our
1656 built-in block move is really a 2X unrolled loop. */
1657 #define MOVE_RATIO 4
1659 /* Define if operations between registers always perform the operation
1660 on the full register even if a narrower mode is specified. */
1661 #define WORD_REGISTER_OPERATIONS
1663 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1664 will either zero-extend or sign-extend. The value of this macro should
1665 be the code that says which one of the two operations is implicitly
1666 done, NIL if none. */
1667 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1669 /* Nonzero if access to memory by bytes is slow and undesirable. */
1670 #define SLOW_BYTE_ACCESS 1
1672 /* Do not break .stabs pseudos into continuations. */
1673 #define DBX_CONTIN_LENGTH 4000
1675 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1676 is done just by pretending it is already truncated. */
1677 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1679 /* We assume that the store-condition-codes instructions store 0 for false
1680 and some other value for true. This is the value stored for true. */
1682 #define STORE_FLAG_VALUE 1
1684 /* When a prototype says `char' or `short', really pass an `int'. */
1685 #define PROMOTE_PROTOTYPES
1687 /* Specify the machine mode that pointers have.
1688 After generation of rtl, the compiler makes no further distinction
1689 between pointers and any other objects of this machine mode. */
1690 #define Pmode SImode
1692 /* Add any extra modes needed to represent the condition code.
1694 HPPA floating comparisons produce condition codes. */
1695 #define EXTRA_CC_MODES CCFPmode
1697 /* Define the names for the modes specified above. */
1698 #define EXTRA_CC_NAMES "CCFP"
1700 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1701 return the mode to be used for the comparison. For floating-point, CCFPmode
1702 should be used. CC_NOOVmode should be used when the first operand is a
1703 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1705 #define SELECT_CC_MODE(OP,X,Y) \
1706 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1708 /* A function address in a call instruction
1709 is a byte address (for indexing purposes)
1710 so give the MEM rtx a byte's mode. */
1711 #define FUNCTION_MODE SImode
1713 /* Define this if addresses of constant functions
1714 shouldn't be put through pseudo regs where they can be cse'd.
1715 Desirable on machines where ordinary constants are expensive
1716 but a CALL with constant address is cheap. */
1717 #define NO_FUNCTION_CSE
1719 /* Define this to be nonzero if shift instructions ignore all but the low-order
1721 #define SHIFT_COUNT_TRUNCATED 1
1723 /* Use atexit for static constructors/destructors, instead of defining
1724 our own exit function. */
1727 /* Compute the cost of computing a constant rtl expression RTX
1728 whose rtx-code is CODE. The body of this macro is a portion
1729 of a switch statement. If the code is computed here,
1730 return it with a return statement. Otherwise, break from the switch. */
1732 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1734 if (INTVAL (RTX) == 0) return 0; \
1735 if (INT_14_BITS (RTX)) return 1; \
1742 case CONST_DOUBLE: \
1743 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1744 && OUTER_CODE != SET) \
1749 #define ADDRESS_COST(RTX) \
1750 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1752 /* Compute extra cost of moving data between one register class
1755 Make moves from SAR so expensive they should never happen. We used to
1756 have 0xffff here, but that generates overflow in rare cases.
1758 Copies involving a FP register and a non-FP register are relatively
1759 expensive because they must go through memory.
1761 Other copies are reasonably cheap. */
1762 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1763 (CLASS1 == SHIFT_REGS ? 0x100 \
1764 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1765 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1769 /* Provide the costs of a rtl expression. This is in the body of a
1770 switch on CODE. The purpose for the cost of MULT is to encourage
1771 `synth_mult' to find a synthetic multiply when reasonable. */
1773 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1775 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1776 return COSTS_N_INSNS (3); \
1777 return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1778 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1780 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1781 return COSTS_N_INSNS (14); \
1785 return COSTS_N_INSNS (60); \
1786 case PLUS: /* this includes shNadd insns */ \
1788 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1789 return COSTS_N_INSNS (3); \
1790 return COSTS_N_INSNS (1); \
1794 return COSTS_N_INSNS (1);
1796 /* Adjust the cost of dependencies. */
1798 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1799 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1801 /* Adjust scheduling priorities. We use this to try and keep addil
1802 and the next use of %r1 close together. */
1803 #define ADJUST_PRIORITY(PREV) \
1805 rtx set = single_set (PREV); \
1809 src = SET_SRC (set); \
1810 dest = SET_DEST (set); \
1811 if (GET_CODE (src) == LO_SUM \
1812 && symbolic_operand (XEXP (src, 1), VOIDmode) \
1813 && ! read_only_operand (XEXP (src, 1), VOIDmode)) \
1814 INSN_PRIORITY (PREV) >>= 3; \
1815 else if (GET_CODE (src) == MEM \
1816 && GET_CODE (XEXP (src, 0)) == LO_SUM \
1817 && symbolic_operand (XEXP (XEXP (src, 0), 1), VOIDmode)\
1818 && ! read_only_operand (XEXP (XEXP (src, 0), 1), VOIDmode))\
1819 INSN_PRIORITY (PREV) >>= 1; \
1820 else if (GET_CODE (dest) == MEM \
1821 && GET_CODE (XEXP (dest, 0)) == LO_SUM \
1822 && symbolic_operand (XEXP (XEXP (dest, 0), 1), VOIDmode)\
1823 && ! read_only_operand (XEXP (XEXP (dest, 0), 1), VOIDmode))\
1824 INSN_PRIORITY (PREV) >>= 3; \
1828 /* Handling the special cases is going to get too complicated for a macro,
1829 just call `pa_adjust_insn_length' to do the real work. */
1830 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1831 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1833 /* Enable a bug fix. (This is for extra caution.) */
1834 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1836 /* Millicode insns are actually function calls with some special
1837 constraints on arguments and register usage.
1839 Millicode calls always expect their arguments in the integer argument
1840 registers, and always return their result in %r29 (ret1). They
1841 are expected to clobber their arguments, %r1, %r29, and %r31 and
1844 These macros tell reorg that the references to arguments and
1845 register clobbers for millicode calls do not appear to happen
1846 until after the millicode call. This allows reorg to put insns
1847 which set the argument registers into the delay slot of the millicode
1848 call -- thus they act more like traditional CALL_INSNs.
1850 get_attr_type will try to recognize the given insn, so make sure to
1851 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1853 #define INSN_SETS_ARE_DELAYED(X) \
1854 ((GET_CODE (X) == INSN \
1855 && GET_CODE (PATTERN (X)) != SEQUENCE \
1856 && GET_CODE (PATTERN (X)) != USE \
1857 && GET_CODE (PATTERN (X)) != CLOBBER \
1858 && get_attr_type (X) == TYPE_MILLI))
1860 #define INSN_REFERENCES_ARE_DELAYED(X) \
1861 ((GET_CODE (X) == INSN \
1862 && GET_CODE (PATTERN (X)) != SEQUENCE \
1863 && GET_CODE (PATTERN (X)) != USE \
1864 && GET_CODE (PATTERN (X)) != CLOBBER \
1865 && get_attr_type (X) == TYPE_MILLI))
1868 /* Control the assembler format that we output. */
1870 /* Output at beginning of assembler file. */
1872 #define ASM_FILE_START(FILE) \
1873 do { fputs ("\t.SPACE $PRIVATE$\n\
1874 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1875 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1877 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1878 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1879 \t.IMPORT $global$,DATA\n\
1880 \t.IMPORT $$dyncall,MILLICODE\n", FILE);\
1882 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1883 if (write_symbols != NO_DEBUG) \
1884 output_file_directive ((FILE), main_input_filename); \
1887 /* Output to assembler file text saying following lines
1888 may contain character constants, extra white space, comments, etc. */
1890 #define ASM_APP_ON ""
1892 /* Output to assembler file text saying following lines
1893 no longer contain unusual constructs. */
1895 #define ASM_APP_OFF ""
1897 /* We don't yet know how to identify GCC to HP-PA machines. */
1898 #define ASM_IDENTIFY_GCC(FILE) fputs ("; gcc_compiled.:\n", FILE)
1900 /* Output before code. */
1902 /* Supposedly the assembler rejects the command if there is no tab! */
1903 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1905 /* Output before read-only data. */
1907 /* Supposedly the assembler rejects the command if there is no tab! */
1908 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1910 #define READONLY_DATA_SECTION readonly_data
1912 /* Output before writable data. */
1914 /* Supposedly the assembler rejects the command if there is no tab! */
1915 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1917 /* Output before uninitialized data. */
1919 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1921 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1923 #ifndef CTORS_SECTION_FUNCTION
1924 #define EXTRA_SECTIONS in_readonly_data
1925 #define CTORS_SECTION_FUNCTION
1926 #define DTORS_SECTION_FUNCTION
1928 #define EXTRA_SECTIONS in_readonly_data, in_ctors, in_dtors
1931 /* Switch into a generic section.
1932 This is currently only used to support section attributes.
1934 We make the section read-only and executable for a function decl,
1935 read-only for a const data decl, and writable for a non-const data decl. */
1936 #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \
1937 if (DECL && TREE_CODE (DECL) == FUNCTION_DECL) \
1939 fputs ("\t.SPACE $TEXT$\n", FILE); \
1941 "\t.SUBSPA %s,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY,SORT=24\n", \
1944 else if (DECL && TREE_READONLY (DECL)) \
1946 fputs ("\t.SPACE $TEXT$\n", FILE); \
1948 "\t.SUBSPA %s,QUAD=0,ALIGN=8,ACCESS=44,SORT=16\n", \
1953 fputs ("\t.SPACE $PRIVATE$\n", FILE); \
1955 "\t.SUBSPA %s,QUAD=1,ALIGN=8,ACCESS=31,SORT=16\n", \
1959 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1960 which reference data within the $TEXT$ space (for example constant
1961 strings in the $LIT$ subspace).
1963 The assemblers (GAS and HP as) both have problems with handling
1964 the difference of two symbols which is the other correct way to
1965 reference constant data during PIC code generation.
1967 So, there's no way to reference constant data which is in the
1968 $TEXT$ space during PIC generation. Instead place all constant
1969 data into the $PRIVATE$ subspace (this reduces sharing, but it
1970 works correctly). */
1972 #define EXTRA_SECTION_FUNCTIONS \
1976 if (in_section != in_readonly_data) \
1979 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1981 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1982 in_section = in_readonly_data; \
1985 CTORS_SECTION_FUNCTION \
1986 DTORS_SECTION_FUNCTION
1989 /* How to refer to registers in assembler output.
1990 This sequence is indexed by compiler's hard-register-number (see above). */
1992 #define REGISTER_NAMES \
1993 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1994 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1995 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1996 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1997 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1998 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1999 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
2000 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
2001 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
2002 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
2003 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
2006 #define ADDITIONAL_REGISTER_NAMES \
2007 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
2008 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
2009 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
2010 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
2011 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
2012 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
2013 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
2016 /* How to renumber registers for dbx and gdb.
2018 Registers 0 - 31 remain unchanged.
2020 Registers 32 - 87 are mapped to 72 - 127
2022 Register 88 is mapped to 32. */
2024 #define DBX_REGISTER_NUMBER(REGNO) \
2025 ((REGNO) <= 31 ? (REGNO) : \
2026 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
2028 /* This is how to output the definition of a user-level label named NAME,
2029 such as the label on a static function or variable NAME. */
2031 #define ASM_OUTPUT_LABEL(FILE, NAME) \
2032 do { assemble_name (FILE, NAME); \
2033 fputc ('\n', FILE); } while (0)
2035 /* This is how to output a command to make the user-level label named NAME
2036 defined for reference from other files.
2038 We call assemble_name, which in turn sets TREE_SYMBOL_REFERENCED. This
2039 macro will restore the original value of TREE_SYMBOL_REFERENCED to avoid
2040 placing useless function definitions in the output file. */
2042 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2043 do { int save_referenced; \
2044 save_referenced = TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (DECL)); \
2045 fputs ("\t.IMPORT ", FILE); \
2046 assemble_name (FILE, NAME); \
2047 if (FUNCTION_NAME_P (NAME)) \
2048 fputs (",CODE\n", FILE); \
2050 fputs (",DATA\n", FILE); \
2051 TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (DECL)) = save_referenced; \
2054 /* The bogus HP assembler requires ALL external references to be
2055 "imported", even library calls. They look a bit different, so
2058 Also note not all libcall names are passed to ENCODE_SECTION_INFO
2059 (__main for example). To make sure all libcall names have section
2060 info recorded in them, we do it here. */
2062 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
2063 do { fputs ("\t.IMPORT ", FILE); \
2064 if (!function_label_operand (RTL, VOIDmode)) \
2065 hppa_encode_label (RTL, 1); \
2066 assemble_name (FILE, XSTR ((RTL), 0)); \
2067 fputs (",CODE\n", FILE); \
2070 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
2072 /* We only handle DATA objects here, functions are globalized in \
2073 ASM_DECLARE_FUNCTION_NAME. */ \
2074 if (! FUNCTION_NAME_P (NAME)) \
2076 fputs ("\t.EXPORT ", FILE); \
2077 assemble_name (FILE, NAME); \
2078 fputs (",DATA\n", FILE); \
2082 /* This is how to output a reference to a user-level label named NAME.
2083 `assemble_name' uses this. */
2085 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2086 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
2088 /* This is how to output an internal numbered label where
2089 PREFIX is the class of label and NUM is the number within the class. */
2091 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2092 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
2094 /* This is how to store into the string LABEL
2095 the symbol_ref name of an internal numbered label where
2096 PREFIX is the class of label and NUM is the number within the class.
2097 This is suitable for output with `assemble_name'. */
2099 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2100 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
2102 /* This is how to output an assembler line defining a `double' constant. */
2104 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2106 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2107 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
2110 /* This is how to output an assembler line defining a `float' constant. */
2112 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2114 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2115 fprintf (FILE, "\t.word 0x%lx\n", l); \
2118 /* This is how to output an assembler line defining an `int' constant.
2120 This is made more complicated by the fact that functions must be
2121 prefixed by a P% as well as code label references for the exception
2122 table -- otherwise the linker chokes. */
2124 #define ASM_OUTPUT_INT(FILE,VALUE) \
2125 { fputs ("\t.word ", FILE); \
2126 if (function_label_operand (VALUE, VOIDmode) \
2127 && !TARGET_PORTABLE_RUNTIME) \
2128 fputs ("P%", FILE); \
2129 if (in_section == in_named \
2130 && ! strcmp (".gcc_except_table", in_named_name))\
2131 fputs ("P%", FILE); \
2132 output_addr_const (FILE, (VALUE)); \
2133 fputs ("\n", FILE);}
2135 /* Likewise for `short' and `char' constants. */
2137 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2138 ( fputs ("\t.half ", FILE), \
2139 output_addr_const (FILE, (VALUE)), \
2142 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2143 ( fputs ("\t.byte ", FILE), \
2144 output_addr_const (FILE, (VALUE)), \
2147 /* This is how to output an assembler line for a numeric constant byte. */
2149 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2150 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
2152 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
2153 output_ascii ((FILE), (P), (SIZE))
2155 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
2156 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
2157 /* This is how to output an element of a case-vector that is absolute.
2158 Note that this method makes filling these branch delay slots
2161 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2162 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2164 /* Jump tables are executable code and live in the TEXT section on the PA. */
2165 #define JUMP_TABLES_IN_TEXT_SECTION
2167 /* This is how to output an element of a case-vector that is relative.
2168 This must be defined correctly as it is used when generating PIC code.
2170 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
2171 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
2172 rather than a table of absolute addresses. */
2174 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2175 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2177 /* This is how to output an assembler line
2178 that says to advance the location counter
2179 to a multiple of 2**LOG bytes. */
2181 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2182 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
2184 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2185 fprintf (FILE, "\t.blockz %d\n", (SIZE))
2187 /* This says how to output an assembler line to define a global common symbol
2188 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2190 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
2192 assemble_name ((FILE), (NAME)); \
2193 fputs ("\t.comm ", (FILE)); \
2194 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2196 /* This says how to output an assembler line to define a local common symbol
2197 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2199 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2201 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
2202 assemble_name ((FILE), (NAME)); \
2203 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2205 /* Store in OUTPUT a string (made with alloca) containing
2206 an assembler-name for a local static variable named NAME.
2207 LABELNO is an integer which is different for each call. */
2209 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2210 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2211 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2213 /* Define the parentheses used to group arithmetic operations
2214 in assembler code. */
2216 #define ASM_OPEN_PAREN "("
2217 #define ASM_CLOSE_PAREN ")"
2219 /* All HP assemblers use "!" to separate logical lines. */
2220 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2222 /* Define results of standard character escape sequences. */
2223 #define TARGET_BELL 007
2224 #define TARGET_BS 010
2225 #define TARGET_TAB 011
2226 #define TARGET_NEWLINE 012
2227 #define TARGET_VT 013
2228 #define TARGET_FF 014
2229 #define TARGET_CR 015
2231 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2232 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2234 /* Print operand X (an rtx) in assembler syntax to file FILE.
2235 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2236 For `%' followed by punctuation, CODE is the punctuation and X is null.
2238 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2239 and an immediate zero should be represented as `r0'.
2241 Several % codes are defined:
2243 C compare conditions
2244 N extract conditions
2245 M modifier to handle preincrement addressing for memory refs.
2246 F modifier to handle preincrement addressing for fp memory refs */
2248 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2251 /* Print a memory address as an operand to reference that memory location. */
2253 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2254 { register rtx addr = ADDR; \
2255 register rtx base; \
2257 switch (GET_CODE (addr)) \
2260 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2263 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2264 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2265 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2266 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2269 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2272 if (!symbolic_operand (XEXP (addr, 1))) \
2273 fputs ("R'", FILE); \
2274 else if (flag_pic == 0) \
2275 fputs ("RR'", FILE); \
2276 else if (flag_pic == 1) \
2278 else if (flag_pic == 2) \
2279 fputs ("RT'", FILE); \
2280 output_global_address (FILE, XEXP (addr, 1), 0); \
2281 fputs ("(", FILE); \
2282 output_operand (XEXP (addr, 0), 0); \
2283 fputs (")", FILE); \
2286 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2289 output_addr_const (FILE, addr); \
2293 /* Define functions in pa.c and used in insn-output.c. */
2295 extern char *output_and ();
2296 extern char *output_ior ();
2297 extern char *output_move_double ();
2298 extern char *output_fp_move_double ();
2299 extern char *output_block_move ();
2300 extern char *output_cbranch ();
2301 extern char *output_bb ();
2302 extern char *output_bvb ();
2303 extern char *output_dbra ();
2304 extern char *output_movb ();
2305 extern char *output_parallel_movb ();
2306 extern char *output_parallel_addb ();
2307 extern char *output_return ();
2308 extern char *output_call ();
2309 extern char *output_millicode_call ();
2310 extern char *output_mul_insn ();
2311 extern char *output_div_insn ();
2312 extern char *output_mod_insn ();
2313 extern char *singlemove_string ();
2314 extern void output_arg_descriptor ();
2315 extern void output_global_address ();
2316 extern struct rtx_def *legitimize_pic_address ();
2317 extern struct rtx_def *gen_cmp_fp ();
2318 extern void hppa_encode_label ();
2320 /* We want __gcc_plt_call to appear in every program built by
2321 gcc, so we make a reference to it out of __main.
2322 We use the asm statement to fool the optimizer into not
2323 removing the dead (but important) initialization of
2326 #define DO_GLOBAL_DTORS_BODY \
2328 extern void __gcc_plt_call (); \
2329 void (*reference)() = &__gcc_plt_call; \
2331 __asm__ ("" : : "r" (reference)); \
2332 for (p = __DTOR_LIST__ + 1; *p; ) \
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