1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
3 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
6 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
7 Software Science at the University of Utah.
9 This file is part of GCC.
11 GCC is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 GCC is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GCC; see the file COPYING3. If not see
23 <http://www.gnu.org/licenses/>. */
25 /* For long call handling. */
26 extern unsigned long total_code_bytes;
28 /* Which processor to schedule for. */
40 /* For -mschedule= option. */
41 extern enum processor_type pa_cpu;
43 /* For -munix= option. */
44 extern int flag_pa_unix;
46 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
48 /* Print subsidiary information on the compiler version in use. */
50 #define TARGET_VERSION fputs (" (hppa)", stderr);
52 #define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
54 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
56 #define TARGET_64BIT 0
59 /* Generate code for ELF32 ABI. */
61 #define TARGET_ELF32 0
64 /* Generate code for SOM 32bit ABI. */
69 /* HP-UX UNIX features. */
74 /* HP-UX 10.10 UNIX 95 features. */
75 #ifndef TARGET_HPUX_10_10
76 #define TARGET_HPUX_10_10 0
79 /* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */
80 #ifndef TARGET_HPUX_11
81 #define TARGET_HPUX_11 0
84 /* HP-UX 11i multibyte and UNIX 98 extensions. */
85 #ifndef TARGET_HPUX_11_11
86 #define TARGET_HPUX_11_11 0
89 /* The following three defines are potential target switches. The current
90 defines are optimal given the current capabilities of GAS and GNU ld. */
92 /* Define to a C expression evaluating to true to use long absolute calls.
93 Currently, only the HP assembler and SOM linker support long absolute
94 calls. They are used only in non-pic code. */
95 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
97 /* Define to a C expression evaluating to true to use long PIC symbol
98 difference calls. Long PIC symbol difference calls are only used with
99 the HP assembler and linker. The HP assembler detects this instruction
100 sequence and treats it as long pc-relative call. Currently, GAS only
101 allows a difference of two symbols in the same subspace, and it doesn't
102 detect the sequence as a pc-relative call. */
103 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
105 /* Define to a C expression evaluating to true to use long PIC
106 pc-relative calls. Long PIC pc-relative calls are only used with
107 GAS. Currently, they are usable for calls which bind local to a
108 module but not for external calls. */
109 #define TARGET_LONG_PIC_PCREL_CALL 0
111 /* Define to a C expression evaluating to true to use SOM secondary
112 definition symbols for weak support. Linker support for secondary
113 definition symbols is buggy prior to HP-UX 11.X. */
114 #define TARGET_SOM_SDEF 0
116 /* Define to a C expression evaluating to true to save the entry value
117 of SP in the current frame marker. This is normally unnecessary.
118 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
119 HP compilers don't use this flag but it is supported by the assembler.
120 We set this flag to indicate that register %r3 has been saved at the
121 start of the frame. Thus, when the HP unwind library is used, we
122 need to generate additional code to save SP into the frame marker. */
123 #define TARGET_HPUX_UNWIND_LIBRARY 0
125 #ifndef TARGET_DEFAULT
126 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
129 #ifndef TARGET_CPU_DEFAULT
130 #define TARGET_CPU_DEFAULT 0
133 #ifndef TARGET_SCHED_DEFAULT
134 #define TARGET_SCHED_DEFAULT PROCESSOR_8000
137 /* Support for a compile-time default CPU, et cetera. The rules are:
138 --with-schedule is ignored if -mschedule is specified.
139 --with-arch is ignored if -march is specified. */
140 #define OPTION_DEFAULT_SPECS \
141 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
142 {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
144 /* Specify the dialect of assembler to use. New mnemonics is dialect one
145 and the old mnemonics are dialect zero. */
146 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
148 #define OVERRIDE_OPTIONS override_options ()
150 /* Override some settings from dbxelf.h. */
152 /* We do not have to be compatible with dbx, so we enable gdb extensions
154 #define DEFAULT_GDB_EXTENSIONS 1
156 /* This used to be zero (no max length), but big enums and such can
157 cause huge strings which killed gas.
159 We also have to avoid lossage in dbxout.c -- it does not compute the
160 string size accurately, so we are real conservative here. */
161 #undef DBX_CONTIN_LENGTH
162 #define DBX_CONTIN_LENGTH 3000
164 /* GDB always assumes the current function's frame begins at the value
165 of the stack pointer upon entry to the current function. Accessing
166 local variables and parameters passed on the stack is done using the
167 base of the frame + an offset provided by GCC.
169 For functions which have frame pointers this method works fine;
170 the (frame pointer) == (stack pointer at function entry) and GCC provides
171 an offset relative to the frame pointer.
173 This loses for functions without a frame pointer; GCC provides an offset
174 which is relative to the stack pointer after adjusting for the function's
175 frame size. GDB would prefer the offset to be relative to the value of
176 the stack pointer at the function's entry. Yuk! */
177 #define DEBUGGER_AUTO_OFFSET(X) \
178 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
179 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
181 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
182 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
183 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
185 #define TARGET_CPU_CPP_BUILTINS() \
187 builtin_assert("cpu=hppa"); \
188 builtin_assert("machine=hppa"); \
189 builtin_define("__hppa"); \
190 builtin_define("__hppa__"); \
192 builtin_define("_PA_RISC2_0"); \
193 else if (TARGET_PA_11) \
194 builtin_define("_PA_RISC1_1"); \
196 builtin_define("_PA_RISC1_0"); \
199 /* An old set of OS defines for various BSD-like systems. */
200 #define TARGET_OS_CPP_BUILTINS() \
203 builtin_define_std ("REVARGV"); \
204 builtin_define_std ("hp800"); \
205 builtin_define_std ("hp9000"); \
206 builtin_define_std ("hp9k8"); \
207 if (!c_dialect_cxx () && !flag_iso) \
208 builtin_define ("hppa"); \
209 builtin_define_std ("spectrum"); \
210 builtin_define_std ("unix"); \
211 builtin_assert ("system=bsd"); \
212 builtin_assert ("system=unix"); \
216 #define CC1_SPEC "%{pg:} %{p:}"
218 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
220 /* We don't want -lg. */
222 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
225 /* Make gcc agree with <machine/ansi.h> */
227 #define SIZE_TYPE "unsigned int"
228 #define PTRDIFF_TYPE "int"
229 #define WCHAR_TYPE "unsigned int"
230 #define WCHAR_TYPE_SIZE 32
232 /* Show we can debug even without a frame pointer. */
233 #define CAN_DEBUG_WITHOUT_FP
235 /* target machine storage layout */
236 typedef struct GTY(()) machine_function
238 /* Flag indicating that a .NSUBSPA directive has been output for
243 /* Define this macro if it is advisable to hold scalars in registers
244 in a wider mode than that declared by the program. In such cases,
245 the value is constrained to be within the bounds of the declared
246 type, but kept valid in the wider mode. The signedness of the
247 extension may differ from that of the type. */
249 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
250 if (GET_MODE_CLASS (MODE) == MODE_INT \
251 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
254 /* Define this if most significant bit is lowest numbered
255 in instructions that operate on numbered bit-fields. */
256 #define BITS_BIG_ENDIAN 1
258 /* Define this if most significant byte of a word is the lowest numbered. */
259 /* That is true on the HP-PA. */
260 #define BYTES_BIG_ENDIAN 1
262 /* Define this if most significant word of a multiword number is lowest
264 #define WORDS_BIG_ENDIAN 1
266 #define MAX_BITS_PER_WORD 64
268 /* Width of a word, in units (bytes). */
269 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
271 /* Minimum number of units in a word. If this is undefined, the default
272 is UNITS_PER_WORD. Otherwise, it is the constant value that is the
273 smallest value that UNITS_PER_WORD can have at run-time.
275 FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
276 building of various TImode routines in libgcc. The HP runtime
277 specification doesn't provide the alignment requirements and calling
278 conventions for TImode variables. */
279 #define MIN_UNITS_PER_WORD 4
281 /* The widest floating point format supported by the hardware. Note that
282 setting this influences some Ada floating point type sizes, currently
283 required for GNAT to operate properly. */
284 #define WIDEST_HARDWARE_FP_SIZE 64
286 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
287 #define PARM_BOUNDARY BITS_PER_WORD
289 /* Largest alignment required for any stack parameter, in bits.
290 Don't define this if it is equal to PARM_BOUNDARY */
291 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
293 /* Boundary (in *bits*) on which stack pointer is always aligned;
294 certain optimizations in combine depend on this.
296 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
297 the stack on the 32 and 64-bit ports, respectively. However, we
298 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
299 in main. Thus, we treat the former as the preferred alignment. */
300 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
301 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
303 /* Allocation boundary (in *bits*) for the code of a function. */
304 #define FUNCTION_BOUNDARY BITS_PER_WORD
306 /* Alignment of field after `int : 0' in a structure. */
307 #define EMPTY_FIELD_BOUNDARY 32
309 /* Every structure's size must be a multiple of this. */
310 #define STRUCTURE_SIZE_BOUNDARY 8
312 /* A bit-field declared as `int' forces `int' alignment for the struct. */
313 #define PCC_BITFIELD_TYPE_MATTERS 1
315 /* No data type wants to be aligned rounder than this. */
316 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
318 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
319 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
320 (TREE_CODE (EXP) == STRING_CST \
321 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
323 /* Make arrays of chars word-aligned for the same reasons. */
324 #define DATA_ALIGNMENT(TYPE, ALIGN) \
325 (TREE_CODE (TYPE) == ARRAY_TYPE \
326 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
327 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
329 /* Set this nonzero if move instructions will actually fail to work
330 when given unaligned data. */
331 #define STRICT_ALIGNMENT 1
333 /* Value is 1 if it is a good idea to tie two pseudo registers
334 when one has mode MODE1 and one has mode MODE2.
335 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
336 for any hard reg, then this must be 0 for correct output. */
337 #define MODES_TIEABLE_P(MODE1, MODE2) \
338 pa_modes_tieable_p (MODE1, MODE2)
340 /* Specify the registers used for certain standard purposes.
341 The values of these macros are register numbers. */
343 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
344 /* #define PC_REGNUM */
346 /* Register to use for pushing function arguments. */
347 #define STACK_POINTER_REGNUM 30
349 /* Base register for access to local variables of the function. */
350 #define FRAME_POINTER_REGNUM 3
352 /* Don't allow hard registers to be renamed into r2 unless r2
353 is already live or already being saved (due to eh). */
355 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
356 ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
358 /* C statement to store the difference between the frame pointer
359 and the stack pointer values immediately after the function prologue.
361 Note, we always pretend that this is a leaf function because if
362 it's not, there's no point in trying to eliminate the
363 frame pointer. If it is a leaf function, we guessed right! */
364 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
365 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
367 /* Base register for access to arguments of the function. */
368 #define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
370 /* Register in which static-chain is passed to a function. */
371 #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
373 /* Register used to address the offset table for position-independent
375 #define PIC_OFFSET_TABLE_REGNUM \
376 (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
378 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
380 /* Function to return the rtx used to save the pic offset table register
381 across function calls. */
382 extern struct rtx_def *hppa_pic_save_rtx (void);
384 #define DEFAULT_PCC_STRUCT_RETURN 0
386 /* Register in which address to store a structure value
387 is passed to a function. */
388 #define PA_STRUCT_VALUE_REGNUM 28
390 /* Describe how we implement __builtin_eh_return. */
391 #define EH_RETURN_DATA_REGNO(N) \
392 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
393 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
394 #define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
396 /* Offset from the frame pointer register value to the top of stack. */
397 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
399 /* A C expression whose value is RTL representing the location of the
400 incoming return address at the beginning of any function, before the
401 prologue. You only need to define this macro if you want to support
402 call frame debugging information like that provided by DWARF 2. */
403 #define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
404 #define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
406 /* A C expression whose value is an integer giving a DWARF 2 column
407 number that may be used as an alternate return column. This should
408 be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
409 register, but an alternate column needs to be used for signal frames.
411 Column 0 is not used but unfortunately its register size is set to
412 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */
413 #define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
415 /* This macro chooses the encoding of pointers embedded in the exception
416 handling sections. If at all possible, this should be defined such
417 that the exception handling section will not require dynamic relocations,
418 and so may be read-only.
420 Because the HP assembler auto aligns, it is necessary to use
421 DW_EH_PE_aligned. It's not possible to make the data read-only
422 on the HP-UX SOM port since the linker requires fixups for label
423 differences in different sections to be word aligned. However,
424 the SOM linker can do unaligned fixups for absolute pointers.
425 We also need aligned pointers for global and function pointers.
427 Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
428 fixups, the runtime doesn't have a consistent relationship between
429 text and data for dynamically loaded objects. Thus, it's not possible
430 to use pc-relative encoding for pointers on this target. It may be
431 possible to use segment relative encodings but GAS doesn't currently
432 have a mechanism to generate these encodings. For other targets, we
433 use pc-relative encoding for pointers. If the pointer might require
434 dynamic relocation, we make it indirect. */
435 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
436 (TARGET_GAS && !TARGET_HPUX \
438 | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \
439 | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \
440 : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \
441 ? DW_EH_PE_aligned : DW_EH_PE_absptr))
443 /* Handle special EH pointer encodings. Absolute, pc-relative, and
444 indirect are handled automatically. We output pc-relative, and
445 indirect pc-relative ourself since we need some special magic to
446 generate pc-relative relocations, and to handle indirect function
448 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
450 if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \
452 fputs (integer_asm_op (SIZE, FALSE), FILE); \
453 if ((ENCODING) & DW_EH_PE_indirect) \
454 output_addr_const (FILE, get_deferred_plabel (ADDR)); \
456 assemble_name (FILE, XSTR ((ADDR), 0)); \
457 fputs ("+8-$PIC_pcrel$0", FILE); \
463 /* The class value for index registers, and the one for base regs. */
464 #define INDEX_REG_CLASS GENERAL_REGS
465 #define BASE_REG_CLASS GENERAL_REGS
467 #define FP_REG_CLASS_P(CLASS) \
468 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
470 /* True if register is floating-point. */
471 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
473 /* Given an rtx X being reloaded into a reg required to be
474 in class CLASS, return the class of reg to actually use.
475 In general this is just CLASS; but on some machines
476 in some cases it is preferable to use a more restrictive class. */
477 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
479 #define MAYBE_FP_REG_CLASS_P(CLASS) \
480 reg_classes_intersect_p ((CLASS), FP_REGS)
483 /* Stack layout; function entry, exit and calling. */
485 /* Define this if pushing a word on the stack
486 makes the stack pointer a smaller address. */
487 /* #define STACK_GROWS_DOWNWARD */
489 /* Believe it or not. */
490 #define ARGS_GROW_DOWNWARD
492 /* Define this to nonzero if the nominal address of the stack frame
493 is at the high-address end of the local variables;
494 that is, each additional local variable allocated
495 goes at a more negative offset in the frame. */
496 #define FRAME_GROWS_DOWNWARD 0
498 /* Offset within stack frame to start allocating local variables at.
499 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
500 first local allocated. Otherwise, it is the offset to the BEGINNING
501 of the first local allocated.
503 On the 32-bit ports, we reserve one slot for the previous frame
504 pointer and one fill slot. The fill slot is for compatibility
505 with HP compiled programs. On the 64-bit ports, we reserve one
506 slot for the previous frame pointer. */
507 #define STARTING_FRAME_OFFSET 8
509 /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
510 of the stack. The default is to align it to STACK_BOUNDARY. */
511 #define STACK_ALIGNMENT_NEEDED 0
513 /* If we generate an insn to push BYTES bytes,
514 this says how many the stack pointer really advances by.
515 On the HP-PA, don't define this because there are no push insns. */
516 /* #define PUSH_ROUNDING(BYTES) */
518 /* Offset of first parameter from the argument pointer register value.
519 This value will be negated because the arguments grow down.
520 Also note that on STACK_GROWS_UPWARD machines (such as this one)
521 this is the distance from the frame pointer to the end of the first
522 argument, not it's beginning. To get the real offset of the first
523 argument, the size of the argument must be added. */
525 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
527 /* When a parameter is passed in a register, stack space is still
529 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
531 /* Define this if the above stack space is to be considered part of the
532 space allocated by the caller. */
533 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
535 /* Keep the stack pointer constant throughout the function.
536 This is both an optimization and a necessity: longjmp
537 doesn't behave itself when the stack pointer moves within
539 #define ACCUMULATE_OUTGOING_ARGS 1
541 /* The weird HPPA calling conventions require a minimum of 48 bytes on
542 the stack: 16 bytes for register saves, and 32 bytes for magic.
543 This is the difference between the logical top of stack and the
546 On the 64-bit port, the HP C compiler allocates a 48-byte frame
547 marker, although the runtime documentation only describes a 16
548 byte marker. For compatibility, we allocate 48 bytes. */
549 #define STACK_POINTER_OFFSET \
550 (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
552 #define STACK_DYNAMIC_OFFSET(FNDECL) \
554 ? (STACK_POINTER_OFFSET) \
555 : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
557 /* Define how to find the value returned by a library function
558 assuming the value has mode MODE. */
560 #define LIBCALL_VALUE(MODE) \
562 (! TARGET_SOFT_FLOAT \
563 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
565 /* 1 if N is a possible register number for a function value
566 as seen by the caller. */
568 #define FUNCTION_VALUE_REGNO_P(N) \
569 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
572 /* Define a data type for recording info about an argument list
573 during the scan of that argument list. This data type should
574 hold all necessary information about the function itself
575 and about the args processed so far, enough to enable macros
576 such as FUNCTION_ARG to determine where the next arg should go.
578 On the HP-PA, the WORDS field holds the number of words
579 of arguments scanned so far (including the invisible argument,
580 if any, which holds the structure-value-address). Thus, 4 or
581 more means all following args should go on the stack.
583 The INCOMING field tracks whether this is an "incoming" or
586 The INDIRECT field indicates whether this is is an indirect
589 The NARGS_PROTOTYPE field indicates that an argument does not
590 have a prototype when it less than or equal to 0. */
592 struct hppa_args {int words, nargs_prototype, incoming, indirect; };
594 #define CUMULATIVE_ARGS struct hppa_args
596 /* Initialize a variable CUM of type CUMULATIVE_ARGS
597 for a call to a function whose data type is FNTYPE.
598 For a library call, FNTYPE is 0. */
600 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
602 (CUM).incoming = 0, \
603 (CUM).indirect = (FNTYPE) && !(FNDECL), \
604 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
605 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
606 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
607 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
612 /* Similar, but when scanning the definition of a procedure. We always
613 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
615 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
617 (CUM).incoming = 1, \
618 (CUM).indirect = 0, \
619 (CUM).nargs_prototype = 1000
621 /* Figure out the size in words of the function argument. The size
622 returned by this macro should always be greater than zero because
623 we pass variable and zero sized objects by reference. */
625 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
626 ((((MODE) != BLKmode \
627 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
628 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
630 /* Update the data in CUM to advance over an argument
631 of mode MODE and data type TYPE.
632 (TYPE is null for libcalls where that information may not be available.) */
634 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
635 { (CUM).nargs_prototype--; \
636 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
637 + (((CUM).words & 01) && (TYPE) != 0 \
638 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
641 /* Determine where to put an argument to a function.
642 Value is zero to push the argument on the stack,
643 or a hard register in which to store the argument.
645 MODE is the argument's machine mode.
646 TYPE is the data type of the argument (as a tree).
647 This is null for libcalls where that information may
649 CUM is a variable of type CUMULATIVE_ARGS which gives info about
650 the preceding args and about the function being called.
651 NAMED is nonzero if this argument is a named parameter
652 (otherwise it is an extra parameter matching an ellipsis).
654 On the HP-PA the first four words of args are normally in registers
655 and the rest are pushed. But any arg that won't entirely fit in regs
658 Arguments passed in registers are either 1 or 2 words long.
660 The caller must make a distinction between calls to explicitly named
661 functions and calls through pointers to functions -- the conventions
662 are different! Calls through pointers to functions only use general
663 registers for the first four argument words.
665 Of course all this is different for the portable runtime model
666 HP wants everyone to use for ELF. Ugh. Here's a quick description
667 of how it's supposed to work.
669 1) callee side remains unchanged. It expects integer args to be
670 in the integer registers, float args in the float registers and
671 unnamed args in integer registers.
673 2) caller side now depends on if the function being called has
674 a prototype in scope (rather than if it's being called indirectly).
676 2a) If there is a prototype in scope, then arguments are passed
677 according to their type (ints in integer registers, floats in float
678 registers, unnamed args in integer registers.
680 2b) If there is no prototype in scope, then floating point arguments
681 are passed in both integer and float registers. egad.
683 FYI: The portable parameter passing conventions are almost exactly like
684 the standard parameter passing conventions on the RS6000. That's why
685 you'll see lots of similar code in rs6000.h. */
687 /* If defined, a C expression which determines whether, and in which
688 direction, to pad out an argument with extra space. */
689 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
691 /* Specify padding for the last element of a block move between registers
694 The 64-bit runtime specifies that objects need to be left justified
695 (i.e., the normal justification for a big endian target). The 32-bit
696 runtime specifies right justification for objects smaller than 64 bits.
697 We use a DImode register in the parallel for 5 to 7 byte structures
698 so that there is only one element. This allows the object to be
700 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
701 function_arg_padding ((MODE), (TYPE))
703 /* Do not expect to understand this without reading it several times. I'm
704 tempted to try and simply it, but I worry about breaking something. */
706 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
707 function_arg (&CUM, MODE, TYPE, NAMED)
709 /* If defined, a C expression that gives the alignment boundary, in
710 bits, of an argument with the specified mode and type. If it is
711 not defined, `PARM_BOUNDARY' is used for all arguments. */
713 /* Arguments larger than one word are double word aligned. */
715 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
717 ? (integer_zerop (TYPE_SIZE (TYPE)) \
718 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
719 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
720 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
721 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
724 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
725 as assembly via FUNCTION_PROFILER. Just output a local label.
726 We can't use the function label because the GAS SOM target can't
727 handle the difference of a global symbol and a local symbol. */
729 #ifndef FUNC_BEGIN_PROLOG_LABEL
730 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
733 #define FUNCTION_PROFILER(FILE, LABEL) \
734 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
736 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
737 void hppa_profile_hook (int label_no);
739 /* The profile counter if emitted must come before the prologue. */
740 #define PROFILE_BEFORE_PROLOGUE 1
742 /* We never want final.c to emit profile counters. When profile
743 counters are required, we have to defer emitting them to the end
744 of the current file. */
745 #define NO_PROFILE_COUNTERS 1
747 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
748 the stack pointer does not matter. The value is tested only in
749 functions that have frame pointers.
750 No definition is equivalent to always zero. */
752 extern int may_call_alloca;
754 #define EXIT_IGNORE_STACK \
755 (get_frame_size () != 0 \
756 || cfun->calls_alloca || crtl->outgoing_args_size)
758 /* Length in units of the trampoline for entering a nested function. */
760 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
762 /* Alignment required by the trampoline. */
764 #define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
766 /* Minimum length of a cache line. A length of 16 will work on all
767 PA-RISC processors. All PA 1.1 processors have a cache line of
768 32 bytes. Most but not all PA 2.0 processors have a cache line
769 of 64 bytes. As cache flushes are expensive and we don't support
770 PA 1.0, we use a minimum length of 32. */
772 #define MIN_CACHELINE_SIZE 32
775 /* Addressing modes, and classification of registers for them.
777 Using autoincrement addressing modes on PA8000 class machines is
780 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
781 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
783 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
784 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
786 /* Macros to check register numbers against specific register classes. */
788 /* The following macros assume that X is a hard or pseudo reg number.
789 They give nonzero only if X is a hard reg of the suitable class
790 or a pseudo reg currently allocated to a suitable hard reg.
791 Since they use reg_renumber, they are safe only once reg_renumber
792 has been allocated, which happens in local-alloc.c. */
794 #define REGNO_OK_FOR_INDEX_P(X) \
796 || (X >= FIRST_PSEUDO_REGISTER \
798 && (unsigned) reg_renumber[X] < 32)))
799 #define REGNO_OK_FOR_BASE_P(X) \
801 || (X >= FIRST_PSEUDO_REGISTER \
803 && (unsigned) reg_renumber[X] < 32)))
804 #define REGNO_OK_FOR_FP_P(X) \
806 || (X >= FIRST_PSEUDO_REGISTER \
808 && FP_REGNO_P (reg_renumber[X])))
810 /* Now macros that check whether X is a register and also,
811 strictly, whether it is in a specified class.
813 These macros are specific to the HP-PA, and may be used only
814 in code for printing assembler insns and in conditions for
815 define_optimization. */
817 /* 1 if X is an fp register. */
819 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
821 /* Maximum number of registers that can appear in a valid memory address. */
823 #define MAX_REGS_PER_ADDRESS 2
825 /* Non-TLS symbolic references. */
826 #define PA_SYMBOL_REF_TLS_P(RTX) \
827 (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
829 /* Recognize any constant value that is a valid address except
830 for symbolic addresses. We get better CSE by rejecting them
831 here and allowing hppa_legitimize_address to break them up. We
832 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
834 #define CONSTANT_ADDRESS_P(X) \
835 ((GET_CODE (X) == LABEL_REF \
836 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
837 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
838 || GET_CODE (X) == HIGH) \
839 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
841 /* A C expression that is nonzero if we are using the new HP assembler. */
843 #ifndef NEW_HP_ASSEMBLER
844 #define NEW_HP_ASSEMBLER 0
847 /* The macros below define the immediate range for CONST_INTS on
848 the 64-bit port. Constants in this range can be loaded in three
849 instructions using a ldil/ldo/depdi sequence. Constants outside
850 this range are forced to the constant pool prior to reload. */
852 #define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
853 #define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
854 #define LEGITIMATE_64BIT_CONST_INT_P(X) \
855 ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
857 /* A C expression that is nonzero if X is a legitimate constant for an
860 We include all constant integers and constant doubles, but not
861 floating-point, except for floating-point zero. We reject LABEL_REFs
862 if we're not using gas or the new HP assembler.
864 In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS
865 that need more than three instructions to load prior to reload. This
866 limit is somewhat arbitrary. It takes three instructions to load a
867 CONST_INT from memory but two are memory accesses. It may be better
868 to increase the allowed range for CONST_INTS. We may also be able
869 to handle CONST_DOUBLES. */
871 #define LEGITIMATE_CONSTANT_P(X) \
872 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
873 || (X) == CONST0_RTX (GET_MODE (X))) \
874 && (NEW_HP_ASSEMBLER \
876 || GET_CODE (X) != LABEL_REF) \
878 || GET_CODE (X) != CONST_DOUBLE) \
880 || HOST_BITS_PER_WIDE_INT <= 32 \
881 || GET_CODE (X) != CONST_INT \
882 || reload_in_progress \
883 || reload_completed \
884 || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \
885 || cint_ok_for_move (INTVAL (X))) \
886 && !function_label_operand (X, VOIDmode))
888 /* Target flags set on a symbol_ref. */
890 /* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */
891 #define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
892 #define SYMBOL_REF_REFERENCED_P(RTX) \
893 ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
895 /* Defines for constraints.md. */
897 /* Return 1 iff OP is a scaled or unscaled index address. */
898 #define IS_INDEX_ADDR_P(OP) \
899 (GET_CODE (OP) == PLUS \
900 && GET_MODE (OP) == Pmode \
901 && (GET_CODE (XEXP (OP, 0)) == MULT \
902 || GET_CODE (XEXP (OP, 1)) == MULT \
903 || (REG_P (XEXP (OP, 0)) \
904 && REG_P (XEXP (OP, 1)))))
906 /* Return 1 iff OP is a LO_SUM DLT address. */
907 #define IS_LO_SUM_DLT_ADDR_P(OP) \
908 (GET_CODE (OP) == LO_SUM \
909 && GET_MODE (OP) == Pmode \
910 && REG_P (XEXP (OP, 0)) \
911 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
912 && GET_CODE (XEXP (OP, 1)) == UNSPEC)
914 /* Nonzero if 14-bit offsets can be used for all loads and stores.
915 This is not possible when generating PA 1.x code as floating point
916 loads and stores only support 5-bit offsets. Note that we do not
917 forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
918 Instead, we use pa_secondary_reload() to reload integer mode
919 REG+D memory addresses used in floating point loads and stores.
921 FIXME: the ELF32 linker clobbers the LSB of the FP register number
922 in PA 2.0 floating-point insns with long displacements. This is
923 because R_PARISC_DPREL14WR and other relocations like it are not
924 yet supported by GNU ld. For now, we reject long displacements
927 #define INT14_OK_STRICT \
929 || TARGET_DISABLE_FPREGS \
930 || (TARGET_PA_20 && !TARGET_ELF32))
932 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
933 and check its validity for a certain class.
934 We have two alternate definitions for each of them.
935 The usual definition accepts all pseudo regs; the other rejects
936 them unless they have been allocated suitable hard regs.
937 The symbol REG_OK_STRICT causes the latter definition to be used.
939 Most source files want to accept pseudo regs in the hope that
940 they will get allocated to the class that the insn wants them to be in.
941 Source files for reload pass need to be strict.
942 After reload, it makes no difference, since pseudo regs have
943 been eliminated by then. */
945 #ifndef REG_OK_STRICT
947 /* Nonzero if X is a hard reg that can be used as an index
948 or if it is a pseudo reg. */
949 #define REG_OK_FOR_INDEX_P(X) \
950 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
952 /* Nonzero if X is a hard reg that can be used as a base reg
953 or if it is a pseudo reg. */
954 #define REG_OK_FOR_BASE_P(X) \
955 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
959 /* Nonzero if X is a hard reg that can be used as an index. */
960 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
962 /* Nonzero if X is a hard reg that can be used as a base reg. */
963 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
967 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
968 valid memory address for an instruction. The MODE argument is the
969 machine mode for the MEM expression that wants to use this address.
971 On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
972 REG+REG, and REG+(REG*SCALE). The indexed address forms are only
973 available with floating point loads and stores, and integer loads.
974 We get better code by allowing indexed addresses in the initial
977 The acceptance of indexed addresses as legitimate implies that we
978 must provide patterns for doing indexed integer stores, or the move
979 expanders must force the address of an indexed store to a register.
980 We have adopted the latter approach.
982 Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
983 the base register is a valid pointer for indexed instructions.
984 On targets that have non-equivalent space registers, we have to
985 know at the time of assembler output which register in a REG+REG
986 pair is the base register. The REG_POINTER flag is sometimes lost
987 in reload and the following passes, so it can't be relied on during
988 code generation. Thus, we either have to canonicalize the order
989 of the registers in REG+REG indexed addresses, or treat REG+REG
990 addresses separately and provide patterns for both permutations.
992 The latter approach requires several hundred additional lines of
993 code in pa.md. The downside to canonicalizing is that a PLUS
994 in the wrong order can't combine to form to make a scaled indexed
995 memory operand. As we won't need to canonicalize the operands if
996 the REG_POINTER lossage can be fixed, it seems better canonicalize.
998 We initially break out scaled indexed addresses in canonical order
999 in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes
1000 scaled indexed addresses during RTL generation. However, fold_rtx
1001 has its own opinion on how the operands of a PLUS should be ordered.
1002 If one of the operands is equivalent to a constant, it will make
1003 that operand the second operand. As the base register is likely to
1004 be equivalent to a SYMBOL_REF, we have made it the second operand.
1006 GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
1007 operands are in the order INDEX+BASE on targets with non-equivalent
1008 space registers, and in any order on targets with equivalent space
1009 registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing.
1011 We treat a SYMBOL_REF as legitimate if it is part of the current
1012 function's constant-pool, because such addresses can actually be
1013 output as REG+SMALLINT. */
1015 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1016 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1018 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1019 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1021 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1022 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1024 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1025 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1027 #if HOST_BITS_PER_WIDE_INT > 32
1028 #define VAL_32_BITS_P(X) \
1029 ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \
1030 < (unsigned HOST_WIDE_INT) 2 << 31)
1032 #define VAL_32_BITS_P(X) 1
1034 #define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
1036 /* These are the modes that we allow for scaled indexing. */
1037 #define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
1038 ((TARGET_64BIT && (MODE) == DImode) \
1039 || (MODE) == SImode \
1040 || (MODE) == HImode \
1041 || (MODE) == SFmode \
1042 || (MODE) == DFmode)
1044 /* These are the modes that we allow for unscaled indexing. */
1045 #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
1046 ((TARGET_64BIT && (MODE) == DImode) \
1047 || (MODE) == SImode \
1048 || (MODE) == HImode \
1049 || (MODE) == QImode \
1050 || (MODE) == SFmode \
1051 || (MODE) == DFmode)
1053 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1055 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1056 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1057 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1058 && REG_P (XEXP (X, 0)) \
1059 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1061 else if (GET_CODE (X) == PLUS) \
1063 rtx base = 0, index = 0; \
1064 if (REG_P (XEXP (X, 1)) \
1065 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1066 base = XEXP (X, 1), index = XEXP (X, 0); \
1067 else if (REG_P (XEXP (X, 0)) \
1068 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1069 base = XEXP (X, 0), index = XEXP (X, 1); \
1071 && GET_CODE (index) == CONST_INT \
1072 && ((INT_14_BITS (index) \
1073 && (((MODE) != DImode \
1074 && (MODE) != SFmode \
1075 && (MODE) != DFmode) \
1076 /* The base register for DImode loads and stores \
1077 with long displacements must be aligned because \
1078 the lower three bits in the displacement are \
1079 assumed to be zero. */ \
1080 || ((MODE) == DImode \
1082 || (INTVAL (index) % 8) == 0)) \
1083 /* Similarly, the base register for SFmode/DFmode \
1084 loads and stores with long displacements must \
1086 || (((MODE) == SFmode || (MODE) == DFmode) \
1087 && INT14_OK_STRICT \
1088 && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
1089 || INT_5_BITS (index))) \
1091 if (!TARGET_DISABLE_INDEXING \
1092 /* Only accept the "canonical" INDEX+BASE operand order \
1093 on targets with non-equivalent space registers. */ \
1094 && (TARGET_NO_SPACE_REGS \
1095 ? (base && REG_P (index)) \
1096 : (base == XEXP (X, 1) && REG_P (index) \
1097 && (reload_completed \
1098 || (reload_in_progress && HARD_REGISTER_P (base)) \
1099 || REG_POINTER (base)) \
1100 && (reload_completed \
1101 || (reload_in_progress && HARD_REGISTER_P (index)) \
1102 || !REG_POINTER (index)))) \
1103 && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \
1104 && REG_OK_FOR_INDEX_P (index) \
1105 && borx_reg_operand (base, Pmode) \
1106 && borx_reg_operand (index, Pmode)) \
1108 if (!TARGET_DISABLE_INDEXING \
1110 && GET_CODE (index) == MULT \
1111 && MODE_OK_FOR_SCALED_INDEXING_P (MODE) \
1112 && REG_P (XEXP (index, 0)) \
1113 && GET_MODE (XEXP (index, 0)) == Pmode \
1114 && REG_OK_FOR_INDEX_P (XEXP (index, 0)) \
1115 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1116 && INTVAL (XEXP (index, 1)) \
1117 == (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
1118 && borx_reg_operand (base, Pmode)) \
1121 else if (GET_CODE (X) == LO_SUM \
1122 && GET_CODE (XEXP (X, 0)) == REG \
1123 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1124 && CONSTANT_P (XEXP (X, 1)) \
1125 && (TARGET_SOFT_FLOAT \
1126 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \
1129 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
1130 || ((MODE) != SFmode \
1131 && (MODE) != DFmode))) \
1133 else if (GET_CODE (X) == LO_SUM \
1134 && GET_CODE (XEXP (X, 0)) == SUBREG \
1135 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \
1136 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \
1137 && CONSTANT_P (XEXP (X, 1)) \
1138 && (TARGET_SOFT_FLOAT \
1139 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \
1142 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
1143 || ((MODE) != SFmode \
1144 && (MODE) != DFmode))) \
1146 else if (GET_CODE (X) == CONST_INT && INT_5_BITS (X)) \
1148 /* Needed for -fPIC */ \
1149 else if (GET_CODE (X) == LO_SUM \
1150 && GET_CODE (XEXP (X, 0)) == REG \
1151 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1152 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1153 && (TARGET_SOFT_FLOAT \
1154 || (TARGET_PA_20 && !TARGET_ELF32) \
1155 || ((MODE) != SFmode \
1156 && (MODE) != DFmode))) \
1160 /* Look for machine dependent ways to make the invalid address AD a
1163 For the PA, transform:
1165 memory(X + <large int>)
1169 if (<large int> & mask) >= 16
1170 Y = (<large int> & ~mask) + mask + 1 Round up.
1172 Y = (<large int> & ~mask) Round down.
1174 memory (Z + (<large int> - Y));
1176 This makes reload inheritance and reload_cse work better since Z
1179 There may be more opportunities to improve code with this hook. */
1180 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1182 long offset, newoffset, mask; \
1183 rtx new_rtx, temp = NULL_RTX; \
1185 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1186 ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff); \
1188 if (optimize && GET_CODE (AD) == PLUS) \
1189 temp = simplify_binary_operation (PLUS, Pmode, \
1190 XEXP (AD, 0), XEXP (AD, 1)); \
1192 new_rtx = temp ? temp : AD; \
1195 && GET_CODE (new_rtx) == PLUS \
1196 && GET_CODE (XEXP (new_rtx, 0)) == REG \
1197 && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT) \
1199 offset = INTVAL (XEXP ((new_rtx), 1)); \
1201 /* Choose rounding direction. Round up if we are >= halfway. */ \
1202 if ((offset & mask) >= ((mask + 1) / 2)) \
1203 newoffset = (offset & ~mask) + mask + 1; \
1205 newoffset = offset & ~mask; \
1207 /* Ensure that long displacements are aligned. */ \
1208 if (mask == 0x3fff \
1209 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1210 || (TARGET_64BIT && (MODE) == DImode))) \
1211 newoffset &= ~(GET_MODE_SIZE (MODE) - 1); \
1213 if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \
1215 temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0), \
1216 GEN_INT (newoffset)); \
1217 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1218 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1219 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1228 #define TARGET_ASM_SELECT_SECTION pa_select_section
1230 /* Return a nonzero value if DECL has a section attribute. */
1231 #define IN_NAMED_SECTION_P(DECL) \
1232 ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
1233 && DECL_SECTION_NAME (DECL) != NULL_TREE)
1235 /* Define this macro if references to a symbol must be treated
1236 differently depending on something about the variable or
1237 function named by the symbol (such as what section it is in).
1239 The macro definition, if any, is executed immediately after the
1240 rtl for DECL or other node is created.
1241 The value of the rtl will be a `mem' whose address is a
1244 The usual thing for this macro to do is to a flag in the
1245 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1246 name string in the `symbol_ref' (if one bit is not enough
1249 On the HP-PA we use this to indicate if a symbol is in text or
1250 data space. Also, function labels need special treatment. */
1252 #define TEXT_SPACE_P(DECL)\
1253 (TREE_CODE (DECL) == FUNCTION_DECL \
1254 || (TREE_CODE (DECL) == VAR_DECL \
1255 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1256 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1258 || CONSTANT_CLASS_P (DECL))
1260 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1262 /* Specify the machine mode that this machine uses for the index in the
1263 tablejump instruction. For small tables, an element consists of a
1264 ia-relative branch and its delay slot. When -mbig-switch is specified,
1265 we use a 32-bit absolute address for non-pic code, and a 32-bit offset
1266 for both 32 and 64-bit pic code. */
1267 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
1269 /* Jump tables must be 32-bit aligned, no matter the size of the element. */
1270 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1272 /* Define this as 1 if `char' should by default be signed; else as 0. */
1273 #define DEFAULT_SIGNED_CHAR 1
1275 /* Max number of bytes we can move from memory to memory
1276 in one reasonably fast instruction. */
1279 /* Higher than the default as we prefer to use simple move insns
1280 (better scheduling and delay slot filling) and because our
1281 built-in block move is really a 2X unrolled loop.
1283 Believe it or not, this has to be big enough to allow for copying all
1284 arguments passed in registers to avoid infinite recursion during argument
1285 setup for a function call. Why? Consider how we copy the stack slots
1286 reserved for parameters when they may be trashed by a call. */
1287 #define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
1289 /* Define if operations between registers always perform the operation
1290 on the full register even if a narrower mode is specified. */
1291 #define WORD_REGISTER_OPERATIONS
1293 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1294 will either zero-extend or sign-extend. The value of this macro should
1295 be the code that says which one of the two operations is implicitly
1296 done, UNKNOWN if none. */
1297 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1299 /* Nonzero if access to memory by bytes is slow and undesirable. */
1300 #define SLOW_BYTE_ACCESS 1
1302 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1303 is done just by pretending it is already truncated. */
1304 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1306 /* Specify the machine mode that pointers have.
1307 After generation of rtl, the compiler makes no further distinction
1308 between pointers and any other objects of this machine mode. */
1309 #define Pmode word_mode
1311 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1312 return the mode to be used for the comparison. For floating-point, CCFPmode
1313 should be used. CC_NOOVmode should be used when the first operand is a
1314 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1316 #define SELECT_CC_MODE(OP,X,Y) \
1317 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1319 /* A function address in a call instruction
1320 is a byte address (for indexing purposes)
1321 so give the MEM rtx a byte's mode. */
1322 #define FUNCTION_MODE SImode
1324 /* Define this if addresses of constant functions
1325 shouldn't be put through pseudo regs where they can be cse'd.
1326 Desirable on machines where ordinary constants are expensive
1327 but a CALL with constant address is cheap. */
1328 #define NO_FUNCTION_CSE
1330 /* Define this to be nonzero if shift instructions ignore all but the low-order
1332 #define SHIFT_COUNT_TRUNCATED 1
1334 /* Compute extra cost of moving data between one register class
1337 Make moves from SAR so expensive they should never happen. We used to
1338 have 0xffff here, but that generates overflow in rare cases.
1340 Copies involving a FP register and a non-FP register are relatively
1341 expensive because they must go through memory.
1343 Other copies are reasonably cheap. */
1344 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1345 (CLASS1 == SHIFT_REGS ? 0x100 \
1346 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1347 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1350 /* Adjust the cost of branches. */
1351 #define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1353 /* Handling the special cases is going to get too complicated for a macro,
1354 just call `pa_adjust_insn_length' to do the real work. */
1355 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1356 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1358 /* Millicode insns are actually function calls with some special
1359 constraints on arguments and register usage.
1361 Millicode calls always expect their arguments in the integer argument
1362 registers, and always return their result in %r29 (ret1). They
1363 are expected to clobber their arguments, %r1, %r29, and the return
1364 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1366 This macro tells reorg that the references to arguments and
1367 millicode calls do not appear to happen until after the millicode call.
1368 This allows reorg to put insns which set the argument registers into the
1369 delay slot of the millicode call -- thus they act more like traditional
1372 Note we cannot consider side effects of the insn to be delayed because
1373 the branch and link insn will clobber the return pointer. If we happened
1374 to use the return pointer in the delay slot of the call, then we lose.
1376 get_attr_type will try to recognize the given insn, so make sure to
1377 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1379 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1382 /* Control the assembler format that we output. */
1384 /* A C string constant describing how to begin a comment in the target
1385 assembler language. The compiler assumes that the comment will end at
1386 the end of the line. */
1388 #define ASM_COMMENT_START ";"
1390 /* Output to assembler file text saying following lines
1391 may contain character constants, extra white space, comments, etc. */
1393 #define ASM_APP_ON ""
1395 /* Output to assembler file text saying following lines
1396 no longer contain unusual constructs. */
1398 #define ASM_APP_OFF ""
1400 /* This is how to output the definition of a user-level label named NAME,
1401 such as the label on a static function or variable NAME. */
1403 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1405 assemble_name ((FILE), (NAME)); \
1407 fputs (":\n", (FILE)); \
1409 fputc ('\n', (FILE)); \
1412 /* This is how to output a reference to a user-level label named NAME.
1413 `assemble_name' uses this. */
1415 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1417 const char *xname = (NAME); \
1418 if (FUNCTION_NAME_P (NAME)) \
1420 if (xname[0] == '*') \
1423 fputs (user_label_prefix, FILE); \
1424 fputs (xname, FILE); \
1427 /* This how we output the symbol_ref X. */
1429 #define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
1431 SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \
1432 assemble_name (FILE, XSTR (X, 0)); \
1435 /* This is how to store into the string LABEL
1436 the symbol_ref name of an internal numbered label where
1437 PREFIX is the class of label and NUM is the number within the class.
1438 This is suitable for output with `assemble_name'. */
1440 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1441 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1443 /* Output the definition of a compiler-generated label named NAME. */
1445 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
1447 assemble_name_raw ((FILE), (NAME)); \
1449 fputs (":\n", (FILE)); \
1451 fputc ('\n', (FILE)); \
1454 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1456 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1457 output_ascii ((FILE), (P), (SIZE))
1459 /* Jump tables are always placed in the text section. Technically, it
1460 is possible to put them in the readonly data section when -mbig-switch
1461 is specified. This has the benefit of getting the table out of .text
1462 and reducing branch lengths as a result. The downside is that an
1463 additional insn (addil) is needed to access the table when generating
1464 PIC code. The address difference table also has to use 32-bit
1465 pc-relative relocations. Currently, GAS does not support these
1466 relocations, although it is easily modified to do this operation.
1467 The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
1468 when using ELF GAS. A simple difference can be used when using
1469 SOM GAS or the HP assembler. The final downside is GDB complains
1470 about the nesting of the label for the table when debugging. */
1472 #define JUMP_TABLES_IN_TEXT_SECTION 1
1474 /* This is how to output an element of a case-vector that is absolute. */
1476 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1477 if (TARGET_BIG_SWITCH) \
1478 fprintf (FILE, "\t.word L$%04d\n", VALUE); \
1480 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1482 /* This is how to output an element of a case-vector that is relative.
1483 Since we always place jump tables in the text section, the difference
1484 is absolute and requires no relocation. */
1486 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1487 if (TARGET_BIG_SWITCH) \
1488 fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \
1490 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1492 /* This is how to output an assembler line that says to advance the
1493 location counter to a multiple of 2**LOG bytes. */
1495 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1496 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1498 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1499 fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \
1500 (unsigned HOST_WIDE_INT)(SIZE))
1502 /* This says how to output an assembler line to define an uninitialized
1503 global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
1504 This macro exists to properly support languages like C++ which do not
1505 have common data. */
1507 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1508 pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
1510 /* This says how to output an assembler line to define a global common symbol
1511 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1513 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1514 pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
1516 /* This says how to output an assembler line to define a local common symbol
1517 with size SIZE (in bytes) and alignment ALIGN (in bits). This macro
1518 controls how the assembler definitions of uninitialized static variables
1521 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
1522 pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
1524 /* All HP assemblers use "!" to separate logical lines. */
1525 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
1527 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1528 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1530 /* Print operand X (an rtx) in assembler syntax to file FILE.
1531 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1532 For `%' followed by punctuation, CODE is the punctuation and X is null.
1534 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1535 and an immediate zero should be represented as `r0'.
1537 Several % codes are defined:
1539 C compare conditions
1540 N extract conditions
1541 M modifier to handle preincrement addressing for memory refs.
1542 F modifier to handle preincrement addressing for fp memory refs */
1544 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1547 /* Print a memory address as an operand to reference that memory location. */
1549 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1550 { rtx addr = ADDR; \
1551 switch (GET_CODE (addr)) \
1554 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1557 gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \
1558 fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \
1559 reg_names [REGNO (XEXP (addr, 0))]); \
1562 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1563 fputs ("R'", FILE); \
1564 else if (flag_pic == 0) \
1565 fputs ("RR'", FILE); \
1567 fputs ("RT'", FILE); \
1568 output_global_address (FILE, XEXP (addr, 1), 0); \
1569 fputs ("(", FILE); \
1570 output_operand (XEXP (addr, 0), 0); \
1571 fputs (")", FILE); \
1574 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \
1577 output_addr_const (FILE, addr); \
1581 /* Find the return address associated with the frame given by
1583 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1584 (return_addr_rtx (COUNT, FRAMEADDR))
1586 /* Used to mask out junk bits from the return address, such as
1587 processor state, interrupt status, condition codes and the like. */
1588 #define MASK_RETURN_ADDR \
1589 /* The privilege level is in the two low order bits, mask em out \
1590 of the return address. */ \
1593 /* The number of Pmode words for the setjmp buffer. */
1594 #define JMP_BUF_SIZE 50
1596 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
1597 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1598 "__canonicalize_funcptr_for_compare"
1601 #undef TARGET_HAVE_TLS
1602 #define TARGET_HAVE_TLS true