1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 enum cmp_type /* comparison type */
27 CMP_SI, /* compare integers */
28 CMP_SF, /* compare single precision floats */
29 CMP_DF, /* compare double precision floats */
30 CMP_MAX /* max comparison type */
33 /* For long call handling. */
34 extern unsigned int total_code_bytes;
36 /* Which processor to schedule for. */
48 /* For -mschedule= option. */
49 extern const char *pa_cpu_string;
50 extern enum processor_type pa_cpu;
52 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
54 /* Which architecture to generate code for. */
56 enum architecture_type
65 /* For -march= option. */
66 extern const char *pa_arch_string;
67 extern enum architecture_type pa_arch;
69 /* Print subsidiary information on the compiler version in use. */
71 #define TARGET_VERSION fputs (" (hppa)", stderr);
73 /* Run-time compilation parameters selecting different hardware subsets. */
75 extern int target_flags;
77 /* compile code for HP-PA 1.1 ("Snake") */
82 #define TARGET_PA_11 (target_flags & MASK_PA_11)
85 /* Disable all FP registers (they all become fixed). This may be necessary
86 for compiling kernels which perform lazy context switching of FP regs.
87 Note if you use this option and try to perform floating point operations
88 the compiler will abort! */
90 #define MASK_DISABLE_FPREGS 2
91 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
93 /* Generate code which assumes that all space register are equivalent.
94 Triggers aggressive unscaled index addressing and faster
95 builtin_return_address. */
96 #define MASK_NO_SPACE_REGS 4
97 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
99 /* Allow unconditional jumps in the delay slots of call instructions. */
100 #define MASK_JUMP_IN_DELAY 8
101 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
103 /* Disable indexed addressing modes. */
104 #define MASK_DISABLE_INDEXING 32
105 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
107 /* Emit code which follows the new portable runtime calling conventions
108 HP wants everyone to use for ELF objects. If at all possible you want
109 to avoid this since it's a performance loss for non-prototyped code.
111 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
112 long-call stubs which is quite expensive. */
113 #define MASK_PORTABLE_RUNTIME 64
114 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
116 /* Emit directives only understood by GAS. This allows parameter
117 relocations to work for static functions. There is no way
118 to make them work the HP assembler at this time. */
120 #define TARGET_GAS (target_flags & MASK_GAS)
122 /* Emit code for processors which do not have an FPU. */
123 #define MASK_SOFT_FLOAT 256
124 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
126 /* Use 3-insn load/store sequences for access to large data segments
127 in shared libraries on hpux10. */
128 #define MASK_LONG_LOAD_STORE 512
129 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
131 /* Use a faster sequence for indirect calls. This assumes that calls
132 through function pointers will never cross a space boundary, and
133 that the executable is not dynamically linked. Such assumptions
134 are generally safe for building kernels and statically linked
135 executables. Code compiled with this option will fail miserably if
136 the executable is dynamically linked or uses nested functions! */
137 #define MASK_FAST_INDIRECT_CALLS 1024
138 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
140 /* Generate code with big switch statements to avoid out of range branches
141 occurring within the switch table. */
142 #define MASK_BIG_SWITCH 2048
143 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
146 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
147 true when this is true. */
148 #define MASK_PA_20 4096
150 #define TARGET_PA_20 (target_flags & MASK_PA_20)
153 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
155 #define TARGET_64BIT 0
158 /* Generate code for ELF32 ABI. */
160 #define TARGET_ELF32 0
163 /* Generate code for SOM 32bit ABI. */
168 /* Macro to define tables used to set the flags.
169 This is a list in braces of pairs in braces,
170 each pair being { "NAME", VALUE }
171 where VALUE is the bits to set or minus the bits to clear.
172 An empty string NAME is used to identify the default VALUE. */
174 #define TARGET_SWITCHES \
175 {{"snake", MASK_PA_11, "Generate PA1.1 code"}, \
176 {"nosnake", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
177 {"pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
178 {"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \
179 {"pa-risc-2-0", MASK_PA_20, "Generate PA2.0 code. This option requires binutils 2.10 or later"}, \
180 {"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \
181 {"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
182 {"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \
183 {"space-regs", -MASK_NO_SPACE_REGS, "Do not disable space regs"}, \
184 {"jump-in-delay", MASK_JUMP_IN_DELAY, "Put jumps in call delay slots"},\
185 {"no-jump-in-delay", -MASK_JUMP_IN_DELAY, "Do not put jumps in call delay slots"}, \
186 {"disable-indexing", MASK_DISABLE_INDEXING, "Disable indexed addressing"},\
187 {"no-disable-indexing", -MASK_DISABLE_INDEXING, "Do not disable indexed addressing"},\
188 {"portable-runtime", MASK_PORTABLE_RUNTIME, "Use portable calling conventions"}, \
189 {"no-portable-runtime", -MASK_PORTABLE_RUNTIME, "Do not use portable calling conventions"},\
190 {"gas", MASK_GAS, "Assume code will be assembled by GAS"}, \
191 {"no-gas", -MASK_GAS, "Do not assume code will be assembled by GAS"}, \
192 {"soft-float", MASK_SOFT_FLOAT, "Use software floating point"}, \
193 {"no-soft-float", -MASK_SOFT_FLOAT, "Do not use software floating point"}, \
194 {"long-load-store", MASK_LONG_LOAD_STORE, "Emit long load/store sequences"}, \
195 {"no-long-load-store", -MASK_LONG_LOAD_STORE, "Do not emit long load/store sequences"},\
196 {"fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, "Generate fast indirect calls"},\
197 {"no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, "Do not generate fast indirect calls"},\
198 {"big-switch", MASK_BIG_SWITCH, "Generate code for huge switch statements"}, \
199 {"no-big-switch", -MASK_BIG_SWITCH, "Do not generate code for huge switch statements"}, \
200 {"linker-opt", 0, "Enable linker optimizations"}, \
201 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, NULL}}
203 #ifndef TARGET_DEFAULT
204 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
207 #ifndef TARGET_CPU_DEFAULT
208 #define TARGET_CPU_DEFAULT 0
211 #ifndef TARGET_SCHED_DEFAULT
212 #define TARGET_SCHED_DEFAULT "8000"
215 #define TARGET_OPTIONS \
217 { "schedule=", &pa_cpu_string, "Specify CPU for scheduling purposes" },\
218 { "arch=", &pa_arch_string, "Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later." }\
221 /* Specify the dialect of assembler to use. New mnemonics is dialect one
222 and the old mnemonics are dialect zero. */
223 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
225 #define OVERRIDE_OPTIONS override_options ()
227 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
228 code duplication we simply include this file and override as needed. */
231 /* We do not have to be compatible with dbx, so we enable gdb extensions
233 #define DEFAULT_GDB_EXTENSIONS 1
235 /* This used to be zero (no max length), but big enums and such can
236 cause huge strings which killed gas.
238 We also have to avoid lossage in dbxout.c -- it does not compute the
239 string size accurately, so we are real conservative here. */
240 #undef DBX_CONTIN_LENGTH
241 #define DBX_CONTIN_LENGTH 3000
243 /* Only labels should ever begin in column zero. */
244 #define ASM_STABS_OP "\t.stabs\t"
245 #define ASM_STABN_OP "\t.stabn\t"
247 /* GDB always assumes the current function's frame begins at the value
248 of the stack pointer upon entry to the current function. Accessing
249 local variables and parameters passed on the stack is done using the
250 base of the frame + an offset provided by GCC.
252 For functions which have frame pointers this method works fine;
253 the (frame pointer) == (stack pointer at function entry) and GCC provides
254 an offset relative to the frame pointer.
256 This loses for functions without a frame pointer; GCC provides an offset
257 which is relative to the stack pointer after adjusting for the function's
258 frame size. GDB would prefer the offset to be relative to the value of
259 the stack pointer at the function's entry. Yuk! */
260 #define DEBUGGER_AUTO_OFFSET(X) \
261 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
262 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
264 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
265 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
266 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
268 #define CPP_PA10_SPEC ""
269 #define CPP_PA11_SPEC "-D_PA_RISC1_1 -D__hp9000s700"
270 #define CPP_PA20_SPEC "-D_PA_RISC2_0 -D__hp9000s800"
271 #define CPP_64BIT_SPEC "-D__LP64__"
273 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0
274 #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa10)"
277 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) != 0
278 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_20) != 0
279 #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11) %(cpp_pa20)"
281 #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11)"
286 #define CPP_64BIT_DEFAULT_SPEC "%(cpp_64bit)"
288 #define CPP_64BIT_DEFAULT_SPEC ""
291 /* This macro defines names of additional specifications to put in the
292 specs that can be used in various specifications like CC1_SPEC. Its
293 definition is an initializer with a subgrouping for each command option.
295 Each subgrouping contains a string constant, that defines the
296 specification name, and a string constant that used by the GNU CC driver
299 Do not define this macro if it does not need to do anything. */
301 #ifndef SUBTARGET_EXTRA_SPECS
302 #define SUBTARGET_EXTRA_SPECS
305 #define EXTRA_SPECS \
306 { "cpp_pa10", CPP_PA10_SPEC}, \
307 { "cpp_pa11", CPP_PA11_SPEC}, \
308 { "cpp_pa20", CPP_PA20_SPEC}, \
309 { "cpp_64bit", CPP_64BIT_SPEC}, \
310 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
311 { "cpp_64bit_default", CPP_64BIT_DEFAULT_SPEC }, \
312 SUBTARGET_EXTRA_SPECS
315 %{mpa-risc-1-0:%(cpp_pa10)} \
316 %{mpa-risc-1-1:%(cpp_pa11)} \
317 %{msnake:%(cpp_pa11)} \
318 %{mpa-risc-2-0:%(cpp_pa20)} \
319 %{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \
320 %{m64bit:%(cpp_64bit)} \
321 %{!m64bit:%(cpp_64bit_default)} \
322 %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG} \
323 %{threads: -D_REENTRANT -D_DCE_THREADS}"
325 #define CPLUSPLUS_CPP_SPEC "\
326 -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG \
327 %{mpa-risc-1-0:%(cpp_pa10)} \
328 %{mpa-risc-1-1:%(cpp_pa11)} \
329 %{msnake:%(cpp_pa11)} \
330 %{mpa-risc-2-0:%(cpp_pa20)} \
331 %{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \
332 %{m64bit:%(cpp_64bit)} \
333 %{!m64bit:%(cpp_64bit_default)} \
334 %{threads: -D_REENTRANT -D_DCE_THREADS}"
336 /* Defines for a K&R CC */
338 #define CC1_SPEC "%{pg:} %{p:}"
340 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
342 /* We don't want -lg. */
344 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
347 /* This macro defines command-line switches that modify the default
350 The definition is be an initializer for an array of structures. Each
351 array element has have three elements: the switch name, one of the
352 enumeration codes ADD or DELETE to indicate whether the string should be
353 inserted or deleted, and the string to be inserted or deleted. */
354 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
356 /* Make gcc agree with <machine/ansi.h> */
358 #define SIZE_TYPE "unsigned int"
359 #define PTRDIFF_TYPE "int"
360 #define WCHAR_TYPE "unsigned int"
361 #define WCHAR_TYPE_SIZE 32
363 /* Show we can debug even without a frame pointer. */
364 #define CAN_DEBUG_WITHOUT_FP
366 /* Machine dependent reorg pass. */
367 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
369 /* Names to predefine in the preprocessor for this target machine. */
371 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem=unix -Asystem=bsd -Acpu=hppa -Amachine=hppa"
373 /* target machine storage layout */
375 /* Define this macro if it is advisable to hold scalars in registers
376 in a wider mode than that declared by the program. In such cases,
377 the value is constrained to be within the bounds of the declared
378 type, but kept valid in the wider mode. The signedness of the
379 extension may differ from that of the type. */
381 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
382 if (GET_MODE_CLASS (MODE) == MODE_INT \
383 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
386 /* Define this if most significant bit is lowest numbered
387 in instructions that operate on numbered bit-fields. */
388 #define BITS_BIG_ENDIAN 1
390 /* Define this if most significant byte of a word is the lowest numbered. */
391 /* That is true on the HP-PA. */
392 #define BYTES_BIG_ENDIAN 1
394 /* Define this if most significant word of a multiword number is lowest
396 #define WORDS_BIG_ENDIAN 1
398 #define MAX_BITS_PER_WORD 64
399 #define MAX_LONG_TYPE_SIZE 32
401 /* Width of a word, in units (bytes). */
402 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
403 #define MIN_UNITS_PER_WORD 4
405 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
406 #define PARM_BOUNDARY BITS_PER_WORD
408 /* Largest alignment required for any stack parameter, in bits.
409 Don't define this if it is equal to PARM_BOUNDARY */
410 #define MAX_PARM_BOUNDARY 64
412 /* Boundary (in *bits*) on which stack pointer is always aligned;
413 certain optimizations in combine depend on this.
415 GCC for the PA always rounds its stacks to a 512bit boundary,
416 but that happens late in the compilation process. */
417 #define STACK_BOUNDARY (TARGET_64BIT ? 128 : 64)
419 #define PREFERRED_STACK_BOUNDARY 512
421 /* Allocation boundary (in *bits*) for the code of a function. */
422 #define FUNCTION_BOUNDARY (TARGET_64BIT ? 64 : 32)
424 /* Alignment of field after `int : 0' in a structure. */
425 #define EMPTY_FIELD_BOUNDARY 32
427 /* Every structure's size must be a multiple of this. */
428 #define STRUCTURE_SIZE_BOUNDARY 8
430 /* A bitfield declared as `int' forces `int' alignment for the struct. */
431 #define PCC_BITFIELD_TYPE_MATTERS 1
433 /* No data type wants to be aligned rounder than this. This is set
434 to 128 bits to allow for lock semaphores in the stack frame.*/
435 #define BIGGEST_ALIGNMENT 128
437 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
438 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
439 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
441 /* Make arrays of chars word-aligned for the same reasons. */
442 #define DATA_ALIGNMENT(TYPE, ALIGN) \
443 (TREE_CODE (TYPE) == ARRAY_TYPE \
444 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
445 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
448 /* Set this nonzero if move instructions will actually fail to work
449 when given unaligned data. */
450 #define STRICT_ALIGNMENT 1
452 /* Generate calls to memcpy, memcmp and memset. */
453 #define TARGET_MEM_FUNCTIONS
455 /* Value is 1 if it is a good idea to tie two pseudo registers
456 when one has mode MODE1 and one has mode MODE2.
457 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
458 for any hard reg, then this must be 0 for correct output. */
459 #define MODES_TIEABLE_P(MODE1, MODE2) \
460 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
462 /* Specify the registers used for certain standard purposes.
463 The values of these macros are register numbers. */
465 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
466 /* #define PC_REGNUM */
468 /* Register to use for pushing function arguments. */
469 #define STACK_POINTER_REGNUM 30
471 /* Base register for access to local variables of the function. */
472 #define FRAME_POINTER_REGNUM 3
474 /* Value should be nonzero if functions must have frame pointers. */
475 #define FRAME_POINTER_REQUIRED \
476 (current_function_calls_alloca)
478 /* C statement to store the difference between the frame pointer
479 and the stack pointer values immediately after the function prologue.
481 Note, we always pretend that this is a leaf function because if
482 it's not, there's no point in trying to eliminate the
483 frame pointer. If it is a leaf function, we guessed right! */
484 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
485 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
487 /* Base register for access to arguments of the function. */
488 #define ARG_POINTER_REGNUM 3
490 /* Register in which static-chain is passed to a function. */
491 #define STATIC_CHAIN_REGNUM 29
493 /* Register which holds offset table for position-independent
496 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
497 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
499 /* Function to return the rtx used to save the pic offset table register
500 across function calls. */
501 extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void));
503 #define DEFAULT_PCC_STRUCT_RETURN 0
505 /* SOM ABI says that objects larger than 64 bits are returned in memory.
506 PA64 ABI says that objects larger than 128 bits are returned in memory.
507 Note, int_size_in_bytes can return -1 if the size of the object is
508 variable or larger than the maximum value that can be expressed as
510 #define RETURN_IN_MEMORY(TYPE) \
511 ((unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8))
513 /* Register in which address to store a structure value
514 is passed to a function. */
515 #define STRUCT_VALUE_REGNUM 28
517 /* Describe how we implement __builtin_eh_return. */
518 #define EH_RETURN_DATA_REGNO(N) \
519 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
520 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
521 #define EH_RETURN_HANDLER_RTX \
522 gen_rtx_MEM (word_mode, \
523 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
524 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
527 /* Offset from the argument pointer register value to the top of
528 stack. This is different from FIRST_PARM_OFFSET because of the
530 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
532 /* The letters I, J, K, L and M in a register constraint string
533 can be used to stand for particular ranges of immediate operands.
534 This macro defines what the ranges are.
535 C is the letter, and VALUE is a constant value.
536 Return 1 if VALUE is in the range specified by C.
538 `I' is used for the 11 bit constants.
539 `J' is used for the 14 bit constants.
540 `K' is used for values that can be moved with a zdepi insn.
541 `L' is used for the 5 bit constants.
543 `N' is used for values with the least significant 11 bits equal to zero
544 and when sign extended from 32 to 64 bits the
545 value does not change.
546 `O' is used for numbers n such that n+1 is a power of 2.
549 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
550 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
551 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
552 : (C) == 'K' ? zdepi_cint_p (VALUE) \
553 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
554 : (C) == 'M' ? (VALUE) == 0 \
555 : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
556 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
557 == (HOST_WIDE_INT) -1 << 31)) \
558 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
559 : (C) == 'P' ? and_mask_p (VALUE) \
562 /* Similar, but for floating or large integer constants, and defining letters
563 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
565 For PA, `G' is the floating-point constant zero. `H' is undefined. */
567 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
568 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
569 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
572 /* The class value for index registers, and the one for base regs. */
573 #define INDEX_REG_CLASS GENERAL_REGS
574 #define BASE_REG_CLASS GENERAL_REGS
576 #define FP_REG_CLASS_P(CLASS) \
577 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
579 /* True if register is floating-point. */
580 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
582 /* Given an rtx X being reloaded into a reg required to be
583 in class CLASS, return the class of reg to actually use.
584 In general this is just CLASS; but on some machines
585 in some cases it is preferable to use a more restrictive class. */
586 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
588 /* Return the register class of a scratch register needed to copy IN into
589 or out of a register in CLASS in MODE. If it can be done directly
592 Avoid doing any work for the common case calls. */
594 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
595 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
596 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
597 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
599 /* On the PA it is not possible to directly move data between
600 GENERAL_REGS and FP_REGS. */
601 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
602 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
604 /* Return the stack location to use for secondary memory needed reloads. */
605 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
606 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
609 /* Stack layout; function entry, exit and calling. */
611 /* Define this if pushing a word on the stack
612 makes the stack pointer a smaller address. */
613 /* #define STACK_GROWS_DOWNWARD */
615 /* Believe it or not. */
616 #define ARGS_GROW_DOWNWARD
618 /* Define this if the nominal address of the stack frame
619 is at the high-address end of the local variables;
620 that is, each additional local variable allocated
621 goes at a more negative offset in the frame. */
622 /* #define FRAME_GROWS_DOWNWARD */
624 /* Offset within stack frame to start allocating local variables at.
625 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
626 first local allocated. Otherwise, it is the offset to the BEGINNING
627 of the first local allocated. */
628 #define STARTING_FRAME_OFFSET 8
630 /* If we generate an insn to push BYTES bytes,
631 this says how many the stack pointer really advances by.
632 On the HP-PA, don't define this because there are no push insns. */
633 /* #define PUSH_ROUNDING(BYTES) */
635 /* Offset of first parameter from the argument pointer register value.
636 This value will be negated because the arguments grow down.
637 Also note that on STACK_GROWS_UPWARD machines (such as this one)
638 this is the distance from the frame pointer to the end of the first
639 argument, not it's beginning. To get the real offset of the first
640 argument, the size of the argument must be added. */
642 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
644 /* When a parameter is passed in a register, stack space is still
646 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
648 /* Define this if the above stack space is to be considered part of the
649 space allocated by the caller. */
650 #define OUTGOING_REG_PARM_STACK_SPACE
652 /* Keep the stack pointer constant throughout the function.
653 This is both an optimization and a necessity: longjmp
654 doesn't behave itself when the stack pointer moves within
656 #define ACCUMULATE_OUTGOING_ARGS 1
658 /* The weird HPPA calling conventions require a minimum of 48 bytes on
659 the stack: 16 bytes for register saves, and 32 bytes for magic.
660 This is the difference between the logical top of stack and the
662 #define STACK_POINTER_OFFSET \
663 (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
665 #define STACK_DYNAMIC_OFFSET(FNDECL) \
667 ? (STACK_POINTER_OFFSET) \
668 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
670 /* Value is 1 if returning from a function call automatically
671 pops the arguments described by the number-of-args field in the call.
672 FUNDECL is the declaration node of the function (as a tree),
673 FUNTYPE is the data type of the function (as a tree),
674 or for a library call it is an identifier node for the subroutine name. */
676 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
678 /* Define how to find the value returned by a function.
679 VALTYPE is the data type of the value (as a tree).
680 If the precise function being called is known, FUNC is its FUNCTION_DECL;
681 otherwise, FUNC is 0. */
683 /* On the HP-PA the value is found in register(s) 28(-29), unless
684 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
686 /* This must perform the same promotions as PROMOTE_MODE, else
687 PROMOTE_FUNCTION_RETURN will not work correctly. */
688 #define FUNCTION_VALUE(VALTYPE, FUNC) \
689 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
690 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
691 || POINTER_TYPE_P (VALTYPE)) \
692 ? word_mode : TYPE_MODE (VALTYPE), \
693 TREE_CODE (VALTYPE) == REAL_TYPE && !TARGET_SOFT_FLOAT ? 32 : 28)
695 /* Define how to find the value returned by a library function
696 assuming the value has mode MODE. */
698 #define LIBCALL_VALUE(MODE) \
700 (! TARGET_SOFT_FLOAT \
701 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
703 /* 1 if N is a possible register number for a function value
704 as seen by the caller. */
706 #define FUNCTION_VALUE_REGNO_P(N) \
707 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
710 /* Define a data type for recording info about an argument list
711 during the scan of that argument list. This data type should
712 hold all necessary information about the function itself
713 and about the args processed so far, enough to enable macros
714 such as FUNCTION_ARG to determine where the next arg should go.
716 On the HP-PA, this is a single integer, which is a number of words
717 of arguments scanned so far (including the invisible argument,
718 if any, which holds the structure-value-address).
719 Thus 4 or more means all following args should go on the stack. */
721 struct hppa_args {int words, nargs_prototype, indirect; };
723 #define CUMULATIVE_ARGS struct hppa_args
725 /* Initialize a variable CUM of type CUMULATIVE_ARGS
726 for a call to a function whose data type is FNTYPE.
727 For a library call, FNTYPE is 0. */
729 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
731 (CUM).indirect = INDIRECT, \
732 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
733 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
734 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
735 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
740 /* Similar, but when scanning the definition of a procedure. We always
741 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
743 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
745 (CUM).indirect = 0, \
746 (CUM).nargs_prototype = 1000
748 /* Figure out the size in words of the function argument. */
750 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
751 ((((MODE) != BLKmode \
752 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
753 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
755 /* Update the data in CUM to advance over an argument
756 of mode MODE and data type TYPE.
757 (TYPE is null for libcalls where that information may not be available.) */
759 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
760 { (CUM).nargs_prototype--; \
761 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
762 + (((CUM).words & 01) && (TYPE) != 0 \
763 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
766 /* Determine where to put an argument to a function.
767 Value is zero to push the argument on the stack,
768 or a hard register in which to store the argument.
770 MODE is the argument's machine mode.
771 TYPE is the data type of the argument (as a tree).
772 This is null for libcalls where that information may
774 CUM is a variable of type CUMULATIVE_ARGS which gives info about
775 the preceding args and about the function being called.
776 NAMED is nonzero if this argument is a named parameter
777 (otherwise it is an extra parameter matching an ellipsis).
779 On the HP-PA the first four words of args are normally in registers
780 and the rest are pushed. But any arg that won't entirely fit in regs
783 Arguments passed in registers are either 1 or 2 words long.
785 The caller must make a distinction between calls to explicitly named
786 functions and calls through pointers to functions -- the conventions
787 are different! Calls through pointers to functions only use general
788 registers for the first four argument words.
790 Of course all this is different for the portable runtime model
791 HP wants everyone to use for ELF. Ugh. Here's a quick description
792 of how it's supposed to work.
794 1) callee side remains unchanged. It expects integer args to be
795 in the integer registers, float args in the float registers and
796 unnamed args in integer registers.
798 2) caller side now depends on if the function being called has
799 a prototype in scope (rather than if it's being called indirectly).
801 2a) If there is a prototype in scope, then arguments are passed
802 according to their type (ints in integer registers, floats in float
803 registers, unnamed args in integer registers.
805 2b) If there is no prototype in scope, then floating point arguments
806 are passed in both integer and float registers. egad.
808 FYI: The portable parameter passing conventions are almost exactly like
809 the standard parameter passing conventions on the RS6000. That's why
810 you'll see lots of similar code in rs6000.h. */
812 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
814 /* Do not expect to understand this without reading it several times. I'm
815 tempted to try and simply it, but I worry about breaking something. */
817 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
818 function_arg (&CUM, MODE, TYPE, NAMED, 0)
820 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
821 function_arg (&CUM, MODE, TYPE, NAMED, 1)
823 /* For an arg passed partly in registers and partly in memory,
824 this is the number of registers used.
825 For args passed entirely in registers or entirely in memory, zero. */
827 /* For PA32 there are never split arguments. PA64, on the other hand, can
828 pass arguments partially in registers and partially in memory. */
829 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
830 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
832 /* If defined, a C expression that gives the alignment boundary, in
833 bits, of an argument with the specified mode and type. If it is
834 not defined, `PARM_BOUNDARY' is used for all arguments. */
836 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
838 ? ((integer_zerop (TYPE_SIZE (TYPE)) \
839 || ! TREE_CONSTANT (TYPE_SIZE (TYPE))) \
841 : (((int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) \
842 / UNITS_PER_WORD) * BITS_PER_WORD) \
843 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
844 ? PARM_BOUNDARY : GET_MODE_ALIGNMENT(MODE)))
846 /* Arguments larger than eight bytes are passed by invisible reference */
848 /* PA64 does not pass anything by invisible reference. */
849 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
852 : (((TYPE) && int_size_in_bytes (TYPE) > 8) \
853 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
855 /* PA64 does not pass anything by invisible reference.
856 This should be undef'ed for 64bit, but we'll see if this works. The
857 problem is that we can't test TARGET_64BIT from the preprocessor. */
858 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
861 : (((TYPE) && int_size_in_bytes (TYPE) > 8) \
862 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
865 extern GTY(()) rtx hppa_compare_op0;
866 extern GTY(()) rtx hppa_compare_op1;
867 extern enum cmp_type hppa_branch_type;
869 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
870 pa_asm_output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION)
872 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
873 as assembly via FUNCTION_PROFILER. Just output a local label.
874 We can't use the function label because the GAS SOM target can't
875 handle the difference of a global symbol and a local symbol. */
877 #ifndef FUNC_BEGIN_PROLOG_LABEL
878 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
881 #define FUNCTION_PROFILER(FILE, LABEL) \
882 ASM_OUTPUT_INTERNAL_LABEL (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
884 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
885 void hppa_profile_hook PARAMS ((int label_no));
887 /* The profile counter if emitted must come before the prologue. */
888 #define PROFILE_BEFORE_PROLOGUE 1
890 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
891 the stack pointer does not matter. The value is tested only in
892 functions that have frame pointers.
893 No definition is equivalent to always zero. */
895 extern int may_call_alloca;
897 #define EXIT_IGNORE_STACK \
898 (get_frame_size () != 0 \
899 || current_function_calls_alloca || current_function_outgoing_args_size)
901 /* Output assembler code for a block containing the constant parts
902 of a trampoline, leaving space for the variable parts.\
904 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
905 and then branches to the specified routine.
907 This code template is copied from text segment to stack location
908 and then patched with INITIALIZE_TRAMPOLINE to contain
909 valid values, and then entered as a subroutine.
911 It is best to keep this as small as possible to avoid having to
912 flush multiple lines in the cache. */
914 #define TRAMPOLINE_TEMPLATE(FILE) \
916 if (! TARGET_64BIT) \
918 fputs ("\tldw 36(%r22),%r21\n", FILE); \
919 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
920 if (ASSEMBLER_DIALECT == 0) \
921 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
923 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
924 fputs ("\tldw 4(%r21),%r19\n", FILE); \
925 fputs ("\tldw 0(%r21),%r21\n", FILE); \
926 fputs ("\tldsid (%r21),%r1\n", FILE); \
927 fputs ("\tmtsp %r1,%sr0\n", FILE); \
928 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
929 fputs ("\tldw 40(%r22),%r29\n", FILE); \
930 fputs ("\t.word 0\n", FILE); \
931 fputs ("\t.word 0\n", FILE); \
932 fputs ("\t.word 0\n", FILE); \
933 fputs ("\t.word 0\n", FILE); \
937 fputs ("\t.dword 0\n", FILE); \
938 fputs ("\t.dword 0\n", FILE); \
939 fputs ("\t.dword 0\n", FILE); \
940 fputs ("\t.dword 0\n", FILE); \
941 fputs ("\tmfia %r31\n", FILE); \
942 fputs ("\tldd 24(%r31),%r1\n", FILE); \
943 fputs ("\tldd 24(%r1),%r27\n", FILE); \
944 fputs ("\tldd 16(%r1),%r1\n", FILE); \
945 fputs ("\tbve (%r1)\n", FILE); \
946 fputs ("\tldd 32(%r31),%r31\n", FILE); \
947 fputs ("\t.dword 0 ; fptr\n", FILE); \
948 fputs ("\t.dword 0 ; static link\n", FILE); \
952 /* Length in units of the trampoline for entering a nested function.
954 Flush the cache entries corresponding to the first and last addresses
955 of the trampoline. This is necessary as the trampoline may cross two
958 If the code part of the trampoline ever grows to > 32 bytes, then it
959 will become necessary to hack on the cacheflush pattern in pa.md. */
961 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
963 /* Emit RTL insns to initialize the variable parts of a trampoline.
964 FNADDR is an RTX for the address of the function's pure code.
965 CXT is an RTX for the static chain value for the function.
967 Move the function address to the trampoline template at offset 36.
968 Move the static chain value to trampoline template at offset 40.
969 Move the trampoline address to trampoline template at offset 44.
970 Move r19 to trampoline template at offset 48. The latter two
971 words create a plabel for the indirect call to the trampoline. */
973 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
975 if (! TARGET_64BIT) \
977 rtx start_addr, end_addr; \
979 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
980 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
981 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
982 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
983 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
984 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
985 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
986 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
987 gen_rtx_REG (Pmode, 19)); \
988 /* fdc and fic only use registers for the address to flush, \
989 they do not accept integer displacements. */ \
990 start_addr = force_reg (Pmode, (TRAMP)); \
991 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
992 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
993 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
994 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
995 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
999 rtx start_addr, end_addr; \
1001 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
1002 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1003 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
1004 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1005 /* Create a fat pointer for the trampoline. */ \
1006 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1007 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1008 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1009 end_addr = gen_rtx_REG (Pmode, 27); \
1010 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1011 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1012 /* fdc and fic only use registers for the address to flush, \
1013 they do not accept integer displacements. */ \
1014 start_addr = force_reg (Pmode, (TRAMP)); \
1015 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1016 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1017 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1018 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1019 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1023 /* Perform any machine-specific adjustment in the address of the trampoline.
1024 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1025 Adjust the trampoline address to point to the plabel at offset 44. */
1027 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1028 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1030 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1031 reference the 4 integer arg registers and 4 fp arg registers.
1032 Ordinarily they are not call used registers, but they are for
1033 _builtin_saveregs, so we must make this explicit. */
1035 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1037 /* Implement `va_start' for varargs and stdarg. */
1039 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1040 hppa_va_start (valist, nextarg)
1042 /* Implement `va_arg'. */
1044 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1045 hppa_va_arg (valist, type)
1047 /* Addressing modes, and classification of registers for them.
1049 Using autoincrement addressing modes on PA8000 class machines is
1052 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1053 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1055 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1056 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1058 /* Macros to check register numbers against specific register classes. */
1060 /* These assume that REGNO is a hard or pseudo reg number.
1061 They give nonzero only if REGNO is a hard reg of the suitable class
1062 or a pseudo reg currently allocated to a suitable hard reg.
1063 Since they use reg_renumber, they are safe only once reg_renumber
1064 has been allocated, which happens in local-alloc.c. */
1066 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1067 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1068 #define REGNO_OK_FOR_BASE_P(REGNO) \
1069 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1070 #define REGNO_OK_FOR_FP_P(REGNO) \
1071 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1073 /* Now macros that check whether X is a register and also,
1074 strictly, whether it is in a specified class.
1076 These macros are specific to the HP-PA, and may be used only
1077 in code for printing assembler insns and in conditions for
1078 define_optimization. */
1080 /* 1 if X is an fp register. */
1082 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1084 /* Maximum number of registers that can appear in a valid memory address. */
1086 #define MAX_REGS_PER_ADDRESS 2
1088 /* Recognize any constant value that is a valid address except
1089 for symbolic addresses. We get better CSE by rejecting them
1090 here and allowing hppa_legitimize_address to break them up. We
1091 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1093 #define CONSTANT_ADDRESS_P(X) \
1094 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1095 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1096 || GET_CODE (X) == HIGH) \
1097 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1099 /* Include all constant integers and constant doubles, but not
1100 floating-point, except for floating-point zero.
1102 Reject LABEL_REFs if we're not using gas or the new HP assembler.
1104 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need
1106 #ifndef NEW_HP_ASSEMBLER
1107 #define NEW_HP_ASSEMBLER 0
1109 #define LEGITIMATE_CONSTANT_P(X) \
1110 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1111 || (X) == CONST0_RTX (GET_MODE (X))) \
1112 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
1113 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
1114 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
1115 && !(HOST_BITS_PER_WIDE_INT <= 32 \
1116 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
1117 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
1118 || cint_ok_for_move (INTVAL (X)))) \
1119 && !function_label_operand (X, VOIDmode))
1121 /* Subroutine for EXTRA_CONSTRAINT.
1123 Return 1 iff OP is a pseudo which did not get a hard register and
1124 we are running the reload pass. */
1126 #define IS_RELOADING_PSEUDO_P(OP) \
1127 ((reload_in_progress \
1128 && GET_CODE (OP) == REG \
1129 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1130 && reg_renumber [REGNO (OP)] < 0))
1132 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1134 For the HPPA, `Q' means that this is a memory operand but not a
1135 symbolic memory operand. Note that an unassigned pseudo register
1136 is such a memory operand. Needed because reload will generate
1137 these things in insns and then not re-recognize the insns, causing
1138 constrain_operands to fail.
1140 `R' is used for scaled indexed addresses.
1142 `S' is the constant 31.
1144 `T' is for fp loads and stores. */
1145 #define EXTRA_CONSTRAINT(OP, C) \
1147 (IS_RELOADING_PSEUDO_P (OP) \
1148 || (GET_CODE (OP) == MEM \
1149 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1150 || reload_in_progress) \
1151 && ! symbolic_memory_operand (OP, VOIDmode) \
1152 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1153 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1154 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1156 (GET_CODE (OP) == MEM \
1157 && GET_CODE (XEXP (OP, 0)) == PLUS \
1158 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1159 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1160 && (move_operand (OP, GET_MODE (OP)) \
1161 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1162 || reload_in_progress)) \
1164 (GET_CODE (OP) == MEM \
1165 /* Using DFmode forces only short displacements \
1166 to be recognized as valid in reg+d addresses. \
1167 However, this is not necessary for PA2.0 since\
1168 it has long FP loads/stores. */ \
1169 && memory_address_p ((TARGET_PA_20 \
1173 && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \
1174 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1175 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\
1176 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC\
1177 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1178 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1179 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1180 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
1182 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
1184 (GET_CODE (OP) == MEM \
1185 && GET_CODE (XEXP (OP, 0)) == LO_SUM \
1186 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1187 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
1188 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
1189 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1191 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
1194 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1195 and check its validity for a certain class.
1196 We have two alternate definitions for each of them.
1197 The usual definition accepts all pseudo regs; the other rejects
1198 them unless they have been allocated suitable hard regs.
1199 The symbol REG_OK_STRICT causes the latter definition to be used.
1201 Most source files want to accept pseudo regs in the hope that
1202 they will get allocated to the class that the insn wants them to be in.
1203 Source files for reload pass need to be strict.
1204 After reload, it makes no difference, since pseudo regs have
1205 been eliminated by then. */
1207 #ifndef REG_OK_STRICT
1209 /* Nonzero if X is a hard reg that can be used as an index
1210 or if it is a pseudo reg. */
1211 #define REG_OK_FOR_INDEX_P(X) \
1212 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1213 /* Nonzero if X is a hard reg that can be used as a base reg
1214 or if it is a pseudo reg. */
1215 #define REG_OK_FOR_BASE_P(X) \
1216 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1220 /* Nonzero if X is a hard reg that can be used as an index. */
1221 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1222 /* Nonzero if X is a hard reg that can be used as a base reg. */
1223 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1227 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1228 that is a valid memory address for an instruction.
1229 The MODE argument is the machine mode for the MEM expression
1230 that wants to use this address.
1232 On the HP-PA, the actual legitimate addresses must be
1233 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1234 But we can treat a SYMBOL_REF as legitimate if it is part of this
1235 function's constant-pool, because such addresses can actually
1236 be output as REG+SMALLINT.
1238 Note we only allow 5 bit immediates for access to a constant address;
1239 doing so avoids losing for loading/storing a FP register at an address
1240 which will not fit in 5 bits. */
1242 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1243 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1245 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1246 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1248 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1249 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1251 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1252 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1254 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1256 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1257 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1258 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1259 && REG_P (XEXP (X, 0)) \
1260 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1262 else if (GET_CODE (X) == PLUS) \
1264 rtx base = 0, index = 0; \
1265 if (REG_P (XEXP (X, 0)) \
1266 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1267 base = XEXP (X, 0), index = XEXP (X, 1); \
1268 else if (REG_P (XEXP (X, 1)) \
1269 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1270 base = XEXP (X, 1), index = XEXP (X, 0); \
1272 if (GET_CODE (index) == CONST_INT \
1273 && ((INT_14_BITS (index) \
1274 && (TARGET_SOFT_FLOAT \
1276 && ((MODE == SFmode \
1277 && (INTVAL (index) % 4) == 0)\
1278 || (MODE == DFmode \
1279 && (INTVAL (index) % 8) == 0)))\
1280 || ((MODE) != SFmode && (MODE) != DFmode))) \
1281 || INT_5_BITS (index))) \
1283 if (! TARGET_SOFT_FLOAT \
1284 && ! TARGET_DISABLE_INDEXING \
1286 && ((MODE) == SFmode || (MODE) == DFmode) \
1287 && GET_CODE (index) == MULT \
1288 && GET_CODE (XEXP (index, 0)) == REG \
1289 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1290 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1291 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
1294 else if (GET_CODE (X) == LO_SUM \
1295 && GET_CODE (XEXP (X, 0)) == REG \
1296 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1297 && CONSTANT_P (XEXP (X, 1)) \
1298 && (TARGET_SOFT_FLOAT \
1299 /* We can allow symbolic LO_SUM addresses\
1302 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1303 || ((MODE) != SFmode \
1304 && (MODE) != DFmode))) \
1306 else if (GET_CODE (X) == LO_SUM \
1307 && GET_CODE (XEXP (X, 0)) == SUBREG \
1308 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1309 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1310 && CONSTANT_P (XEXP (X, 1)) \
1311 && (TARGET_SOFT_FLOAT \
1312 /* We can allow symbolic LO_SUM addresses\
1315 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1316 || ((MODE) != SFmode \
1317 && (MODE) != DFmode))) \
1319 else if (GET_CODE (X) == LABEL_REF \
1320 || (GET_CODE (X) == CONST_INT \
1321 && INT_5_BITS (X))) \
1323 /* Needed for -fPIC */ \
1324 else if (GET_CODE (X) == LO_SUM \
1325 && GET_CODE (XEXP (X, 0)) == REG \
1326 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1327 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1328 && (TARGET_SOFT_FLOAT \
1330 || ((MODE) != SFmode \
1331 && (MODE) != DFmode))) \
1335 /* Look for machine dependent ways to make the invalid address AD a
1338 For the PA, transform:
1340 memory(X + <large int>)
1344 if (<large int> & mask) >= 16
1345 Y = (<large int> & ~mask) + mask + 1 Round up.
1347 Y = (<large int> & ~mask) Round down.
1349 memory (Z + (<large int> - Y));
1351 This makes reload inheritance and reload_cse work better since Z
1354 There may be more opportunities to improve code with this hook. */
1355 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1357 int offset, newoffset, mask; \
1358 rtx new, temp = NULL_RTX; \
1360 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1361 ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \
1364 && GET_CODE (AD) == PLUS) \
1365 temp = simplify_binary_operation (PLUS, Pmode, \
1366 XEXP (AD, 0), XEXP (AD, 1)); \
1368 new = temp ? temp : AD; \
1371 && GET_CODE (new) == PLUS \
1372 && GET_CODE (XEXP (new, 0)) == REG \
1373 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1375 offset = INTVAL (XEXP ((new), 1)); \
1377 /* Choose rounding direction. Round up if we are >= halfway. */ \
1378 if ((offset & mask) >= ((mask + 1) / 2)) \
1379 newoffset = (offset & ~mask) + mask + 1; \
1381 newoffset = offset & ~mask; \
1383 if (newoffset != 0 \
1384 && VAL_14_BITS_P (newoffset)) \
1387 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1388 GEN_INT (newoffset)); \
1389 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1390 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1391 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1401 /* Try machine-dependent ways of modifying an illegitimate address
1402 to be legitimate. If we find one, return the new, valid address.
1403 This macro is used in only one place: `memory_address' in explow.c.
1405 OLDX is the address as it was before break_out_memory_refs was called.
1406 In some cases it is useful to look at this to decide what needs to be done.
1408 MODE and WIN are passed so that this macro can use
1409 GO_IF_LEGITIMATE_ADDRESS.
1411 It is always safe for this macro to do nothing. It exists to recognize
1412 opportunities to optimize the output. */
1414 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1415 { rtx orig_x = (X); \
1416 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1417 if ((X) != orig_x && memory_address_p (MODE, X)) \
1420 /* Go to LABEL if ADDR (a legitimate address expression)
1421 has an effect that depends on the machine mode it is used for. */
1423 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1424 if (GET_CODE (ADDR) == PRE_DEC \
1425 || GET_CODE (ADDR) == POST_DEC \
1426 || GET_CODE (ADDR) == PRE_INC \
1427 || GET_CODE (ADDR) == POST_INC) \
1430 #define TARGET_ASM_SELECT_SECTION pa_select_section
1432 /* Define this macro if references to a symbol must be treated
1433 differently depending on something about the variable or
1434 function named by the symbol (such as what section it is in).
1436 The macro definition, if any, is executed immediately after the
1437 rtl for DECL or other node is created.
1438 The value of the rtl will be a `mem' whose address is a
1441 The usual thing for this macro to do is to a flag in the
1442 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1443 name string in the `symbol_ref' (if one bit is not enough
1446 On the HP-PA we use this to indicate if a symbol is in text or
1447 data space. Also, function labels need special treatment. */
1449 #define TEXT_SPACE_P(DECL)\
1450 (TREE_CODE (DECL) == FUNCTION_DECL \
1451 || (TREE_CODE (DECL) == VAR_DECL \
1452 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1453 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1455 || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \
1456 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1458 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1460 /* Specify the machine mode that this machine uses
1461 for the index in the tablejump instruction. */
1462 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1464 /* Jump tables must be 32 bit aligned, no matter the size of the element. */
1465 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1467 /* Define this as 1 if `char' should by default be signed; else as 0. */
1468 #define DEFAULT_SIGNED_CHAR 1
1470 /* Max number of bytes we can move from memory to memory
1471 in one reasonably fast instruction. */
1474 /* Higher than the default as we prefer to use simple move insns
1475 (better scheduling and delay slot filling) and because our
1476 built-in block move is really a 2X unrolled loop.
1478 Believe it or not, this has to be big enough to allow for copying all
1479 arguments passed in registers to avoid infinite recursion during argument
1480 setup for a function call. Why? Consider how we copy the stack slots
1481 reserved for parameters when they may be trashed by a call. */
1482 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1484 /* Define if operations between registers always perform the operation
1485 on the full register even if a narrower mode is specified. */
1486 #define WORD_REGISTER_OPERATIONS
1488 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1489 will either zero-extend or sign-extend. The value of this macro should
1490 be the code that says which one of the two operations is implicitly
1491 done, NIL if none. */
1492 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1494 /* Nonzero if access to memory by bytes is slow and undesirable. */
1495 #define SLOW_BYTE_ACCESS 1
1497 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1498 is done just by pretending it is already truncated. */
1499 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1501 /* We assume that the store-condition-codes instructions store 0 for false
1502 and some other value for true. This is the value stored for true. */
1504 #define STORE_FLAG_VALUE 1
1506 /* When a prototype says `char' or `short', really pass an `int'. */
1507 #define PROMOTE_PROTOTYPES 1
1508 #define PROMOTE_FUNCTION_RETURN 1
1510 /* Specify the machine mode that pointers have.
1511 After generation of rtl, the compiler makes no further distinction
1512 between pointers and any other objects of this machine mode. */
1513 #define Pmode word_mode
1515 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1516 return the mode to be used for the comparison. For floating-point, CCFPmode
1517 should be used. CC_NOOVmode should be used when the first operand is a
1518 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1520 #define SELECT_CC_MODE(OP,X,Y) \
1521 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1523 /* A function address in a call instruction
1524 is a byte address (for indexing purposes)
1525 so give the MEM rtx a byte's mode. */
1526 #define FUNCTION_MODE SImode
1528 /* Define this if addresses of constant functions
1529 shouldn't be put through pseudo regs where they can be cse'd.
1530 Desirable on machines where ordinary constants are expensive
1531 but a CALL with constant address is cheap. */
1532 #define NO_FUNCTION_CSE
1534 /* Define this to be nonzero if shift instructions ignore all but the low-order
1536 #define SHIFT_COUNT_TRUNCATED 1
1538 /* Compute the cost of computing a constant rtl expression RTX
1539 whose rtx-code is CODE. The body of this macro is a portion
1540 of a switch statement. If the code is computed here,
1541 return it with a return statement. Otherwise, break from the switch. */
1543 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1545 if (INTVAL (RTX) == 0) return 0; \
1546 if (INT_14_BITS (RTX)) return 1; \
1553 case CONST_DOUBLE: \
1554 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
1555 && OUTER_CODE != SET) \
1560 #define ADDRESS_COST(RTX) \
1561 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1563 /* Compute extra cost of moving data between one register class
1566 Make moves from SAR so expensive they should never happen. We used to
1567 have 0xffff here, but that generates overflow in rare cases.
1569 Copies involving a FP register and a non-FP register are relatively
1570 expensive because they must go through memory.
1572 Other copies are reasonably cheap. */
1573 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1574 (CLASS1 == SHIFT_REGS ? 0x100 \
1575 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1576 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1580 /* Provide the costs of a rtl expression. This is in the body of a
1581 switch on CODE. The purpose for the cost of MULT is to encourage
1582 `synth_mult' to find a synthetic multiply when reasonable. */
1584 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1586 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1587 return COSTS_N_INSNS (3); \
1588 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1589 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1591 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1592 return COSTS_N_INSNS (14); \
1596 return COSTS_N_INSNS (60); \
1597 case PLUS: /* this includes shNadd insns */ \
1599 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1600 return COSTS_N_INSNS (3); \
1601 return COSTS_N_INSNS (1); \
1605 return COSTS_N_INSNS (1);
1607 /* Adjust the cost of branches. */
1608 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1610 /* Handling the special cases is going to get too complicated for a macro,
1611 just call `pa_adjust_insn_length' to do the real work. */
1612 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1613 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1615 /* Millicode insns are actually function calls with some special
1616 constraints on arguments and register usage.
1618 Millicode calls always expect their arguments in the integer argument
1619 registers, and always return their result in %r29 (ret1). They
1620 are expected to clobber their arguments, %r1, %r29, and the return
1621 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1623 This macro tells reorg that the references to arguments and
1624 millicode calls do not appear to happen until after the millicode call.
1625 This allows reorg to put insns which set the argument registers into the
1626 delay slot of the millicode call -- thus they act more like traditional
1629 Note we can not consider side effects of the insn to be delayed because
1630 the branch and link insn will clobber the return pointer. If we happened
1631 to use the return pointer in the delay slot of the call, then we lose.
1633 get_attr_type will try to recognize the given insn, so make sure to
1634 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1636 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1639 /* Control the assembler format that we output. */
1641 /* Output to assembler file text saying following lines
1642 may contain character constants, extra white space, comments, etc. */
1644 #define ASM_APP_ON ""
1646 /* Output to assembler file text saying following lines
1647 no longer contain unusual constructs. */
1649 #define ASM_APP_OFF ""
1651 /* Output deferred plabels at the end of the file. */
1653 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
1655 /* This is how to output the definition of a user-level label named NAME,
1656 such as the label on a static function or variable NAME. */
1658 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1659 do { assemble_name (FILE, NAME); \
1660 fputc ('\n', FILE); } while (0)
1662 /* This is how to output a reference to a user-level label named NAME.
1663 `assemble_name' uses this. */
1665 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1666 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1668 /* This is how to output an internal numbered label where
1669 PREFIX is the class of label and NUM is the number within the class. */
1671 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1672 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1674 /* This is how to store into the string LABEL
1675 the symbol_ref name of an internal numbered label where
1676 PREFIX is the class of label and NUM is the number within the class.
1677 This is suitable for output with `assemble_name'. */
1679 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1680 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1682 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1684 /* We only handle DATA objects here, functions are globalized in \
1685 ASM_DECLARE_FUNCTION_NAME. */ \
1686 if (! FUNCTION_NAME_P (NAME)) \
1688 fputs ("\t.EXPORT ", FILE); \
1689 assemble_name (FILE, NAME); \
1690 fputs (",DATA\n", FILE); \
1694 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1695 output_ascii ((FILE), (P), (SIZE))
1697 /* This is how to output an element of a case-vector that is absolute.
1698 Note that this method makes filling these branch delay slots
1701 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1702 if (TARGET_BIG_SWITCH) \
1703 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1705 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1707 /* Jump tables are executable code and live in the TEXT section on the PA. */
1708 #define JUMP_TABLES_IN_TEXT_SECTION 1
1710 /* This is how to output an element of a case-vector that is relative.
1711 This must be defined correctly as it is used when generating PIC code.
1713 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1714 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1715 rather than a table of absolute addresses. */
1717 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1718 if (TARGET_BIG_SWITCH) \
1719 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1721 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1723 /* This is how to output an assembler line
1724 that says to advance the location counter
1725 to a multiple of 2**LOG bytes. */
1727 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1728 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1730 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1731 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1733 /* This says how to output an assembler line to define a global common symbol
1734 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1736 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1738 assemble_name ((FILE), (NAME)); \
1739 fputs ("\t.comm ", (FILE)); \
1740 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1742 /* This says how to output an assembler line to define a local common symbol
1743 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1745 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1747 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1748 assemble_name ((FILE), (NAME)); \
1749 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1751 /* Store in OUTPUT a string (made with alloca) containing
1752 an assembler-name for a local static variable named NAME.
1753 LABELNO is an integer which is different for each call. */
1755 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1756 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1757 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1759 /* All HP assemblers use "!" to separate logical lines. */
1760 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1762 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1763 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1765 /* Print operand X (an rtx) in assembler syntax to file FILE.
1766 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1767 For `%' followed by punctuation, CODE is the punctuation and X is null.
1769 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1770 and an immediate zero should be represented as `r0'.
1772 Several % codes are defined:
1774 C compare conditions
1775 N extract conditions
1776 M modifier to handle preincrement addressing for memory refs.
1777 F modifier to handle preincrement addressing for fp memory refs */
1779 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1782 /* Print a memory address as an operand to reference that memory location. */
1784 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1785 { register rtx addr = ADDR; \
1786 register rtx base; \
1788 switch (GET_CODE (addr)) \
1791 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1794 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1795 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1796 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1797 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1800 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
1803 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1804 fputs ("R'", FILE); \
1805 else if (flag_pic == 0) \
1806 fputs ("RR'", FILE); \
1808 fputs ("RT'", FILE); \
1809 output_global_address (FILE, XEXP (addr, 1), 0); \
1810 fputs ("(", FILE); \
1811 output_operand (XEXP (addr, 0), 0); \
1812 fputs (")", FILE); \
1815 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
1816 fprintf (FILE, "(%%r0)"); \
1819 output_addr_const (FILE, addr); \
1823 /* Find the return address associated with the frame given by
1825 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1826 (return_addr_rtx (COUNT, FRAMEADDR))
1828 /* Used to mask out junk bits from the return address, such as
1829 processor state, interrupt status, condition codes and the like. */
1830 #define MASK_RETURN_ADDR \
1831 /* The privilege level is in the two low order bits, mask em out \
1832 of the return address. */ \
1835 /* The number of Pmode words for the setjmp buffer. */
1836 #define JMP_BUF_SIZE 50
1838 /* Only direct calls to static functions are allowed to be sibling (tail)
1841 This restriction is necessary because some linker generated stubs will
1842 store return pointers into rp' in some cases which might clobber a
1843 live value already in rp'.
1845 In a sibcall the current function and the target function share stack
1846 space. Thus if the path to the current function and the path to the
1847 target function save a value in rp', they save the value into the
1848 same stack slot, which has undesirable consequences.
1850 Because of the deferred binding nature of shared libraries any function
1851 with external scope could be in a different load module and thus require
1852 rp' to be saved when calling that function. So sibcall optimizations
1853 can only be safe for static function.
1855 Note that GCC never needs return value relocations, so we don't have to
1856 worry about static calls with return value relocations (which require
1859 It is safe to perform a sibcall optimization when the target function
1860 will never return. */
1861 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1863 && ! TARGET_PORTABLE_RUNTIME \
1865 && ! TREE_PUBLIC (DECL))
1867 #define PREDICATE_CODES \
1868 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1869 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
1870 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
1871 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1872 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1873 {"reg_before_reload_operand", {REG, MEM}}, \
1874 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1875 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \
1877 {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \
1878 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
1879 {"pic_label_operand", {LABEL_REF, CONST}}, \
1880 {"fp_reg_operand", {REG}}, \
1881 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1882 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
1883 {"pre_cint_operand", {CONST_INT}}, \
1884 {"post_cint_operand", {CONST_INT}}, \
1885 {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1886 {"ireg_or_int5_operand", {CONST_INT, REG}}, \
1887 {"int5_operand", {CONST_INT}}, \
1888 {"uint5_operand", {CONST_INT}}, \
1889 {"int11_operand", {CONST_INT}}, \
1890 {"uint32_operand", {CONST_INT, \
1891 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
1892 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1893 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1894 {"ior_operand", {CONST_INT}}, \
1895 {"lhs_lshift_cint_operand", {CONST_INT}}, \
1896 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
1897 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1898 {"pc_or_label_operand", {PC, LABEL_REF}}, \
1899 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
1900 {"shadd_operand", {CONST_INT}}, \
1901 {"basereg_operand", {REG}}, \
1902 {"div_operand", {REG, CONST_INT}}, \
1903 {"ireg_operand", {REG}}, \
1904 {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \
1906 {"movb_comparison_operator", {EQ, NE, LT, GE}},
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