1 /* Definitions of target machine for GNU compiler.
2 Matsushita MN10300 series
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
5 Contributed by Jeff Law (law@cygnus.com).
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
30 #define LINK_SPEC "%{mrelax:--relax}"
32 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}"
34 /* Names to predefine in the preprocessor for this target machine. */
36 #define CPP_PREDEFINES "-D__mn10300__ -D__MN10300__"
38 #define CPP_SPEC "%{mam33:-D__AM33__}"
40 /* Run-time compilation parameters selecting different hardware subsets. */
42 extern int target_flags;
44 /* Macros used in the machine description to test the flags. */
46 /* Macro to define tables used to set the flags.
47 This is a list in braces of pairs in braces,
48 each pair being { "NAME", VALUE }
49 where VALUE is the bits to set or minus the bits to clear.
50 An empty string NAME is used to identify the default VALUE. */
52 /* Generate code to work around mul/mulq bugs on the mn10300. */
53 #define TARGET_MULT_BUG (target_flags & 0x1)
55 /* Generate code for the AM33 processor. */
56 #define TARGET_AM33 (target_flags & 0x2)
58 #define TARGET_SWITCHES \
59 {{ "mult-bug", 0x1, N_("Work around hardware multiply bug")}, \
60 { "no-mult-bug", -0x1, N_("Do not work around hardware multiply bug")},\
61 { "am33", 0x2, N_("Target the AM33 processor")}, \
62 { "am33", -(0x1), ""},\
63 { "no-am33", -0x2, ""}, \
64 { "no-crt0", 0, N_("No default crt0.o") }, \
65 { "relax", 0, N_("Enable linker relaxations") }, \
66 { "", TARGET_DEFAULT, NULL}}
68 #ifndef TARGET_DEFAULT
69 #define TARGET_DEFAULT 0x1
72 /* Print subsidiary information on the compiler version in use. */
74 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
77 /* Target machine storage layout */
79 /* Define this if most significant bit is lowest numbered
80 in instructions that operate on numbered bit-fields.
81 This is not true on the Matsushita MN1003. */
82 #define BITS_BIG_ENDIAN 0
84 /* Define this if most significant byte of a word is the lowest numbered. */
85 /* This is not true on the Matsushita MN10300. */
86 #define BYTES_BIG_ENDIAN 0
88 /* Define this if most significant word of a multiword number is lowest
90 This is not true on the Matsushita MN10300. */
91 #define WORDS_BIG_ENDIAN 0
93 /* Width of a word, in units (bytes). */
94 #define UNITS_PER_WORD 4
96 /* Width in bits of a pointer.
97 See also the macro `Pmode' defined below. */
98 #define POINTER_SIZE 32
100 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
101 #define PARM_BOUNDARY 32
103 /* The stack goes in 32 bit lumps. */
104 #define STACK_BOUNDARY 32
106 /* Allocation boundary (in *bits*) for the code of a function.
107 8 is the minimum boundary; it's unclear if bigger alignments
108 would improve performance. */
109 #define FUNCTION_BOUNDARY 8
111 /* No data type wants to be aligned rounder than this. */
112 #define BIGGEST_ALIGNMENT 32
114 /* Alignment of field after `int : 0' in a structure. */
115 #define EMPTY_FIELD_BOUNDARY 32
117 /* Define this if move instructions will actually fail to work
118 when given unaligned data. */
119 #define STRICT_ALIGNMENT 1
121 /* Define this as 1 if `char' should by default be signed; else as 0. */
122 #define DEFAULT_SIGNED_CHAR 0
124 /* Standard register usage. */
126 /* Number of actual hardware registers.
127 The hardware registers are assigned numbers for the compiler
128 from 0 to just below FIRST_PSEUDO_REGISTER.
130 All registers that the compiler knows about must be given numbers,
131 even those that are not normally considered general registers. */
133 #define FIRST_PSEUDO_REGISTER 18
135 /* Specify machine-specific register numbers. */
136 #define FIRST_DATA_REGNUM 0
137 #define LAST_DATA_REGNUM 3
138 #define FIRST_ADDRESS_REGNUM 4
139 #define LAST_ADDRESS_REGNUM 8
140 #define FIRST_EXTENDED_REGNUM 10
141 #define LAST_EXTENDED_REGNUM 17
143 /* Specify the registers used for certain standard purposes.
144 The values of these macros are register numbers. */
146 /* Register to use for pushing function arguments. */
147 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM+1)
149 /* Base register for access to local variables of the function. */
150 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM-1)
152 /* Base register for access to arguments of the function. This
153 is a fake register and will be eliminated into either the frame
154 pointer or stack pointer. */
155 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM
157 /* Register in which static-chain is passed to a function. */
158 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM+1)
160 /* 1 for registers that have pervasive standard uses
161 and are not available for the register allocator. */
163 #define FIXED_REGISTERS \
164 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
166 /* 1 for registers not available across function calls.
167 These must include the FIXED_REGISTERS and also any
168 registers that can be used without being saved.
169 The latter must include the registers where values are returned
170 and the register where structure-value addresses are passed.
171 Aside from that, you can include as many other registers as you
174 #define CALL_USED_REGISTERS \
175 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0}
177 #define REG_ALLOC_ORDER \
178 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9}
180 #define CONDITIONAL_REGISTER_USAGE \
186 for (i = FIRST_EXTENDED_REGNUM; \
187 i <= LAST_EXTENDED_REGNUM; i++) \
188 fixed_regs[i] = call_used_regs[i] = 1; \
192 /* Return number of consecutive hard regs needed starting at reg REGNO
193 to hold something of mode MODE.
195 This is ordinarily the length in words of a value of mode MODE
196 but can be less for certain modes in special long registers. */
198 #define HARD_REGNO_NREGS(REGNO, MODE) \
199 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
201 /* Value is 1 if hard register REGNO can hold a value of machine-mode
204 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
205 ((REGNO_REG_CLASS (REGNO) == DATA_REGS \
206 || (TARGET_AM33 && REGNO_REG_CLASS (REGNO) == ADDRESS_REGS) \
207 || REGNO_REG_CLASS (REGNO) == EXTENDED_REGS) \
208 ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
209 : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
211 /* Value is 1 if it is a good idea to tie two pseudo registers
212 when one has mode MODE1 and one has mode MODE2.
213 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
214 for any hard reg, then this must be 0 for correct output. */
215 #define MODES_TIEABLE_P(MODE1, MODE2) \
218 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
220 /* 4 data, and effectively 3 address registers is small as far as I'm
222 #define SMALL_REGISTER_CLASSES 1
224 /* Define the classes of registers for register constraints in the
225 machine description. Also define ranges of constants.
227 One of the classes must always be named ALL_REGS and include all hard regs.
228 If there is more than one class, another class must be named NO_REGS
229 and contain no registers.
231 The name GENERAL_REGS must be the name of a class (or an alias for
232 another name such as ALL_REGS). This is the class of registers
233 that is allowed by "g" or "r" in a register constraint.
234 Also, registers outside this class are allocated only when
235 instructions express preferences for them.
237 The classes must be numbered in nondecreasing order; that is,
238 a larger-numbered class must never be contained completely
239 in a smaller-numbered class.
241 For any two classes, it is very desirable that there be another
242 class that represents their union. */
245 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
246 DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
247 EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
248 SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
249 GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
252 #define N_REG_CLASSES (int) LIM_REG_CLASSES
254 /* Give names of register classes as strings for dump file. */
256 #define REG_CLASS_NAMES \
257 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
258 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \
260 "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \
261 "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \
262 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
264 /* Define which registers fit in which classes.
265 This is an initializer for a vector of HARD_REG_SET
266 of length N_REG_CLASSES. */
268 #define REG_CLASS_CONTENTS \
269 { {0}, /* No regs */ \
270 {0x0000f}, /* DATA_REGS */ \
271 {0x001f0}, /* ADDRESS_REGS */ \
272 {0x00200}, /* SP_REGS */ \
273 {0x001ff}, /* DATA_OR_ADDRESS_REGS */\
274 {0x003f0}, /* SP_OR_ADDRESS_REGS */\
275 {0x3fc00}, /* EXTENDED_REGS */ \
276 {0x3fc0f}, /* DATA_OR_EXTENDED_REGS */ \
277 {0x3fdf0}, /* ADDRESS_OR_EXTENDED_REGS */ \
278 {0x3fe00}, /* SP_OR_EXTENDED_REGS */ \
279 {0x3fff0}, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \
280 {0x3fdff}, /* GENERAL_REGS */ \
281 {0x3ffff}, /* ALL_REGS */ \
284 /* The same information, inverted:
285 Return the class number of the smallest class containing
286 reg number REGNO. This could be a conditional expression
287 or could index an array. */
289 #define REGNO_REG_CLASS(REGNO) \
290 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \
291 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \
292 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \
293 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
296 /* The class value for index registers, and the one for base regs. */
297 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
298 #define BASE_REG_CLASS SP_OR_ADDRESS_REGS
300 /* Get reg_class from a letter such as appears in the machine description. */
302 #define REG_CLASS_FROM_LETTER(C) \
303 ((C) == 'd' ? DATA_REGS : \
304 (C) == 'a' ? ADDRESS_REGS : \
305 (C) == 'y' ? SP_REGS : \
306 ! TARGET_AM33 ? NO_REGS : \
307 (C) == 'x' ? EXTENDED_REGS : \
310 /* Macros to check register numbers against specific register classes. */
312 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
313 and check its validity for a certain class.
314 We have two alternate definitions for each of them.
315 The usual definition accepts all pseudo regs; the other rejects
316 them unless they have been allocated suitable hard regs.
317 The symbol REG_OK_STRICT causes the latter definition to be used.
319 Most source files want to accept pseudo regs in the hope that
320 they will get allocated to the class that the insn wants them to be in.
321 Source files for reload pass need to be strict.
322 After reload, it makes no difference, since pseudo regs have
323 been eliminated by then. */
325 /* These assume that REGNO is a hard or pseudo reg number.
326 They give nonzero only if REGNO is a hard reg of the suitable class
327 or a pseudo reg currently allocated to a suitable hard reg.
328 Since they use reg_renumber, they are safe only once reg_renumber
329 has been allocated, which happens in local-alloc.c. */
331 #ifndef REG_OK_STRICT
332 # define REGNO_IN_RANGE_P(regno,min,max) \
333 (IN_RANGE ((regno), (min), (max)) || (regno) >= FIRST_PSEUDO_REGISTER)
335 # define REGNO_IN_RANGE_P(regno,min,max) \
336 (IN_RANGE ((regno), (min), (max)) \
338 && reg_renumber[(regno)] >= (min) && reg_renumber[(regno)] <= (max)))
341 #define REGNO_DATA_P(regno) \
342 REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM)
343 #define REGNO_ADDRESS_P(regno) \
344 REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM)
345 #define REGNO_SP_P(regno) \
346 REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM)
347 #define REGNO_EXTENDED_P(regno) \
348 REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM)
349 #define REGNO_AM33_P(regno) \
350 (REGNO_DATA_P ((regno)) || REGNO_ADDRESS_P ((regno)) \
351 || REGNO_EXTENDED_P ((regno)))
353 #define REGNO_OK_FOR_BASE_P(regno) \
354 (REGNO_SP_P ((regno)) \
355 || REGNO_ADDRESS_P ((regno)) || REGNO_EXTENDED_P ((regno)))
356 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
358 #define REGNO_OK_FOR_BIT_BASE_P(regno) \
359 (REGNO_SP_P ((regno)) || REGNO_ADDRESS_P ((regno)))
360 #define REG_OK_FOR_BIT_BASE_P(X) REGNO_OK_FOR_BIT_BASE_P (REGNO (X))
362 #define REGNO_OK_FOR_INDEX_P(regno) \
363 (REGNO_DATA_P ((regno)) || REGNO_EXTENDED_P ((regno)))
364 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
366 /* Given an rtx X being reloaded into a reg required to be
367 in class CLASS, return the class of reg to actually use.
368 In general this is just CLASS; but on some machines
369 in some cases it is preferable to use a more restrictive class. */
371 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
372 ((X) == stack_pointer_rtx && (CLASS) != SP_REGS \
373 ? ADDRESS_OR_EXTENDED_REGS \
374 : (GET_CODE (X) == MEM \
375 || (GET_CODE (X) == REG \
376 && REGNO (X) >= FIRST_PSEUDO_REGISTER) \
377 || (GET_CODE (X) == SUBREG \
378 && GET_CODE (SUBREG_REG (X)) == REG \
379 && REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER) \
380 ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS) \
383 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
384 (X == stack_pointer_rtx && CLASS != SP_REGS \
385 ? ADDRESS_OR_EXTENDED_REGS : CLASS)
387 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
388 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
390 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
391 secondary_reload_class(CLASS,MODE,IN)
393 /* Return the maximum number of consecutive registers
394 needed to represent mode MODE in a register of class CLASS. */
396 #define CLASS_MAX_NREGS(CLASS, MODE) \
397 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
399 /* The letters I, J, K, L, M, N, O, P in a register constraint string
400 can be used to stand for particular ranges of immediate operands.
401 This macro defines what the ranges are.
402 C is the letter, and VALUE is a constant value.
403 Return 1 if VALUE is in the range specified by C. */
405 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
406 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
408 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
409 #define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
410 #define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
411 #define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
412 #define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
413 #define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
415 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
416 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
417 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
418 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
419 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
420 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
421 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
424 /* Similar, but for floating constants, and defining letters G and H.
425 Here VALUE is the CONST_DOUBLE rtx itself.
427 `G' is a floating-point zero. */
429 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
430 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
431 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
434 /* Stack layout; function entry, exit and calling. */
436 /* Define this if pushing a word on the stack
437 makes the stack pointer a smaller address. */
439 #define STACK_GROWS_DOWNWARD
441 /* Define this if the nominal address of the stack frame
442 is at the high-address end of the local variables;
443 that is, each additional local variable allocated
444 goes at a more negative offset in the frame. */
446 #define FRAME_GROWS_DOWNWARD
448 /* Offset within stack frame to start allocating local variables at.
449 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
450 first local allocated. Otherwise, it is the offset to the BEGINNING
451 of the first local allocated. */
453 #define STARTING_FRAME_OFFSET 0
455 /* Offset of first parameter from the argument pointer register value. */
456 /* Is equal to the size of the saved fp + pc, even if an fp isn't
457 saved since the value is used before we know. */
459 #define FIRST_PARM_OFFSET(FNDECL) 4
461 #define ELIMINABLE_REGS \
462 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
463 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
464 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
466 #define CAN_ELIMINATE(FROM, TO) 1
468 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
469 OFFSET = initial_offset (FROM, TO)
471 /* We can debug without frame pointers on the mn10300, so eliminate
472 them whenever possible. */
473 #define FRAME_POINTER_REQUIRED 0
474 #define CAN_DEBUG_WITHOUT_FP
476 /* A guess for the MN10300. */
477 #define PROMOTE_PROTOTYPES 1
479 /* Value is the number of bytes of arguments automatically
480 popped when returning from a subroutine call.
481 FUNDECL is the declaration node of the function (as a tree),
482 FUNTYPE is the data type of the function (as a tree),
483 or for a library call it is an identifier node for the subroutine name.
484 SIZE is the number of bytes of arguments passed on the stack. */
486 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
488 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
489 for a register flushback area. */
490 #define REG_PARM_STACK_SPACE(DECL) 8
491 #define OUTGOING_REG_PARM_STACK_SPACE
492 #define ACCUMULATE_OUTGOING_ARGS 1
494 /* So we can allocate space for return pointers once for the function
495 instead of around every call. */
496 #define STACK_POINTER_OFFSET 4
498 /* 1 if N is a possible register number for function argument passing.
499 On the MN10300, no registers are used in this way. */
501 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
504 /* Define a data type for recording info about an argument list
505 during the scan of that argument list. This data type should
506 hold all necessary information about the function itself
507 and about the args processed so far, enough to enable macros
508 such as FUNCTION_ARG to determine where the next arg should go.
510 On the MN10300, this is a single integer, which is a number of bytes
511 of arguments scanned so far. */
513 #define CUMULATIVE_ARGS struct cum_arg
514 struct cum_arg {int nbytes; };
516 /* Initialize a variable CUM of type CUMULATIVE_ARGS
517 for a call to a function whose data type is FNTYPE.
518 For a library call, FNTYPE is 0.
520 On the MN10300, the offset starts at 0. */
522 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
525 /* Update the data in CUM to advance over an argument
526 of mode MODE and data type TYPE.
527 (TYPE is null for libcalls where that information may not be available.) */
529 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
530 ((CUM).nbytes += ((MODE) != BLKmode \
531 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
532 : (int_size_in_bytes (TYPE) + 3) & ~3))
534 /* Define where to put the arguments to a function.
535 Value is zero to push the argument on the stack,
536 or a hard register in which to store the argument.
538 MODE is the argument's machine mode.
539 TYPE is the data type of the argument (as a tree).
540 This is null for libcalls where that information may
542 CUM is a variable of type CUMULATIVE_ARGS which gives info about
543 the preceding args and about the function being called.
544 NAMED is nonzero if this argument is a named parameter
545 (otherwise it is an extra parameter matching an ellipsis). */
547 /* On the MN10300 all args are pushed. */
549 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
550 function_arg (&CUM, MODE, TYPE, NAMED)
552 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
553 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
555 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
556 ((TYPE) && int_size_in_bytes (TYPE) > 8)
558 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
559 ((TYPE) && int_size_in_bytes (TYPE) > 8)
561 /* Define how to find the value returned by a function.
562 VALTYPE is the data type of the value (as a tree).
563 If the precise function being called is known, FUNC is its FUNCTION_DECL;
564 otherwise, FUNC is 0. */
566 #define FUNCTION_VALUE(VALTYPE, FUNC) \
567 gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) \
568 ? FIRST_ADDRESS_REGNUM : FIRST_DATA_REGNUM)
570 /* Define how to find the value returned by a library function
571 assuming the value has mode MODE. */
573 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM)
575 /* 1 if N is a possible register number for a function value. */
577 #define FUNCTION_VALUE_REGNO_P(N) \
578 ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM)
580 /* Return values > 8 bytes in length in memory. */
581 #define DEFAULT_PCC_STRUCT_RETURN 0
582 #define RETURN_IN_MEMORY(TYPE) \
583 (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode)
585 /* Register in which address to store a structure value
586 is passed to a function. On the MN10300 it's passed as
587 the first parameter. */
589 #define STRUCT_VALUE FIRST_DATA_REGNUM
591 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
592 the stack pointer does not matter. The value is tested only in
593 functions that have frame pointers.
594 No definition is equivalent to always zero. */
596 #define EXIT_IGNORE_STACK 1
598 /* Output assembler code to FILE to increment profiler label # LABELNO
599 for profiling a function entry. */
601 #define FUNCTION_PROFILER(FILE, LABELNO) ;
603 #define TRAMPOLINE_TEMPLATE(FILE) \
605 fprintf (FILE, "\tadd -4,sp\n"); \
606 fprintf (FILE, "\t.long 0x0004fffa\n"); \
607 fprintf (FILE, "\tmov (0,sp),a0\n"); \
608 fprintf (FILE, "\tadd 4,sp\n"); \
609 fprintf (FILE, "\tmov (13,a0),a1\n"); \
610 fprintf (FILE, "\tmov (17,a0),a0\n"); \
611 fprintf (FILE, "\tjmp (a0)\n"); \
612 fprintf (FILE, "\t.long 0\n"); \
613 fprintf (FILE, "\t.long 0\n"); \
616 /* Length in units of the trampoline for entering a nested function. */
618 #define TRAMPOLINE_SIZE 0x1b
620 #define TRAMPOLINE_ALIGNMENT 32
622 /* Emit RTL insns to initialize the variable parts of a trampoline.
623 FNADDR is an RTX for the address of the function's pure code.
624 CXT is an RTX for the static chain value for the function. */
626 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
628 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \
630 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \
633 /* A C expression whose value is RTL representing the value of the return
634 address for the frame COUNT steps up from the current frame.
636 On the mn10300, the return address is not at a constant location
637 due to the frame layout. Luckily, it is at a constant offset from
638 the argument pointer, so we define RETURN_ADDR_RTX to return a
639 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx
640 with a reference to the stack/frame pointer + an appropriate offset. */
642 #define RETURN_ADDR_RTX(COUNT, FRAME) \
644 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
647 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
648 reference the 2 integer arg registers.
649 Ordinarily they are not call used registers, but they are for
650 _builtin_saveregs, so we must make this explicit. */
652 #define EXPAND_BUILTIN_SAVEREGS() mn10300_builtin_saveregs ()
654 /* Implement `va_start' for varargs and stdarg. */
655 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
656 mn10300_va_start (stdarg, valist, nextarg)
658 /* Implement `va_arg'. */
659 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
660 mn10300_va_arg (valist, type)
662 /* Addressing modes, and classification of registers for them. */
665 /* 1 if X is an rtx for a constant that is a valid address. */
667 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
669 /* Extra constraints. */
671 #define OK_FOR_R(OP) \
672 (GET_CODE (OP) == MEM \
673 && GET_MODE (OP) == QImode \
674 && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
675 || (GET_CODE (XEXP (OP, 0)) == REG \
676 && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
677 && XEXP (OP, 0) != stack_pointer_rtx) \
678 || (GET_CODE (XEXP (OP, 0)) == PLUS \
679 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
680 && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \
681 && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
682 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
683 && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
685 #define EXTRA_CONSTRAINT(OP, C) \
686 ((C) == 'R' ? OK_FOR_R (OP) \
687 : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \
690 /* Maximum number of registers that can appear in a valid memory address. */
692 #define MAX_REGS_PER_ADDRESS 2
695 #define HAVE_POST_INCREMENT (TARGET_AM33)
697 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
698 that is a valid memory address for an instruction.
699 The MODE argument is the machine mode for the MEM expression
700 that wants to use this address.
702 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
703 except for CONSTANT_ADDRESS_P which is actually
706 On the mn10300, the value in the address register must be
707 in the same memory space/segment as the effective address.
709 This is problematical for reload since it does not understand
710 that base+index != index+base in a memory reference.
712 Note it is still possible to use reg+reg addressing modes,
713 it's just much more difficult. For a discussion of a possible
714 workaround and solution, see the comments in pa.c before the
715 function record_unscaled_index_insn_codes. */
717 /* Accept either REG or SUBREG where a register is valid. */
719 #define RTX_OK_FOR_BASE_P(X) \
720 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
721 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
722 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
724 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
726 if (CONSTANT_ADDRESS_P (X)) \
728 if (RTX_OK_FOR_BASE_P (X)) \
731 && GET_CODE (X) == POST_INC \
732 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
733 && (MODE == SImode || MODE == SFmode || MODE == HImode))\
735 if (GET_CODE (X) == PLUS) \
737 rtx base = 0, index = 0; \
738 if (REG_P (XEXP (X, 0)) \
739 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
740 base = XEXP (X, 0), index = XEXP (X, 1); \
741 if (REG_P (XEXP (X, 1)) \
742 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
743 base = XEXP (X, 1), index = XEXP (X, 0); \
744 if (base != 0 && index != 0) \
746 if (GET_CODE (index) == CONST_INT) \
753 /* Try machine-dependent ways of modifying an illegitimate address
754 to be legitimate. If we find one, return the new, valid address.
755 This macro is used in only one place: `memory_address' in explow.c.
757 OLDX is the address as it was before break_out_memory_refs was called.
758 In some cases it is useful to look at this to decide what needs to be done.
760 MODE and WIN are passed so that this macro can use
761 GO_IF_LEGITIMATE_ADDRESS.
763 It is always safe for this macro to do nothing. It exists to recognize
764 opportunities to optimize the output. */
766 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
767 { rtx orig_x = (X); \
768 (X) = legitimize_address (X, OLDX, MODE); \
769 if ((X) != orig_x && memory_address_p (MODE, X)) \
772 /* Go to LABEL if ADDR (a legitimate address expression)
773 has an effect that depends on the machine mode it is used for. */
775 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
776 if (GET_CODE (ADDR) == POST_INC) \
779 /* Nonzero if the constant value X is a legitimate general operand.
780 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
782 #define LEGITIMATE_CONSTANT_P(X) 1
785 /* Tell final.c how to eliminate redundant test instructions. */
787 /* Here we define machine-dependent flags and fields in cc_status
788 (see `conditions.h'). No extra ones are needed for the VAX. */
790 /* Store in cc_status the expressions
791 that the condition codes will describe
792 after execution of an instruction whose pattern is EXP.
793 Do not alter them if the instruction would not alter the cc's. */
795 #define CC_OVERFLOW_UNUSABLE 0x200
796 #define CC_NO_CARRY CC_NO_OVERFLOW
797 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
799 /* Compute the cost of computing a constant rtl expression RTX
800 whose rtx-code is CODE. The body of this macro is a portion
801 of a switch statement. If the code is computed here,
802 return it with a return statement. Otherwise, break from the switch. */
804 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
806 /* Zeros are extremely cheap. */ \
807 if (INTVAL (RTX) == 0 && OUTER_CODE == SET) \
809 /* If it fits in 8 bits, then it's still relatively cheap. */ \
810 if (INT_8_BITS (INTVAL (RTX))) \
812 /* This is the "base" cost, includes constants where either the \
813 upper or lower 16bits are all zeros. */ \
814 if (INT_16_BITS (INTVAL (RTX)) \
815 || (INTVAL (RTX) & 0xffff) == 0 \
816 || (INTVAL (RTX) & 0xffff0000) == 0) \
819 /* These are more costly than a CONST_INT, but we can relax them, \
820 so they're less costly than a CONST_DOUBLE. */ \
825 /* We don't optimize CONST_DOUBLEs well nor do we relax them well, \
826 so their cost is very high. */ \
830 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
831 ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
832 ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
833 (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
834 (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
835 (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
836 ! TARGET_AM33 ? 6 : \
837 (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
838 (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
839 (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
842 #define ADDRESS_COST(X) mn10300_address_cost((X), 0)
844 /* A crude cut at RTX_COSTS for the MN10300. */
846 /* Provide the costs of a rtl expression. This is in the body of a
848 #define RTX_COSTS(RTX,CODE,OUTER_CODE) \
857 /* Nonzero if access to memory by bytes or half words is no faster
858 than accessing full words. */
859 #define SLOW_BYTE_ACCESS 1
861 /* Dispatch tables on the mn10300 are extremely expensive in terms of code
862 and readonly data size. So we crank up the case threshold value to
863 encourage a series of if/else comparisons to implement many small switch
864 statements. In theory, this value could be increased much more if we
865 were solely optimizing for space, but we keep it "reasonable" to avoid
866 serious code efficiency lossage. */
867 #define CASE_VALUES_THRESHOLD 6
869 #define NO_FUNCTION_CSE
871 /* According expr.c, a value of around 6 should minimize code size, and
872 for the MN10300 series, that's our primary concern. */
875 #define TEXT_SECTION_ASM_OP "\t.section .text"
876 #define DATA_SECTION_ASM_OP "\t.section .data"
877 #define BSS_SECTION_ASM_OP "\t.section .bss"
879 /* Output at beginning/end of assembler file. */
880 #undef ASM_FILE_START
881 #define ASM_FILE_START(FILE) asm_file_start(FILE)
883 #define ASM_COMMENT_START "#"
885 /* Output to assembler file text saying following lines
886 may contain character constants, extra white space, comments, etc. */
888 #define ASM_APP_ON "#APP\n"
890 /* Output to assembler file text saying following lines
891 no longer contain unusual constructs. */
893 #define ASM_APP_OFF "#NO_APP\n"
895 /* This says how to output the assembler to define a global
896 uninitialized but not common symbol.
897 Try to use asm_output_bss to implement this macro. */
899 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
900 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
902 /* This is how to output the definition of a user-level label named NAME,
903 such as the label on a static function or variable NAME. */
905 #define ASM_OUTPUT_LABEL(FILE, NAME) \
906 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
908 /* This is how to output a command to make the user-level label named NAME
909 defined for reference from other files. */
911 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
912 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
914 /* This is how to output a reference to a user-level label named NAME.
915 `assemble_name' uses this. */
917 #undef ASM_OUTPUT_LABELREF
918 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
920 const char* real_name; \
921 STRIP_NAME_ENCODING (real_name, (NAME)); \
922 fprintf (FILE, "_%s", real_name); \
925 /* Store in OUTPUT a string (made with alloca) containing
926 an assembler-name for a local static variable named NAME.
927 LABELNO is an integer which is different for each call. */
929 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
930 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
931 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
933 /* This is how we tell the assembler that two symbols have the same value. */
935 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
936 do { assemble_name(FILE, NAME1); \
937 fputs(" = ", FILE); \
938 assemble_name(FILE, NAME2); \
939 fputc('\n', FILE); } while (0)
942 /* How to refer to registers in assembler output.
943 This sequence is indexed by compiler's hard-register-number (see above). */
945 #define REGISTER_NAMES \
946 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \
947 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \
950 #define ADDITIONAL_REGISTER_NAMES \
951 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \
952 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \
953 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \
954 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \
957 /* Print an instruction operand X on file FILE.
958 look in mn10300.c for details */
960 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
962 /* Print a memory operand whose address is X, on file FILE.
963 This uses a function in output-vax.c. */
965 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
967 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
968 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
970 /* This is how to output an element of a case-vector that is absolute. */
972 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
973 asm_fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
975 /* This is how to output an element of a case-vector that is relative. */
977 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
978 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
980 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
982 fprintf (FILE, "\t.align %d\n", (LOG))
984 /* We don't have to worry about dbx compatibility for the mn10300. */
985 #define DEFAULT_GDB_EXTENSIONS 1
987 /* Use dwarf2 debugging info by default. */
988 #undef PREFERRED_DEBUGGING_TYPE
989 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
991 #define DWARF2_ASM_LINE_DEBUG_INFO 1
993 /* GDB always assumes the current function's frame begins at the value
994 of the stack pointer upon entry to the current function. Accessing
995 local variables and parameters passed on the stack is done using the
996 base of the frame + an offset provided by GCC.
998 For functions which have frame pointers this method works fine;
999 the (frame pointer) == (stack pointer at function entry) and GCC provides
1000 an offset relative to the frame pointer.
1002 This loses for functions without a frame pointer; GCC provides an offset
1003 which is relative to the stack pointer after adjusting for the function's
1004 frame size. GDB would prefer the offset to be relative to the value of
1005 the stack pointer at the function's entry. Yuk! */
1006 #define DEBUGGER_AUTO_OFFSET(X) \
1007 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
1008 + (frame_pointer_needed \
1009 ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM)))
1011 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1012 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
1013 + (frame_pointer_needed \
1014 ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM)))
1016 /* Define to use software floating point emulator for REAL_ARITHMETIC and
1017 decimal <-> binary conversion. */
1018 #define REAL_ARITHMETIC
1020 /* Specify the machine mode that this machine uses
1021 for the index in the tablejump instruction. */
1022 #define CASE_VECTOR_MODE Pmode
1024 /* Define if operations between registers always perform the operation
1025 on the full register even if a narrower mode is specified. */
1026 #define WORD_REGISTER_OPERATIONS
1028 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1030 /* This flag, if defined, says the same insns that convert to a signed fixnum
1031 also convert validly to an unsigned one. */
1032 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1034 /* Max number of bytes we can move from memory to memory
1035 in one reasonably fast instruction. */
1038 /* Define if shifts truncate the shift count
1039 which implies one can omit a sign-extension or zero-extension
1040 of a shift count. */
1041 #define SHIFT_COUNT_TRUNCATED 1
1043 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1044 is done just by pretending it is already truncated. */
1045 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1047 /* Specify the machine mode that pointers have.
1048 After generation of rtl, the compiler makes no further distinction
1049 between pointers and any other objects of this machine mode. */
1050 #define Pmode SImode
1052 /* A function address in a call instruction
1053 is a byte address (for indexing purposes)
1054 so give the MEM rtx a byte's mode. */
1055 #define FUNCTION_MODE QImode
1057 /* The assembler op to get a word. */
1059 #define FILE_ASM_OP "\t.file\n"