1 ; Options for the MIPS port of the compiler
3 ; Copyright (C) 2005, 2007, 2008, 2010, 2011 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ; License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
28 Target RejectNegative Joined
29 -mabi=ABI Generate code that conforms to the given ABI
32 Target Report Mask(ABICALLS)
33 Generate code that can be used in SVR4-style dynamic objects
36 Target Report Var(TARGET_MAD)
37 Use PMC-style 'mad' instructions
40 Target RejectNegative Joined Var(mips_arch_string)
41 -march=ISA Generate code for the given ISA
44 Target RejectNegative Joined UInteger Var(mips_branch_cost)
45 -mbranch-cost=COST Set the cost of branches to roughly COST instructions
48 Target Report Mask(BRANCHLIKELY)
49 Use Branch Likely instructions, overriding the architecture default
52 Target Report Var(TARGET_FLIP_MIPS16)
53 Switch on/off MIPS16 ASE on alternating functions for compiler testing
56 Target Report Mask(CHECK_ZERO_DIV)
57 Trap on integer divide by zero
60 Target RejectNegative Joined
61 -mcode-readable=SETTING Specify when instructions are allowed to access code
64 Target Report RejectNegative Mask(DIVIDE_BREAKS)
65 Use branch-and-break sequences to check for integer divide by zero
68 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
69 Use trap instructions to check for integer divide by zero
72 Target Report RejectNegative Var(TARGET_MDMX)
73 Allow the use of MDMX instructions
76 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
77 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
80 Target Report Mask(DSP)
81 Use MIPS-DSP instructions
84 Target Report Mask(DSPR2)
85 Use MIPS-DSP REV 2 instructions
88 Target Var(TARGET_DEBUG_MODE) Undocumented
91 Target Var(TARGET_DEBUG_D_MODE) Undocumented
94 Target Report RejectNegative Mask(BIG_ENDIAN)
95 Use big-endian byte order
98 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
99 Use little-endian byte order
102 Target Report Var(TARGET_EMBEDDED_DATA)
103 Use ROM instead of RAM
106 Target Report Mask(EXPLICIT_RELOCS)
107 Use NewABI-style %reloc() assembly operators
110 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
111 Use -G for data that is not defined by the current object
114 Target Report Var(TARGET_FIX_24K)
115 Work around certain 24K errata
118 Target Report Mask(FIX_R4000)
119 Work around certain R4000 errata
122 Target Report Mask(FIX_R4400)
123 Work around certain R4400 errata
126 Target Report Mask(FIX_R10000)
127 Work around certain R10000 errata
130 Target Report Var(TARGET_FIX_SB1)
131 Work around errata for early SB-1 revision 2 cores
134 Target Report Var(TARGET_FIX_VR4120)
135 Work around certain VR4120 errata
138 Target Report Var(TARGET_FIX_VR4130)
139 Work around VR4130 mflo/mfhi errata
142 Target Report Var(TARGET_4300_MUL_FIX)
143 Work around an early 4300 hardware bug
146 Target Report Mask(FP_EXCEPTIONS)
147 FP exceptions are enabled
150 Target Report RejectNegative InverseMask(FLOAT64)
151 Use 32-bit floating-point registers
154 Target Report RejectNegative Mask(FLOAT64)
155 Use 64-bit floating-point registers
158 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
159 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
162 Target Report Mask(FUSED_MADD)
163 Generate floating-point multiply-add instructions
166 Target Report RejectNegative InverseMask(64BIT)
167 Use 32-bit general registers
170 Target Report RejectNegative Mask(64BIT)
171 Use 64-bit general registers
174 Target Report Var(TARGET_GPOPT) Init(1)
175 Use GP-relative addressing to access small data
178 Target Report Var(TARGET_PLT)
179 When generating -mabicalls code, allow executables to use PLTs and copy relocations
182 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
183 Allow the use of hardware floating-point ABI and instructions
186 Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
187 Generate code that can be safely linked with MIPS16 code.
190 Target RejectNegative Joined
191 -mipsN Generate code for ISA level N
194 Target Report RejectNegative Mask(MIPS16)
198 Target Report RejectNegative Mask(MIPS3D)
199 Use MIPS-3D instructions
202 Target Report Mask(LLSC)
203 Use ll, sc and sync instructions
206 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
207 Use -G for object-local data
210 Target Report Var(TARGET_LONG_CALLS)
214 Target Report RejectNegative InverseMask(LONG64, LONG32)
215 Use a 32-bit long type
218 Target Report RejectNegative Mask(LONG64)
219 Use a 64-bit long type
222 Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
223 Pass the address of the ra save location to _mcount in $12
226 Target Report Mask(MEMCPY)
227 Don't optimize block moves
231 Use the mips-tfile postpass
234 Target Report Var(TARGET_MT)
235 Allow the use of MT instructions
238 Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
239 Prevent the use of all floating-point operations
242 Target RejectNegative
243 Do not use a cache-flushing function before calling stack trampolines
246 Target Report RejectNegative Var(TARGET_MDMX, 0)
247 Do not use MDMX instructions
250 Target Report RejectNegative InverseMask(MIPS16)
251 Generate normal-mode code
254 Target Report RejectNegative InverseMask(MIPS3D)
255 Do not use MIPS-3D instructions
258 Target Report Mask(PAIRED_SINGLE_FLOAT)
259 Use paired-single floating-point instructions
262 Target Joined RejectNegative
263 -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
266 Target Report Mask(RELAX_PIC_CALLS)
267 Try to allow the linker to turn PIC calls into direct calls
270 Target Report Var(TARGET_SHARED) Init(1)
271 When generating -mabicalls code, make the code suitable for use in shared libraries
274 Target Report RejectNegative Mask(SINGLE_FLOAT)
275 Restrict the use of hardware floating-point instructions to 32-bit operations
278 Target Report Mask(SMARTMIPS)
279 Use SmartMIPS instructions
282 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
283 Prevent the use of all hardware floating-point instructions
286 Target Report Mask(SPLIT_ADDRESSES)
287 Optimize lui/addiu address loads
290 Target Report Var(TARGET_SYM32)
291 Assume all symbols have 32-bit values
294 Target Report Mask(SYNCI)
295 Use synci instruction to invalidate i-cache
298 Target RejectNegative Joined Var(mips_tune_string)
299 -mtune=PROCESSOR Optimize the output for PROCESSOR
301 muninit-const-in-rodata
302 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
303 Put uninitialized constants in ROM (needs -membedded-data)
306 Target Report Mask(VR4130_ALIGN)
307 Perform VR4130-specific alignment optimizations
310 Target Report Var(TARGET_XGOT)
311 Lift restrictions on GOT size