1 /* Definitions of target machine for GNU compiler. 64 bit ABI support.
2 Copyright (C) 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Macros to implement the 64 bit ABI. This file is meant to be included
27 /* For Irix 6, -mips3 implies TARGET_LONG64. */
29 #define TARGET_LONG64 (target_flags & MASK_64BIT)
32 #define CPP_PREDEFINES \
33 "-Dunix -Dmips -Dsgi -Dhost_mips -DMIPSEB -D_MIPSEB -DSYSTYPE_SVR4 \
34 -D_SVR4_SOURCE -D_MODERN_C -D__DSO__ \
35 -Asystem(unix) -Asystem(svr4) -Acpu(mips) -Amachine(sgi)"
37 /* We must make -mips3 do what -mlong64 used to do. */
40 %{!ansi:-D__EXTENSIONS__ -D_SGI_SOURCE -D_LONGLONG} \
41 %{.cc: -D_LANGUAGE_C_PLUS_PLUS} \
42 %{.cxx: -D_LANGUAGE_C_PLUS_PLUS} \
43 %{.C: -D_LANGUAGE_C_PLUS_PLUS} \
44 %{.m: -D_LANGUAGE_OBJECTIVE_C -D_LANGUAGE_C} \
45 %{.S: -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
46 %{.s: -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
47 %{!.S:%{!.s: %{!.cc: %{!.cxx: %{!.C: %{!.m: -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}}}}}\
48 %{mfp32: -D_MIPS_FPSET=16}%{!mfp32: -D_MIPS_FPSET=32} \
49 %{mips1: -D_MIPS_ISA=_MIPS_ISA_MIPS1} \
50 %{mips2: -D_MIPS_ISA=_MIPS_ISA_MIPS2} \
51 %{mips3: -D_MIPS_ISA=_MIPS_ISA_MIPS3} \
52 %{mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4} \
53 %{!mips1: %{!mips2: %{!mips3: %{!mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4}}}} \
54 %{mips1: -D_MIPS_SIM=_MIPS_SIM_ABI32} \
55 %{mips2: -D_MIPS_SIM=_MIPS_SIM_ABI32} \
56 %{mips3: -D_ABI64=3 -D_MIPS_SIM=_ABI64} \
57 %{mips4: -D_ABI64=3 -D_MIPS_SIM=_ABI64} \
58 %{!mips1: %{!mips2: %{!mips3: %{!mips4: -D_ABI64=3 -D_MIPS_SIM=_ABI64}}}} \
59 %{!mint64: -D_MIPS_SZINT=32}%{mint64: -D_MIPS_SZINT=64} \
60 %{mips1: -D_MIPS_SZLONG=32}%{mips2: -D_MIPS_SZLONG=32} \
61 %{!mips1:%{!mips2: -D_MIPS_SZLONG=64}} \
62 %{mips1: -D_MIPS_SZPTR=32}%{mips2: -D_MIPS_SZPTR=32} \
63 %{mips3: -D_MIPS_SZPTR=64}%{mips4: -D_MIPS_SZPTR=64} \
64 %{!mips1: %{!mips2: %{!mips3: %{!mips4: -D_MIPS_SZPTR=64}}}} \
65 %{!mips1:%{!mips2: -D_COMPILER_VERSION=601}} \
66 %{mips1: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
67 %{mips2: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
68 %{!mips1:%{!mips2: -D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int}} \
69 %{mips3:-U__mips -D__mips=3} \
70 %{!mips1:%{!mips2:-U__mips -D__mips=4}}"
72 #undef EMPTY_FIELD_BOUNDARY
73 #define EMPTY_FIELD_BOUNDARY 32
76 #define STACK_BOUNDARY 128
78 #undef MIPS_STACK_ALIGN
79 #define MIPS_STACK_ALIGN(LOC) (((LOC)+15) & ~15)
82 #define GP_ARG_LAST (mips_isa < 3 ? GP_REG_FIRST + 7 : GP_REG_FIRST + 11)
84 #define FP_ARG_LAST (mips_isa < 3 ? FP_REG_FIRST + 15 : FP_REG_FIRST + 19)
86 /* fp20-23 are now caller saved. */
87 #undef SUBTARGET_CONDITIONAL_REGISTER_USAGE
88 #define SUBTARGET_CONDITIONAL_REGISTER_USAGE \
93 for (regno = FP_REG_FIRST + 20; regno < FP_REG_FIRST + 24; regno++) \
94 call_used_regs[regno] = 1; \
98 #undef MAX_ARGS_IN_REGISTERS
99 #define MAX_ARGS_IN_REGISTERS (mips_isa < 3 ? 4 : 8)
101 #undef REG_PARM_STACK_SPACE
102 #define REG_PARM_STACK_SPARC(FNDECL) \
104 ? (MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \
107 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
108 (! BYTES_BIG_ENDIAN \
110 : (((MODE) == BLKmode \
111 ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
112 && int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\
113 : (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY \
114 && (mips_isa < 3 || GET_MODE_CLASS (MODE) == MODE_INT))) \
115 ? downward : upward))
117 extern struct rtx_def *type_dependent_reg ();
118 #define TYPE_DEPENDENT_REG(REGNO, INDEX, TYPE) \
119 type_dependent_reg (REGNO, INDEX, TYPE)
121 #undef RETURN_IN_MEMORY
122 #define RETURN_IN_MEMORY(TYPE) \
123 (mips_isa < 3 ? TYPE_MODE (TYPE) == BLKmode : int_size_in_bytes (TYPE) > 16)
125 extern struct rtx_def *mips_function_value ();
126 #undef FUNCTION_VALUE
127 #define FUNCTION_VALUE(VALTYPE, FUNC) mips_function_value (VALTYPE, FUNC)
129 /* For varargs, we must save the current argument, because it is the fake
130 argument va_alist, and will need to be converted to the real argument.
131 For stdarg, we do not need to save the current argument, because it
132 is a real argument. */
133 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
134 { if (mips_isa >= 3 && (CUM).arg_words < MAX_ARGS_IN_REGISTERS - 1) \
137 = (MAX_ARGS_IN_REGISTERS - (CUM).arg_words \
138 - ! current_function_varargs) * UNITS_PER_WORD; \
142 rtx mem = gen_rtx (MEM, BLKmode, \
143 plus_constant (virtual_incoming_args_rtx, \
145 /* va_arg is an array access in this case, which causes it to \
146 get MEM_IN_STRUCT_P set. We must set it here so that the \
147 insn scheduler won't assume that these stores can't \
148 possibly overlap with the va_arg loads. */ \
149 if (BYTES_BIG_ENDIAN) \
150 MEM_IN_STRUCT_P (mem) = 1; \
151 move_block_from_reg \
152 ((CUM).arg_words + GP_ARG_FIRST + ! current_function_varargs, \
154 (MAX_ARGS_IN_REGISTERS - (CUM).arg_words \
155 - ! current_function_varargs), \
161 #define STRICT_ARGUMENT_NAMING
163 /* ??? Unimplemented stuff follows. */
165 /* ??? Add support for 16 byte/128 bit long doubles here when
168 /* ??? Make main return zero if user did not specify return value. */
170 /* ??? Add support for .interfaces section, so as to get linker warnings
171 when stdarg functions called without prototype in scope? */
173 /* ??? Could optimize structure passing by putting the right register rtx
174 into the field decl, so that if we use the field, we can take the value from
175 a register instead of from memory. */