1 /* Definitions of target machine for GNU compiler for
2 Motorola m88100 in an 88open OCS/BCS environment.
3 Copyright (C) 1988, 89, 90, 91, 93, 94, 1995 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
5 Enhanced by Michael Meissner (meissner@cygnus.com)
6 Version 2 port by Tom Wood (twood@pets.sps.mot.com)
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 /* The m88100 port of GNU CC adheres to the various standards from 88open.
26 These documents are available by writing:
28 88open Consortium Ltd.
29 100 Homeland Court, Suite 800
33 In brief, the current standards are:
35 Binary Compatibility Standard, Release 1.1A, May 1991
36 This provides for portability of application-level software at the
37 executable level for AT&T System V Release 3.2.
39 Object Compatibility Standard, Release 1.1A, May 1991
40 This provides for portability of application-level software at the
41 object file and library level for C, Fortran, and Cobol, and again,
44 Under development are standards for AT&T System V Release 4, based on the
45 [generic] System V Application Binary Interface from AT&T. These include:
47 System V Application Binary Interface, Motorola 88000 Processor Supplement
48 Another document from AT&T for SVR4 specific to the m88100.
49 Available from Prentice Hall.
51 System V Application Binary Interface, Motorola 88000 Processor Supplement,
52 Release 1.1, Draft H, May 6, 1991
53 A proposed update to the AT&T document from 88open.
55 System V ABI Implementation Guide for the M88000 Processor,
56 Release 1.0, January 1991
57 A companion ABI document from 88open. */
59 /* Other *.h files in config/m88k include this one and override certain items.
60 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
61 Additionally, sysv4.h and dgux.h include svr4.h first. All other
62 m88k targets except luna.h are based on svr3.h. */
64 /* Choose SVR3 as the default. */
65 #if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
69 /* External types used. */
71 /* What instructions are needed to manufacture an integer constant. */
72 enum m88k_instruction {
83 /* Which processor to schedule for. The elements of the enumeration
84 must match exactly the cpu attribute in the m88k.md machine description. */
92 /* Recast the cpu class to be the cpu attribute. */
93 #define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
95 /* External variables/functions defined in m88k.c. */
97 extern char *m88k_pound_sign;
98 extern char *m88k_short_data;
99 extern char *m88k_version;
100 extern char m88k_volatile_code;
102 extern unsigned m88k_gp_threshold;
103 extern int m88k_prologue_done;
104 extern int m88k_function_number;
105 extern int m88k_fp_offset;
106 extern int m88k_stack_size;
107 extern int m88k_case_index;
109 extern struct rtx_def *m88k_compare_reg;
110 extern struct rtx_def *m88k_compare_op0;
111 extern struct rtx_def *m88k_compare_op1;
113 extern enum processor_type m88k_cpu;
115 extern int null_prologue ();
116 extern int integer_ok_for_set ();
117 extern int m88k_debugger_offset ();
120 extern void emit_bcnd ();
121 extern void expand_block_move ();
122 extern void m88k_layout_frame ();
123 extern void m88k_expand_prologue ();
124 extern void m88k_begin_prologue ();
125 extern void m88k_end_prologue ();
126 extern void m88k_expand_epilogue ();
127 extern void m88k_begin_epilogue ();
128 extern void m88k_end_epilogue ();
129 extern void output_function_profiler ();
130 extern void output_function_block_profiler ();
131 extern void output_block_profiler ();
132 extern void output_file_start ();
133 extern void output_ascii ();
134 extern void output_label ();
135 extern void print_operand ();
136 extern void print_operand_address ();
138 extern char *output_load_const_int ();
139 extern char *output_load_const_float ();
140 extern char *output_load_const_double ();
141 extern char *output_load_const_dimode ();
142 extern char *output_and ();
143 extern char *output_ior ();
144 extern char *output_xor ();
145 extern char *output_call ();
147 extern struct rtx_def *emit_test ();
148 extern struct rtx_def *legitimize_address ();
149 extern struct rtx_def *legitimize_operand ();
150 extern struct rtx_def *m88k_function_arg ();
151 extern struct rtx_def *m88k_builtin_saveregs ();
153 extern enum m88k_instruction classify_integer ();
155 /* external variables defined elsewhere in the compiler */
157 extern int target_flags; /* -m compiler switches */
158 extern int frame_pointer_needed; /* current function has a FP */
159 extern int current_function_pretend_args_size; /* args size without ... */
160 extern int flag_delayed_branch; /* -fdelayed-branch */
161 extern int flag_pic; /* -fpic */
162 extern char * reg_names[];
164 /* Specify the default monitors. The meaning of these values can
165 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
166 values downward from 0x8000 are tests that will soon go away.
167 values upward from 0x1 are generally useful tests that will remain. */
170 #define MONITOR_GCC 0
173 /*** Controlling the Compilation Driver, `gcc' ***/
174 /* Show we can debug even without a frame pointer. */
175 #define CAN_DEBUG_WITHOUT_FP
177 /* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
178 Here, the CPU_DEFAULT is assumed to be -m88100. */
180 #define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
181 %{!m88000:%{!m88110:-D__m88100__}}"
183 /* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
184 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
186 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
187 STARTFILE_SPEC redefined in dgux.h. */
189 /*** Run-time Target Specification ***/
191 /* Names to predefine in the preprocessor for this target machine.
192 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
193 #define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2"
195 #define TARGET_VERSION fprintf (stderr, " (%s%s)", \
196 VERSION_INFO1, VERSION_INFO2)
198 /* Print subsidiary information on the compiler version in use.
199 Redefined in sysv4.h, and luna.h. */
200 #define VERSION_INFO1 "88open OCS/BCS, "
201 #ifndef VERSION_INFO2
202 #define VERSION_INFO2 "$Revision: 1.67 $"
205 #ifndef VERSION_STRING
206 #define VERSION_STRING version_string
208 #define TM_RCS_ID "@(#)" __FILE__ " $Revision: 1.67 $ " __DATE__
210 #define TM_RCS_ID "$What: <@(#) m88k.h,v 1.1.1.2.2.2> $"
211 #endif /* __STDC__ */
213 #define TM_RCS_ID "@(#)" __FILE__ " " VERSION_INFO2 " " __DATE__
214 #endif /* VERSION_STRING */
216 /* Run-time compilation parameters selecting different hardware subsets. */
218 /* Macro to define tables used to set the flags.
219 This is a list in braces of pairs in braces,
220 each pair being { "NAME", VALUE }
221 where VALUE is the bits to set or minus the bits to clear.
222 An empty string NAME is used to identify the default VALUE. */
224 #define MASK_88100 0x00000001 /* Target m88100 */
225 #define MASK_88110 0x00000002 /* Target m88110 */
226 #define MASK_88000 (MASK_88100 | MASK_88110)
228 #define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
229 #define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
230 #define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
231 #define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */
232 #define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
233 #define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
234 #define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
235 #define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
236 #define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
237 #define MASK_USE_DIV 0x00000800 /* No signed div. checks */
238 #define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
239 #define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
240 #define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
241 #define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
242 #define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
243 MASK_HANDLE_LARGE_SHIFT)
244 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00020000 /* omit leaf frame pointers */
247 #define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
248 #define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
249 #define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
251 #define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
252 #define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
253 #define TARGET_SVR4 (target_flags & MASK_SVR4)
254 #define TARGET_SVR3 (target_flags & MASK_SVR3)
255 #define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
256 #define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
257 #define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
258 #define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
259 #define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
260 #define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
261 #define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
262 #define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
263 #define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
264 #define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
266 #define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
267 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
269 /* Redefined in sysv3.h, sysv4.h, and dgux.h. */
270 #define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
271 #define CPU_DEFAULT MASK_88100
273 #define TARGET_SWITCHES \
275 { "88110", MASK_88110 }, \
276 { "88100", MASK_88100 }, \
277 { "88000", MASK_88000 }, \
278 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
279 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
280 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
281 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
282 { "svr4", MASK_SVR4 }, \
283 { "svr3", -MASK_SVR4 }, \
284 { "no-underscores", MASK_NO_UNDERSCORES }, \
285 { "big-pic", MASK_BIG_PIC }, \
286 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
287 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
288 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
289 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
290 { "use-div-instruction", MASK_USE_DIV }, \
291 { "identify-revision", MASK_IDENTIFY_REVISION }, \
292 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
293 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
294 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
295 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
296 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
297 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
299 /* Default switches */ \
300 { "", TARGET_DEFAULT }, \
303 /* Redefined in dgux.h. */
304 #define SUBTARGET_SWITCHES
306 /* Macro to define table for command options with values. */
308 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
309 { "version-", &m88k_version } }
311 /* Do any checking or such that is needed after processing the -m switches. */
313 #define OVERRIDE_OPTIONS \
317 if ((target_flags & MASK_88000) == 0) \
318 target_flags |= CPU_DEFAULT; \
322 target_flags |= MASK_USE_DIV; \
323 target_flags &= ~MASK_CHECK_ZERO_DIV; \
326 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
327 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
329 if (TARGET_BIG_PIC) \
332 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
333 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
337 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
339 m88k_pound_sign = "#"; \
343 target_flags |= MASK_SVR3; \
344 target_flags &= ~MASK_SVR4; \
347 if (m88k_short_data) \
349 char *p = m88k_short_data; \
351 if (*p >= '0' && *p <= '9') \
355 error ("Invalid option `-mshort-data-%s'", m88k_short_data); \
358 m88k_gp_threshold = atoi (m88k_short_data); \
359 if (m88k_gp_threshold > 0x7fffffff) \
360 error ("-mshort-data-%s is too large ", m88k_short_data); \
362 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
366 /*** Storage Layout ***/
368 /* Sizes in bits of the various types. */
369 #define CHAR_TYPE_SIZE 8
370 #define SHORT_TYPE_SIZE 16
371 #define INT_TYPE_SIZE 32
372 #define LONG_TYPE_SIZE 32
373 #define LONG_LONG_TYPE_SIZE 64
374 #define FLOAT_TYPE_SIZE 32
375 #define DOUBLE_TYPE_SIZE 64
376 #define LONG_DOUBLE_TYPE_SIZE 64
378 /* Define this if most significant bit is lowest numbered
379 in instructions that operate on numbered bit-fields.
380 Somewhat arbitrary. It matches the bit field patterns. */
381 #define BITS_BIG_ENDIAN 1
383 /* Define this if most significant byte of a word is the lowest numbered.
384 That is true on the m88000. */
385 #define BYTES_BIG_ENDIAN 1
387 /* Define this if most significant word of a multiword number is the lowest
389 For the m88000 we can decide arbitrarily since there are no machine
390 instructions for them. */
391 #define WORDS_BIG_ENDIAN 1
393 /* Number of bits in an addressable storage unit */
394 #define BITS_PER_UNIT 8
396 /* Width in bits of a "word", which is the contents of a machine register.
397 Note that this is not necessarily the width of data type `int';
398 if using 16-bit ints on a 68000, this would still be 32.
399 But on a machine with 16-bit registers, this would be 16. */
400 #define BITS_PER_WORD 32
402 /* Width of a word, in units (bytes). */
403 #define UNITS_PER_WORD 4
405 /* Width in bits of a pointer.
406 See also the macro `Pmode' defined below. */
407 #define POINTER_SIZE 32
409 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
410 #define PARM_BOUNDARY 32
412 /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
413 #define MAX_PARM_BOUNDARY 64
415 /* Boundary (in *bits*) on which stack pointer should be aligned. */
416 #define STACK_BOUNDARY 128
418 /* Allocation boundary (in *bits*) for the code of a function. On the
419 m88100, it is desirable to align to a cache line. However, SVR3 targets
420 only provided 8 byte alignment. The m88110 cache is small, so align
421 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
422 #define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
423 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
425 /* No data type wants to be aligned rounder than this. */
426 #define BIGGEST_ALIGNMENT 64
428 /* The best alignment to use in cases where we have a choice. */
429 #define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
431 /* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
432 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
433 ((TREE_CODE (EXP) == STRING_CST \
434 && (ALIGN) < FASTEST_ALIGNMENT) \
435 ? FASTEST_ALIGNMENT : (ALIGN))
437 /* Make arrays of chars 4/8 byte aligned for the same reasons. */
438 #define DATA_ALIGNMENT(TYPE, ALIGN) \
439 (TREE_CODE (TYPE) == ARRAY_TYPE \
440 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
441 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
443 /* Alignment of field after `int : 0' in a structure.
444 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
445 /* #define EMPTY_FIELD_BOUNDARY 8 */
447 /* Every structure's size must be a multiple of this. */
448 #define STRUCTURE_SIZE_BOUNDARY 8
450 /* Set this nonzero if move instructions will actually fail to work
451 when given unaligned data. */
452 #define STRICT_ALIGNMENT 1
454 /* A bitfield declared as `int' forces `int' alignment for the struct. */
455 #define PCC_BITFIELD_TYPE_MATTERS 1
457 /* Maximum size (in bits) to use for the largest integral type that
458 replaces a BLKmode type. */
459 /* #define MAX_FIXED_MODE_SIZE 0 */
461 /* Check a `double' value for validity for a particular machine mode.
462 This is defined to avoid crashes outputting certain constants.
463 Since we output the number in hex, the assembler won't choke on it. */
464 /* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
466 /* A code distinguishing the floating point format of the target machine. */
467 /* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
469 /*** Register Usage ***/
471 /* Number of actual hardware registers.
472 The hardware registers are assigned numbers for the compiler
473 from 0 to just below FIRST_PSEUDO_REGISTER.
474 All registers that the compiler knows about must be given numbers,
475 even those that are not normally considered general registers.
477 The m88100 has a General Register File (GRF) of 32 32-bit registers.
478 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
479 #define FIRST_PSEUDO_REGISTER 64
480 #define FIRST_EXTENDED_REGISTER 32
482 /* General notes on extended registers, their use and misuse.
486 spill area instead of memory.
487 -waste if only used once
489 floating point calculations
490 -probably a waste unless we have run out of general purpose registers
492 freeing up general purpose registers
493 -e.g. may be able to have more loop invariants if floating
494 point is moved into extended registers.
497 I've noticed wasteful moves into and out of extended registers; e.g. a load
498 into x21, then inside a loop a move into r24, then r24 used as input to
499 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
500 will address this. This wastes a move, but the load,store and move could
501 have been saved had extended registers been used throughout.
502 E.g. in the code following code, if z and xz are placed in extended
503 registers, there is no need to save preserve registers.
505 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
514 k = b + c + d + e + f + g + h + a + i + j++;
518 printf("k= %d; z=%f;\n", k, z);
521 I've found that it is possible to change the constraints (putting * before
522 the 'r' constraints int the fadd.ddd instruction) and get the entire
523 addition and store to go into extended registers. However, this also
524 forces simple addition and return of floating point arguments to a
525 function into extended registers. Not the correct solution.
527 Found the following note in local-alloc.c which may explain why I can't
528 get both registers to be in extended registers since two are allocated in
529 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
530 why an extended register is used instead of just using the preserve
534 We have provision to exempt registers, even when they are contained
535 within the block, that can be tied to others that are not contained in it.
536 This is so that global_alloc could process them both and tie them then.
537 But this is currently disabled since tying in global_alloc is not
540 The explanation of why the preserved register is not used is as follows,
541 I believe. The registers are being allocated in order. Tying is not
542 done so efficiently, so when it comes time to do the first allocation,
543 there are no registers left to use without spilling except extended
544 registers. Then when the next pseudo register needs a hard reg, there
545 are still no registers to be had for free, but this one must be a GRF
546 reg instead of an extended reg, so a preserve register is spilled. Thus
547 the move from extended to GRF is necessitated. I do not believe this can
548 be 'fixed' through the config/*m88k* files.
550 gcc seems to sometimes make worse use of register allocation -- not counting
551 moves -- whenever extended registers are present. For example in the
552 whetstone, the simple for loop (slightly modified)
553 for(i = 1; i <= n1; i++)
555 x1 = (x1 + x2 + x3 - x4) * t;
556 x2 = (x1 + x2 - x3 + x4) * t;
557 x3 = (x1 - x2 + x3 + x4) * t;
558 x4 = (x1 + x2 + x3 + x4) * t;
560 in general loads the high bits of the addresses of x2-x4 and i into registers
561 outside the loop. Whenever extended registers are used, it loads all of
562 these inside the loop. My conjecture is that since the 88110 has so many
563 registers, and gcc makes no distinction at this point -- just that they are
564 not fixed, that in loop.c it believes it can expect a number of registers
565 to be available. Then it allocates 'too many' in local-alloc which causes
566 problems later. 'Too many' are allocated because a large portion of the
567 registers are extended registers and cannot be used for certain purposes
568 ( e.g. hold the address of a variable). When this loop is compiled on its
569 own, the problem does not occur. I don't know the solution yet, though it
570 is probably in the base sources. Possibly a different way to calculate
573 /* 1 for registers that have pervasive standard uses and are not available
574 for the register allocator. Registers r14-r25 and x22-x29 are expected
575 to be preserved across function calls.
577 On the 88000, the standard uses of the General Register File (GRF) are:
578 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
579 Reg 1 = Subroutine return pointer (hardware).
580 Reg 2-9 = Parameter registers (OCS).
581 Reg 10 = OCS reserved temporary.
582 Reg 11 = Static link if needed [OCS reserved temporary].
583 Reg 12 = Address of structure return (OCS).
584 Reg 13 = OCS reserved temporary.
585 Reg 14-25 = Preserved register set.
586 Reg 26-29 = Reserved by OCS and ABI.
587 Reg 30 = Frame pointer (Common use).
588 Reg 31 = Stack pointer.
590 The following follows the current 88open UCS specification for the
591 Extended Register File (XRF):
592 Reg 32 = x0 Always equal to zero
593 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
594 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
595 Reg 62-63 = x30-x31 Reserved for future ABI use.
597 Note: The current 88110 extended register mapping is subject to change.
598 The bias towards caller-save registers is based on the
599 presumption that memory traffic can potentially be reduced by
600 allowing the "caller" to save only that part of the register
601 which is actually being used. (i.e. don't do a st.x if a st.d
602 is sufficient). Also, in scientific code (a.k.a. Fortran), the
603 large number of variables defined in common blocks may require
604 that almost all registers be saved across calls anyway. */
606 #define FIXED_REGISTERS \
607 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
608 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
609 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
610 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
612 /* 1 for registers not available across function calls.
613 These must include the FIXED_REGISTERS and also any
614 registers that can be used without being saved.
615 The latter must include the registers where values are returned
616 and the register where structure-value addresses are passed.
617 Aside from that, you can include as many other registers as you like. */
619 #define CALL_USED_REGISTERS \
620 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
621 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
622 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
623 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
625 /* Macro to conditionally modify fixed_regs/call_used_regs. */
626 #define CONDITIONAL_REGISTER_USAGE \
628 if (! TARGET_88110) \
631 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
634 call_used_regs[i] = 1; \
639 /* Current hack to deal with -fpic -O2 problems. */ \
640 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
641 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
642 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
646 /* These interfaces that don't apply to the m88000. */
647 /* OVERLAPPING_REGNO_P(REGNO) 0 */
648 /* INSN_CLOBBERS_REGNO_P(INSN, REGNO) 0 */
649 /* PRESERVE_DEATH_INFO_REGNO_P(REGNO) 0 */
651 /* True if register is an extended register. */
652 #define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
654 /* Return number of consecutive hard regs needed starting at reg REGNO
655 to hold something of mode MODE.
656 This is ordinarily the length in words of a value of mode MODE
657 but can be less for certain modes in special long registers.
659 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
660 An XRF register can hold any mode, but two GRF registers are required
662 #define HARD_REGNO_NREGS(REGNO, MODE) \
663 (XRF_REGNO_P (REGNO) \
664 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
666 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
668 For double integers, we never put the value into an odd register so that
669 the operators don't run into the situation where the high part of one of
670 the inputs is the low part of the result register. (It's ok if the output
671 registers are the same as the input registers.) The XRF registers can
672 hold all modes, but only DF and SF modes can be manipulated in these
673 registers. The compiler should be allowed to use these as a fast spill
675 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
676 (XRF_REGNO_P(REGNO) \
677 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
678 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
679 || ((REGNO) & 1) == 0))
681 /* Value is 1 if it is a good idea to tie two pseudo registers
682 when one has mode MODE1 and one has mode MODE2.
683 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
684 for any hard reg, then this must be 0 for correct output. */
685 #define MODES_TIEABLE_P(MODE1, MODE2) \
686 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
687 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
688 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
689 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
691 /* Specify the registers used for certain standard purposes.
692 The values of these macros are register numbers. */
694 /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
695 /* #define PC_REGNUM */
697 /* Register to use for pushing function arguments. */
698 #define STACK_POINTER_REGNUM 31
700 /* Base register for access to local variables of the function. */
701 #define FRAME_POINTER_REGNUM 30
703 /* Base register for access to arguments of the function. */
704 #define ARG_POINTER_REGNUM 0
706 /* Register used in cases where a temporary is known to be safe to use. */
707 #define TEMP_REGNUM 10
709 /* Register in which static-chain is passed to a function. */
710 #define STATIC_CHAIN_REGNUM 11
712 /* Register in which address to store a structure value
713 is passed to a function. */
714 #define STRUCT_VALUE_REGNUM 12
716 /* Register to hold the addressing base for position independent
717 code access to data items. */
718 #define PIC_OFFSET_TABLE_REGNUM 25
720 /* Order in which registers are preferred (most to least). Use temp
721 registers, then param registers top down. Preserve registers are
722 top down to maximize use of double memory ops for register save.
723 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
724 in most environments with the -fcall-used- or -fcall-saved- options. */
725 #define REG_ALLOC_ORDER \
727 13, 12, 11, 10, 29, 28, 27, 26, \
728 62, 63, 9, 8, 7, 6, 5, 4, \
729 3, 2, 1, 53, 52, 51, 50, 49, \
730 48, 47, 46, 45, 44, 43, 42, 41, \
731 40, 39, 38, 37, 36, 35, 34, 33, \
732 25, 24, 23, 22, 21, 20, 19, 18, \
733 17, 16, 15, 14, 61, 60, 59, 58, \
734 57, 56, 55, 54, 30, 31, 0, 32}
736 /* Order for leaf functions. */
737 #define REG_LEAF_ALLOC_ORDER \
739 9, 8, 7, 6, 13, 12, 11, 10, \
740 29, 28, 27, 26, 62, 63, 5, 4, \
741 3, 2, 0, 53, 52, 51, 50, 49, \
742 48, 47, 46, 45, 44, 43, 42, 41, \
743 40, 39, 38, 37, 36, 35, 34, 33, \
744 25, 24, 23, 22, 21, 20, 19, 18, \
745 17, 16, 15, 14, 61, 60, 59, 58, \
746 57, 56, 55, 54, 30, 31, 1, 32}
748 /* Switch between the leaf and non-leaf orderings. The purpose is to avoid
749 write-over scoreboard delays between caller and callee. */
750 #define ORDER_REGS_FOR_LOCAL_ALLOC \
752 static int leaf[] = REG_LEAF_ALLOC_ORDER; \
753 static int nonleaf[] = REG_ALLOC_ORDER; \
755 bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \
756 FIRST_PSEUDO_REGISTER * sizeof (int)); \
759 /*** Register Classes ***/
761 /* Define the classes of registers for register constraints in the
762 machine description. Also define ranges of constants.
764 One of the classes must always be named ALL_REGS and include all hard regs.
765 If there is more than one class, another class must be named NO_REGS
766 and contain no registers.
768 The name GENERAL_REGS must be the name of a class (or an alias for
769 another name such as ALL_REGS). This is the class of registers
770 that is allowed by "g" or "r" in a register constraint.
771 Also, registers outside this class are allocated only when
772 instructions express preferences for them.
774 The classes must be numbered in nondecreasing order; that is,
775 a larger-numbered class must never be contained completely
776 in a smaller-numbered class.
778 For any two classes, it is very desirable that there be another
779 class that represents their union. */
781 /* The m88000 hardware has two kinds of registers. In addition, we denote
782 the arg pointer as a separate class. */
784 enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
785 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
787 #define N_REG_CLASSES (int) LIM_REG_CLASSES
789 /* Give names of register classes as strings for dump file. */
790 #define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
791 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
793 /* Define which registers fit in which classes.
794 This is an initializer for a vector of HARD_REG_SET
795 of length N_REG_CLASSES. */
796 #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
797 {0x00000001, 0x00000000}, \
798 {0x00000000, 0xffffffff}, \
799 {0xfffffffe, 0x00000000}, \
800 {0xffffffff, 0x00000000}, \
801 {0xfffffffe, 0xffffffff}, \
802 {0xffffffff, 0xffffffff}}
804 /* The same information, inverted:
805 Return the class number of the smallest class containing
806 reg number REGNO. This could be a conditional expression
807 or could index an array. */
808 #define REGNO_REG_CLASS(REGNO) \
809 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
811 /* The class value for index registers, and the one for base regs. */
812 #define BASE_REG_CLASS AGRF_REGS
813 #define INDEX_REG_CLASS GENERAL_REGS
815 /* Get reg_class from a letter such as appears in the machine description.
816 For the 88000, the following class/letter is defined for the XRF:
817 x - Extended register file */
818 #define REG_CLASS_FROM_LETTER(C) \
819 (((C) == 'x') ? XRF_REGS : NO_REGS)
821 /* Macros to check register numbers against specific register classes.
822 These assume that REGNO is a hard or pseudo reg number.
823 They give nonzero only if REGNO is a hard reg of the suitable class
824 or a pseudo reg currently allocated to a suitable hard reg.
825 Since they use reg_renumber, they are safe only once reg_renumber
826 has been allocated, which happens in local-alloc.c. */
827 #define REGNO_OK_FOR_BASE_P(REGNO) \
828 ((REGNO) < FIRST_EXTENDED_REGISTER \
829 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
830 #define REGNO_OK_FOR_INDEX_P(REGNO) \
831 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
832 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
834 /* Given an rtx X being reloaded into a reg required to be
835 in class CLASS, return the class of reg to actually use.
836 In general this is just CLASS; but on some machines
837 in some cases it is preferable to use a more restrictive class.
838 Double constants should be in a register iff they can be made cheaply. */
839 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
840 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
842 /* Return the register class of a scratch register needed to load IN
843 into a register of class CLASS in MODE. On the m88k, when PIC, we
844 need a temporary when loading some addresses into a register. */
845 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
847 && GET_CODE (IN) == CONST \
848 && GET_CODE (XEXP (IN, 0)) == PLUS \
849 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
850 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
852 /* Return the maximum number of consecutive registers
853 needed to represent mode MODE in a register of class CLASS. */
854 #define CLASS_MAX_NREGS(CLASS, MODE) \
855 ((((CLASS) == XRF_REGS) ? 1 \
856 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
858 /* Letters in the range `I' through `P' in a register constraint string can
859 be used to stand for particular ranges of immediate operands. The C
860 expression is true iff C is a known letter and VALUE is appropriate for
863 For the m88000, the following constants are used:
864 `I' requires a non-negative 16-bit value.
865 `J' requires a non-positive 16-bit value.
866 `K' requires a non-negative value < 32.
867 `L' requires a constant with only the upper 16-bits set.
868 `M' requires constant values that can be formed with `set'.
869 `N' requires a negative value.
871 `P' requires a non-negative value. */
873 /* Quick tests for certain values. */
874 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
875 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
876 #define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
877 #define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
878 #define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
879 #define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
881 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
882 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
883 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
884 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
885 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
886 : (C) == 'M' ? integer_ok_for_set (VALUE) \
887 : (C) == 'N' ? (VALUE) < 0 \
888 : (C) == 'O' ? (VALUE) == 0 \
889 : (C) == 'P' ? (VALUE) >= 0 \
892 /* Similar, but for floating constants, and defining letters G and H.
893 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
894 constraints are: `G' requires zero, and `H' requires one or two. */
895 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
896 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
897 && CONST_DOUBLE_LOW (VALUE) == 0) \
900 /* Letters in the range `Q' through `U' in a register constraint string
901 may be defined in a machine-dependent fashion to stand for arbitrary
904 For the m88k, `Q' handles addresses in a call context. */
906 #define EXTRA_CONSTRAINT(OP, C) \
907 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
909 /*** Describing Stack Layout ***/
911 /* Define this if pushing a word on the stack moves the stack pointer
912 to a smaller address. */
913 #define STACK_GROWS_DOWNWARD
915 /* Define this if the addresses of local variable slots are at negative
916 offsets from the frame pointer. */
917 /* #define FRAME_GROWS_DOWNWARD */
919 /* Offset from the frame pointer to the first local variable slot to be
920 allocated. For the m88k, the debugger wants the return address (r1)
921 stored at location r30+4, and the previous frame pointer stored at
923 #define STARTING_FRAME_OFFSET 8
925 /* If we generate an insn to push BYTES bytes, this says how many the
926 stack pointer really advances by. The m88k has no push instruction. */
927 /* #define PUSH_ROUNDING(BYTES) */
929 /* If defined, the maximum amount of space required for outgoing arguments
930 will be computed and placed into the variable
931 `current_function_outgoing_args_size'. No space will be pushed
932 onto the stack for each call; instead, the function prologue should
933 increase the stack frame size by this amount. */
934 #define ACCUMULATE_OUTGOING_ARGS
936 /* Offset from the stack pointer register to the first location at which
937 outgoing arguments are placed. Use the default value zero. */
938 /* #define STACK_POINTER_OFFSET 0 */
940 /* Offset of first parameter from the argument pointer register value.
941 Using an argument pointer, this is 0 for the m88k. GCC knows
942 how to eliminate the argument pointer references if necessary. */
943 #define FIRST_PARM_OFFSET(FNDECL) 0
945 /* Define this if functions should assume that stack space has been
946 allocated for arguments even when their values are passed in
949 The value of this macro is the size, in bytes, of the area reserved for
950 arguments passed in registers.
952 This space can either be allocated by the caller or be a part of the
953 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
955 #define REG_PARM_STACK_SPACE(FNDECL) 32
957 /* Define this macro if REG_PARM_STACK_SPACE is defined but stack
958 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
959 Normally, when a parameter is not passed in registers, it is placed on
960 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
961 suppresses this behavior and causes the parameter to be passed on the
962 stack in its natural location. */
963 #define STACK_PARMS_IN_REG_PARM_AREA
965 /* Define this if it is the responsibility of the caller to allocate the
966 area reserved for arguments passed in registers. If
967 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
968 macro is to determine whether the space is included in
969 `current_function_outgoing_args_size'. */
970 /* #define OUTGOING_REG_PARM_STACK_SPACE */
972 /* Offset from the stack pointer register to an item dynamically allocated
973 on the stack, e.g., by `alloca'.
975 The default value for this macro is `STACK_POINTER_OFFSET' plus the
976 length of the outgoing arguments. The default is correct for most
977 machines. See `function.c' for details. */
978 /* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
980 /* Value is the number of bytes of arguments automatically
981 popped when returning from a subroutine call.
982 FUNDECL is the declaration node of the function (as a tree),
983 FUNTYPE is the data type of the function (as a tree),
984 or for a library call it is an identifier node for the subroutine name.
985 SIZE is the number of bytes of arguments passed on the stack. */
986 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
988 /* Define how to find the value returned by a function.
989 VALTYPE is the data type of the value (as a tree).
990 If the precise function being called is known, FUNC is its FUNCTION_DECL;
991 otherwise, FUNC is 0. */
992 #define FUNCTION_VALUE(VALTYPE, FUNC) \
994 TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
997 /* Define this if it differs from FUNCTION_VALUE. */
998 /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
1000 /* Disable the promotion of some structures and unions to registers. */
1001 #define RETURN_IN_MEMORY(TYPE) \
1002 (TYPE_MODE (TYPE) == BLKmode \
1003 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
1004 && !(TYPE_MODE (TYPE) == SImode \
1005 || (TYPE_MODE (TYPE) == BLKmode \
1006 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
1007 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
1009 /* Don't default to pcc-struct-return, because we have already specified
1010 exactly how to return structures in the RETURN_IN_MEMORY macro. */
1011 #define DEFAULT_PCC_STRUCT_RETURN 0
1013 /* Define how to find the value returned by a library function
1014 assuming the value has mode MODE. */
1015 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
1017 /* True if N is a possible register number for a function value
1018 as seen by the caller. */
1019 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
1021 /* Determine whether a function argument is passed in a register, and
1022 which register. See m88k.c. */
1023 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1024 m88k_function_arg (CUM, MODE, TYPE, NAMED)
1026 /* Define this if it differs from FUNCTION_ARG. */
1027 /* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
1029 /* A C expression for the number of words, at the beginning of an
1030 argument, must be put in registers. The value must be zero for
1031 arguments that are passed entirely in registers or that are entirely
1032 pushed on the stack. */
1033 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1035 /* A C expression that indicates when an argument must be passed by
1036 reference. If nonzero for an argument, a copy of that argument is
1037 made in memory and a pointer to the argument is passed instead of the
1038 argument itself. The pointer is passed in whatever way is appropriate
1039 for passing a pointer to that type. */
1040 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
1042 /* A C type for declaring a variable that is used as the first argument
1043 of `FUNCTION_ARG' and other related values. It suffices to count
1044 the number of words of argument so far. */
1045 #define CUMULATIVE_ARGS int
1047 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
1048 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
1049 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
1051 /* A C statement (sans semicolon) to update the summarizer variable
1052 CUM to advance past an argument in the argument list. The values
1053 MODE, TYPE and NAMED describe that argument. Once this is done,
1054 the variable CUM is suitable for analyzing the *following* argument
1055 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
1056 information may not be available.) */
1057 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1059 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
1061 && (__mode == DImode || __mode == DFmode \
1062 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
1064 CUM += (((__mode != BLKmode) \
1065 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
1069 /* True if N is a possible register number for function argument passing.
1070 On the m88000, these are registers 2 through 9. */
1071 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
1073 /* A C expression which determines whether, and in which direction,
1074 to pad out an argument with extra space. The value should be of
1075 type `enum direction': either `upward' to pad above the argument,
1076 `downward' to pad below, or `none' to inhibit padding.
1078 This macro does not control the *amount* of padding; that is always
1079 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1080 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1081 ((MODE) == BLKmode \
1082 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1083 || TREE_CODE (TYPE) == UNION_TYPE)) \
1084 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1086 /* If defined, a C expression that gives the alignment boundary, in bits,
1087 of an argument with the specified mode and type. If it is not defined,
1088 `PARM_BOUNDARY' is used for all arguments. */
1089 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1090 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1091 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1093 /* Generate necessary RTL for __builtin_saveregs().
1094 ARGLIST is the argument list; see expr.c. */
1095 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) m88k_builtin_saveregs (ARGLIST)
1097 /* Generate the assembly code for function entry. */
1098 #define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE)
1100 /* Perform special actions at the point where the prologue ends. */
1101 #define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE)
1103 /* Output assembler code to FILE to increment profiler label # LABELNO
1104 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1106 #define FUNCTION_PROFILER(FILE, LABELNO) \
1107 output_function_profiler (FILE, LABELNO, "mcount", 1)
1109 /* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1110 #define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1112 /* Output assembler code to FILE to initialize basic-block profiling for
1113 the current module. LABELNO is unique to each instance. */
1114 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1115 output_function_block_profiler (FILE, LABELNO)
1117 /* Maximum length in instructions of the code output by
1118 FUNCTION_BLOCK_PROFILER. */
1119 #define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1121 /* Output assembler code to FILE to increment the count associated with
1122 the basic block number BLOCKNO. */
1123 #define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1125 /* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1126 #define BLOCK_PROFILER_LENGTH 4
1128 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1129 the stack pointer does not matter. The value is tested only in
1130 functions that have frame pointers.
1131 No definition is equivalent to always zero. */
1132 #define EXIT_IGNORE_STACK (1)
1134 /* Generate the assembly code for function exit. */
1135 #define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE)
1137 /* Perform special actions at the point where the epilogue begins. */
1138 #define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE)
1140 /* Value should be nonzero if functions must have frame pointers.
1141 Zero means the frame pointer need not be set up (and parms
1142 may be accessed via the stack pointer) in functions that seem suitable.
1143 This is computed in `reload', in reload1.c. */
1144 #define FRAME_POINTER_REQUIRED \
1145 (current_function_varargs \
1146 || (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \
1147 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1149 /* Definitions for register eliminations.
1151 We have two registers that can be eliminated on the m88k. First, the
1152 frame pointer register can often be eliminated in favor of the stack
1153 pointer register. Secondly, the argument pointer register can always be
1154 eliminated; it is replaced with either the stack or frame pointer. */
1156 /* This is an array of structures. Each structure initializes one pair
1157 of eliminable registers. The "from" register number is given first,
1158 followed by "to". Eliminations of the same "from" register are listed
1159 in order of preference. */
1160 #define ELIMINABLE_REGS \
1161 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1162 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1163 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1165 /* Given FROM and TO register numbers, say whether this elimination
1167 #define CAN_ELIMINATE(FROM, TO) \
1168 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1170 /* Define the offset between two registers, one to be eliminated, and the other
1171 its replacement, at the start of a routine. */
1172 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1173 { m88k_layout_frame (); \
1174 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1175 (OFFSET) = m88k_fp_offset; \
1176 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1177 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1178 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1179 (OFFSET) = m88k_stack_size; \
1184 /*** Trampolines for Nested Functions ***/
1186 /* Output assembler code for a block containing the constant parts
1187 of a trampoline, leaving space for the variable parts.
1189 This block is placed on the stack and filled in. It is aligned
1190 0 mod 128 and those portions that are executed are constant.
1191 This should work for instruction caches that have cache lines up
1192 to the aligned amount (128 is arbitrary), provided no other code
1193 producer is attempting to play the same game. This of course is
1194 in violation of any number of 88open standards. */
1196 #define TRAMPOLINE_TEMPLATE(FILE) \
1199 static int labelno = 0; \
1201 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
1202 /* Save the return address (r1) in the static chain reg (r11). */ \
1203 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1204 /* Locate this block; transfer to the next instruction. */ \
1205 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1206 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
1207 /* Save r10; use it as the relative pointer; restore r1. */ \
1208 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1209 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1210 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1211 /* Load the function's address and go there. */ \
1212 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1213 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1214 /* Restore r10 and load the static chain register. */ \
1215 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1216 /* Storage: r10 save area, static chain, function address. */ \
1217 ASM_OUTPUT_INT (FILE, const0_rtx); \
1218 ASM_OUTPUT_INT (FILE, const0_rtx); \
1219 ASM_OUTPUT_INT (FILE, const0_rtx); \
1222 /* Length in units of the trampoline for entering a nested function.
1223 This is really two components. The first 32 bytes are fixed and
1224 must be copied; the last 12 bytes are just storage that's filled
1225 in later. So for allocation purposes, it's 32+12 bytes, but for
1226 initialization purposes, it's 32 bytes. */
1228 #define TRAMPOLINE_SIZE (32+12)
1230 /* Alignment required for a trampoline. 128 is used to find the
1231 beginning of a line in the instruction cache and to allow for
1232 instruction cache lines of up to 128 bytes. */
1234 #define TRAMPOLINE_ALIGNMENT 128
1236 /* Emit RTL insns to initialize the variable parts of a trampoline.
1237 FNADDR is an RTX for the address of the function's pure code.
1238 CXT is an RTX for the static chain value for the function. */
1240 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1242 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
1243 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
1246 /*** Library Subroutine Names ***/
1248 /* Define this macro if GNU CC should generate calls to the System V
1249 (and ANSI C) library functions `memcpy' and `memset' rather than
1250 the BSD functions `bcopy' and `bzero'. */
1251 #define TARGET_MEM_FUNCTIONS
1253 /*** Addressing Modes ***/
1255 #define EXTRA_CC_MODES CCEVENmode
1257 #define EXTRA_CC_NAMES "CCEVEN"
1259 #define SELECT_CC_MODE(OP,X,Y) CCmode
1261 /* #define HAVE_POST_INCREMENT */
1262 /* #define HAVE_POST_DECREMENT */
1264 /* #define HAVE_PRE_DECREMENT */
1265 /* #define HAVE_PRE_INCREMENT */
1267 /* Recognize any constant value that is a valid address.
1268 When PIC, we do not accept an address that would require a scratch reg
1269 to load into a register. */
1271 #define CONSTANT_ADDRESS_P(X) \
1272 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1273 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1274 || (GET_CODE (X) == CONST \
1275 && ! (flag_pic && pic_address_needs_scratch (X))))
1278 /* Maximum number of registers that can appear in a valid memory address. */
1279 #define MAX_REGS_PER_ADDRESS 2
1281 /* The condition for memory shift insns. */
1282 #define SCALED_ADDRESS_P(ADDR) \
1283 (GET_CODE (ADDR) == PLUS \
1284 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1285 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1287 /* Can the reference to X be made short? */
1288 #define SHORT_ADDRESS_P(X,TEMP) \
1289 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1290 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1292 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1293 that is a valid memory address for an instruction.
1294 The MODE argument is the machine mode for the MEM expression
1295 that wants to use this address.
1297 On the m88000, a legitimate address has the form REG, REG+REG,
1298 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1300 The register elimination process should deal with the argument
1301 pointer and frame pointer changing to REG+SMALLINT. */
1303 #define LEGITIMATE_INDEX_P(X, MODE) \
1304 ((GET_CODE (X) == CONST_INT \
1307 && REG_OK_FOR_INDEX_P (X)) \
1308 || (GET_CODE (X) == MULT \
1309 && REG_P (XEXP (X, 0)) \
1310 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1311 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1312 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1314 #define RTX_OK_FOR_BASE_P(X) \
1315 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1316 || (GET_CODE (X) == SUBREG \
1317 && GET_CODE (SUBREG_REG (X)) == REG \
1318 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1320 #define RTX_OK_FOR_INDEX_P(X) \
1321 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1322 || (GET_CODE (X) == SUBREG \
1323 && GET_CODE (SUBREG_REG (X)) == REG \
1324 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1326 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1331 if (REG_OK_FOR_BASE_P (X)) \
1334 else if (GET_CODE (X) == PLUS) \
1336 register rtx _x0 = XEXP (X, 0); \
1337 register rtx _x1 = XEXP (X, 1); \
1339 && _x0 == pic_offset_table_rtx \
1341 ? RTX_OK_FOR_BASE_P (_x1) \
1342 : (GET_CODE (_x1) == SYMBOL_REF \
1343 || GET_CODE (_x1) == LABEL_REF))) \
1345 && (REG_OK_FOR_BASE_P (_x0) \
1346 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1348 && (REG_OK_FOR_BASE_P (_x1) \
1349 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1352 else if (GET_CODE (X) == LO_SUM) \
1354 register rtx _x0 = XEXP (X, 0); \
1355 register rtx _x1 = XEXP (X, 1); \
1357 && REG_OK_FOR_BASE_P (_x0)) \
1358 || (GET_CODE (_x0) == SUBREG \
1359 && REG_P (SUBREG_REG (_x0)) \
1360 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1361 && CONSTANT_P (_x1)) \
1364 else if (GET_CODE (X) == CONST_INT \
1367 else if (SHORT_ADDRESS_P (X, _x)) \
1371 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1372 and check its validity for a certain class.
1373 We have two alternate definitions for each of them.
1374 The usual definition accepts all pseudo regs; the other rejects
1375 them unless they have been allocated suitable hard regs.
1376 The symbol REG_OK_STRICT causes the latter definition to be used.
1378 Most source files want to accept pseudo regs in the hope that
1379 they will get allocated to the class that the insn wants them to be in.
1380 Source files for reload pass need to be strict.
1381 After reload, it makes no difference, since pseudo regs have
1382 been eliminated by then. */
1384 #ifndef REG_OK_STRICT
1386 /* Nonzero if X is a hard reg that can be used as an index
1387 or if it is a pseudo reg. Not the argument pointer. */
1388 #define REG_OK_FOR_INDEX_P(X) \
1389 (!XRF_REGNO_P(REGNO (X)))
1390 /* Nonzero if X is a hard reg that can be used as a base reg
1391 or if it is a pseudo reg. */
1392 #define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
1396 /* Nonzero if X is a hard reg that can be used as an index. */
1397 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1398 /* Nonzero if X is a hard reg that can be used as a base reg. */
1399 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1403 /* Try machine-dependent ways of modifying an illegitimate address
1404 to be legitimate. If we find one, return the new, valid address.
1405 This macro is used in only one place: `memory_address' in explow.c.
1407 OLDX is the address as it was before break_out_memory_refs was called.
1408 In some cases it is useful to look at this to decide what needs to be done.
1410 MODE and WIN are passed so that this macro can use
1411 GO_IF_LEGITIMATE_ADDRESS.
1413 It is always safe for this macro to do nothing. It exists to recognize
1414 opportunities to optimize the output. */
1416 /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1418 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1420 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1421 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1422 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1423 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1424 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1425 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1426 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1427 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1428 force_operand (XEXP (X, 0), 0)); \
1429 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1430 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1431 force_operand (XEXP (X, 1), 0)); \
1432 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1433 (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1435 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1436 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
1437 force_operand (XEXP (X, 1), NULL_RTX)); \
1438 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1439 || GET_CODE (X) == LABEL_REF) \
1440 (X) = legitimize_address (flag_pic, X, 0, 0); \
1441 if (memory_address_p (MODE, X)) \
1444 /* Go to LABEL if ADDR (a legitimate address expression)
1445 has an effect that depends on the machine mode it is used for.
1446 On the the m88000 this is never true. */
1448 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1450 /* Nonzero if the constant value X is a legitimate general operand.
1451 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1452 #define LEGITIMATE_CONSTANT_P(X) (1)
1454 /* Define this, so that when PIC, reload won't try to reload invalid
1455 addresses which require two reload registers. */
1457 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1460 /*** Condition Code Information ***/
1462 /* C code for a data type which is used for declaring the `mdep'
1463 component of `cc_status'. It defaults to `int'. */
1464 /* #define CC_STATUS_MDEP int */
1466 /* A C expression to initialize the `mdep' field to "empty". */
1467 /* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1469 /* Macro to zap the normal portions of CC_STATUS, but leave the
1470 machine dependent parts (ie, literal synthesis) alone. */
1471 /* #define CC_STATUS_INIT_NO_MDEP \
1472 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1474 /* When using a register to hold the condition codes, the cc_status
1475 mechanism cannot be used. */
1476 #define NOTICE_UPDATE_CC(EXP, INSN) (0)
1478 /*** Miscellaneous Parameters ***/
1480 /* Define the codes that are matched by predicates in m88k.c. */
1481 #define PREDICATE_CODES \
1482 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1483 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1484 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1485 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1486 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1487 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1488 {"int5_operand", {CONST_INT}}, \
1489 {"int32_operand", {CONST_INT}}, \
1490 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1491 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1492 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1493 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1494 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
1495 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \
1496 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \
1497 {"partial_ccmode_register_operand", { SUBREG, REG}}, \
1498 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1499 {"equality_op", {EQ, NE}}, \
1500 {"pc_or_label_ref", {PC, LABEL_REF}},
1502 /* The case table contains either words or branch instructions. This says
1503 which. We always claim that the vector is PC-relative. It is position
1504 independent when -fpic is used. */
1505 #define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1507 /* An alias for a machine mode name. This is the machine mode that
1508 elements of a jump-table should have. */
1509 #define CASE_VECTOR_MODE SImode
1511 /* Define this macro if jump-tables should contain relative addresses. */
1512 #define CASE_VECTOR_PC_RELATIVE
1514 /* Define this if control falls through a `case' insn when the index
1515 value is out of range. This means the specified default-label is
1516 actually ignored by the `case' insn proper. */
1517 /* #define CASE_DROPS_THROUGH */
1519 /* Define this to be the smallest number of different values for which it
1520 is best to use a jump-table instead of a tree of conditional branches.
1521 The default is 4 for machines with a casesi instruction and 5 otherwise.
1522 The best 88110 number is around 7, though the exact number isn't yet
1523 known. A third alternative for the 88110 is to use a binary tree of
1524 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1525 win very much though. */
1526 #define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1528 /* Specify the tree operation to be used to convert reals to integers. */
1529 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1531 /* This is the kind of divide that is easiest to do in the general case. */
1532 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1534 /* Define this as 1 if `char' should by default be signed; else as 0. */
1535 #define DEFAULT_SIGNED_CHAR 1
1537 /* The 88open ABI says size_t is unsigned int. */
1538 #define SIZE_TYPE "unsigned int"
1540 /* Allow and ignore #sccs directives */
1541 #define SCCS_DIRECTIVE
1543 /* Handle #pragma pack and sometimes #pragma weak. */
1544 #define HANDLE_SYSV_PRAGMA
1546 /* Tell when to handle #pragma weak. This is only done for V.4. */
1547 #define SUPPORTS_WEAK TARGET_SVR4
1549 /* Max number of bytes we can move from memory to memory
1550 in one reasonably fast instruction. */
1553 /* Define if normal loads of shorter-than-word items from memory clears
1554 the rest of the bigs in the register. */
1555 #define BYTE_LOADS_ZERO_EXTEND
1557 /* Zero if access to memory by bytes is faster. */
1558 #define SLOW_BYTE_ACCESS 1
1560 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1561 is done just by pretending it is already truncated. */
1562 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1564 /* Define this if addresses of constant functions
1565 shouldn't be put through pseudo regs where they can be cse'd.
1566 Desirable on machines where ordinary constants are expensive
1567 but a CALL with constant address is cheap. */
1568 #define NO_FUNCTION_CSE
1570 /* Define this macro if an argument declared as `char' or
1571 `short' in a prototype should actually be passed as an
1572 `int'. In addition to avoiding errors in certain cases of
1573 mismatch, it also makes for better code on certain machines. */
1574 #define PROMOTE_PROTOTYPES
1576 /* Define this macro if a float function always returns float
1577 (even in traditional mode). Redefined in luna.h. */
1578 #define TRADITIONAL_RETURN_FLOAT
1580 /* We assume that the store-condition-codes instructions store 0 for false
1581 and some other value for true. This is the value stored for true. */
1582 #define STORE_FLAG_VALUE -1
1584 /* Specify the machine mode that pointers have.
1585 After generation of rtl, the compiler makes no further distinction
1586 between pointers and any other objects of this machine mode. */
1587 #define Pmode SImode
1589 /* A function address in a call instruction
1590 is a word address (for indexing purposes)
1591 so give the MEM rtx word mode. */
1592 #define FUNCTION_MODE SImode
1594 /* A barrier will be aligned so account for the possible expansion.
1595 A volatile load may be preceded by a serializing instruction.
1596 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1597 Account for block profiling code at basic block boundaries. */
1598 #define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1599 if (GET_CODE (RTX) == BARRIER \
1600 || (TARGET_SERIALIZE_VOLATILE \
1601 && GET_CODE (RTX) == INSN \
1602 && GET_CODE (PATTERN (RTX)) == SET \
1603 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
1604 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1606 else if (GET_CODE (RTX) == NOTE \
1607 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1609 if (profile_block_flag) \
1610 LENGTH += FUNCTION_BLOCK_PROFILER_LENGTH; \
1612 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1613 + REG_POP_LENGTH); \
1615 else if (profile_block_flag \
1616 && (GET_CODE (RTX) == CODE_LABEL \
1617 || GET_CODE (RTX) == JUMP_INSN \
1618 || (GET_CODE (RTX) == INSN \
1619 && GET_CODE (PATTERN (RTX)) == SEQUENCE \
1620 && GET_CODE (XVECEXP (PATTERN (RTX), 0, 0)) == JUMP_INSN)))\
1621 LENGTH += BLOCK_PROFILER_LENGTH;
1623 /* Track the state of the last volatile memory reference. Clear the
1624 state with CC_STATUS_INIT for now. */
1625 #define CC_STATUS_INIT m88k_volatile_code = '\0'
1627 /* Compute the cost of computing a constant rtl expression RTX
1628 whose rtx-code is CODE. The body of this macro is a portion
1629 of a switch statement. If the code is computed here,
1630 return it with a return statement. Otherwise, break from the switch.
1632 We assume that any 16 bit integer can easily be recreated, so we
1633 indicate 0 cost, in an attempt to get GCC not to optimize things
1634 like comparison against a constant.
1636 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1637 is as good as a register; since it can't be placed in any insn, it
1638 won't do anything in cse, but it will cause expand_binop to pass the
1639 constant to the define_expands). */
1640 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1642 if (SMALL_INT (RTX)) \
1644 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1646 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1655 return (flag_pic == 2) ? 11 : 8; \
1657 case CONST_DOUBLE: \
1660 /* Provide the costs of an addressing mode that contains ADDR.
1661 If ADDR is not a valid address, its cost is irrelevant.
1662 REG+REG is made slightly more expensive because it might keep
1663 a register live for longer than we might like. */
1664 #define ADDRESS_COST(ADDR) \
1665 (GET_CODE (ADDR) == REG ? 1 : \
1666 GET_CODE (ADDR) == LO_SUM ? 1 : \
1667 GET_CODE (ADDR) == HIGH ? 2 : \
1668 GET_CODE (ADDR) == MULT ? 1 : \
1669 GET_CODE (ADDR) != PLUS ? 4 : \
1670 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1672 /* Provide the costs of a rtl expression. This is in the body of a
1674 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1676 return COSTS_N_INSNS (2); \
1678 return COSTS_N_INSNS (3); \
1683 return COSTS_N_INSNS (38);
1685 /* A C expressions returning the cost of moving data of MODE from a register
1686 to or from memory. This is more costly than between registers. */
1687 #define MEMORY_MOVE_COST(MODE) 4
1689 /* Provide the cost of a branch. Exact meaning under development. */
1690 #define BRANCH_COST (TARGET_88100 ? 1 : 2)
1692 /* A C statement (sans semicolon) to update the integer variable COST
1693 based on the relationship between INSN that is dependent on
1694 DEP_INSN through the dependence LINK. The default is to make no
1695 adjustment to COST. On the m88k, ignore the cost of anti- and
1696 output-dependencies. On the m88100, a store can issue two cycles
1697 before the value (not the address) has finished computing. */
1698 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1700 if (REG_NOTE_KIND (LINK) != 0) \
1701 (COST) = 0; /* Anti or output dependence. */ \
1702 else if (! TARGET_88100 \
1703 && recog_memoized (INSN) >= 0 \
1704 && get_attr_type (INSN) == TYPE_STORE \
1705 && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \
1706 (COST) -= 4; /* 88110 store reservation station. */ \
1709 /* Define this to be nonzero if the character `$' should be allowed
1710 by default in identifier names. */
1711 #define DOLLARS_IN_IDENTIFIERS 1
1713 /* Do not break .stabs pseudos into continuations. */
1714 #define DBX_CONTIN_LENGTH 0
1716 /*** Output of Assembler Code ***/
1718 /* Control the assembler format that we output. */
1720 /* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1722 #undef ASCII_DATA_ASM_OP
1723 #undef CONST_SECTION_ASM_OP
1724 #undef CTORS_SECTION_ASM_OP
1725 #undef DTORS_SECTION_ASM_OP
1726 #undef INIT_SECTION_ASM_OP
1727 #undef FINI_SECTION_ASM_OP
1732 #undef COMMON_ASM_OP
1736 /* These are used in varasm.c as well. */
1737 #define TEXT_SECTION_ASM_OP "text"
1738 #define DATA_SECTION_ASM_OP "data"
1740 /* Other sections. */
1741 #define CONST_SECTION_ASM_OP (TARGET_SVR4 \
1742 ? "section\t .rodata,\"a\"" \
1743 : "section\t .rodata,\"x\"")
1744 #define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
1745 ? "section\t .tdesc,\"a\"" \
1746 : "section\t .tdesc,\"x\"")
1748 /* These must be constant strings for crtstuff.c. */
1749 #define CTORS_SECTION_ASM_OP "section\t .ctors,\"d\""
1750 #define DTORS_SECTION_ASM_OP "section\t .dtors,\"d\""
1751 #define INIT_SECTION_ASM_OP "section\t .init,\"x\""
1752 #define FINI_SECTION_ASM_OP "section\t .fini,\"x\""
1754 /* These are pretty much common to all assemblers. */
1755 #define IDENT_ASM_OP "ident"
1756 #define FILE_ASM_OP "file"
1757 #define SECTION_ASM_OP "section"
1758 #define SET_ASM_OP "def"
1759 #define GLOBAL_ASM_OP "global"
1760 #define ALIGN_ASM_OP "align"
1761 #define SKIP_ASM_OP "zero"
1762 #define COMMON_ASM_OP "comm"
1763 #define BSS_ASM_OP "bss"
1764 #define FLOAT_ASM_OP "float"
1765 #define DOUBLE_ASM_OP "double"
1766 #define INT_ASM_OP "word"
1767 #define ASM_LONG INT_ASM_OP
1768 #define SHORT_ASM_OP "half"
1769 #define CHAR_ASM_OP "byte"
1770 #define ASCII_DATA_ASM_OP "string"
1772 /* These are particular to the global pool optimization. */
1773 #define SBSS_ASM_OP "sbss"
1774 #define SCOMM_ASM_OP "scomm"
1775 #define SDATA_SECTION_ASM_OP "sdata"
1777 /* These are specific to PIC. */
1778 #define TYPE_ASM_OP "type"
1779 #define SIZE_ASM_OP "size"
1780 #ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1781 #undef TYPE_OPERAND_FMT
1782 #define TYPE_OPERAND_FMT "#%s"
1785 /* This is how we tell the assembler that a symbol is weak. */
1787 #undef ASM_WEAKEN_LABEL
1788 #define ASM_WEAKEN_LABEL(FILE,NAME) \
1789 do { fputs ("\tweak\t", FILE); assemble_name (FILE, NAME); \
1790 fputc ('\n', FILE); } while (0)
1792 /* These are specific to version 03.00 assembler syntax. */
1793 #define INTERNAL_ASM_OP "local"
1794 #define VERSION_ASM_OP "version"
1795 #define UNALIGNED_SHORT_ASM_OP "uahalf"
1796 #define UNALIGNED_INT_ASM_OP "uaword"
1797 #define PUSHSECTION_ASM_OP "section"
1798 #define POPSECTION_ASM_OP "previous"
1800 /* These are specific to the version 04.00 assembler syntax. */
1801 #define REQUIRES_88110_ASM_OP "requires_88110"
1803 /* Output any initial stuff to the assembly file. Always put out
1804 a file directive, even if not debugging.
1806 Immediately after putting out the file, put out a "sem.<value>"
1807 declaration. This should be harmless on other systems, and
1808 is used in DG/UX by the debuggers to supplement COFF. The
1809 fields in the integer value are as follows:
1813 0-1 0 No information about stack locations
1814 1 Auto/param locations are based on r30
1815 2 Auto/param locations are based on CFA
1817 3-2 0 No information on dimension order
1818 1 Array dims in sym table matches source language
1819 2 Array dims in sym table is in reverse order
1821 5-4 0 No information about the case of global names
1822 1 Global names appear in the symbol table as in the source
1823 2 Global names have been converted to lower case
1824 3 Global names have been converted to upper case. */
1826 #ifdef SDB_DEBUGGING_INFO
1827 #define ASM_COFFSEM(FILE) \
1828 if (write_symbols == SDB_DEBUG) \
1830 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1831 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1832 (TARGET_OCS_FRAME_POSITION) \
1833 ? "frame is CFA, normal array dims, case unchanged" \
1834 : "frame is r30, normal array dims, case unchanged"); \
1837 #define ASM_COFFSEM(FILE)
1840 /* Output the first line of the assembly file. Redefined in dgux.h. */
1842 #define ASM_FIRST_LINE(FILE) \
1847 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "04.00"); \
1849 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "03.00"); \
1853 /* Override svr[34].h. */
1854 #undef ASM_FILE_START
1855 #define ASM_FILE_START(FILE) \
1856 output_file_start (FILE, f_options, sizeof f_options / sizeof f_options[0], \
1857 W_options, sizeof W_options / sizeof W_options[0])
1861 #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
1862 fprintf (FILE, "\t%s\t \"%s\"\n", FILE_ASM_OP, NAME)
1864 #ifdef SDB_DEBUGGING_INFO
1865 #undef ASM_OUTPUT_SOURCE_LINE
1866 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1867 if (m88k_prologue_done) \
1868 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1869 LINE - sdb_begin_function_line, LINE)
1872 /* Code to handle #ident directives. Override svr[34].h definition. */
1873 #undef ASM_OUTPUT_IDENT
1874 #ifdef DBX_DEBUGGING_INFO
1875 #define ASM_OUTPUT_IDENT(FILE, NAME)
1877 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1878 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
1881 /* Output to assembler file text saying following lines
1882 may contain character constants, extra white space, comments, etc. */
1883 #define ASM_APP_ON ""
1885 /* Output to assembler file text saying following lines
1886 no longer contain unusual constructs. */
1887 #define ASM_APP_OFF ""
1889 /* Format the assembly opcode so that the arguments are all aligned.
1890 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1891 space will do to align the output. Abandon the output if a `%' is
1893 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1898 for (orig_ptr = (PTR); \
1899 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1901 putc (ch, STREAM); \
1903 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1904 putc ('\t', STREAM); \
1907 /* How to refer to registers in assembler output.
1908 This sequence is indexed by compiler's hard-register-number.
1909 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1911 #define REGISTER_NAMES \
1912 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1913 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1914 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
1915 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1916 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1917 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1918 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1919 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
1921 /* Define additional names for use in asm clobbers and asm declarations.
1923 We define the fake Condition Code register as an alias for reg 0 (which
1924 is our `condition code' register), so that condition codes can easily
1925 be clobbered by an asm. The carry bit in the PSR is now used. */
1927 #define ADDITIONAL_REGISTER_NAMES {"psr", 0, "cc", 0}
1929 /* How to renumber registers for dbx and gdb. */
1930 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1932 /* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1933 #undef DECLARE_ASM_NAME
1934 #define DECLARE_ASM_NAME TARGET_SVR4
1936 /* Write the extra assembler code needed to declare a function properly. */
1937 #undef ASM_DECLARE_FUNCTION_NAME
1938 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1940 if (DECLARE_ASM_NAME) \
1942 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1943 assemble_name (FILE, NAME); \
1945 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1946 putc ('\n', FILE); \
1948 ASM_OUTPUT_LABEL(FILE, NAME); \
1951 /* Write the extra assembler code needed to declare an object properly. */
1952 #undef ASM_DECLARE_OBJECT_NAME
1953 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1955 if (DECLARE_ASM_NAME) \
1957 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1958 assemble_name (FILE, NAME); \
1960 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1961 putc ('\n', FILE); \
1962 size_directive_output = 0; \
1963 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1965 size_directive_output = 1; \
1966 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1967 assemble_name (FILE, NAME); \
1968 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1971 ASM_OUTPUT_LABEL(FILE, NAME); \
1974 /* Output the size directive for a decl in rest_of_decl_compilation
1975 in the case where we did not do so before the initializer.
1976 Once we find the error_mark_node, we know that the value of
1977 size_directive_output was set
1978 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1980 #undef ASM_FINISH_DECLARE_OBJECT
1981 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1983 char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1984 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
1985 && DECLARE_ASM_NAME \
1986 && ! AT_END && TOP_LEVEL \
1987 && DECL_INITIAL (DECL) == error_mark_node \
1988 && !size_directive_output) \
1990 size_directive_output = 1; \
1991 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1992 assemble_name (FILE, name); \
1993 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1997 /* This is how to declare the size of a function. */
1998 #undef ASM_DECLARE_FUNCTION_SIZE
1999 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
2001 if (DECLARE_ASM_NAME) \
2003 if (!flag_inhibit_size_directive) \
2006 static int labelno = 0; \
2008 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
2009 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
2010 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
2011 assemble_name (FILE, (FNAME)); \
2012 fprintf (FILE, ",%s-", &label[1]); \
2013 assemble_name (FILE, (FNAME)); \
2014 putc ('\n', FILE); \
2019 /* This is how to output the definition of a user-level label named NAME,
2020 such as the label on a static function or variable NAME. */
2021 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2022 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
2024 /* This is how to output a command to make the user-level label named NAME
2025 defined for reference from other files. */
2026 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2028 fprintf (FILE, "\t%s\t ", GLOBAL_ASM_OP); \
2029 assemble_name (FILE, NAME); \
2030 putc ('\n', FILE); \
2033 /* This is how to output a reference to a user-level label named NAME.
2034 Override svr[34].h. */
2035 #undef ASM_OUTPUT_LABELREF
2036 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2038 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
2039 fputc ('_', FILE); \
2040 fputs (NAME, FILE); \
2043 /* This is how to output an internal numbered label where
2044 PREFIX is the class of label and NUM is the number within the class.
2045 For V.4, labels use `.' rather than `@'. */
2047 #undef ASM_OUTPUT_INTERNAL_LABEL
2048 #ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
2049 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2050 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n\t%s\t .%s%d\n" : "@%s%d:\n", \
2051 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
2053 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2054 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
2055 #endif /* AS_BUG_DOT_LABELS */
2057 /* This is how to store into the string LABEL
2058 the symbol_ref name of an internal numbered label where
2059 PREFIX is the class of label and NUM is the number within the class.
2060 This is suitable for output with `assemble_name'. This must agree
2061 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
2064 #undef ASM_GENERATE_INTERNAL_LABEL
2065 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2066 sprintf (LABEL, TARGET_SVR4 ? "*.%s%d" : "*@%s%d", PREFIX, NUM)
2068 /* Internal macro to get a single precision floating point value into
2069 an int, so we can print it's value in hex. */
2070 #define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \
2072 REAL_VALUE_TYPE d; \
2074 unsigned sign : 1; \
2075 unsigned exponent1 : 1; \
2076 unsigned exponent2 : 3; \
2077 unsigned exponent3 : 7; \
2078 unsigned mantissa1 : 20; \
2079 unsigned mantissa2 : 3; \
2080 unsigned mantissa3 : 29; \
2087 unsigned sign : 1; \
2088 unsigned exponent1 : 1; \
2089 unsigned exponent3 : 7; \
2090 unsigned mantissa1 : 20; \
2091 unsigned mantissa2 : 3; \
2095 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \
2096 _u2.s.sign = _u.s.sign; \
2097 _u2.s.exponent1 = _u.s.exponent1; \
2098 _u2.s.exponent3 = _u.s.exponent3; \
2099 _u2.s.mantissa1 = _u.s.mantissa1; \
2100 _u2.s.mantissa2 = _u.s.mantissa2; \
2104 /* This is how to output an assembler line defining a `double' constant.
2105 Use "word" pseudos to avoid printing NaNs, infinity, etc. */
2106 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2108 union { REAL_VALUE_TYPE d; long l[2]; } x; \
2110 fprintf (FILE, "\t%s\t 0x%.8x, 0x%.8x\n", INT_ASM_OP, \
2114 /* This is how to output an assembler line defining a `float' constant. */
2115 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2118 FLOAT_TO_INT_INTERNAL (VALUE, i); \
2119 fprintf (FILE, "\t%s\t 0x%.8x\n", INT_ASM_OP, i); \
2122 /* Likewise for `int', `short', and `char' constants. */
2123 #define ASM_OUTPUT_INT(FILE,VALUE) \
2124 ( fprintf (FILE, "\t%s\t ", INT_ASM_OP), \
2125 output_addr_const (FILE, (VALUE)), \
2126 fprintf (FILE, "\n"))
2128 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2129 ( fprintf (FILE, "\t%s\t ", SHORT_ASM_OP), \
2130 output_addr_const (FILE, (VALUE)), \
2131 fprintf (FILE, "\n"))
2133 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2134 ( fprintf (FILE, "\t%s\t ", CHAR_ASM_OP), \
2135 output_addr_const (FILE, (VALUE)), \
2136 fprintf (FILE, "\n"))
2138 /* This is how to output an assembler line for a numeric constant byte. */
2139 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2140 fprintf (FILE, "\t%s\t 0x%x\n", CHAR_ASM_OP, (VALUE))
2142 /* The single-byte pseudo-op is the default. Override svr[34].h. */
2144 #define ASM_BYTE_OP "byte"
2145 #undef ASM_OUTPUT_ASCII
2146 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
2147 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
2149 /* Override svr4.h. Change to the readonly data section for a table of
2150 addresses. final_scan_insn changes back to the text section. */
2151 #undef ASM_OUTPUT_CASE_LABEL
2152 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
2154 if (! CASE_VECTOR_INSNS) \
2156 readonly_data_section (); \
2157 ASM_OUTPUT_ALIGN (FILE, 2); \
2159 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
2162 /* Epilogue for case labels. This jump instruction is called by casesi
2163 to transfer to the appropriate branch instruction within the table.
2164 The label `@L<n>e' is coined to mark the end of the table. */
2165 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
2167 if (CASE_VECTOR_INSNS) \
2170 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
2171 fprintf (FILE, "%se:\n", &label[1]); \
2172 if (! flag_delayed_branch) \
2173 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
2174 reg_names[1], reg_names[m88k_case_index]); \
2175 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
2179 /* This is how to output an element of a case-vector that is absolute. */
2180 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2183 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
2184 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2188 /* This is how to output an element of a case-vector that is relative. */
2189 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2190 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2192 /* This is how to output an assembler line
2193 that says to advance the location counter
2194 to a multiple of 2**LOG bytes. */
2195 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2197 fprintf (FILE, "\t%s\t %d\n", ALIGN_ASM_OP, 1<<(LOG))
2199 /* On the m88100, align the text address to half a cache boundary when it
2200 can only be reached by jumping. Pack code tightly when compiling
2202 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
2203 ASM_OUTPUT_ALIGN (FILE, \
2204 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2))
2206 /* Override svr[34].h. */
2207 #undef ASM_OUTPUT_SKIP
2208 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2209 fprintf (FILE, "\t%s\t %u\n", SKIP_ASM_OP, (SIZE))
2211 /* Override svr4.h. */
2212 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
2214 /* This says how to output an assembler line to define a global common
2215 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2216 Override svr[34].h. */
2217 #undef ASM_OUTPUT_COMMON
2218 #undef ASM_OUTPUT_ALIGNED_COMMON
2219 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2220 ( fprintf ((FILE), "\t%s\t ", \
2221 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
2222 assemble_name ((FILE), (NAME)), \
2223 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2225 /* This says how to output an assembler line to define a local common
2226 symbol. Override svr[34].h. */
2227 #undef ASM_OUTPUT_LOCAL
2228 #undef ASM_OUTPUT_ALIGNED_LOCAL
2229 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2230 ( fprintf ((FILE), "\t%s\t ", \
2231 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
2232 assemble_name ((FILE), (NAME)), \
2233 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2235 /* Store in OUTPUT a string (made with alloca) containing
2236 an assembler-name for a local static variable named NAME.
2237 LABELNO is an integer which is different for each call. */
2238 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2239 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2240 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2242 /* This is how to output an insn to push a register on the stack.
2243 It need not be very fast code. */
2244 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2245 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2246 reg_names[STACK_POINTER_REGNUM], \
2247 reg_names[STACK_POINTER_REGNUM], \
2248 (STACK_BOUNDARY / BITS_PER_UNIT), \
2250 reg_names[STACK_POINTER_REGNUM])
2252 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2253 #define REG_PUSH_LENGTH 2
2255 /* This is how to output an insn to pop a register from the stack. */
2256 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2257 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2259 reg_names[STACK_POINTER_REGNUM], \
2260 reg_names[STACK_POINTER_REGNUM], \
2261 reg_names[STACK_POINTER_REGNUM], \
2262 (STACK_BOUNDARY / BITS_PER_UNIT))
2264 /* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2265 #define REG_POP_LENGTH 2
2267 /* Define the parentheses used to group arithmetic operations
2268 in assembler code. */
2269 #define ASM_OPEN_PAREN "("
2270 #define ASM_CLOSE_PAREN ")"
2272 /* Define results of standard character escape sequences. */
2273 #define TARGET_BELL 007
2274 #define TARGET_BS 010
2275 #define TARGET_TAB 011
2276 #define TARGET_NEWLINE 012
2277 #define TARGET_VT 013
2278 #define TARGET_FF 014
2279 #define TARGET_CR 015
2281 /* Macros to deal with OCS debug information */
2283 #define OCS_START_PREFIX "Ltb"
2284 #define OCS_END_PREFIX "Lte"
2286 #define PUT_OCS_FUNCTION_START(FILE) \
2287 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2289 #define PUT_OCS_FUNCTION_END(FILE) \
2290 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2292 /* Macros for debug information */
2293 #define DEBUGGER_AUTO_OFFSET(X) \
2294 (m88k_debugger_offset (X, 0) \
2295 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2297 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2298 (m88k_debugger_offset (X, OFFSET) \
2299 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2301 /* Macros to deal with SDB debug information */
2302 #ifdef SDB_DEBUGGING_INFO
2304 /* Output structure tag names even when it causes a forward reference. */
2305 #define SDB_ALLOW_FORWARD_REFERENCES
2307 /* Print out extra debug information in the assembler file */
2308 #define PUT_SDB_SCL(a) \
2310 register int s = (a); \
2311 register char *scl; \
2314 case C_EFCN: scl = "end of function"; break; \
2315 case C_NULL: scl = "NULL storage class"; break; \
2316 case C_AUTO: scl = "automatic"; break; \
2317 case C_EXT: scl = "external"; break; \
2318 case C_STAT: scl = "static"; break; \
2319 case C_REG: scl = "register"; break; \
2320 case C_EXTDEF: scl = "external definition"; break; \
2321 case C_LABEL: scl = "label"; break; \
2322 case C_ULABEL: scl = "undefined label"; break; \
2323 case C_MOS: scl = "structure member"; break; \
2324 case C_ARG: scl = "argument"; break; \
2325 case C_STRTAG: scl = "structure tag"; break; \
2326 case C_MOU: scl = "union member"; break; \
2327 case C_UNTAG: scl = "union tag"; break; \
2328 case C_TPDEF: scl = "typedef"; break; \
2329 case C_USTATIC: scl = "uninitialized static"; break; \
2330 case C_ENTAG: scl = "enumeration tag"; break; \
2331 case C_MOE: scl = "member of enumeration"; break; \
2332 case C_REGPARM: scl = "register parameter"; break; \
2333 case C_FIELD: scl = "bit field"; break; \
2334 case C_BLOCK: scl = "block start/end"; break; \
2335 case C_FCN: scl = "function start/end"; break; \
2336 case C_EOS: scl = "end of structure"; break; \
2337 case C_FILE: scl = "filename"; break; \
2338 case C_LINE: scl = "line"; break; \
2339 case C_ALIAS: scl = "duplicated tag"; break; \
2340 case C_HIDDEN: scl = "hidden"; break; \
2341 default: scl = "unknown"; break; \
2344 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2347 #define PUT_SDB_TYPE(a) \
2349 register int t = (a); \
2350 static char buffer[100]; \
2351 register char *p = buffer, *q; \
2352 register int typ = t; \
2355 for (i = 0; i <= 5; i++) \
2357 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2360 strcpy (p, "ptr to "); \
2361 p += sizeof("ptr to"); \
2365 strcpy (p, "array of "); \
2366 p += sizeof("array of"); \
2370 strcpy (p, "func ret "); \
2371 p += sizeof("func ret"); \
2376 switch (typ & N_BTMASK) \
2378 case T_NULL: q = "<no type>"; break; \
2379 case T_CHAR: q = "char"; break; \
2380 case T_SHORT: q = "short"; break; \
2381 case T_INT: q = "int"; break; \
2382 case T_LONG: q = "long"; break; \
2383 case T_FLOAT: q = "float"; break; \
2384 case T_DOUBLE: q = "double"; break; \
2385 case T_STRUCT: q = "struct"; break; \
2386 case T_UNION: q = "union"; break; \
2387 case T_ENUM: q = "enum"; break; \
2388 case T_MOE: q = "enum member"; break; \
2389 case T_UCHAR: q = "unsigned char"; break; \
2390 case T_USHORT: q = "unsigned short"; break; \
2391 case T_UINT: q = "unsigned int"; break; \
2392 case T_ULONG: q = "unsigned long"; break; \
2393 default: q = "void"; break; \
2397 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2401 #define PUT_SDB_INT_VAL(a) \
2402 fprintf (asm_out_file, "\tval\t %d\n", (a))
2404 #define PUT_SDB_VAL(a) \
2405 ( fprintf (asm_out_file, "\tval\t "), \
2406 output_addr_const (asm_out_file, (a)), \
2407 fputc ('\n', asm_out_file))
2409 #define PUT_SDB_DEF(a) \
2410 do { fprintf (asm_out_file, "\tsdef\t "); \
2411 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2412 fputc ('\n', asm_out_file); \
2415 #define PUT_SDB_PLAIN_DEF(a) \
2416 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2418 /* Simply and endef now. */
2419 #define PUT_SDB_ENDEF \
2420 fputs("\tendef\n\n", asm_out_file)
2422 #define PUT_SDB_SIZE(a) \
2423 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2425 /* Max dimensions to store for debug information (limited by COFF). */
2426 #define SDB_MAX_DIM 6
2428 /* New method for dim operations. */
2429 #define PUT_SDB_START_DIM \
2430 fputs("\tdim\t ", asm_out_file)
2432 /* How to end the DIM sequence. */
2433 #define PUT_SDB_LAST_DIM(a) \
2434 fprintf(asm_out_file, "%d\n", a)
2436 #define PUT_SDB_TAG(a) \
2438 fprintf (asm_out_file, "\ttag\t "); \
2439 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2440 fputc ('\n', asm_out_file); \
2443 #define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2445 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2447 PUT_SDB_SCL( SCL ); \
2448 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2452 #define PUT_SDB_BLOCK_START(LINE) \
2453 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2455 #define PUT_SDB_BLOCK_END(LINE) \
2456 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2458 #define PUT_SDB_FUNCTION_START(LINE) \
2460 fprintf (asm_out_file, "\tln\t 1\n"); \
2461 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2464 #define PUT_SDB_FUNCTION_END(LINE) \
2466 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2469 #define PUT_SDB_EPILOGUE_END(NAME) \
2472 fprintf (asm_out_file, "\n\tsdef\t "); \
2473 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2474 fputc('\n', asm_out_file); \
2475 PUT_SDB_SCL( C_EFCN ); \
2476 fprintf (asm_out_file, "\tendef\n\n"); \
2479 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2480 sprintf ((BUFFER), ".%dfake", (NUMBER));
2482 #endif /* SDB_DEBUGGING_INFO */
2484 /* Support const and tdesc sections. Generally, a const section will
2485 be distinct from the text section whenever we do V.4-like things
2486 and so follows DECLARE_ASM_NAME. Note that strings go in text
2487 rather than const. Override svr[34].h. */
2489 #undef USE_CONST_SECTION
2490 #undef EXTRA_SECTIONS
2492 #define USE_CONST_SECTION DECLARE_ASM_NAME
2494 #if defined(USING_SVR4_H)
2496 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors
2497 #define INIT_SECTION_FUNCTION
2498 #define FINI_SECTION_FUNCTION
2501 #if defined(USING_SVR3_H)
2503 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \
2506 #else /* luna or other not based on svr[34].h. */
2508 #undef INIT_SECTION_ASM_OP
2509 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2510 #define CONST_SECTION_FUNCTION \
2516 #define CTORS_SECTION_FUNCTION
2517 #define DTORS_SECTION_FUNCTION
2518 #define INIT_SECTION_FUNCTION
2519 #define FINI_SECTION_FUNCTION
2521 #endif /* USING_SVR3_H */
2522 #endif /* USING_SVR4_H */
2524 #undef EXTRA_SECTION_FUNCTIONS
2525 #define EXTRA_SECTION_FUNCTIONS \
2526 CONST_SECTION_FUNCTION \
2531 if (in_section != in_tdesc) \
2533 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2534 in_section = in_tdesc; \
2541 if (in_section != in_sdata) \
2543 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2544 in_section = in_sdata; \
2548 CTORS_SECTION_FUNCTION \
2549 DTORS_SECTION_FUNCTION \
2550 INIT_SECTION_FUNCTION \
2551 FINI_SECTION_FUNCTION
2553 /* A C statement or statements to switch to the appropriate
2554 section for output of DECL. DECL is either a `VAR_DECL' node
2555 or a constant of some sort. RELOC indicates whether forming
2556 the initial value of DECL requires link-time relocations.
2558 For strings, the section is selected before the segment info is encoded. */
2559 #undef SELECT_SECTION
2560 #define SELECT_SECTION(DECL,RELOC) \
2562 if (TREE_CODE (DECL) == STRING_CST) \
2564 if (! flag_writable_strings) \
2566 else if ( TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2571 else if (TREE_CODE (DECL) == VAR_DECL) \
2573 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \
2575 else if ((flag_pic && RELOC) \
2576 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \
2577 || !DECL_INITIAL (DECL) \
2578 || (DECL_INITIAL (DECL) != error_mark_node \
2579 && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \
2588 /* Jump tables consist of branch instructions and should be output in
2589 the text section. When we use a table of addresses, we explicitly
2590 change to the readonly data section. */
2591 #define JUMP_TABLES_IN_TEXT_SECTION 1
2593 /* Define this macro if references to a symbol must be treated differently
2594 depending on something about the variable or function named by the
2595 symbol (such as what section it is in).
2597 The macro definition, if any, is executed immediately after the rtl for
2598 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2599 rtl will be a `mem' whose address is a `symbol_ref'.
2601 For the m88k, determine if the item should go in the global pool. */
2602 #define ENCODE_SECTION_INFO(DECL) \
2604 if (m88k_gp_threshold > 0) \
2605 if (TREE_CODE (DECL) == VAR_DECL) \
2607 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2609 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2611 if (size > 0 && size <= m88k_gp_threshold) \
2612 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2615 else if (TREE_CODE (DECL) == STRING_CST \
2616 && flag_writable_strings \
2617 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2618 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2621 /* Print operand X (an rtx) in assembler syntax to file FILE.
2622 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2623 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2624 #define PRINT_OPERAND_PUNCT_VALID_P(c) \
2625 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2627 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2629 /* Print a memory address as an operand to reference that memory location. */
2630 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2632 /* This says not to strength reduce the addr calculations within loops
2633 (otherwise it does not take advantage of m88k scaled loads and stores */
2635 #define DONT_REDUCE_ADDR
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