1 /* Subroutines for insn-output.c for Motorola 88000.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@mcc.com)
5 Currently maintained by (gcc@dg-rtp.dg.com)
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
28 #include "hard-reg-set.h"
30 #include "insn-config.h"
31 #include "conditions.h"
32 #include "insn-flags.h"
34 #include "insn-attr.h"
44 extern int flag_traditional;
45 extern FILE *asm_out_file;
47 const char *m88k_pound_sign = ""; /* Either # for SVR4 or empty for SVR3 */
48 const char *m88k_short_data;
49 const char *m88k_version;
50 char m88k_volatile_code;
52 unsigned m88k_gp_threshold = 0;
53 int m88k_prologue_done = 0; /* Ln directives can now be emitted */
54 int m88k_function_number = 0; /* Counter unique to each function */
55 int m88k_fp_offset = 0; /* offset of frame pointer if used */
56 int m88k_stack_size = 0; /* size of allocated stack (including frame) */
59 rtx m88k_compare_reg; /* cmp output pseudo register */
60 rtx m88k_compare_op0; /* cmpsi operand 0 */
61 rtx m88k_compare_op1; /* cmpsi operand 1 */
63 enum processor_type m88k_cpu; /* target cpu */
65 /* Determine what instructions are needed to manufacture the integer VALUE
69 classify_integer (mode, value)
70 enum machine_mode mode;
75 else if (SMALL_INTVAL (value))
77 else if (SMALL_INTVAL (-value))
79 else if (mode == HImode)
81 else if (mode == QImode)
83 else if ((value & 0xffff) == 0)
85 else if (integer_ok_for_set (value))
91 /* Return the bit number in a compare word corresponding to CONDITION. */
94 condition_value (condition)
97 switch (GET_CODE (condition))
114 integer_ok_for_set (value)
115 register unsigned value;
117 /* All the "one" bits must be contiguous. If so, MASK + 1 will be
118 a power of two or zero. */
119 register unsigned mask = (value | (value - 1));
120 return (value && POWER_OF_2_or_0 (mask + 1));
124 output_load_const_int (mode, operands)
125 enum machine_mode mode;
128 static const char *const patterns[] =
136 "or.u %0,%#r0,%X1\n\tor %0,%0,%x1",
139 if (! REG_P (operands[0])
140 || GET_CODE (operands[1]) != CONST_INT)
142 return patterns[classify_integer (mode, INTVAL (operands[1]))];
145 /* These next two routines assume that floating point numbers are represented
146 in a manner which is consistent between host and target machines. */
149 output_load_const_float (operands)
152 /* These can return 0 under some circumstances when cross-compiling. */
153 operands[0] = operand_subword (operands[0], 0, 0, SFmode);
154 operands[1] = operand_subword (operands[1], 0, 0, SFmode);
156 return output_load_const_int (SImode, operands);
160 output_load_const_double (operands)
165 /* These can return zero on some cross-compilers, but there's nothing
166 we can do about it. */
167 latehalf[0] = operand_subword (operands[0], 1, 0, DFmode);
168 latehalf[1] = operand_subword (operands[1], 1, 0, DFmode);
170 operands[0] = operand_subword (operands[0], 0, 0, DFmode);
171 operands[1] = operand_subword (operands[1], 0, 0, DFmode);
173 output_asm_insn (output_load_const_int (SImode, operands), operands);
175 operands[0] = latehalf[0];
176 operands[1] = latehalf[1];
178 return output_load_const_int (SImode, operands);
182 output_load_const_dimode (operands)
187 latehalf[0] = operand_subword (operands[0], 1, 0, DImode);
188 latehalf[1] = operand_subword (operands[1], 1, 0, DImode);
190 operands[0] = operand_subword (operands[0], 0, 0, DImode);
191 operands[1] = operand_subword (operands[1], 0, 0, DImode);
193 output_asm_insn (output_load_const_int (SImode, operands), operands);
195 operands[0] = latehalf[0];
196 operands[1] = latehalf[1];
198 return output_load_const_int (SImode, operands);
201 /* Emit insns to move operands[1] into operands[0].
203 Return 1 if we have written out everything that needs to be done to
204 do the move. Otherwise, return 0 and the caller will emit the move
207 SCRATCH if non zero can be used as a scratch register for the move
208 operation. It is provided by a SECONDARY_RELOAD_* macro if needed. */
211 emit_move_sequence (operands, mode, scratch)
213 enum machine_mode mode;
216 register rtx operand0 = operands[0];
217 register rtx operand1 = operands[1];
219 if (CONSTANT_P (operand1) && flag_pic
220 && pic_address_needs_scratch (operand1))
221 operands[1] = operand1 = legitimize_address (1, operand1, 0, 0);
223 /* Handle most common case first: storing into a register. */
224 if (register_operand (operand0, mode))
226 if (register_operand (operand1, mode)
227 || (GET_CODE (operand1) == CONST_INT && SMALL_INT (operand1))
228 || GET_CODE (operand1) == HIGH
229 /* Only `general_operands' can come here, so MEM is ok. */
230 || GET_CODE (operand1) == MEM)
232 /* Run this case quickly. */
233 emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
237 else if (GET_CODE (operand0) == MEM)
239 if (register_operand (operand1, mode)
240 || (operand1 == const0_rtx && GET_MODE_SIZE (mode) <= UNITS_PER_WORD))
242 /* Run this case quickly. */
243 emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
246 if (! reload_in_progress && ! reload_completed)
248 operands[0] = validize_mem (operand0);
249 operands[1] = operand1 = force_reg (mode, operand1);
253 /* Simplify the source if we need to. */
254 if (GET_CODE (operand1) != HIGH && immediate_operand (operand1, mode))
256 if (GET_CODE (operand1) != CONST_INT
257 && GET_CODE (operand1) != CONST_DOUBLE)
259 rtx temp = ((reload_in_progress || reload_completed)
261 operands[1] = legitimize_address (flag_pic
262 && symbolic_address_p (operand1),
263 operand1, temp, scratch);
265 operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
269 /* Now have insn-emit do whatever it normally does. */
273 /* Return a legitimate reference for ORIG (either an address or a MEM)
274 using the register REG. If PIC and the address is already
275 position-independent, use ORIG. Newly generated position-independent
276 addresses go into a reg. This is REG if non zero, otherwise we
277 allocate register(s) as necessary. If this is called during reload,
278 and we need a second temp register, then we use SCRATCH, which is
279 provided via the SECONDARY_INPUT_RELOAD_CLASS mechanism. */
282 legitimize_address (pic, orig, reg, scratch)
288 rtx addr = (GET_CODE (orig) == MEM ? XEXP (orig, 0) : orig);
294 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
298 if (reload_in_progress || reload_completed)
301 reg = gen_reg_rtx (Pmode);
306 /* If not during reload, allocate another temp reg here for
307 loading in the address, so that these instructions can be
308 optimized properly. */
309 temp = ((reload_in_progress || reload_completed)
310 ? reg : gen_reg_rtx (Pmode));
312 emit_insn (gen_rtx_SET
314 gen_rtx_HIGH (SImode,
315 gen_rtx_UNSPEC (SImode,
319 emit_insn (gen_rtx_SET
321 gen_rtx_LO_SUM (SImode, temp,
322 gen_rtx_UNSPEC (SImode,
328 new = gen_rtx_MEM (Pmode,
329 gen_rtx_PLUS (SImode,
330 pic_offset_table_rtx, addr));
332 current_function_uses_pic_offset_table = 1;
333 RTX_UNCHANGING_P (new) = 1;
334 insn = emit_move_insn (reg, new);
335 /* Put a REG_EQUAL note on this insn, so that it can be optimized
337 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
341 else if (GET_CODE (addr) == CONST)
345 if (GET_CODE (XEXP (addr, 0)) == PLUS
346 && XEXP (XEXP (addr, 0), 0) == pic_offset_table_rtx)
351 if (reload_in_progress || reload_completed)
354 reg = gen_reg_rtx (Pmode);
357 if (GET_CODE (XEXP (addr, 0)) != PLUS) abort ();
359 base = legitimize_address (1, XEXP (XEXP (addr, 0), 0), reg, 0);
360 addr = legitimize_address (1, XEXP (XEXP (addr, 0), 1),
361 base == reg ? 0 : reg, 0);
363 if (GET_CODE (addr) == CONST_INT)
366 return plus_constant_for_output (base, INTVAL (addr));
367 else if (! reload_in_progress && ! reload_completed)
368 addr = force_reg (Pmode, addr);
369 /* We can't create any new registers during reload, so use the
370 SCRATCH reg provided by the reload_insi pattern. */
373 emit_move_insn (scratch, addr);
377 /* If we reach here, then the SECONDARY_INPUT_RELOAD_CLASS
378 macro needs to be adjusted so that a scratch reg is provided
382 new = gen_rtx_PLUS (SImode, base, addr);
383 /* Should we set special REG_NOTEs here? */
386 else if (! SHORT_ADDRESS_P (addr, temp))
390 if (reload_in_progress || reload_completed)
393 reg = gen_reg_rtx (Pmode);
396 emit_insn (gen_rtx_SET (VOIDmode,
397 reg, gen_rtx_HIGH (SImode, addr)));
398 new = gen_rtx_LO_SUM (SImode, reg, addr);
402 && GET_CODE (orig) == MEM)
404 new = gen_rtx_MEM (GET_MODE (orig), new);
405 MEM_COPY_ATTRIBUTES (new, orig);
410 /* Support functions for code to emit a block move. There are four methods
411 used to perform the block move:
413 + call the looping library function, e.g. __movstrSI64n8
414 + call a non-looping library function, e.g. __movstrHI15x11
415 + produce an inline sequence of ld/st instructions
417 The parameters below describe the library functions produced by
420 #define MOVSTR_LOOP 64 /* __movstrSI64n68 .. __movstrSI64n8 */
421 #define MOVSTR_QI 16 /* __movstrQI16x16 .. __movstrQI16x2 */
422 #define MOVSTR_HI 48 /* __movstrHI48x48 .. __movstrHI48x4 */
423 #define MOVSTR_SI 96 /* __movstrSI96x96 .. __movstrSI96x8 */
424 #define MOVSTR_DI 96 /* __movstrDI96x96 .. __movstrDI96x16 */
425 #define MOVSTR_ODD_HI 16 /* __movstrHI15x15 .. __movstrHI15x5 */
426 #define MOVSTR_ODD_SI 48 /* __movstrSI47x47 .. __movstrSI47x11,
427 __movstrSI46x46 .. __movstrSI46x10,
428 __movstrSI45x45 .. __movstrSI45x9 */
429 #define MOVSTR_ODD_DI 48 /* __movstrDI47x47 .. __movstrDI47x23,
430 __movstrDI46x46 .. __movstrDI46x22,
431 __movstrDI45x45 .. __movstrDI45x21,
432 __movstrDI44x44 .. __movstrDI44x20,
433 __movstrDI43x43 .. __movstrDI43x19,
434 __movstrDI42x42 .. __movstrDI42x18,
435 __movstrDI41x41 .. __movstrDI41x17 */
437 /* Limits for using the non-looping movstr functions. For the m88100
438 processor, we assume the source and destination are word aligned.
439 The QImode and HImode limits are the break even points where memcpy
440 does just as well and beyond which memcpy does better. For the
441 m88110, we tend to assume double word alignment, but also analyze
442 the word aligned cases. The analysis is complicated because memcpy
443 may use the cache control instructions for better performance. */
445 #define MOVSTR_QI_LIMIT_88100 13
446 #define MOVSTR_HI_LIMIT_88100 38
447 #define MOVSTR_SI_LIMIT_88100 MOVSTR_SI
448 #define MOVSTR_DI_LIMIT_88100 MOVSTR_SI
450 #define MOVSTR_QI_LIMIT_88000 16
451 #define MOVSTR_HI_LIMIT_88000 38
452 #define MOVSTR_SI_LIMIT_88000 72
453 #define MOVSTR_DI_LIMIT_88000 72
455 #define MOVSTR_QI_LIMIT_88110 16
456 #define MOVSTR_HI_LIMIT_88110 38
457 #define MOVSTR_SI_LIMIT_88110 72
458 #define MOVSTR_DI_LIMIT_88110 72
460 static enum machine_mode mode_from_align[] =
461 {VOIDmode, QImode, HImode, VOIDmode, SImode,
462 VOIDmode, VOIDmode, VOIDmode, DImode};
463 static int max_from_align[] = {0, MOVSTR_QI, MOVSTR_HI, 0, MOVSTR_SI,
465 static int all_from_align[] = {0, MOVSTR_QI, MOVSTR_ODD_HI, 0, MOVSTR_ODD_SI,
466 0, 0, 0, MOVSTR_ODD_DI};
468 static int best_from_align[3][9] = {
469 {0, MOVSTR_QI_LIMIT_88100, MOVSTR_HI_LIMIT_88100, 0, MOVSTR_SI_LIMIT_88100,
470 0, 0, 0, MOVSTR_DI_LIMIT_88100},
471 {0, MOVSTR_QI_LIMIT_88110, MOVSTR_HI_LIMIT_88110, 0, MOVSTR_SI_LIMIT_88110,
472 0, 0, 0, MOVSTR_DI_LIMIT_88110},
473 {0, MOVSTR_QI_LIMIT_88000, MOVSTR_HI_LIMIT_88000, 0, MOVSTR_SI_LIMIT_88000,
474 0, 0, 0, MOVSTR_DI_LIMIT_88000}
477 static void block_move_loop PARAMS ((rtx, rtx, rtx, rtx, int, int));
478 static void block_move_no_loop PARAMS ((rtx, rtx, rtx, rtx, int, int));
479 static void block_move_sequence PARAMS ((rtx, rtx, rtx, rtx, int, int, int));
480 static void output_short_branch_defs PARAMS ((FILE *));
481 static int output_option PARAMS ((FILE *, const char *, const char *,
482 const char *, const char *, int, int));
484 /* Emit code to perform a block move. Choose the best method.
486 OPERANDS[0] is the destination.
487 OPERANDS[1] is the source.
488 OPERANDS[2] is the size.
489 OPERANDS[3] is the alignment safe to use. */
492 expand_block_move (dest_mem, src_mem, operands)
497 int align = INTVAL (operands[3]);
498 int constp = (GET_CODE (operands[2]) == CONST_INT);
499 int bytes = (constp ? INTVAL (operands[2]) : 0);
500 int target = (int) m88k_cpu;
502 if (! (PROCESSOR_M88100 == 0
503 && PROCESSOR_M88110 == 1
504 && PROCESSOR_M88000 == 2))
507 if (constp && bytes <= 0)
510 /* Determine machine mode to do move with. */
511 if (align > 4 && !TARGET_88110)
513 else if (align <= 0 || align == 3)
514 abort (); /* block move invalid alignment. */
516 if (constp && bytes <= 3 * align)
517 block_move_sequence (operands[0], dest_mem, operands[1], src_mem,
520 else if (constp && bytes <= best_from_align[target][align])
521 block_move_no_loop (operands[0], dest_mem, operands[1], src_mem,
524 else if (constp && align == 4 && TARGET_88100)
525 block_move_loop (operands[0], dest_mem, operands[1], src_mem,
530 #ifdef TARGET_MEM_FUNCTIONS
531 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
535 convert_to_mode (TYPE_MODE (sizetype), operands[2],
536 TREE_UNSIGNED (sizetype)),
537 TYPE_MODE (sizetype));
539 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0,
543 convert_to_mode (TYPE_MODE (integer_type_node),
545 TREE_UNSIGNED (integer_type_node)),
546 TYPE_MODE (integer_type_node));
551 /* Emit code to perform a block move by calling a looping movstr library
552 function. SIZE and ALIGN are known constants. DEST and SRC are
556 block_move_loop (dest, dest_mem, src, src_mem, size, align)
562 enum machine_mode mode;
571 /* Determine machine mode to do move with. */
575 /* Determine the structure of the loop. */
576 count = size / MOVSTR_LOOP;
577 units = (size - count * MOVSTR_LOOP) / align;
582 units += MOVSTR_LOOP / align;
587 block_move_no_loop (dest, dest_mem, src, src_mem, size, align);
591 remainder = size - count * MOVSTR_LOOP - units * align;
593 mode = mode_from_align[align];
594 sprintf (entry, "__movstr%s%dn%d",
595 GET_MODE_NAME (mode), MOVSTR_LOOP, units * align);
596 entry_name = get_identifier (entry);
598 offset_rtx = GEN_INT (MOVSTR_LOOP + (1 - units) * align);
600 value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
602 gen_rtx_REG (Pmode, 3),
604 MEM_COPY_ATTRIBUTES (value_rtx, src_mem);
606 emit_insn (gen_call_movstrsi_loop
607 (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)),
608 dest, src, offset_rtx, value_rtx,
609 gen_rtx_REG (mode, ((units & 1) ? 4 : 5)),
613 block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem,
614 gen_rtx_REG (Pmode, 3), src_mem,
615 remainder, align, MOVSTR_LOOP + align);
618 /* Emit code to perform a block move by calling a non-looping library
619 function. SIZE and ALIGN are known constants. DEST and SRC are
620 registers. OFFSET is the known starting point for the output pattern. */
623 block_move_no_loop (dest, dest_mem, src, src_mem, size, align)
629 enum machine_mode mode = mode_from_align[align];
630 int units = size / align;
631 int remainder = size - units * align;
639 if (remainder && size <= all_from_align[align])
641 most = all_from_align[align] - (align - remainder);
646 most = max_from_align[align];
649 sprintf (entry, "__movstr%s%dx%d",
650 GET_MODE_NAME (mode), most, size - remainder);
651 entry_name = get_identifier (entry);
653 offset_rtx = GEN_INT (most - (size - remainder));
655 value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
657 gen_rtx_REG (Pmode, 3),
660 MEM_COPY_ATTRIBUTES (value_rtx, src_mem);
662 value_reg = ((((most - (size - remainder)) / align) & 1) == 0
663 ? (align == 8 ? 6 : 5) : 4);
665 emit_insn (gen_call_block_move
666 (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)),
667 dest, src, offset_rtx, value_rtx,
668 gen_rtx_REG (mode, value_reg)));
671 block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem,
672 gen_rtx_REG (Pmode, 3), src_mem,
673 remainder, align, most);
676 /* Emit code to perform a block move with an offset sequence of ld/st
677 instructions (..., ld 0, st 1, ld 1, st 0, ...). SIZE and ALIGN are
678 known constants. DEST and SRC are registers. OFFSET is the known
679 starting point for the output pattern. */
682 block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset)
690 enum machine_mode mode[2];
695 int offset_ld = offset;
696 int offset_st = offset;
698 active[0] = active[1] = FALSE;
700 /* Establish parameters for the first load and for the second load if
701 it is known to be the same mode as the first. */
702 amount[0] = amount[1] = align;
703 mode[0] = mode_from_align[align];
704 temp[0] = gen_reg_rtx (mode[0]);
705 if (size >= 2 * align)
708 temp[1] = gen_reg_rtx (mode[1]);
719 /* Change modes as the sequence tails off. */
720 if (size < amount[next])
722 amount[next] = (size >= 4 ? 4 : (size >= 2 ? 2 : 1));
723 mode[next] = mode_from_align[amount[next]];
724 temp[next] = gen_reg_rtx (mode[next]);
726 size -= amount[next];
727 srcp = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode,
728 plus_constant (src, offset_ld));
730 MEM_COPY_ATTRIBUTES (srcp, src_mem);
731 emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp));
732 offset_ld += amount[next];
738 active[phase] = FALSE;
740 = gen_rtx_MEM (MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode,
741 plus_constant (dest, offset_st));
743 MEM_COPY_ATTRIBUTES (dstp, dest_mem);
744 emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase]));
745 offset_st += amount[phase];
748 while (active[next]);
751 /* Emit the code to do an AND operation. */
754 output_and (operands)
759 if (REG_P (operands[2]))
760 return "and %0,%1,%2";
762 value = INTVAL (operands[2]);
763 if (SMALL_INTVAL (value))
764 return "mask %0,%1,%2";
765 else if ((value & 0xffff0000) == 0xffff0000)
766 return "and %0,%1,%x2";
767 else if ((value & 0xffff) == 0xffff)
768 return "and.u %0,%1,%X2";
769 else if ((value & 0xffff) == 0)
770 return "mask.u %0,%1,%X2";
771 else if (integer_ok_for_set (~value))
772 return "clr %0,%1,%S2";
774 return "and.u %0,%1,%X2\n\tand %0,%0,%x2";
777 /* Emit the code to do an inclusive OR operation. */
780 output_ior (operands)
785 if (REG_P (operands[2]))
786 return "or %0,%1,%2";
788 value = INTVAL (operands[2]);
789 if (SMALL_INTVAL (value))
790 return "or %0,%1,%2";
791 else if ((value & 0xffff) == 0)
792 return "or.u %0,%1,%X2";
793 else if (integer_ok_for_set (value))
794 return "set %0,%1,%s2";
796 return "or.u %0,%1,%X2\n\tor %0,%0,%x2";
799 /* Emit the instructions for doing an XOR. */
802 output_xor (operands)
807 if (REG_P (operands[2]))
808 return "xor %0,%1,%2";
810 value = INTVAL (operands[2]);
811 if (SMALL_INTVAL (value))
812 return "xor %0,%1,%2";
813 else if ((value & 0xffff) == 0)
814 return "xor.u %0,%1,%X2";
816 return "xor.u %0,%1,%X2\n\txor %0,%0,%x2";
819 /* Output a call. Normally this is just bsr or jsr, but this also deals with
820 accomplishing a branch after the call by incrementing r1. This requires
821 that various assembler bugs be accommodated. The 4.30 DG/UX assembler
822 requires that forward references not occur when computing the difference of
823 two labels. The [version?] Motorola assembler computes a word difference.
824 No doubt there's more to come!
826 It would seem the same idea could be used to tail call, but in this case,
827 the epilogue will be non-null. */
829 static rtx sb_name = 0;
830 static rtx sb_high = 0;
831 static rtx sb_low = 0;
834 output_call (operands, addr)
844 /* This can be generalized, but there is currently no need. */
845 if (XVECLEN (final_sequence, 0) != 2)
848 /* The address of interior insns is not computed, so use the sequence. */
849 seq_insn = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
850 jump = XVECEXP (final_sequence, 0, 1);
851 if (GET_CODE (jump) == JUMP_INSN)
855 rtx dest = XEXP (SET_SRC (PATTERN (jump)), 0);
856 int delta = 4 * (insn_addresses[INSN_UID (dest)]
857 - insn_addresses[INSN_UID (seq_insn)]
859 #if (MONITOR_GCC & 0x2) /* How often do long branches happen? */
860 if ((unsigned) (delta + 0x8000) >= 0x10000)
861 warning ("Internal gcc monitor: short-branch(%x)", delta);
864 /* Delete the jump. */
865 PUT_CODE (jump, NOTE);
866 NOTE_LINE_NUMBER (jump) = NOTE_INSN_DELETED;
867 NOTE_SOURCE_FILE (jump) = 0;
869 /* We only do this optimization if -O2, modifying the value of
870 r1 in the delay slot confuses debuggers and profilers on some
873 If we loose, we must use the non-delay form. This is unlikely
874 to ever happen. If it becomes a problem, claim that a call
875 has two delay slots and only the second can be filled with
878 The 88110 can lose when a jsr.n r1 is issued and a page fault
879 occurs accessing the delay slot. So don't use jsr.n form when
882 #ifdef AS_BUG_IMMEDIATE_LABEL /* The assembler restricts immediate values. */
884 || ! ADD_INTVAL (delta * 2)
887 || ! ADD_INTVAL (delta)
889 || (REG_P (addr) && REGNO (addr) == 1))
895 ? "bsr %0#plt\n\tbr %l1"
896 : "bsr %0\n\tbr %l1"));
899 /* Output the short branch form. */
900 output_asm_insn ((REG_P (addr)
902 : (flag_pic ? "bsr.n %0#plt" : "bsr.n %0")),
907 ? "subu %#r1,%#r1,.-%l0+4"
908 : "addu %#r1,%#r1,%l0-.-4");
911 operands[0] = gen_label_rtx ();
912 operands[1] = gen_label_rtx ();
917 last = "subu %#r1,%#r1,%l0\n%l1:";
923 last = "addu %#r1,%#r1,%l0\n%l1:";
926 /* Record the values to be computed later as "def name,high-low". */
927 sb_name = gen_rtx_EXPR_LIST (VOIDmode, operands[0], sb_name);
928 sb_high = gen_rtx_EXPR_LIST (VOIDmode, high, sb_high);
929 sb_low = gen_rtx_EXPR_LIST (VOIDmode, low, sb_low);
930 #endif /* Don't USE_GAS */
937 : (flag_pic ? "bsr%. %0#plt" : "bsr%. %0"));
941 output_short_branch_defs (stream)
944 char name[256], high[256], low[256];
946 for (; sb_name && sb_high && sb_low;
947 sb_name = XEXP (sb_name, 1),
948 sb_high = XEXP (sb_high, 1),
949 sb_low = XEXP (sb_low, 1))
951 ASM_GENERATE_INTERNAL_LABEL
952 (name, "L", CODE_LABEL_NUMBER (XEXP (sb_name, 0)));
953 ASM_GENERATE_INTERNAL_LABEL
954 (high, "L", CODE_LABEL_NUMBER (XEXP (sb_high, 0)));
955 ASM_GENERATE_INTERNAL_LABEL
956 (low, "L", CODE_LABEL_NUMBER (XEXP (sb_low, 0)));
957 /* This will change as the assembler requirements become known. */
958 fprintf (stream, "\t%s\t %s,%s-%s\n",
959 SET_ASM_OP, &name[1], &high[1], &low[1]);
961 if (sb_name || sb_high || sb_low)
965 /* Return truth value of the statement that this conditional branch is likely
966 to fall through. CONDITION, is the condition that JUMP_INSN is testing. */
969 mostly_false_jump (jump_insn, condition)
970 rtx jump_insn, condition;
972 rtx target_label = JUMP_LABEL (jump_insn);
975 /* Much of this isn't computed unless we're optimizing. */
979 /* Determine if one path or the other leads to a return. */
980 for (insnt = NEXT_INSN (target_label);
982 insnt = NEXT_INSN (insnt))
984 if (GET_CODE (insnt) == JUMP_INSN)
986 else if (GET_CODE (insnt) == INSN
987 && GET_CODE (PATTERN (insnt)) == SEQUENCE
988 && GET_CODE (XVECEXP (PATTERN (insnt), 0, 0)) == JUMP_INSN)
990 insnt = XVECEXP (PATTERN (insnt), 0, 0);
995 && (GET_CODE (PATTERN (insnt)) == RETURN
996 || (GET_CODE (PATTERN (insnt)) == SET
997 && GET_CODE (SET_SRC (PATTERN (insnt))) == REG
998 && REGNO (SET_SRC (PATTERN (insnt))) == 1)))
1001 for (insnj = NEXT_INSN (jump_insn);
1003 insnj = NEXT_INSN (insnj))
1005 if (GET_CODE (insnj) == JUMP_INSN)
1007 else if (GET_CODE (insnj) == INSN
1008 && GET_CODE (PATTERN (insnj)) == SEQUENCE
1009 && GET_CODE (XVECEXP (PATTERN (insnj), 0, 0)) == JUMP_INSN)
1011 insnj = XVECEXP (PATTERN (insnj), 0, 0);
1016 && (GET_CODE (PATTERN (insnj)) == RETURN
1017 || (GET_CODE (PATTERN (insnj)) == SET
1018 && GET_CODE (SET_SRC (PATTERN (insnj))) == REG
1019 && REGNO (SET_SRC (PATTERN (insnj))) == 1)))
1022 /* Predict to not return. */
1023 if ((insnt == 0) != (insnj == 0))
1024 return (insnt == 0);
1026 /* Predict loops to loop. */
1027 for (insnt = PREV_INSN (target_label);
1028 insnt && GET_CODE (insnt) == NOTE;
1029 insnt = PREV_INSN (insnt))
1030 if (NOTE_LINE_NUMBER (insnt) == NOTE_INSN_LOOP_END)
1032 else if (NOTE_LINE_NUMBER (insnt) == NOTE_INSN_LOOP_BEG)
1034 else if (NOTE_LINE_NUMBER (insnt) == NOTE_INSN_LOOP_CONT)
1037 /* Predict backward branches usually take. */
1039 insnj = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
1042 if (insn_addresses[INSN_UID (insnj)]
1043 > insn_addresses[INSN_UID (target_label)])
1046 /* EQ tests are usually false and NE tests are usually true. Also,
1047 most quantities are positive, so we can make the appropriate guesses
1048 about signed comparisons against zero. Consider unsigned comparisons
1049 to be a range check and assume quantities to be in range. */
1050 switch (GET_CODE (condition))
1053 /* Unconditional branch. */
1062 case GTU: /* Must get casesi right at least. */
1063 if (XEXP (condition, 1) == const0_rtx)
1070 if (XEXP (condition, 1) == const0_rtx)
1080 /* Return true if the operand is a power of two and is a floating
1081 point type (to optimize division by power of two into multiplication). */
1084 real_power_of_2_operand (op, mode)
1086 enum machine_mode mode ATTRIBUTE_UNUSED;
1090 int i[sizeof (REAL_VALUE_TYPE) / sizeof (int)];
1091 struct { /* IEEE double precision format */
1093 unsigned exponent : 11;
1094 unsigned mantissa1 : 20;
1097 struct { /* IEEE double format to quick check */
1098 unsigned sign : 1; /* if it fits in a float */
1099 unsigned exponent1 : 4;
1100 unsigned exponent2 : 7;
1101 unsigned mantissa1 : 20;
1106 if (GET_MODE (op) != DFmode && GET_MODE (op) != SFmode)
1109 if (GET_CODE (op) != CONST_DOUBLE)
1112 u.i[0] = CONST_DOUBLE_LOW (op);
1113 u.i[1] = CONST_DOUBLE_HIGH (op);
1115 if (u.s.mantissa1 != 0 || u.s.mantissa2 != 0 /* not a power of two */
1116 || u.s.exponent == 0 /* constant 0.0 */
1117 || u.s.exponent == 0x7ff /* NAN */
1118 || (u.s2.exponent1 != 0x8 && u.s2.exponent1 != 0x7))
1119 return 0; /* const won't fit in float */
1124 /* Make OP legitimate for mode MODE. Currently this only deals with DFmode
1125 operands, putting them in registers and making CONST_DOUBLE values
1126 SFmode where possible. */
1129 legitimize_operand (op, mode)
1131 enum machine_mode mode;
1135 union real_extract r;
1136 struct { /* IEEE double precision format */
1138 unsigned exponent : 11;
1139 unsigned mantissa1 : 20;
1142 struct { /* IEEE double format to quick check */
1143 unsigned sign : 1; /* if it fits in a float */
1144 unsigned exponent1 : 4;
1145 unsigned exponent2 : 7;
1146 unsigned mantissa1 : 20;
1151 if (GET_CODE (op) == REG || mode != DFmode)
1154 if (GET_CODE (op) == CONST_DOUBLE)
1156 bcopy (&CONST_DOUBLE_LOW (op), &u.r, sizeof u);
1157 if (u.d.exponent != 0x7ff /* NaN */
1158 && u.d.mantissa2 == 0 /* Mantissa fits */
1159 && (u.s.exponent1 == 0x8 || u.s.exponent1 == 0x7) /* Exponent fits */
1160 && (temp = simplify_unary_operation (FLOAT_TRUNCATE, SFmode,
1162 return gen_rtx_FLOAT_EXTEND (mode, force_reg (SFmode, temp));
1164 else if (register_operand (op, mode))
1167 return force_reg (mode, op);
1170 /* Return true if OP is a suitable input for a move insn. */
1173 move_operand (op, mode)
1175 enum machine_mode mode;
1177 if (register_operand (op, mode))
1179 if (GET_CODE (op) == CONST_INT)
1180 return (classify_integer (mode, INTVAL (op)) < m88k_oru_hi16);
1181 if (GET_MODE (op) != mode)
1183 if (GET_CODE (op) == SUBREG)
1184 op = SUBREG_REG (op);
1185 if (GET_CODE (op) != MEM)
1189 if (GET_CODE (op) == LO_SUM)
1190 return (REG_P (XEXP (op, 0))
1191 && symbolic_address_p (XEXP (op, 1)));
1192 return memory_address_p (mode, op);
1195 /* Return true if OP is suitable for a call insn. */
1198 call_address_operand (op, mode)
1200 enum machine_mode mode ATTRIBUTE_UNUSED;
1202 return (REG_P (op) || symbolic_address_p (op));
1205 /* Returns true if OP is either a symbol reference or a sum of a symbol
1206 reference and a constant. */
1209 symbolic_address_p (op)
1212 switch (GET_CODE (op))
1220 return ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
1221 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
1222 && GET_CODE (XEXP (op, 1)) == CONST_INT);
1229 /* Return true if OP is a register or const0_rtx. */
1232 reg_or_0_operand (op, mode)
1234 enum machine_mode mode;
1236 return (op == const0_rtx || register_operand (op, mode));
1239 /* Nonzero if OP is a valid second operand for an arithmetic insn. */
1242 arith_operand (op, mode)
1244 enum machine_mode mode;
1246 return (register_operand (op, mode)
1247 || (GET_CODE (op) == CONST_INT && SMALL_INT (op)));
1250 /* Return true if OP is a register or 5 bit integer. */
1253 arith5_operand (op, mode)
1255 enum machine_mode mode;
1257 return (register_operand (op, mode)
1258 || (GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 32));
1262 arith32_operand (op, mode)
1264 enum machine_mode mode;
1266 return (register_operand (op, mode) || GET_CODE (op) == CONST_INT);
1270 arith64_operand (op, mode)
1272 enum machine_mode mode;
1274 return (register_operand (op, mode)
1275 || GET_CODE (op) == CONST_INT
1276 || (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode));
1280 int5_operand (op, mode)
1282 enum machine_mode mode ATTRIBUTE_UNUSED;
1284 return (GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 32);
1288 int32_operand (op, mode)
1290 enum machine_mode mode ATTRIBUTE_UNUSED;
1292 return (GET_CODE (op) == CONST_INT);
1295 /* Return true if OP is a register or a valid immediate operand for
1299 add_operand (op, mode)
1301 enum machine_mode mode;
1303 return (register_operand (op, mode)
1304 || (GET_CODE (op) == CONST_INT && ADD_INT (op)));
1307 /* Nonzero if this is a bitmask filling the bottom bits, for optimizing and +
1308 shift left combinations into a single mak instruction. */
1314 return (value && POWER_OF_2_or_0 (value + 1));
1318 reg_or_bbx_mask_operand (op, mode)
1320 enum machine_mode mode;
1323 if (register_operand (op, mode))
1325 if (GET_CODE (op) != CONST_INT)
1328 value = INTVAL (op);
1329 if (POWER_OF_2 (value))
1335 /* Return true if OP is valid to use in the context of a floating
1336 point operation. Special case 0.0, since we can use r0. */
1339 real_or_0_operand (op, mode)
1341 enum machine_mode mode;
1343 if (mode != SFmode && mode != DFmode)
1346 return (register_operand (op, mode)
1347 || (GET_CODE (op) == CONST_DOUBLE
1348 && op == CONST0_RTX (mode)));
1351 /* Return true if OP is valid to use in the context of logic arithmetic
1352 on condition codes. */
1355 partial_ccmode_register_operand (op, mode)
1357 enum machine_mode mode ATTRIBUTE_UNUSED;
1359 return register_operand (op, CCmode) || register_operand (op, CCEVENmode);
1362 /* Return true if OP is a relational operator. */
1367 enum machine_mode mode ATTRIBUTE_UNUSED;
1369 switch (GET_CODE (op))
1388 even_relop (op, mode)
1390 enum machine_mode mode ATTRIBUTE_UNUSED;
1392 switch (GET_CODE (op))
1406 odd_relop (op, mode)
1408 enum machine_mode mode ATTRIBUTE_UNUSED;
1410 switch (GET_CODE (op))
1423 /* Return true if OP is a relational operator, and is not an unsigned
1424 relational operator. */
1427 relop_no_unsigned (op, mode)
1429 enum machine_mode mode ATTRIBUTE_UNUSED;
1431 switch (GET_CODE (op))
1439 /* @@ What is this test doing? Why not use `mode'? */
1440 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1441 || GET_MODE (op) == DImode
1442 || GET_MODE_CLASS (GET_MODE (XEXP (op, 0))) == MODE_FLOAT
1443 || GET_MODE (XEXP (op, 0)) == DImode
1444 || GET_MODE_CLASS (GET_MODE (XEXP (op, 1))) == MODE_FLOAT
1445 || GET_MODE (XEXP (op, 1)) == DImode)
1453 /* Return true if the code of this rtx pattern is EQ or NE. */
1456 equality_op (op, mode)
1458 enum machine_mode mode ATTRIBUTE_UNUSED;
1460 return (GET_CODE (op) == EQ || GET_CODE (op) == NE);
1463 /* Return true if the code of this rtx pattern is pc or label_ref. */
1466 pc_or_label_ref (op, mode)
1468 enum machine_mode mode ATTRIBUTE_UNUSED;
1470 return (GET_CODE (op) == PC || GET_CODE (op) == LABEL_REF);
1473 /* Output to FILE the start of the assembler file. */
1475 /* This definition must match lang_independent_options from toplev.c. */
1476 struct m88k_lang_independent_options
1481 const char *description;
1484 static void output_options PARAMS ((FILE *,
1485 struct m88k_lang_independent_options *,
1487 struct m88k_lang_independent_options *,
1488 int, int, int, const char *, const char *,
1492 output_option (file, sep, type, name, indent, pos, max)
1501 if ((long)(strlen (sep) + strlen (type) + strlen (name) + pos) > max)
1503 fprintf (file, indent);
1504 return fprintf (file, "%s%s", type, name);
1506 return pos + fprintf (file, "%s%s%s", sep, type, name);
1509 static struct { const char *name; int value; } m_options[] = TARGET_SWITCHES;
1512 output_options (file, f_options, f_len, W_options, W_len,
1513 pos, max, sep, indent, term)
1515 struct m88k_lang_independent_options *f_options;
1516 struct m88k_lang_independent_options *W_options;
1527 pos = output_option (file, sep, "-O", "", indent, pos, max);
1528 if (write_symbols != NO_DEBUG)
1529 pos = output_option (file, sep, "-g", "", indent, pos, max);
1530 if (flag_traditional)
1531 pos = output_option (file, sep, "-traditional", "", indent, pos, max);
1533 pos = output_option (file, sep, "-p", "", indent, pos, max);
1534 if (profile_block_flag)
1535 pos = output_option (file, sep, "-a", "", indent, pos, max);
1537 for (j = 0; j < f_len; j++)
1538 if (*f_options[j].variable == f_options[j].on_value)
1539 pos = output_option (file, sep, "-f", f_options[j].string,
1542 for (j = 0; j < W_len; j++)
1543 if (*W_options[j].variable == W_options[j].on_value)
1544 pos = output_option (file, sep, "-W", W_options[j].string,
1547 for (j = 0; j < (long) (sizeof m_options / sizeof m_options[0]); j++)
1548 if (m_options[j].name[0] != '\0'
1549 && m_options[j].value > 0
1550 && ((m_options[j].value & target_flags)
1551 == m_options[j].value))
1552 pos = output_option (file, sep, "-m", m_options[j].name,
1555 if (m88k_short_data)
1556 pos = output_option (file, sep, "-mshort-data-", m88k_short_data,
1559 fprintf (file, term);
1563 output_file_start (file, f_options, f_len, W_options, W_len)
1565 struct m88k_lang_independent_options *f_options;
1566 struct m88k_lang_independent_options *W_options;
1571 ASM_FIRST_LINE (file);
1574 fprintf (file, "\t%s\n", REQUIRES_88110_ASM_OP);
1575 output_file_directive (file, main_input_filename);
1576 /* Switch to the data section so that the coffsem symbol and the
1577 gcc2_compiled. symbol aren't in the text section. */
1581 if (TARGET_IDENTIFY_REVISION)
1585 time_t now = time ((time_t *)0);
1586 sprintf (indent, "]\"\n\t%s\t \"@(#)%s [", IDENT_ASM_OP, main_input_filename);
1587 fprintf (file, indent+3);
1588 pos = fprintf (file, "gcc %s, %.24s,", version_string, ctime (&now));
1590 /* ??? It would be nice to call print_switch_values here (and thereby
1591 let us delete output_options) but this is kept in until it is known
1592 whether the change in content format matters. */
1593 output_options (file, f_options, f_len, W_options, W_len,
1594 pos, 150 - strlen (indent), " ", indent, "]\"\n\n");
1596 fprintf (file, "]\"\n");
1597 print_switch_values (file, 0, 150 - strlen (indent),
1598 indent + 3, " ", "]\"\n");
1603 /* Output an ascii string. */
1606 output_ascii (file, opcode, max, p, size)
1610 const unsigned char *p;
1616 register int num = 0;
1618 fprintf (file, "\t%s\t \"", opcode);
1619 for (i = 0; i < size; i++)
1621 register int c = p[i];
1625 fprintf (file, "\"\n\t%s\t \"", opcode);
1629 if (c == '\"' || c == '\\')
1637 else if (in_escape && c >= '0' && c <= '9')
1639 /* If a digit follows an octal-escape, the Vax assembler fails
1640 to stop reading the escape after three digits. Continue to
1641 output the values as an octal-escape until a non-digit is
1643 fprintf (file, "\\%03o", c);
1646 else if ((c >= ' ' && c < 0177) || (c == '\t'))
1656 /* Some assemblers can't handle \a, \v, or \?. */
1657 case '\f': c = 'f'; goto escape;
1658 case '\b': c = 'b'; goto escape;
1659 case '\r': c = 'r'; goto escape;
1660 case '\n': c = 'n'; goto escape;
1663 fprintf (file, "\\%03o", c);
1668 fprintf (file, "\"\n");
1671 /* Output a label (allows insn-output.c to be compiled without including
1672 m88k.c or needing to include stdio.h). */
1675 output_label (label_number)
1678 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", label_number);
1681 /* Generate the assembly code for function entry.
1683 The prologue is responsible for setting up the stack frame,
1684 initializing the frame pointer register, saving registers that must be
1685 saved, and allocating SIZE additional bytes of storage for the
1686 local variables. SIZE is an integer. FILE is a stdio
1687 stream to which the assembler code should be output.
1689 The label for the beginning of the function need not be output by this
1690 macro. That has already been done when the macro is run.
1692 To determine which registers to save, the macro can refer to the array
1693 `regs_ever_live': element R is nonzero if hard register
1694 R is used anywhere within the function. This implies the
1695 function prologue should save register R, but not if it is one
1696 of the call-used registers.
1698 On machines where functions may or may not have frame-pointers, the
1699 function entry code must vary accordingly; it must set up the frame
1700 pointer if one is wanted, and not otherwise. To determine whether a
1701 frame pointer is in wanted, the macro can refer to the variable
1702 `frame_pointer_needed'. The variable's value will be 1 at run
1703 time in a function that needs a frame pointer.
1705 On machines where an argument may be passed partly in registers and
1706 partly in memory, this macro must examine the variable
1707 `current_function_pretend_args_size', and allocate that many bytes
1708 of uninitialized space on the stack just underneath the first argument
1709 arriving on the stack. (This may not be at the very end of the stack,
1710 if the calling sequence has pushed anything else since pushing the stack
1711 arguments. But usually, on such machines, nothing else has been pushed
1712 yet, because the function prologue itself does all the pushing.)
1714 If `ACCUMULATE_OUTGOING_ARGS' is defined, the variable
1715 `current_function_outgoing_args_size' contains the size in bytes
1716 required for the outgoing arguments. This macro must add that
1717 amount of uninitialized space to very bottom of the stack.
1719 The stack frame we use looks like this:
1722 |==============================================|
1724 |==============================================|
1725 | [caller's outgoing memory arguments] |
1726 |==============================================|
1727 | caller's outgoing argument area (32 bytes) |
1728 sp -> |==============================================| <- ap
1729 | [local variable space] |
1730 |----------------------------------------------|
1731 | [return address (r1)] |
1732 |----------------------------------------------|
1733 | [previous frame pointer (r30)] |
1734 |==============================================| <- fp
1735 | [preserved registers (r25..r14)] |
1736 |----------------------------------------------|
1737 | [preserved registers (x29..x22)] |
1738 |==============================================|
1739 | [dynamically allocated space (alloca)] |
1740 |==============================================|
1741 | [callee's outgoing memory arguments] |
1742 |==============================================|
1743 | [callee's outgoing argument area (32 bytes)] |
1744 |==============================================| <- sp
1748 r1 and r30 must be saved if debugging.
1750 fp (if present) is located two words down from the local
1754 static void emit_add PARAMS ((rtx, rtx, int));
1755 static void preserve_registers PARAMS ((int, int));
1756 static void emit_ldst PARAMS ((int, int, enum machine_mode, int));
1757 static void output_tdesc PARAMS ((FILE *, int));
1758 static int uses_arg_area_p PARAMS ((void));
1762 static char save_regs[FIRST_PSEUDO_REGISTER];
1763 static int frame_laid_out;
1764 static int frame_size;
1765 static int variable_args_p;
1766 static int epilogue_marked;
1767 static int prologue_marked;
1769 #define FIRST_OCS_PRESERVE_REGISTER 14
1770 #define LAST_OCS_PRESERVE_REGISTER 30
1772 #define FIRST_OCS_EXTENDED_PRESERVE_REGISTER (32 + 22)
1773 #define LAST_OCS_EXTENDED_PRESERVE_REGISTER (32 + 31)
1775 #define STACK_UNIT_BOUNDARY (STACK_BOUNDARY / BITS_PER_UNIT)
1776 #define ROUND_CALL_BLOCK_SIZE(BYTES) \
1777 (((BYTES) + (STACK_UNIT_BOUNDARY - 1)) & ~(STACK_UNIT_BOUNDARY - 1))
1779 /* Establish the position of the FP relative to the SP. This is done
1780 either during FUNCTION_PROLOGUE or by INITIAL_ELIMINATION_OFFSET. */
1783 m88k_layout_frame ()
1789 bzero ((char *) &save_regs[0], sizeof (save_regs));
1790 sp_size = nregs = nxregs = 0;
1791 frame_size = get_frame_size ();
1793 /* Since profiling requires a call, make sure r1 is saved. */
1794 if (profile_flag || profile_block_flag)
1797 /* If we are producing debug information, store r1 and r30 where the
1798 debugger wants to find them (r30 at r30+0, r1 at r30+4). Space has
1799 already been reserved for r1/r30 in STARTING_FRAME_OFFSET. */
1800 if (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION)
1803 /* If there is a call, alloca is used, __builtin_alloca is used, or
1804 a dynamic-sized object is defined, add the 8 additional words
1805 for the callee's argument area. The common denominator is that the
1806 FP is required. may_call_alloca only gets calls to alloca;
1807 current_function_calls_alloca gets alloca and __builtin_alloca. */
1808 if (regs_ever_live[1] || frame_pointer_needed)
1811 sp_size += REG_PARM_STACK_SPACE (0);
1814 /* If we are producing PIC, save the addressing base register and r1. */
1815 if (flag_pic && current_function_uses_pic_offset_table)
1817 save_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
1821 /* If a frame is requested, save the previous FP, and the return
1822 address (r1), so that a traceback can be done without using tdesc
1823 information. Otherwise, simply save the FP if it is used as
1824 a preserve register. */
1825 if (frame_pointer_needed)
1826 save_regs[FRAME_POINTER_REGNUM] = save_regs[1] = 1;
1827 else if (regs_ever_live[FRAME_POINTER_REGNUM])
1828 save_regs[FRAME_POINTER_REGNUM] = 1;
1830 /* Figure out which extended register(s) needs to be saved. */
1831 for (regno = FIRST_EXTENDED_REGISTER + 1; regno < FIRST_PSEUDO_REGISTER;
1833 if (regs_ever_live[regno] && ! call_used_regs[regno])
1835 save_regs[regno] = 1;
1839 /* Figure out which normal register(s) needs to be saved. */
1840 for (regno = 2; regno < FRAME_POINTER_REGNUM; regno++)
1841 if (regs_ever_live[regno] && ! call_used_regs[regno])
1843 save_regs[regno] = 1;
1847 /* Achieve greatest use of double memory ops. Either we end up saving
1848 r30 or we use that slot to align the registers we do save. */
1849 if (nregs >= 2 && save_regs[1] && !save_regs[FRAME_POINTER_REGNUM])
1852 nregs += save_regs[1] + save_regs[FRAME_POINTER_REGNUM];
1853 /* if we need to align extended registers, add a word */
1854 if (nxregs > 0 && (nregs & 1) != 0)
1856 sp_size += 4 * nregs;
1857 sp_size += 8 * nxregs;
1858 sp_size += current_function_outgoing_args_size;
1860 /* The first two saved registers are placed above the new frame pointer
1861 if any. In the only case this matters, they are r1 and r30. */
1862 if (frame_pointer_needed || sp_size)
1863 m88k_fp_offset = ROUND_CALL_BLOCK_SIZE (sp_size - STARTING_FRAME_OFFSET);
1865 m88k_fp_offset = -STARTING_FRAME_OFFSET;
1866 m88k_stack_size = m88k_fp_offset + STARTING_FRAME_OFFSET;
1868 /* First, combine m88k_stack_size and size. If m88k_stack_size is
1869 non-zero, align the frame size to 8 mod 16; otherwise align the
1870 frame size to 0 mod 16. (If stacks are 8 byte aligned, this ends
1874 = ((m88k_stack_size ? STACK_UNIT_BOUNDARY - STARTING_FRAME_OFFSET : 0)
1875 - (frame_size % STACK_UNIT_BOUNDARY));
1879 need += STACK_UNIT_BOUNDARY;
1880 (void) assign_stack_local (BLKmode, need, BITS_PER_UNIT);
1881 frame_size = get_frame_size ();
1884 = ROUND_CALL_BLOCK_SIZE (m88k_stack_size + frame_size
1885 + current_function_pretend_args_size);
1889 /* Return true if this function is known to have a null prologue. */
1894 if (! reload_completed)
1896 if (! frame_laid_out)
1897 m88k_layout_frame ();
1898 return (! frame_pointer_needed
1901 && m88k_stack_size == 0);
1904 /* Determine if the current function has any references to the arg pointer.
1905 This is done indirectly by examining the DECL_ARGUMENTS' DECL_RTL.
1906 It is OK to return TRUE if there are no references, but FALSE must be
1914 if (current_function_decl == 0
1915 || current_function_varargs
1919 for (parm = DECL_ARGUMENTS (current_function_decl);
1921 parm = TREE_CHAIN (parm))
1923 if (DECL_RTL (parm) == 0
1924 || GET_CODE (DECL_RTL (parm)) == MEM)
1927 if (DECL_INCOMING_RTL (parm) == 0
1928 || GET_CODE (DECL_INCOMING_RTL (parm)) == MEM)
1935 m88k_begin_prologue (stream, size)
1936 FILE *stream ATTRIBUTE_UNUSED;
1937 int size ATTRIBUTE_UNUSED;
1939 if (TARGET_OMIT_LEAF_FRAME_POINTER && ! quiet_flag && leaf_function_p ())
1940 fprintf (stderr, "$");
1942 m88k_prologue_done = 1; /* it's ok now to put out ln directives */
1946 m88k_end_prologue (stream)
1949 if (TARGET_OCS_DEBUG_INFO && !prologue_marked)
1951 PUT_OCS_FUNCTION_START (stream);
1952 prologue_marked = 1;
1954 /* If we've already passed the start of the epilogue, say that
1955 it starts here. This marks the function as having a null body,
1956 but at a point where the return address is in a known location.
1958 Originally, I thought this couldn't happen, but the pic prologue
1959 for leaf functions ends with the instruction that restores the
1960 return address from the temporary register. If the temporary
1961 register is never used, that instruction can float all the way
1962 to the end of the function. */
1963 if (epilogue_marked)
1964 PUT_OCS_FUNCTION_END (stream);
1969 m88k_expand_prologue ()
1971 m88k_layout_frame ();
1973 if (TARGET_OPTIMIZE_ARG_AREA
1975 && ! uses_arg_area_p ())
1977 /* The incoming argument area is used for stack space if it is not
1978 used (or if -mno-optimize-arg-area is given). */
1979 if ((m88k_stack_size -= REG_PARM_STACK_SPACE (0)) < 0)
1980 m88k_stack_size = 0;
1983 if (m88k_stack_size)
1984 emit_add (stack_pointer_rtx, stack_pointer_rtx, -m88k_stack_size);
1986 if (nregs || nxregs)
1987 preserve_registers (m88k_fp_offset + 4, 1);
1989 if (frame_pointer_needed)
1990 emit_add (frame_pointer_rtx, stack_pointer_rtx, m88k_fp_offset);
1992 if (flag_pic && save_regs[PIC_OFFSET_TABLE_REGNUM])
1994 rtx return_reg = gen_rtx_REG (SImode, 1);
1995 rtx label = gen_label_rtx ();
2000 temp_reg = gen_rtx_REG (SImode, TEMP_REGNUM);
2001 emit_move_insn (temp_reg, return_reg);
2003 emit_insn (gen_locate1 (pic_offset_table_rtx, label));
2004 emit_insn (gen_locate2 (pic_offset_table_rtx, label));
2005 emit_insn (gen_addsi3 (pic_offset_table_rtx,
2006 pic_offset_table_rtx, return_reg));
2008 emit_move_insn (return_reg, temp_reg);
2010 if (profile_flag || profile_block_flag)
2011 emit_insn (gen_blockage ());
2014 /* This function generates the assembly code for function exit,
2015 on machines that need it. Args are same as for FUNCTION_PROLOGUE.
2017 The function epilogue should not depend on the current stack pointer!
2018 It should use the frame pointer only, if there is a frame pointer.
2019 This is mandatory because of alloca; we also take advantage of it to
2020 omit stack adjustments before returning. */
2023 m88k_begin_epilogue (stream)
2026 if (TARGET_OCS_DEBUG_INFO && !epilogue_marked && prologue_marked)
2028 PUT_OCS_FUNCTION_END (stream);
2030 epilogue_marked = 1;
2034 m88k_end_epilogue (stream, size)
2036 int size ATTRIBUTE_UNUSED;
2038 rtx insn = get_last_insn ();
2040 if (TARGET_OCS_DEBUG_INFO && !epilogue_marked)
2041 PUT_OCS_FUNCTION_END (stream);
2043 /* If the last insn isn't a BARRIER, we must write a return insn. This
2044 should only happen if the function has no prologue and no body. */
2045 if (GET_CODE (insn) == NOTE)
2046 insn = prev_nonnote_insn (insn);
2047 if (insn == 0 || GET_CODE (insn) != BARRIER)
2048 fprintf (stream, "\tjmp\t %s\n", reg_names[1]);
2050 /* If the last insn is a barrier, and the insn before that is a call,
2051 then add a nop instruction so that tdesc can walk the stack correctly
2052 even though there is no epilogue. (Otherwise, the label for the
2053 end of the tdesc region ends up at the start of the next function. */
2054 if (insn && GET_CODE (insn) == BARRIER)
2056 insn = prev_nonnote_insn (insn);
2057 if (insn && GET_CODE (insn) == CALL_INSN)
2058 fprintf (stream, "\tor\t %s,%s,%s\n",reg_names[0],reg_names[0],reg_names[0]);
2061 output_short_branch_defs (stream);
2063 fprintf (stream, "\n");
2065 if (TARGET_OCS_DEBUG_INFO)
2066 output_tdesc (stream, m88k_fp_offset + 4);
2068 m88k_function_number++;
2069 m88k_prologue_done = 0; /* don't put out ln directives */
2070 variable_args_p = 0; /* has variable args */
2072 epilogue_marked = 0;
2073 prologue_marked = 0;
2077 m88k_expand_epilogue ()
2079 #if (MONITOR_GCC & 0x4) /* What are interesting prologue/epilogue values? */
2080 fprintf (stream, "; size = %d, m88k_fp_offset = %d, m88k_stack_size = %d\n",
2081 size, m88k_fp_offset, m88k_stack_size);
2084 if (frame_pointer_needed)
2085 emit_add (stack_pointer_rtx, frame_pointer_rtx, -m88k_fp_offset);
2087 if (nregs || nxregs)
2088 preserve_registers (m88k_fp_offset + 4, 0);
2090 if (m88k_stack_size)
2091 emit_add (stack_pointer_rtx, stack_pointer_rtx, m88k_stack_size);
2094 /* Emit insns to set DSTREG to SRCREG + AMOUNT during the prologue or
2098 emit_add (dstreg, srcreg, amount)
2103 rtx incr = GEN_INT (abs (amount));
2105 if (! ADD_INTVAL (amount))
2107 rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM);
2108 emit_move_insn (temp, incr);
2111 emit_insn ((amount < 0 ? gen_subsi3 : gen_addsi3) (dstreg, srcreg, incr));
2114 /* Save/restore the preserve registers. base is the highest offset from
2115 r31 at which a register is stored. store_p is true if stores are to
2116 be done; otherwise loads. */
2119 preserve_registers (base, store_p)
2128 } mem_op[FIRST_PSEUDO_REGISTER];
2129 struct mem_op *mo_ptr = mem_op;
2131 /* The 88open OCS mandates that preserved registers be stored in
2132 increasing order. For compatibility with current practice,
2133 the order is r1, r30, then the preserve registers. */
2138 /* An extra word is given in this case to make best use of double
2140 if (nregs > 2 && !save_regs[FRAME_POINTER_REGNUM])
2142 emit_ldst (store_p, 1, SImode, offset);
2147 /* Walk the registers to save recording all single memory operations. */
2148 for (regno = FRAME_POINTER_REGNUM; regno > 1; regno--)
2149 if (save_regs[regno])
2151 if ((offset & 7) != 4 || (regno & 1) != 1 || !save_regs[regno-1])
2154 mo_ptr->regno = regno;
2155 mo_ptr->offset = offset;
2166 /* Walk the registers to save recording all double memory operations.
2167 This avoids a delay in the epilogue (ld.d/ld). */
2169 for (regno = FRAME_POINTER_REGNUM; regno > 1; regno--)
2170 if (save_regs[regno])
2172 if ((offset & 7) != 4 || (regno & 1) != 1 || !save_regs[regno-1])
2179 mo_ptr->regno = regno-1;
2180 mo_ptr->offset = offset-4;
2187 /* Walk the extended registers to record all memory operations. */
2188 /* Be sure the offset is double word aligned. */
2189 offset = (offset - 1) & ~7;
2190 for (regno = FIRST_PSEUDO_REGISTER - 1; regno > FIRST_EXTENDED_REGISTER;
2192 if (save_regs[regno])
2195 mo_ptr->regno = regno;
2196 mo_ptr->offset = offset;
2203 /* Output the memory operations. */
2204 for (mo_ptr = mem_op; mo_ptr->regno; mo_ptr++)
2207 emit_ldst (store_p, mo_ptr->regno,
2208 (mo_ptr->nregs > 1 ? DImode : SImode),
2214 emit_ldst (store_p, regno, mode, offset)
2217 enum machine_mode mode;
2220 rtx reg = gen_rtx_REG (mode, regno);
2223 if (SMALL_INTVAL (offset))
2225 mem = gen_rtx_MEM (mode, plus_constant (stack_pointer_rtx, offset));
2229 /* offset is too large for immediate index must use register */
2231 rtx disp = GEN_INT (offset);
2232 rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM);
2233 rtx regi = gen_rtx_PLUS (SImode, stack_pointer_rtx, temp);
2235 emit_move_insn (temp, disp);
2236 mem = gen_rtx_MEM (mode, regi);
2240 emit_move_insn (mem, reg);
2242 emit_move_insn (reg, mem);
2245 /* Convert the address expression REG to a CFA offset. */
2248 m88k_debugger_offset (reg, offset)
2250 register int offset;
2252 if (GET_CODE (reg) == PLUS)
2254 offset = INTVAL (XEXP (reg, 1));
2255 reg = XEXP (reg, 0);
2258 /* Put the offset in terms of the CFA (arg pointer). */
2259 if (reg == frame_pointer_rtx)
2260 offset += m88k_fp_offset - m88k_stack_size;
2261 else if (reg == stack_pointer_rtx)
2262 offset -= m88k_stack_size;
2263 else if (reg != arg_pointer_rtx)
2265 #if (MONITOR_GCC & 0x10) /* Watch for suspicious symbolic locations. */
2266 if (! (GET_CODE (reg) == REG
2267 && REGNO (reg) >= FIRST_PSEUDO_REGISTER))
2268 warning ("Internal gcc error: Can't express symbolic location");
2276 /* Output the 88open OCS proscribed text description information.
2279 0 22: info-byte-length (16 or 20 bytes)
2280 0 2: info-alignment (word 2)
2281 1 32: info-protocol (version 1 or 2(pic))
2282 2 32: starting-address (inclusive, not counting prologue)
2283 3 32: ending-address (exclusive, not counting epilog)
2284 4 8: info-variant (version 1 or 3(extended registers))
2285 4 17: register-save-mask (from register 14 to 30)
2287 4 1: return-address-info-discriminant
2288 4 5: frame-address-register
2289 5 32: frame-address-offset
2290 6 32: return-address-info
2291 7 32: register-save-offset
2292 8 16: extended-register-save-mask (x16 - x31)
2293 8 16: extended-register-save-offset (WORDS from register-save-offset) */
2296 output_tdesc (file, offset)
2301 long mask, return_address_info, register_save_offset;
2302 long xmask, xregister_save_offset;
2305 for (mask = 0, i = 0, regno = FIRST_OCS_PRESERVE_REGISTER;
2306 regno <= LAST_OCS_PRESERVE_REGISTER;
2310 if (save_regs[regno])
2317 for (xmask = 0, j = 0, regno = FIRST_OCS_EXTENDED_PRESERVE_REGISTER;
2318 regno <= LAST_OCS_EXTENDED_PRESERVE_REGISTER;
2322 if (save_regs[regno])
2331 if ((nxregs > 0 || nregs > 2) && !save_regs[FRAME_POINTER_REGNUM])
2333 return_address_info = - m88k_stack_size + offset;
2334 register_save_offset = return_address_info - i*4;
2338 return_address_info = 1;
2339 register_save_offset = - m88k_stack_size + offset + 4 - i*4;
2342 xregister_save_offset = - (j * 2 + ((register_save_offset >> 2) & 1));
2346 fprintf (file, "\t%s\t %d,%d", INT_ASM_OP, /* 8:0,22:(20 or 16),2:2 */
2347 (((xmask != 0) ? 20 : 16) << 2) | 2,
2350 ASM_GENERATE_INTERNAL_LABEL (buf, OCS_START_PREFIX, m88k_function_number);
2351 fprintf (file, ",%s%s", buf+1, flag_pic ? "#rel" : "");
2352 ASM_GENERATE_INTERNAL_LABEL (buf, OCS_END_PREFIX, m88k_function_number);
2353 fprintf (file, ",%s%s", buf+1, flag_pic ? "#rel" : "");
2355 fprintf (file, ",0x%x,0x%x,0x%lx,0x%lx",
2356 /* 8:1,17:0x%.3x,1:0,1:%d,5:%d */
2357 (int)(((xmask ? 3 : 1) << (17+1+1+5))
2359 | ((!!save_regs[1]) << 5)
2360 | (frame_pointer_needed
2361 ? FRAME_POINTER_REGNUM
2362 : STACK_POINTER_REGNUM)),
2363 (m88k_stack_size - (frame_pointer_needed ? m88k_fp_offset : 0)),
2364 return_address_info,
2365 register_save_offset);
2367 fprintf (file, ",0x%lx%04lx", xmask, (0xffff & xregister_save_offset));
2373 /* Output assembler code to FILE to increment profiler label # LABELNO
2374 for profiling a function entry. NAME is the mcount function name
2375 (varies), SAVEP indicates whether the parameter registers need to
2376 be saved and restored. */
2379 output_function_profiler (file, labelno, name, savep)
2387 const char *temp = (savep ? reg_names[2] : reg_names[10]);
2389 /* Remember to update FUNCTION_PROFILER_LENGTH. */
2393 fprintf (file, "\tsubu\t %s,%s,64\n", reg_names[31], reg_names[31]);
2394 fprintf (file, "\tst.d\t %s,%s,32\n", reg_names[2], reg_names[31]);
2395 fprintf (file, "\tst.d\t %s,%s,40\n", reg_names[4], reg_names[31]);
2396 fprintf (file, "\tst.d\t %s,%s,48\n", reg_names[6], reg_names[31]);
2397 fprintf (file, "\tst.d\t %s,%s,56\n", reg_names[8], reg_names[31]);
2400 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
2403 fprintf (file, "\tor.u\t %s,%s,%shi16(%s#got_rel)\n",
2404 temp, reg_names[0], m88k_pound_sign, &label[1]);
2405 fprintf (file, "\tor\t %s,%s,%slo16(%s#got_rel)\n",
2406 temp, temp, m88k_pound_sign, &label[1]);
2407 sprintf (dbi, "\tld\t %s,%s,%s\n", temp,
2408 reg_names[PIC_OFFSET_TABLE_REGNUM], temp);
2412 sprintf (dbi, "\tld\t %s,%s,%s#got_rel\n", temp,
2413 reg_names[PIC_OFFSET_TABLE_REGNUM], &label[1]);
2417 fprintf (file, "\tor.u\t %s,%s,%shi16(%s)\n",
2418 temp, reg_names[0], m88k_pound_sign, &label[1]);
2419 sprintf (dbi, "\tor\t %s,%s,%slo16(%s)\n",
2420 temp, temp, m88k_pound_sign, &label[1]);
2424 fprintf (file, "\tbsr.n\t %s#plt\n", name);
2426 fprintf (file, "\tbsr.n\t %s\n", name);
2431 fprintf (file, "\tld.d\t %s,%s,32\n", reg_names[2], reg_names[31]);
2432 fprintf (file, "\tld.d\t %s,%s,40\n", reg_names[4], reg_names[31]);
2433 fprintf (file, "\tld.d\t %s,%s,48\n", reg_names[6], reg_names[31]);
2434 fprintf (file, "\tld.d\t %s,%s,56\n", reg_names[8], reg_names[31]);
2435 fprintf (file, "\taddu\t %s,%s,64\n", reg_names[31], reg_names[31]);
2439 /* Output assembler code to FILE to initialize basic-block profiling for
2440 the current module. LABELNO is unique to each instance. */
2443 output_function_block_profiler (file, labelno)
2450 /* Remember to update FUNCTION_BLOCK_PROFILER_LENGTH. */
2452 ASM_GENERATE_INTERNAL_LABEL (block, "LPBX", 0);
2453 ASM_GENERATE_INTERNAL_LABEL (label, "LPY", labelno);
2455 /* @@ Need to deal with PIC. I'm not sure what the requirements are on
2456 register usage, so I used r26/r27 to be safe. */
2457 fprintf (file, "\tor.u\t %s,%s,%shi16(%s)\n", reg_names[27], reg_names[0],
2458 m88k_pound_sign, &block[1]);
2459 fprintf (file, "\tld\t %s,%s,%slo16(%s)\n", reg_names[26], reg_names[27],
2460 m88k_pound_sign, &block[1]);
2461 fprintf (file, "\tbcnd\t %sne0,%s,%s\n",
2462 m88k_pound_sign, reg_names[26], &label[1]);
2463 fprintf (file, "\tsubu\t %s,%s,64\n", reg_names[31], reg_names[31]);
2464 fprintf (file, "\tst.d\t %s,%s,32\n", reg_names[2], reg_names[31]);
2465 fprintf (file, "\tst.d\t %s,%s,40\n", reg_names[4], reg_names[31]);
2466 fprintf (file, "\tst.d\t %s,%s,48\n", reg_names[6], reg_names[31]);
2467 fprintf (file, "\tst.d\t %s,%s,56\n", reg_names[8], reg_names[31]);
2468 fputs ("\tbsr.n\t ", file);
2469 ASM_OUTPUT_LABELREF (file, "__bb_init_func");
2471 fprintf (file, "\tor\t %s,%s,%slo16(%s)\n", reg_names[2], reg_names[27],
2472 m88k_pound_sign, &block[1]);
2473 fprintf (file, "\tld.d\t %s,%s,32\n", reg_names[2], reg_names[31]);
2474 fprintf (file, "\tld.d\t %s,%s,40\n", reg_names[4], reg_names[31]);
2475 fprintf (file, "\tld.d\t %s,%s,48\n", reg_names[6], reg_names[31]);
2476 fprintf (file, "\tld.d\t %s,%s,56\n", reg_names[8], reg_names[31]);
2477 fprintf (file, "\taddu\t %s,%s,64\n", reg_names[31], reg_names[31]);
2478 ASM_OUTPUT_INTERNAL_LABEL (file, "LPY", labelno);
2481 /* Output assembler code to FILE to increment the count associated with
2482 the basic block number BLOCKNO. */
2485 output_block_profiler (file, blockno)
2491 /* Remember to update BLOCK_PROFILER_LENGTH. */
2493 ASM_GENERATE_INTERNAL_LABEL (block, "LPBX", 2);
2495 /* @@ Need to deal with PIC. I'm not sure what the requirements are on
2496 register usage, so I used r26/r27 to be safe. */
2497 fprintf (file, "\tor.u\t %s,%s,%shi16(%s+%d)\n", reg_names[27], reg_names[0],
2498 m88k_pound_sign, &block[1], 4 * blockno);
2499 fprintf (file, "\tld\t %s,%s,%slo16(%s+%d)\n", reg_names[26], reg_names[27],
2500 m88k_pound_sign, &block[1], 4 * blockno);
2501 fprintf (file, "\taddu\t %s,%s,1\n", reg_names[26], reg_names[26]);
2502 fprintf (file, "\tst\t %s,%s,%slo16(%s+%d)\n", reg_names[26], reg_names[27],
2503 m88k_pound_sign, &block[1], 4 * blockno);
2506 /* Determine whether a function argument is passed in a register, and
2509 The arguments are CUM, which summarizes all the previous
2510 arguments; MODE, the machine mode of the argument; TYPE,
2511 the data type of the argument as a tree node or 0 if that is not known
2512 (which happens for C support library functions); and NAMED,
2513 which is 1 for an ordinary argument and 0 for nameless arguments that
2514 correspond to `...' in the called function's prototype.
2516 The value of the expression should either be a `reg' RTX for the
2517 hard register in which to pass the argument, or zero to pass the
2518 argument on the stack.
2520 On the m88000 the first eight words of args are normally in registers
2521 and the rest are pushed. Double precision floating point must be
2522 double word aligned (and if in a register, starting on an even
2523 register). Structures and unions which are not 4 byte, and word
2524 aligned are passed in memory rather than registers, even if they
2525 would fit completely in the registers under OCS rules.
2527 Note that FUNCTION_ARG and FUNCTION_INCOMING_ARG were different.
2528 For structures that are passed in memory, but could have been
2529 passed in registers, we first load the structure into the
2530 register, and then when the last argument is passed, we store
2531 the registers into the stack locations. This fixes some bugs
2532 where GCC did not expect to have register arguments, followed
2533 by stack arguments, followed by register arguments. */
2536 m88k_function_arg (args_so_far, mode, type, named)
2537 CUMULATIVE_ARGS args_so_far;
2538 enum machine_mode mode;
2540 int named ATTRIBUTE_UNUSED;
2544 if (type != 0 /* undo putting struct in register */
2545 && (TREE_CODE (type) == RECORD_TYPE || TREE_CODE (type) == UNION_TYPE))
2548 if (mode == BLKmode && TARGET_WARN_PASS_STRUCT)
2549 warning ("argument #%d is a structure", args_so_far + 1);
2551 if ((args_so_far & 1) != 0
2552 && (mode == DImode || mode == DFmode
2553 || (type != 0 && TYPE_ALIGN (type) > 32)))
2558 return (rtx) 0; /* don't put args in registers */
2561 if (type == 0 && mode == BLKmode)
2562 abort (); /* m88k_function_arg argument `type' is NULL for BLKmode. */
2564 bytes = (mode != BLKmode) ? GET_MODE_SIZE (mode) : int_size_in_bytes (type);
2565 words = (bytes + 3) / 4;
2567 if (args_so_far + words > 8)
2568 return (rtx) 0; /* args have exhausted registers */
2570 else if (mode == BLKmode
2571 && (TYPE_ALIGN (type) != BITS_PER_WORD
2572 || bytes != UNITS_PER_WORD))
2575 return gen_rtx_REG (((mode == BLKmode) ? TYPE_MODE (type) : mode),
2579 /* Do what is necessary for `va_start'. We look at the current function
2580 to determine if stdargs or varargs is used and spill as necessary.
2581 We return a pointer to the spill area. */
2584 m88k_builtin_saveregs ()
2587 tree fntype = TREE_TYPE (current_function_decl);
2588 int argadj = ((!(TYPE_ARG_TYPES (fntype) != 0
2589 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
2590 != void_type_node)))
2591 ? -UNITS_PER_WORD : 0) + UNITS_PER_WORD - 1;
2594 variable_args_p = 1;
2597 if (CONSTANT_P (current_function_arg_offset_rtx))
2599 fixed = (XINT (current_function_arg_offset_rtx, 0)
2600 + argadj) / UNITS_PER_WORD;
2603 /* Allocate the register space, and store it as the __va_reg member. */
2604 addr = assign_stack_local (BLKmode, 8 * UNITS_PER_WORD, -1);
2605 MEM_ALIAS_SET (addr) = get_varargs_alias_set ();
2606 RTX_UNCHANGING_P (addr) = 1;
2607 RTX_UNCHANGING_P (XEXP (addr, 0)) = 1;
2609 /* Now store the incoming registers. */
2612 dest = change_address (addr, Pmode,
2613 plus_constant (XEXP (addr, 0),
2614 fixed * UNITS_PER_WORD));
2615 move_block_from_reg (2 + fixed, dest, 8 - fixed,
2616 UNITS_PER_WORD * (8 - fixed));
2618 if (current_function_check_memory_usage)
2620 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,
2622 GEN_INT (UNITS_PER_WORD * (8 - fixed)),
2623 TYPE_MODE (sizetype),
2624 GEN_INT (MEMORY_USE_RW),
2625 TYPE_MODE (integer_type_node));
2629 /* Return the address of the save area, but don't put it in a
2630 register. This fails when not optimizing and produces worse code
2632 return XEXP (addr, 0);
2635 /* Define the `__builtin_va_list' type for the ABI. */
2638 m88k_build_va_list ()
2640 tree field_reg, field_stk, field_arg, int_ptr_type_node, record;
2642 int_ptr_type_node = build_pointer_type (integer_type_node);
2644 record = make_node (RECORD_TYPE);
2646 field_arg = build_decl (FIELD_DECL, get_identifier ("__va_arg"),
2648 field_stk = build_decl (FIELD_DECL, get_identifier ("__va_stk"),
2650 field_reg = build_decl (FIELD_DECL, get_identifier ("__va_reg"),
2653 DECL_FIELD_CONTEXT (field_arg) = record;
2654 DECL_FIELD_CONTEXT (field_stk) = record;
2655 DECL_FIELD_CONTEXT (field_reg) = record;
2657 TYPE_FIELDS (record) = field_arg;
2658 TREE_CHAIN (field_arg) = field_stk;
2659 TREE_CHAIN (field_stk) = field_reg;
2661 layout_type (record);
2665 /* Implement `va_start' for varargs and stdarg. */
2668 m88k_va_start (stdarg_p, valist, nextarg)
2669 int stdarg_p ATTRIBUTE_UNUSED;
2671 rtx nextarg ATTRIBUTE_UNUSED;
2673 tree field_reg, field_stk, field_arg;
2674 tree reg, stk, arg, t;
2676 field_arg = TYPE_FIELDS (va_list_type_node);
2677 field_stk = TREE_CHAIN (field_arg);
2678 field_reg = TREE_CHAIN (field_stk);
2680 arg = build (COMPONENT_REF, TREE_TYPE (field_arg), valist, field_arg);
2681 stk = build (COMPONENT_REF, TREE_TYPE (field_stk), valist, field_stk);
2682 reg = build (COMPONENT_REF, TREE_TYPE (field_reg), valist, field_reg);
2684 /* Fill in the ARG member. */
2686 tree fntype = TREE_TYPE (current_function_decl);
2687 int argadj = ((!(TYPE_ARG_TYPES (fntype) != 0
2688 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
2689 != void_type_node)))
2690 ? -UNITS_PER_WORD : 0) + UNITS_PER_WORD - 1;
2693 if (CONSTANT_P (current_function_arg_offset_rtx))
2695 int fixed = (INTVAL (current_function_arg_offset_rtx)
2696 + argadj) / UNITS_PER_WORD;
2698 argsize = build_int_2 (fixed, 0);
2702 argsize = make_tree (integer_type_node,
2703 current_function_arg_offset_rtx);
2704 argsize = fold (build (PLUS_EXPR, integer_type_node, argsize,
2705 build_int_2 (argadj, 0)));
2706 argsize = fold (build (RSHIFT_EXPR, integer_type_node, argsize,
2707 build_int_2 (2, 0)));
2710 t = build (MODIFY_EXPR, TREE_TYPE (arg), arg, argsize);
2711 TREE_SIDE_EFFECTS (t) = 1;
2712 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2715 /* Store the arg pointer in the __va_stk member. */
2716 t = make_tree (TREE_TYPE (stk), virtual_incoming_args_rtx);
2717 t = build (MODIFY_EXPR, TREE_TYPE (stk), stk, t);
2718 TREE_SIDE_EFFECTS (t) = 1;
2719 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2721 /* Tuck the return value from __builtin_saveregs into __va_reg. */
2722 t = make_tree (TREE_TYPE (reg), expand_builtin_saveregs ());
2723 t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, t);
2724 TREE_SIDE_EFFECTS (t) = 1;
2725 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2728 /* Implement `va_arg'. */
2731 m88k_va_arg (valist, type)
2734 tree field_reg, field_stk, field_arg;
2735 tree reg, stk, arg, arg_align, base, t;
2736 int size, wsize, align, reg_p;
2739 field_arg = TYPE_FIELDS (va_list_type_node);
2740 field_stk = TREE_CHAIN (field_arg);
2741 field_reg = TREE_CHAIN (field_stk);
2743 arg = build (COMPONENT_REF, TREE_TYPE (field_arg), valist, field_arg);
2744 stk = build (COMPONENT_REF, TREE_TYPE (field_stk), valist, field_stk);
2745 reg = build (COMPONENT_REF, TREE_TYPE (field_reg), valist, field_reg);
2747 size = int_size_in_bytes (type);
2748 wsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2749 align = 1 << ((TYPE_ALIGN (type) / BITS_PER_UNIT) >> 3);
2750 reg_p = (AGGREGATE_TYPE_P (type)
2751 ? size == UNITS_PER_WORD && TYPE_ALIGN (type) == BITS_PER_WORD
2752 : size <= 2*UNITS_PER_WORD);
2754 /* Align __va_arg to the (doubleword?) boundary above. */
2755 t = build (PLUS_EXPR, TREE_TYPE (arg), arg, build_int_2 (align - 1, 0));
2756 arg_align = build (BIT_AND_EXPR, TREE_TYPE (t), t, build_int_2 (-align, -1));
2757 arg_align = save_expr (arg_align);
2759 /* Decide if we should read from stack or regs. */
2760 t = build (LT_EXPR, integer_type_node, arg_align, build_int_2 (8, 0));
2761 base = build (COND_EXPR, TREE_TYPE (reg), t, reg, stk);
2763 /* Find the final address. */
2764 t = build (PLUS_EXPR, TREE_TYPE (base), base, arg_align);
2765 addr_rtx = expand_expr (t, NULL_RTX, Pmode, EXPAND_NORMAL);
2766 addr_rtx = copy_to_reg (addr_rtx);
2768 /* Increment __va_arg. */
2769 t = build (PLUS_EXPR, TREE_TYPE (arg), arg_align, build_int_2 (wsize, 0));
2770 t = build (MODIFY_EXPR, TREE_TYPE (arg), arg, t);
2771 TREE_SIDE_EFFECTS (t) = 1;
2772 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2777 /* If cmpsi has not been generated, emit code to do the test. Return the
2778 expression describing the test of operator OP. */
2781 emit_test (op, mode)
2783 enum machine_mode mode;
2785 if (m88k_compare_reg == 0)
2786 emit_insn (gen_test (m88k_compare_op0, m88k_compare_op1));
2787 return (gen_rtx (op, mode, m88k_compare_reg, const0_rtx));
2790 /* Determine how to best perform cmpsi/bxx, where cmpsi has a constant
2791 operand. All tests with zero (albeit swapped) and all equality tests
2792 with a constant are done with bcnd. The remaining cases are swapped
2796 emit_bcnd (op, label)
2800 if (m88k_compare_op1 == const0_rtx)
2801 emit_jump_insn (gen_bcnd
2802 (gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx),
2804 else if (m88k_compare_op0 == const0_rtx)
2805 emit_jump_insn (gen_bcnd
2806 (gen_rtx (swap_condition (op),
2807 VOIDmode, m88k_compare_op1, const0_rtx),
2809 else if (op != EQ && op != NE)
2810 emit_jump_insn (gen_bxx (emit_test (op, VOIDmode), label));
2813 rtx zero = gen_reg_rtx (SImode);
2817 if (GET_CODE (m88k_compare_op1) == CONST_INT)
2819 reg = force_reg (SImode, m88k_compare_op0);
2820 constant = m88k_compare_op1;
2824 reg = force_reg (SImode, m88k_compare_op1);
2825 constant = m88k_compare_op0;
2827 value = INTVAL (constant);
2829 /* Perform an arithmetic computation to make the compared-to value
2830 zero, but avoid loosing if the bcnd is later changed into sxx. */
2831 if (SMALL_INTVAL (value))
2832 emit_jump_insn (gen_bxx (emit_test (op, VOIDmode), label));
2835 if (SMALL_INTVAL (-value))
2836 emit_insn (gen_addsi3 (zero, reg,
2839 emit_insn (gen_xorsi3 (zero, reg, constant));
2841 emit_jump_insn (gen_bcnd (gen_rtx (op, VOIDmode,
2848 /* Print an operand. Recognize special options, documented below. */
2851 print_operand (file, x, code)
2856 enum rtx_code xc = (x ? GET_CODE (x) : UNKNOWN);
2857 register int value = (xc == CONST_INT ? INTVAL (x) : 0);
2858 static int sequencep;
2859 static int reversep;
2863 if (code < 'B' || code > 'E')
2864 output_operand_lossage ("%R not followed by %B/C/D/E");
2866 xc = reverse_condition (xc);
2872 case '*': /* addressing base register for PIC */
2873 fputs (reg_names[PIC_OFFSET_TABLE_REGNUM], file); return;
2875 case '#': /* SVR4 pound-sign syntax character (empty if SVR3) */
2876 fputs (m88k_pound_sign, file); return;
2878 case 'V': /* Output a serializing instruction as needed if the operand
2879 (assumed to be a MEM) is a volatile load. */
2880 case 'v': /* ditto for a volatile store. */
2881 if (MEM_VOLATILE_P (x) && TARGET_SERIALIZE_VOLATILE)
2883 /* The m88110 implements two FIFO queues, one for loads and
2884 one for stores. These queues mean that loads complete in
2885 their issue order as do stores. An interaction between the
2886 history buffer and the store reservation station ensures
2887 that a store will not bypass load. Finally, a load will not
2888 bypass store, but only when they reference the same address.
2890 To avoid this reordering (a load bypassing a store) for
2891 volatile references, a serializing instruction is output.
2892 We choose the fldcr instruction as it does not serialize on
2893 the m88100 so that -m88000 code will not be degraded.
2895 The mechanism below is completed by having CC_STATUS_INIT set
2896 the code to the unknown value. */
2900 A problem with 88110 4.1 & 4.2 makes the use of fldcr for
2901 this purpose undesirable. Instead we will use tb1, this will
2902 cause serialization on the 88100 but such is life.
2905 static rtx last_addr = 0;
2906 if (code == 'V' /* Only need to serialize before a load. */
2907 && m88k_volatile_code != 'V' /* Loads complete in FIFO order. */
2908 && !(m88k_volatile_code == 'v'
2909 && GET_CODE (XEXP (x, 0)) == LO_SUM
2910 && rtx_equal_p (XEXP (XEXP (x, 0), 1), last_addr)))
2914 "fldcr\t %s,%scr63\n\t",
2916 "fldcr\t %s,%sfcr63\n\t",
2918 reg_names[0], m88k_pound_sign);
2920 "tb1\t 1,%s,0xff\n\t", reg_names[0]);
2922 m88k_volatile_code = code;
2923 last_addr = (GET_CODE (XEXP (x, 0)) == LO_SUM
2924 ? XEXP (XEXP (x, 0), 1) : 0);
2928 case 'X': /* print the upper 16 bits... */
2930 case 'x': /* print the lower 16 bits of the integer constant in hex */
2931 if (xc != CONST_INT)
2932 output_operand_lossage ("invalid %x/X value");
2933 fprintf (file, "0x%x", value & 0xffff); return;
2935 case 'H': /* print the low 16 bits of the negated integer constant */
2936 if (xc != CONST_INT)
2937 output_operand_lossage ("invalid %H value");
2939 case 'h': /* print the register or low 16 bits of the integer constant */
2942 if (xc != CONST_INT)
2943 output_operand_lossage ("invalid %h value");
2944 fprintf (file, "%d", value & 0xffff);
2947 case 'Q': /* print the low 8 bits of the negated integer constant */
2948 if (xc != CONST_INT)
2949 output_operand_lossage ("invalid %Q value");
2951 case 'q': /* print the register or low 8 bits of the integer constant */
2954 if (xc != CONST_INT)
2955 output_operand_lossage ("invalid %q value");
2956 fprintf (file, "%d", value & 0xff);
2959 case 'w': /* print the integer constant (X == 32 ? 0 : 32 - X) */
2960 if (xc != CONST_INT)
2961 output_operand_lossage ("invalid %o value");
2962 fprintf (file, "%d", value == 32 ? 0 : 32 - value);
2965 case 'p': /* print the logarithm of the integer constant */
2967 || (value = exact_log2 (value)) < 0)
2968 output_operand_lossage ("invalid %p value");
2969 fprintf (file, "%d", value);
2972 case 'S': /* compliment the value and then... */
2974 case 's': /* print the width and offset values forming the integer
2975 constant with a SET instruction. See integer_ok_for_set. */
2977 register unsigned mask, uval = value;
2978 register int top, bottom;
2980 if (xc != CONST_INT)
2981 output_operand_lossage ("invalid %s/S value");
2982 /* All the "one" bits must be contiguous. If so, MASK will be
2983 a power of two or zero. */
2984 mask = (uval | (uval - 1)) + 1;
2985 if (!(uval && POWER_OF_2_or_0 (mask)))
2986 output_operand_lossage ("invalid %s/S value");
2987 top = mask ? exact_log2 (mask) : 32;
2988 bottom = exact_log2 (uval & ~(uval - 1));
2989 fprintf (file,"%d<%d>", top - bottom, bottom);
2993 case 'P': /* print nothing if pc_rtx; output label_ref */
2994 if (xc == LABEL_REF)
2995 output_addr_const (file, x);
2997 output_operand_lossage ("invalid %P operand");
3000 case 'L': /* print 0 or 1 if operand is label_ref and then... */
3001 fputc (xc == LABEL_REF ? '1' : '0', file);
3002 case '.': /* print .n if delay slot is used */
3003 fputs ((final_sequence
3004 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence, 0, 0)))
3005 ? ".n\t" : "\t", file);
3008 case '!': /* Reverse the following condition. */
3012 case 'R': /* reverse the condition of the next print_operand
3013 if operand is a label_ref. */
3015 reversep = (xc == LABEL_REF);
3018 case 'B': /* bcnd branch values */
3019 fputs (m88k_pound_sign, file);
3022 case EQ: fputs ("eq0", file); return;
3023 case NE: fputs ("ne0", file); return;
3024 case GT: fputs ("gt0", file); return;
3025 case LE: fputs ("le0", file); return;
3026 case LT: fputs ("lt0", file); return;
3027 case GE: fputs ("ge0", file); return;
3028 default: output_operand_lossage ("invalid %B value");
3031 case 'C': /* bb0/bb1 branch values for comparisons */
3032 fputs (m88k_pound_sign, file);
3035 case EQ: fputs ("eq", file); return;
3036 case NE: fputs ("ne", file); return;
3037 case GT: fputs ("gt", file); return;
3038 case LE: fputs ("le", file); return;
3039 case LT: fputs ("lt", file); return;
3040 case GE: fputs ("ge", file); return;
3041 case GTU: fputs ("hi", file); return;
3042 case LEU: fputs ("ls", file); return;
3043 case LTU: fputs ("lo", file); return;
3044 case GEU: fputs ("hs", file); return;
3045 default: output_operand_lossage ("invalid %C value");
3048 case 'D': /* bcnd branch values for float comparisons */
3051 case EQ: fputs ("0xa", file); return;
3052 case NE: fputs ("0x5", file); return;
3053 case GT: fputs (m88k_pound_sign, file);
3054 fputs ("gt0", file); return;
3055 case LE: fputs ("0xe", file); return;
3056 case LT: fputs ("0x4", file); return;
3057 case GE: fputs ("0xb", file); return;
3058 default: output_operand_lossage ("invalid %D value");
3061 case 'E': /* bcnd branch values for special integers */
3064 case EQ: fputs ("0x8", file); return;
3065 case NE: fputs ("0x7", file); return;
3066 default: output_operand_lossage ("invalid %E value");
3069 case 'd': /* second register of a two register pair */
3071 output_operand_lossage ("`%d' operand isn't a register");
3072 fputs (reg_names[REGNO (x) + 1], file);
3075 case 'r': /* an immediate 0 should be represented as `r0' */
3076 if (x == const0_rtx)
3078 fputs (reg_names[0], file);
3082 output_operand_lossage ("invalid %r value");
3088 if (REGNO (x) == ARG_POINTER_REGNUM)
3089 output_operand_lossage ("operand is r0");
3091 fputs (reg_names[REGNO (x)], file);
3093 else if (xc == PLUS)
3096 output_address (XEXP (x, 0));
3097 else if (flag_pic && xc == UNSPEC)
3099 output_addr_const (file, XVECEXP (x, 0, 0));
3100 fputs ("#got_rel", file);
3102 else if (xc == CONST_DOUBLE)
3103 output_operand_lossage ("operand is const_double");
3105 output_addr_const (file, x);
3108 case 'g': /* append #got_rel as needed */
3109 if (flag_pic && (xc == SYMBOL_REF || xc == LABEL_REF))
3111 output_addr_const (file, x);
3112 fputs ("#got_rel", file);
3117 case 'a': /* (standard), assume operand is an address */
3118 case 'c': /* (standard), assume operand is an immediate value */
3119 case 'l': /* (standard), assume operand is a label_ref */
3120 case 'n': /* (standard), like %c, except negate first */
3122 output_operand_lossage ("invalid code");
3127 print_operand_address (file, addr)
3131 register rtx reg0, reg1, temp;
3133 switch (GET_CODE (addr))
3136 if (REGNO (addr) == ARG_POINTER_REGNUM)
3139 fprintf (file, "%s,%s", reg_names[0], reg_names [REGNO (addr)]);
3143 fprintf (file, "%s,%slo16(",
3144 reg_names[REGNO (XEXP (addr, 0))], m88k_pound_sign);
3145 output_addr_const (file, XEXP (addr, 1));
3150 reg0 = XEXP (addr, 0);
3151 reg1 = XEXP (addr, 1);
3152 if (GET_CODE (reg0) == MULT || GET_CODE (reg0) == CONST_INT)
3159 if ((REG_P (reg0) && REGNO (reg0) == ARG_POINTER_REGNUM)
3160 || (REG_P (reg1) && REGNO (reg1) == ARG_POINTER_REGNUM))
3163 else if (REG_P (reg0))
3166 fprintf (file, "%s,%s",
3167 reg_names [REGNO (reg0)], reg_names [REGNO (reg1)]);
3169 else if (GET_CODE (reg1) == CONST_INT)
3170 fprintf (file, "%s,%d",
3171 reg_names [REGNO (reg0)], INTVAL (reg1));
3173 else if (GET_CODE (reg1) == MULT)
3175 rtx mreg = XEXP (reg1, 0);
3176 if (REGNO (mreg) == ARG_POINTER_REGNUM)
3179 fprintf (file, "%s[%s]", reg_names[REGNO (reg0)],
3180 reg_names[REGNO (mreg)]);
3183 else if (GET_CODE (reg1) == ZERO_EXTRACT)
3185 fprintf (file, "%s,%slo16(",
3186 reg_names[REGNO (reg0)], m88k_pound_sign);
3187 output_addr_const (file, XEXP (reg1, 0));
3193 fprintf (file, "%s,", reg_names[REGNO (reg0)]);
3194 output_addr_const (file, reg1);
3195 fputs ("#got_rel", file);
3205 if (REGNO (XEXP (addr, 0)) == ARG_POINTER_REGNUM)
3208 fprintf (file, "%s[%s]",
3209 reg_names[0], reg_names[REGNO (XEXP (addr, 0))]);
3213 fprintf (file, "%s,%d", reg_names[0], INTVAL (addr));
3217 fprintf (file, "%s,", reg_names[0]);
3218 if (SHORT_ADDRESS_P (addr, temp))
3220 fprintf (file, "%siw16(", m88k_pound_sign);
3221 output_addr_const (file, addr);
3225 output_addr_const (file, addr);
3229 /* Return true if X is an address which needs a temporary register when
3230 reloaded while generating PIC code. */
3233 pic_address_needs_scratch (x)
3236 /* An address which is a symbolic plus a non SMALL_INT needs a temp reg. */
3237 if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
3238 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
3239 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3240 && ! ADD_INT (XEXP (XEXP (x, 0), 1)))
3246 /* Returns 1 if OP is either a symbol reference or a sum of a symbol
3247 reference and a constant. */
3250 symbolic_operand (op, mode)
3252 enum machine_mode mode;
3254 switch (GET_CODE (op))
3262 return ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
3263 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
3264 && GET_CODE (XEXP (op, 1)) == CONST_INT);
3266 /* ??? This clause seems to be irrelevant. */
3268 return GET_MODE (op) == mode;