1 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #undef SWITCH_TAKES_ARG
27 #undef WORD_SWITCH_TAKES_ARG
28 #undef HANDLE_SYSV_PRAGMA
32 #undef WCHAR_TYPE_SIZE
34 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
41 #undef SUBTARGET_SWITCHES
44 /* M32R/X overrides. */
45 /* Print subsidiary information on the compiler version in use. */
46 #define TARGET_VERSION fprintf (stderr, " (m32r/x)");
48 /* Additional flags for the preprocessor. */
49 #define CPP_CPU_SPEC "%{m32rx:-D__M32RX__} %{m32r:-U__M32RX__}"
51 /* Assembler switches. */
52 #define ASM_CPU_SPEC \
53 "%{m32r} %{m32rx} %{!O0: %{O*: -O}} --no-warn-explicit-parallel-conflicts"
55 /* Use m32rx specific crt0/crtinit/crtfini files. */
56 #define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}"
57 #define ENDFILE_CPU_SPEC "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}"
59 /* Extra machine dependent switches. */
60 #define SUBTARGET_SWITCHES \
61 { "32rx", TARGET_M32RX_MASK, "Compile for the m32rx" }, \
62 { "32r", -TARGET_M32RX_MASK, "" },
64 /* Define this macro as a C expression for the initializer of an array of
65 strings to tell the driver program which options are defaults for this
66 target and thus do not need to be handled specially when using
67 `MULTILIB_OPTIONS'. */
68 #define SUBTARGET_MULTILIB_DEFAULTS , "m32r"
70 /* Number of additional registers the subtarget defines. */
71 #define SUBTARGET_NUM_REGISTERS 1
73 /* 1 for registers that cannot be allocated. */
74 #define SUBTARGET_FIXED_REGISTERS , 1
76 /* 1 for registers that are not available across function calls. */
77 #define SUBTARGET_CALL_USED_REGISTERS , 1
79 /* Order to allocate model specific registers. */
80 #define SUBTARGET_REG_ALLOC_ORDER , 19
82 /* Registers which are accumulators. */
83 #define SUBTARGET_REG_CLASS_ACCUM 0x80000
85 /* All registers added. */
86 #define SUBTARGET_REG_CLASS_ALL SUBTARGET_REG_CLASS_ACCUM
88 /* Additional accumulator registers. */
89 #define SUBTARGET_ACCUM_P(REGNO) ((REGNO) == 19)
91 /* Define additional register names. */
92 #define SUBTARGET_REGISTER_NAMES , "a1"
93 /* end M32R/X overrides. */
95 /* Print subsidiary information on the compiler version in use. */
96 #ifndef TARGET_VERSION
97 #define TARGET_VERSION fprintf (stderr, " (m32r)")
100 /* Switch Recognition by gcc.c. Add -G xx support */
102 #undef SWITCH_TAKES_ARG
103 #define SWITCH_TAKES_ARG(CHAR) \
104 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
106 /* Names to predefine in the preprocessor for this target machine. */
107 /* __M32R__ is defined by the existing compiler so we use that. */
108 #define TARGET_CPU_CPP_BUILTINS() \
111 builtin_define ("__M32R__"); \
112 builtin_assert ("cpu=m32r"); \
113 builtin_assert ("machine=m32r"); \
117 /* This macro defines names of additional specifications to put in the specs
118 that can be used in various specifications like CC1_SPEC. Its definition
119 is an initializer with a subgrouping for each command option.
121 Each subgrouping contains a string constant, that defines the
122 specification name, and a string constant that used by the GNU CC driver
125 Do not define this macro if it does not need to do anything. */
127 #ifndef SUBTARGET_EXTRA_SPECS
128 #define SUBTARGET_EXTRA_SPECS
132 #define ASM_CPU_SPEC ""
136 #define CPP_CPU_SPEC ""
140 #define CC1_CPU_SPEC ""
143 #ifndef LINK_CPU_SPEC
144 #define LINK_CPU_SPEC ""
147 #ifndef STARTFILE_CPU_SPEC
148 #define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} crtinit.o%s"
151 #ifndef ENDFILE_CPU_SPEC
152 #define ENDFILE_CPU_SPEC "-lgloss crtfini.o%s"
156 #if 0 /* not supported yet */
157 #define RELAX_SPEC "%{mrelax:-relax}"
159 #define RELAX_SPEC ""
163 #define EXTRA_SPECS \
164 { "asm_cpu", ASM_CPU_SPEC }, \
165 { "cpp_cpu", CPP_CPU_SPEC }, \
166 { "cc1_cpu", CC1_CPU_SPEC }, \
167 { "link_cpu", LINK_CPU_SPEC }, \
168 { "startfile_cpu", STARTFILE_CPU_SPEC }, \
169 { "endfile_cpu", ENDFILE_CPU_SPEC }, \
170 { "relax", RELAX_SPEC }, \
171 SUBTARGET_EXTRA_SPECS
173 #define CC1_SPEC "%{G*} %(cc1_cpu)"
175 /* Options to pass on to the assembler. */
177 #define ASM_SPEC "%{v} %(asm_cpu) %(relax)"
179 #define LINK_SPEC "%{v} %(link_cpu) %(relax)"
181 #undef STARTFILE_SPEC
182 #define STARTFILE_SPEC "%(startfile_cpu)"
185 #define ENDFILE_SPEC "%(endfile_cpu)"
189 /* Run-time compilation parameters selecting different hardware subsets. */
191 extern int target_flags;
193 /* If nonzero, tell the linker to do relaxing.
194 We don't do anything with the option, other than recognize it.
195 LINK_SPEC handles passing -relax to the linker.
196 This can cause incorrect debugging information as line numbers may
197 turn out wrong. This shouldn't be specified unless accompanied with -O2
198 [where the user expects debugging information to be less accurate]. */
199 #define TARGET_RELAX_MASK (1 << 0)
201 /* For miscellaneous debugging purposes. */
202 #define TARGET_DEBUG_MASK (1 << 1)
203 #define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)
205 /* Align loops to 32 byte boundaries (cache line size). */
206 /* ??? This option is experimental and is not documented. */
207 #define TARGET_ALIGN_LOOPS_MASK (1 << 2)
208 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)
210 /* Change issue rate. */
211 #define TARGET_LOW_ISSUE_RATE_MASK (1 << 3)
212 #define TARGET_LOW_ISSUE_RATE (target_flags & TARGET_LOW_ISSUE_RATE_MASK)
214 /* Change branch cost */
215 #define TARGET_BRANCH_COST_MASK (1 << 4)
216 #define TARGET_BRANCH_COST (target_flags & TARGET_BRANCH_COST_MASK)
218 /* Target machine to compile for. */
219 #define TARGET_M32R 1
221 /* Support extended instruction set. */
222 #define TARGET_M32RX_MASK (1 << 5)
223 #define TARGET_M32RX (target_flags & TARGET_M32RX_MASK)
225 #define TARGET_M32R (! TARGET_M32RX)
227 /* Macro to define tables used to set the flags.
228 This is a list in braces of pairs in braces,
229 each pair being { "NAME", VALUE }
230 where VALUE is the bits to set or minus the bits to clear.
231 An empty string NAME is used to identify the default VALUE. */
233 #ifndef SUBTARGET_SWITCHES
234 #define SUBTARGET_SWITCHES
237 #ifndef TARGET_DEFAULT
238 #define TARGET_DEFAULT 0
241 #define TARGET_SWITCHES \
243 /* { "relax", TARGET_RELAX_MASK, "" }, \
244 { "no-relax", -TARGET_RELAX_MASK, "" },*/ \
245 { "debug", TARGET_DEBUG_MASK, \
246 N_("Display compile time statistics") }, \
247 { "align-loops", TARGET_ALIGN_LOOPS_MASK, \
248 N_("Align all loops to 32 byte boundary") }, \
249 { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK, "" }, \
250 { "issue-rate=1", TARGET_LOW_ISSUE_RATE_MASK, \
251 N_("Only issue one instruction per cycle") }, \
252 { "issue-rate=2", -TARGET_LOW_ISSUE_RATE_MASK, "" }, \
253 { "branch-cost=1", TARGET_BRANCH_COST_MASK, \
254 N_("Prefer branches over conditional execution") }, \
255 { "branch-cost=2", -TARGET_BRANCH_COST_MASK, "" }, \
257 { "", TARGET_DEFAULT, "" } \
260 extern const char * m32r_model_string;
261 extern const char * m32r_sdata_string;
263 #ifndef SUBTARGET_OPTIONS
264 #define SUBTARGET_OPTIONS
267 #define TARGET_OPTIONS \
269 { "model=", & m32r_model_string, \
270 N_("Code size: small, medium or large"), 0}, \
271 { "sdata=", & m32r_sdata_string, \
272 N_("Small data area: none, sdata, use"), 0} \
278 Code models are used to select between two choices of two separate
279 possibilities (address space size, call insn to use):
281 small: addresses use 24 bits, use bl to make calls
282 medium: addresses use 32 bits, use bl to make calls (*1)
283 large: addresses use 32 bits, use seth/add3/jl to make calls (*2)
285 The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but
286 using this one doesn't make much sense.
288 (*1) The linker may eventually be able to relax seth/add3 -> ld24.
289 (*2) The linker may eventually be able to relax seth/add3/jl -> bl.
291 Internally these are recorded as TARGET_ADDR{24,32} and
294 The __model__ attribute can be used to select the code model to use when
295 accessing particular objects. */
297 enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE };
299 extern enum m32r_model m32r_model;
300 #define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL)
301 #define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)
302 #define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE)
303 #define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL)
304 #define TARGET_ADDR32 (! TARGET_ADDR24)
305 #define TARGET_CALL26 (! TARGET_CALL32)
306 #define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE)
308 /* The default is the small model. */
309 #ifndef M32R_MODEL_DEFAULT
310 #define M32R_MODEL_DEFAULT "small"
315 The SDA consists of sections .sdata, .sbss, and .scommon.
316 .scommon isn't a real section, symbols in it have their section index
317 set to SHN_M32R_SCOMMON, though support for it exists in the linker script.
319 Two switches control the SDA:
321 -G NNN - specifies the maximum size of variable to go in the SDA
323 -msdata=foo - specifies how such variables are handled
325 -msdata=none - small data area is disabled
327 -msdata=sdata - small data goes in the SDA, special code isn't
328 generated to use it, and special relocs aren't
331 -msdata=use - small data goes in the SDA, special code is generated
332 to use the SDA and special relocs are generated
334 The SDA is not multilib'd, it isn't necessary.
335 MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd
336 libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use
337 -msdata=use will successfully link with them (references in header files
338 will cause the compiler to emit code that refers to library objects in
339 .data). ??? There can be a problem if the user passes a -G value greater
340 than the default and a library object in a header file is that size.
341 The default is 8 so this should be rare - if it occurs the user
342 is required to rebuild the libraries or use a smaller value for -G.
345 /* Maximum size of variables that go in .sdata/.sbss.
346 The -msdata=foo switch also controls how small variables are handled. */
347 #ifndef SDATA_DEFAULT_SIZE
348 #define SDATA_DEFAULT_SIZE 8
351 enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE };
353 extern enum m32r_sdata m32r_sdata;
354 #define TARGET_SDATA_NONE (m32r_sdata == M32R_SDATA_NONE)
355 #define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA)
356 #define TARGET_SDATA_USE (m32r_sdata == M32R_SDATA_USE)
358 /* Default is to disable the SDA
359 [for upward compatibility with previous toolchains]. */
360 #ifndef M32R_SDATA_DEFAULT
361 #define M32R_SDATA_DEFAULT "none"
364 /* Define this macro as a C expression for the initializer of an array of
365 strings to tell the driver program which options are defaults for this
366 target and thus do not need to be handled specially when using
367 `MULTILIB_OPTIONS'. */
368 #ifndef SUBTARGET_MULTILIB_DEFAULTS
369 #define SUBTARGET_MULTILIB_DEFAULTS
372 #ifndef MULTILIB_DEFAULTS
373 #define MULTILIB_DEFAULTS { "mmodel=small" SUBTARGET_MULTILIB_DEFAULTS }
376 /* Sometimes certain combinations of command options do not make
377 sense on a particular target machine. You can define a macro
378 `OVERRIDE_OPTIONS' to take account of this. This macro, if
379 defined, is executed once just after all the command options have
382 Don't use this macro to turn on various extra optimizations for
383 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
385 #ifndef SUBTARGET_OVERRIDE_OPTIONS
386 #define SUBTARGET_OVERRIDE_OPTIONS
389 #define OVERRIDE_OPTIONS \
392 /* These need to be done at start up. \
393 It's convenient to do them here. */ \
395 SUBTARGET_OVERRIDE_OPTIONS \
399 #ifndef SUBTARGET_OPTIMIZATION_OPTIONS
400 #define SUBTARGET_OPTIMIZATION_OPTIONS
403 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
407 flag_regmove = TRUE; \
411 flag_omit_frame_pointer = TRUE; \
412 flag_strength_reduce = FALSE; \
415 SUBTARGET_OPTIMIZATION_OPTIONS \
419 /* Define this macro if debugging can be performed even without a
420 frame pointer. If this macro is defined, GNU CC will turn on the
421 `-fomit-frame-pointer' option whenever `-O' is specified. */
422 #define CAN_DEBUG_WITHOUT_FP
424 /* Target machine storage layout. */
426 /* Define this if most significant bit is lowest numbered
427 in instructions that operate on numbered bit-fields. */
428 #define BITS_BIG_ENDIAN 1
430 /* Define this if most significant byte of a word is the lowest numbered. */
431 #define BYTES_BIG_ENDIAN 1
433 /* Define this if most significant word of a multiword number is the lowest
435 #define WORDS_BIG_ENDIAN 1
437 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must
438 be a constant value with the same meaning as WORDS_BIG_ENDIAN,
439 which will be used only when compiling libgcc2.c. Typically the
440 value will be set based on preprocessor defines. */
441 /*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/
443 /* Width of a word, in units (bytes). */
444 #define UNITS_PER_WORD 4
446 /* Define this macro if it is advisable to hold scalars in registers
447 in a wider mode than that declared by the program. In such cases,
448 the value is constrained to be within the bounds of the declared
449 type, but kept valid in the wider mode. The signedness of the
450 extension may differ from that of the type. */
451 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
452 if (GET_MODE_CLASS (MODE) == MODE_INT \
453 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
458 /* Define this macro if the promotion described by `PROMOTE_MODE'
459 should also be done for outgoing function arguments. */
460 /*#define PROMOTE_FUNCTION_ARGS*/
462 /* Likewise, if the function return value is promoted.
463 If defined, FUNCTION_VALUE must perform the same promotions done by
465 /*#define PROMOTE_FUNCTION_RETURN*/
467 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
468 #define PARM_BOUNDARY 32
470 /* Boundary (in *bits*) on which stack pointer should be aligned. */
471 #define STACK_BOUNDARY 32
473 /* ALIGN FRAMES on word boundaries */
474 #define M32R_STACK_ALIGN(LOC) (((LOC)+3) & ~3)
476 /* Allocation boundary (in *bits*) for the code of a function. */
477 #define FUNCTION_BOUNDARY 32
479 /* Alignment of field after `int : 0' in a structure. */
480 #define EMPTY_FIELD_BOUNDARY 32
482 /* Every structure's size must be a multiple of this. */
483 #define STRUCTURE_SIZE_BOUNDARY 8
485 /* A bit-field declared as `int' forces `int' alignment for the struct. */
486 #define PCC_BITFIELD_TYPE_MATTERS 1
488 /* No data type wants to be aligned rounder than this. */
489 #define BIGGEST_ALIGNMENT 32
491 /* The best alignment to use in cases where we have a choice. */
492 #define FASTEST_ALIGNMENT 32
494 /* Make strings word-aligned so strcpy from constants will be faster. */
495 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
496 ((TREE_CODE (EXP) == STRING_CST \
497 && (ALIGN) < FASTEST_ALIGNMENT) \
498 ? FASTEST_ALIGNMENT : (ALIGN))
500 /* Make arrays of chars word-aligned for the same reasons. */
501 #define DATA_ALIGNMENT(TYPE, ALIGN) \
502 (TREE_CODE (TYPE) == ARRAY_TYPE \
503 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
504 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
506 /* Set this nonzero if move instructions will actually fail to work
507 when given unaligned data. */
508 #define STRICT_ALIGNMENT 1
510 /* Layout of source language data types. */
512 #define SHORT_TYPE_SIZE 16
513 #define INT_TYPE_SIZE 32
514 #define LONG_TYPE_SIZE 32
515 #define LONG_LONG_TYPE_SIZE 64
516 #define FLOAT_TYPE_SIZE 32
517 #define DOUBLE_TYPE_SIZE 64
518 #define LONG_DOUBLE_TYPE_SIZE 64
520 /* Define this as 1 if `char' should by default be signed; else as 0. */
521 #define DEFAULT_SIGNED_CHAR 1
523 #define SIZE_TYPE "long unsigned int"
524 #define PTRDIFF_TYPE "long int"
525 #define WCHAR_TYPE "short unsigned int"
526 #define WCHAR_TYPE_SIZE 16
528 /* Standard register usage. */
530 /* Number of actual hardware registers.
531 The hardware registers are assigned numbers for the compiler
532 from 0 to just below FIRST_PSEUDO_REGISTER.
533 All registers that the compiler knows about must be given numbers,
534 even those that are not normally considered general registers. */
536 #define M32R_NUM_REGISTERS 19
538 #ifndef SUBTARGET_NUM_REGISTERS
539 #define SUBTARGET_NUM_REGISTERS 0
542 #define FIRST_PSEUDO_REGISTER (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS)
544 /* 1 for registers that have pervasive standard uses
545 and are not available for the register allocator.
547 0-3 - arguments/results
548 4-5 - call used [4 is used as a tmp during prologue/epilogue generation]
550 7 - call used, static chain pointer
552 12 - call saved [reserved for global pointer]
554 14 - subroutine link register
559 19 - accumulator 1 in the m32r/x
560 By default, the extension registers are not available. */
562 #ifndef SUBTARGET_FIXED_REGISTERS
563 #define SUBTARGET_FIXED_REGISTERS
566 #define FIXED_REGISTERS \
568 0, 0, 0, 0, 0, 0, 0, 0, \
569 0, 0, 0, 0, 0, 0, 0, 1, \
571 SUBTARGET_FIXED_REGISTERS \
574 /* 1 for registers not available across function calls.
575 These must include the FIXED_REGISTERS and also any
576 registers that can be used without being saved.
577 The latter must include the registers where values are returned
578 and the register where structure-value addresses are passed.
579 Aside from that, you can include as many other registers as you like. */
581 #ifndef SUBTARGET_CALL_USED_REGISTERS
582 #define SUBTARGET_CALL_USED_REGISTERS
585 #define CALL_USED_REGISTERS \
587 1, 1, 1, 1, 1, 1, 1, 1, \
588 0, 0, 0, 0, 0, 0, 1, 1, \
590 SUBTARGET_CALL_USED_REGISTERS \
593 /* Zero or more C statements that may conditionally modify two variables
594 `fixed_regs' and `call_used_regs' (both of type `char []') after they
595 have been initialized from the two preceding macros.
597 This is necessary in case the fixed or call-clobbered registers depend
600 You need not define this macro if it has no work to do. */
602 #ifdef SUBTARGET_CONDITIONAL_REGISTER_USAGE
603 #define CONDITIONAL_REGISTER_USAGE SUBTARGET_CONDITIONAL_REGISTER_USAGE
606 /* If defined, an initializer for a vector of integers, containing the
607 numbers of hard registers in the order in which GNU CC should
608 prefer to use them (from most preferred to least). */
610 #ifndef SUBTARGET_REG_ALLOC_ORDER
611 #define SUBTARGET_REG_ALLOC_ORDER
614 #if 1 /* better for int code */
615 #define REG_ALLOC_ORDER \
617 4, 5, 6, 7, 2, 3, 8, 9, 10, \
618 11, 12, 13, 14, 0, 1, 15, 16, 17, 18 \
619 SUBTARGET_REG_ALLOC_ORDER \
622 #else /* better for fp code at expense of int code */
623 #define REG_ALLOC_ORDER \
625 0, 1, 2, 3, 4, 5, 6, 7, 8, \
626 9, 10, 11, 12, 13, 14, 15, 16, 17, 18 \
627 SUBTARGET_REG_ALLOC_ORDER \
631 /* Return number of consecutive hard regs needed starting at reg REGNO
632 to hold something of mode MODE.
633 This is ordinarily the length in words of a value of mode MODE
634 but can be less for certain modes in special long registers. */
635 #define HARD_REGNO_NREGS(REGNO, MODE) \
636 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
638 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
639 extern const unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER];
640 extern unsigned int m32r_mode_class[];
641 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
642 ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
644 /* A C expression that is nonzero if it is desirable to choose
645 register allocation so as to avoid move instructions between a
646 value of mode MODE1 and a value of mode MODE2.
648 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
649 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
650 MODE2)' must be zero. */
652 /* Tie QI/HI/SI modes together. */
653 #define MODES_TIEABLE_P(MODE1, MODE2) \
654 (GET_MODE_CLASS (MODE1) == MODE_INT \
655 && GET_MODE_CLASS (MODE2) == MODE_INT \
656 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
657 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
659 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
660 m32r_hard_regno_rename_ok (OLD_REG, NEW_REG)
662 /* Register classes and constants. */
664 /* Define the classes of registers for register constraints in the
665 machine description. Also define ranges of constants.
667 One of the classes must always be named ALL_REGS and include all hard regs.
668 If there is more than one class, another class must be named NO_REGS
669 and contain no registers.
671 The name GENERAL_REGS must be the name of a class (or an alias for
672 another name such as ALL_REGS). This is the class of registers
673 that is allowed by "g" or "r" in a register constraint.
674 Also, registers outside this class are allocated only when
675 instructions express preferences for them.
677 The classes must be numbered in nondecreasing order; that is,
678 a larger-numbered class must never be contained completely
679 in a smaller-numbered class.
681 For any two classes, it is very desirable that there be another
682 class that represents their union.
684 It is important that any condition codes have class NO_REGS.
685 See `register_operand'. */
689 NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
692 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
694 /* Give names of register classes as strings for dump file. */
695 #define REG_CLASS_NAMES \
696 { "NO_REGS", "CARRY_REG", "ACCUM_REGS", "GENERAL_REGS", "ALL_REGS" }
698 /* Define which registers fit in which classes.
699 This is an initializer for a vector of HARD_REG_SET
700 of length N_REG_CLASSES. */
702 #ifndef SUBTARGET_REG_CLASS_CARRY
703 #define SUBTARGET_REG_CLASS_CARRY 0
706 #ifndef SUBTARGET_REG_CLASS_ACCUM
707 #define SUBTARGET_REG_CLASS_ACCUM 0
710 #ifndef SUBTARGET_REG_CLASS_GENERAL
711 #define SUBTARGET_REG_CLASS_GENERAL 0
714 #ifndef SUBTARGET_REG_CLASS_ALL
715 #define SUBTARGET_REG_CLASS_ALL 0
718 #define REG_CLASS_CONTENTS \
721 { 0x20000 | SUBTARGET_REG_CLASS_CARRY }, \
722 { 0x40000 | SUBTARGET_REG_CLASS_ACCUM }, \
723 { 0x1ffff | SUBTARGET_REG_CLASS_GENERAL }, \
724 { 0x7ffff | SUBTARGET_REG_CLASS_ALL }, \
727 /* The same information, inverted:
728 Return the class number of the smallest class containing
729 reg number REGNO. This could be a conditional expression
730 or could index an array. */
731 extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
732 #define REGNO_REG_CLASS(REGNO) (m32r_regno_reg_class[REGNO])
734 /* The class value for index registers, and the one for base regs. */
735 #define INDEX_REG_CLASS GENERAL_REGS
736 #define BASE_REG_CLASS GENERAL_REGS
738 #define REG_CLASS_FROM_LETTER(C) \
739 ((C) == 'c' ? CARRY_REG \
740 : (C) == 'a' ? ACCUM_REGS \
743 /* These assume that REGNO is a hard or pseudo reg number.
744 They give nonzero only if REGNO is a hard reg of the suitable class
745 or a pseudo reg currently allocated to a suitable hard reg.
746 Since they use reg_renumber, they are safe only once reg_renumber
747 has been allocated, which happens in local-alloc.c. */
748 #define REGNO_OK_FOR_BASE_P(REGNO) \
749 ((REGNO) < FIRST_PSEUDO_REGISTER \
750 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \
751 : GPR_P (reg_renumber[REGNO]))
752 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
754 /* Given an rtx X being reloaded into a reg required to be
755 in class CLASS, return the class of reg to actually use.
756 In general this is just CLASS; but on some machines
757 in some cases it is preferable to use a more restrictive class. */
758 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
761 /* Return the maximum number of consecutive registers
762 needed to represent mode MODE in a register of class CLASS. */
763 #define CLASS_MAX_NREGS(CLASS, MODE) \
764 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
766 /* The letters I, J, K, L, M, N, O, P in a register constraint string
767 can be used to stand for particular ranges of immediate operands.
768 This macro defines what the ranges are.
769 C is the letter, and VALUE is a constant value.
770 Return 1 if VALUE is in the range specified by C. */
771 /* 'I' is used for 8 bit signed immediates.
772 'J' is used for 16 bit signed immediates.
773 'K' is used for 16 bit unsigned immediates.
774 'L' is used for 16 bit immediates left shifted by 16 (sign ???).
775 'M' is used for 24 bit unsigned immediates.
776 'N' is used for any 32 bit non-symbolic value.
777 'O' is used for 5 bit unsigned immediates (shift count).
778 'P' is used for 16 bit signed immediates for compares
779 (values in the range -32767 to +32768). */
781 /* Return true if a value is inside a range. */
782 #define IN_RANGE_P(VALUE, LOW, HIGH) \
783 (((unsigned HOST_WIDE_INT)((VALUE) - (LOW))) \
784 <= ((unsigned HOST_WIDE_INT)((HIGH) - (LOW))))
786 /* Local to this file. */
787 #define INT8_P(X) ((X) >= -0x80 && (X) <= 0x7f)
788 #define INT16_P(X) ((X) >= -0x8000 && (X) <= 0x7fff)
789 #define CMP_INT16_P(X) ((X) >= -0x7fff && (X) <= 0x8000)
790 #define UPPER16_P(X) (((X) & 0xffff) == 0 \
791 && ((X) >> 16) >= -0x8000 \
792 && ((X) >> 16) <= 0x7fff)
793 #define UINT16_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0x0000ffff)
794 #define UINT24_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0x00ffffff)
795 #define UINT32_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0xffffffff)
796 #define UINT5_P(X) ((X) >= 0 && (X) < 32)
797 #define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)
799 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
800 ((C) == 'I' ? INT8_P (VALUE) \
801 : (C) == 'J' ? INT16_P (VALUE) \
802 : (C) == 'K' ? UINT16_P (VALUE) \
803 : (C) == 'L' ? UPPER16_P (VALUE) \
804 : (C) == 'M' ? UINT24_P (VALUE) \
805 : (C) == 'N' ? INVERTED_SIGNED_8BIT (VALUE) \
806 : (C) == 'O' ? UINT5_P (VALUE) \
807 : (C) == 'P' ? CMP_INT16_P (VALUE) \
810 /* Similar, but for floating constants, and defining letters G and H.
811 Here VALUE is the CONST_DOUBLE rtx itself.
812 For the m32r, handle a few constants inline.
813 ??? We needn't treat DI and DF modes differently, but for now we do. */
814 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
815 ((C) == 'G' ? easy_di_const (VALUE) \
816 : (C) == 'H' ? easy_df_const (VALUE) \
819 /* A C expression that defines the optional machine-dependent constraint
820 letters that can be used to segregate specific types of operands,
821 usually memory references, for the target machine. It should return 1 if
822 VALUE corresponds to the operand type represented by the constraint letter
823 C. If C is not defined as an extra constraint, the value returned should
824 be 0 regardless of VALUE. */
825 /* Q is for symbolic addresses loadable with ld24.
826 R is for symbolic addresses when ld24 can't be used.
827 S is for stores with pre {inc,dec}rement
828 T is for indirect of a pointer.
829 U is for loads with post increment. */
831 #define EXTRA_CONSTRAINT(VALUE, C) \
832 ( (C) == 'Q' ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
833 || addr24_operand (VALUE, VOIDmode)) \
834 : (C) == 'R' ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
835 || addr32_operand (VALUE, VOIDmode)) \
836 : (C) == 'S' ? (GET_CODE (VALUE) == MEM \
837 && STORE_PREINC_PREDEC_P (GET_MODE (VALUE), \
839 : (C) == 'T' ? (GET_CODE (VALUE) == MEM \
840 && memreg_operand (VALUE, GET_MODE (VALUE))) \
841 : (C) == 'U' ? (GET_CODE (VALUE) == MEM \
842 && LOAD_POSTINC_P (GET_MODE (VALUE), \
846 /* Stack layout and stack pointer usage. */
848 /* Define this macro if pushing a word onto the stack moves the stack
849 pointer to a smaller address. */
850 #define STACK_GROWS_DOWNWARD
852 /* Define this if the nominal address of the stack frame
853 is at the high-address end of the local variables;
854 that is, each additional local variable allocated
855 goes at a more negative offset from the frame pointer. */
856 /*#define FRAME_GROWS_DOWNWARD*/
858 /* Offset from frame pointer to start allocating local variables at.
859 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
860 first local allocated. Otherwise, it is the offset to the BEGINNING
861 of the first local allocated. */
862 /* The frame pointer points at the same place as the stack pointer, except if
863 alloca has been called. */
864 #define STARTING_FRAME_OFFSET \
865 M32R_STACK_ALIGN (current_function_outgoing_args_size)
867 /* Offset from the stack pointer register to the first location at which
868 outgoing arguments are placed. */
869 #define STACK_POINTER_OFFSET 0
871 /* Offset of first parameter from the argument pointer register value. */
872 #define FIRST_PARM_OFFSET(FNDECL) 0
874 /* A C expression whose value is RTL representing the address in a
875 stack frame where the pointer to the caller's frame is stored.
876 Assume that FRAMEADDR is an RTL expression for the address of the
879 If you don't define this macro, the default is to return the value
880 of FRAMEADDR--that is, the stack frame address is also the address
881 of the stack word that points to the previous frame. */
882 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
884 /* A C expression whose value is RTL representing the value of the
885 return address for the frame COUNT steps up from the current frame.
886 FRAMEADDR is the frame pointer of the COUNT frame, or the frame
887 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
889 /* The current return address is in r14. */
890 #if 0 /* The default value should work. */
891 #define RETURN_ADDR_RTX(COUNT, FRAME) \
893 ? gen_rtx_REG (Pmode, 14) \
894 : copy_to_reg (gen_rtx_MEM (Pmode, \
895 memory_address (Pmode, \
896 plus_constant ((FRAME), \
900 /* Register to use for pushing function arguments. */
901 #define STACK_POINTER_REGNUM 15
903 /* Base register for access to local variables of the function. */
904 #define FRAME_POINTER_REGNUM 13
906 /* Base register for access to arguments of the function. */
907 #define ARG_POINTER_REGNUM 16
909 /* The register number of the return address pointer register, which
910 is used to access the current function's return address from the
911 stack. On some machines, the return address is not at a fixed
912 offset from the frame pointer or stack pointer or argument
913 pointer. This register can be defined to point to the return
914 address on the stack, and then be converted by `ELIMINABLE_REGS'
915 into either the frame pointer or stack pointer.
917 Do not define this macro unless there is no other way to get the
918 return address from the stack. */
920 /* #define RETURN_ADDRESS_POINTER_REGNUM */
922 /* Register in which static-chain is passed to a function. This must
923 not be a register used by the prologue. */
924 #define STATIC_CHAIN_REGNUM 7
926 /* These aren't official macros. */
927 #define PROLOGUE_TMP_REGNUM 4
928 #define RETURN_ADDR_REGNUM 14
929 /* #define GP_REGNUM 12 */
930 #define CARRY_REGNUM 17
931 #define ACCUM_REGNUM 18
932 #define M32R_MAX_INT_REGS 16
934 #ifndef SUBTARGET_GPR_P
935 #define SUBTARGET_GPR_P(REGNO) 0
938 #ifndef SUBTARGET_ACCUM_P
939 #define SUBTARGET_ACCUM_P(REGNO) 0
942 #ifndef SUBTARGET_CARRY_P
943 #define SUBTARGET_CARRY_P(REGNO) 0
946 #define GPR_P(REGNO) (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO))
947 #define ACCUM_P(REGNO) ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO))
948 #define CARRY_P(REGNO) ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO))
950 /* Eliminating the frame and arg pointers. */
952 /* A C expression which is nonzero if a function must have and use a
953 frame pointer. This expression is evaluated in the reload pass.
954 If its value is nonzero the function will have a frame pointer. */
955 #define FRAME_POINTER_REQUIRED current_function_calls_alloca
958 /* C statement to store the difference between the frame pointer
959 and the stack pointer values immediately after the function prologue.
960 If `ELIMINABLE_REGS' is defined, this macro will be not be used and
961 need not be defined. */
962 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
963 ((VAR) = m32r_compute_frame_size (get_frame_size ()))
966 /* If defined, this macro specifies a table of register pairs used to
967 eliminate unneeded registers that point into the stack frame. If
968 it is not defined, the only elimination attempted by the compiler
969 is to replace references to the frame pointer with references to
972 Note that the elimination of the argument pointer with the stack
973 pointer is specified first since that is the preferred elimination. */
975 #define ELIMINABLE_REGS \
976 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
977 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
978 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }}
980 /* A C expression that returns nonzero if the compiler is allowed to
981 try to replace register number FROM-REG with register number
982 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
983 defined, and will usually be the constant 1, since most of the
984 cases preventing register elimination are things that the compiler
985 already knows about. */
987 #define CAN_ELIMINATE(FROM, TO) \
988 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
989 ? ! frame_pointer_needed \
992 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
993 specifies the initial difference between the specified pair of
994 registers. This macro must be defined if `ELIMINABLE_REGS' is
997 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
999 int size = m32r_compute_frame_size (get_frame_size ()); \
1001 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1003 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1004 (OFFSET) = size - current_function_pretend_args_size; \
1005 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1006 (OFFSET) = size - current_function_pretend_args_size; \
1011 /* Function argument passing. */
1013 /* When a prototype says `char' or `short', really pass an `int'. */
1014 #define PROMOTE_PROTOTYPES 1
1016 /* If defined, the maximum amount of space required for outgoing
1017 arguments will be computed and placed into the variable
1018 `current_function_outgoing_args_size'. No space will be pushed
1019 onto the stack for each call; instead, the function prologue should
1020 increase the stack frame size by this amount. */
1021 #define ACCUMULATE_OUTGOING_ARGS 1
1023 /* Define this macro if functions should assume that stack space has
1024 been allocated for arguments even when their values are passed in
1027 The value of this macro is the size, in bytes, of the area
1028 reserved for arguments passed in registers for the function
1029 represented by FNDECL.
1031 This space can be allocated by the caller, or be a part of the
1032 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
1035 #define REG_PARM_STACK_SPACE(FNDECL) \
1036 (M32R_MAX_PARM_REGS * UNITS_PER_WORD)
1039 /* Value is the number of bytes of arguments automatically
1040 popped when returning from a subroutine call.
1041 FUNDECL is the declaration node of the function (as a tree),
1042 FUNTYPE is the data type of the function (as a tree),
1043 or for a library call it is an identifier node for the subroutine name.
1044 SIZE is the number of bytes of arguments passed on the stack. */
1045 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
1047 /* Nonzero if we do not know how to pass TYPE solely in registers. */
1048 #define MUST_PASS_IN_STACK(MODE, TYPE) \
1050 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
1051 || TREE_ADDRESSABLE (TYPE)))
1053 /* Define a data type for recording info about an argument list
1054 during the scan of that argument list. This data type should
1055 hold all necessary information about the function itself
1056 and about the args processed so far, enough to enable macros
1057 such as FUNCTION_ARG to determine where the next arg should go. */
1058 #define CUMULATIVE_ARGS int
1060 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1061 for a call to a function whose data type is FNTYPE.
1062 For a library call, FNTYPE is 0. */
1063 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
1066 /* The number of registers used for parameter passing. Local to this file. */
1067 #define M32R_MAX_PARM_REGS 4
1069 /* 1 if N is a possible register number for function argument passing. */
1070 #define FUNCTION_ARG_REGNO_P(N) \
1071 ((unsigned) (N) < M32R_MAX_PARM_REGS)
1073 /* The ROUND_ADVANCE* macros are local to this file. */
1074 /* Round SIZE up to a word boundary. */
1075 #define ROUND_ADVANCE(SIZE) \
1076 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1078 /* Round arg MODE/TYPE up to the next word boundary. */
1079 #define ROUND_ADVANCE_ARG(MODE, TYPE) \
1080 ((MODE) == BLKmode \
1081 ? ROUND_ADVANCE ((unsigned int) int_size_in_bytes (TYPE)) \
1082 : ROUND_ADVANCE ((unsigned int) GET_MODE_SIZE (MODE)))
1084 /* Round CUM up to the necessary point for argument MODE/TYPE. */
1085 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)
1087 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
1088 a reg. This includes arguments that have to be passed by reference as the
1089 pointer to them is passed in a reg if one is available (and that is what
1091 This macro is only used in this file. */
1092 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
1093 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)
1095 /* Determine where to put an argument to a function.
1096 Value is zero to push the argument on the stack,
1097 or a hard register in which to store the argument.
1099 MODE is the argument's machine mode.
1100 TYPE is the data type of the argument (as a tree).
1101 This is null for libcalls where that information may
1103 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1104 the preceding args and about the function being called.
1105 NAMED is nonzero if this argument is a named parameter
1106 (otherwise it is an extra parameter matching an ellipsis). */
1107 /* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers
1108 and the rest are pushed. */
1109 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1110 (PASS_IN_REG_P ((CUM), (MODE), (TYPE)) \
1111 ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
1114 /* A C expression for the number of words, at the beginning of an
1115 argument, must be put in registers. The value must be zero for
1116 arguments that are passed entirely in registers or that are entirely
1117 pushed on the stack.
1119 On some machines, certain arguments must be passed partially in
1120 registers and partially in memory. On these machines, typically the
1121 first @var{n} words of arguments are passed in registers, and the rest
1122 on the stack. If a multi-word argument (a @code{double} or a
1123 structure) crosses that boundary, its first few words must be passed
1124 in registers and the rest must be pushed. This macro tells the
1125 compiler when this occurs, and how many of the words should go in
1127 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1128 function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)
1130 /* A C expression that indicates when an argument must be passed by
1131 reference. If nonzero for an argument, a copy of that argument is
1132 made in memory and a pointer to the argument is passed instead of
1133 the argument itself. The pointer is passed in whatever way is
1134 appropriate for passing a pointer to that type. */
1135 /* All arguments greater than 8 bytes are passed this way. */
1136 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1137 ((TYPE) && m32r_pass_by_reference (TYPE))
1139 /* Update the data in CUM to advance over an argument
1140 of mode MODE and data type TYPE.
1141 (TYPE is null for libcalls where that information may not be available.) */
1142 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1143 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
1144 + ROUND_ADVANCE_ARG ((MODE), (TYPE))))
1146 /* If defined, a C expression that gives the alignment boundary, in bits,
1147 of an argument with the specified mode and type. If it is not defined,
1148 PARM_BOUNDARY is used for all arguments. */
1150 /* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */
1151 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1152 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1154 : 2 * PARM_BOUNDARY)
1157 /* This macro offers an alternative
1158 to using `__builtin_saveregs' and defining the macro
1159 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
1160 arguments into the stack so that all the arguments appear to have
1161 been passed consecutively on the stack. Once this is done, you
1162 can use the standard implementation of varargs that works for
1163 machines that pass all their arguments on the stack.
1165 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure,
1166 containing the values that obtain after processing of the named
1167 arguments. The arguments MODE and TYPE describe the last named
1168 argument--its machine mode and its data type as a tree node.
1170 The macro implementation should do two things: first, push onto the
1171 stack all the argument registers *not* used for the named
1172 arguments, and second, store the size of the data thus pushed into
1173 the `int'-valued variable whose name is supplied as the argument
1174 PRETEND_SIZE. The value that you store here will serve as
1175 additional offset for setting up the stack frame.
1177 If the argument NO_RTL is nonzero, it means that the
1178 arguments of the function are being analyzed for the second time.
1179 This happens for an inline function, which is not actually
1180 compiled until the end of the source file. The macro
1181 `SETUP_INCOMING_VARARGS' should not generate any instructions in
1184 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
1185 m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
1187 /* Implement `va_arg'. */
1188 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1189 m32r_va_arg (valist, type)
1191 /* Function results. */
1193 /* Define how to find the value returned by a function.
1194 VALTYPE is the data type of the value (as a tree).
1195 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1196 otherwise, FUNC is 0. */
1197 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
1199 /* Define how to find the value returned by a library function
1200 assuming the value has mode MODE. */
1201 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
1203 /* 1 if N is a possible register number for a function value
1204 as seen by the caller. */
1205 /* ??? What about r1 in DI/DF values. */
1206 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
1208 /* A C expression which can inhibit the returning of certain function
1209 values in registers, based on the type of value. A nonzero value says
1210 to return the function value in memory, just as large structures are
1211 always returned. Here TYPE will be a C expression of type `tree',
1212 representing the data type of the value. */
1213 #define RETURN_IN_MEMORY(TYPE) m32r_pass_by_reference (TYPE)
1215 /* Tell GCC to use RETURN_IN_MEMORY. */
1216 #define DEFAULT_PCC_STRUCT_RETURN 0
1218 /* Register in which address to store a structure value
1219 is passed to a function, or 0 to use `invisible' first argument. */
1220 #define STRUCT_VALUE 0
1222 /* Function entry and exit. */
1224 /* Initialize data used by insn expanders. This is called from
1225 init_emit, once for each function, before code is generated. */
1226 #define INIT_EXPANDERS m32r_init_expanders ()
1228 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1229 the stack pointer does not matter. The value is tested only in
1230 functions that have frame pointers.
1231 No definition is equivalent to always zero. */
1232 #define EXIT_IGNORE_STACK 1
1234 /* Output assembler code to FILE to increment profiler label # LABELNO
1235 for profiling a function entry. */
1236 #define FUNCTION_PROFILER(FILE, LABELNO) abort ()
1240 /* On the M32R, the trampoline is
1247 ??? Need addr32 support.
1250 /* Length in bytes of the trampoline for entering a nested function. */
1251 #define TRAMPOLINE_SIZE 12
1253 /* Emit RTL insns to initialize the variable parts of a trampoline.
1254 FNADDR is an RTX for the address of the function's pure code.
1255 CXT is an RTX for the static chain value for the function. */
1256 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1258 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
1259 plus_constant ((CXT), 0xe7000000)); \
1260 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
1261 plus_constant ((FNADDR), 0xe6000000)); \
1262 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
1263 GEN_INT (0x1fc67000)); \
1264 emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
1267 /* Library calls. */
1269 /* Generate calls to memcpy, memcmp and memset. */
1270 #define TARGET_MEM_FUNCTIONS
1272 /* Addressing modes, and classification of registers for them. */
1274 /* Maximum number of registers that can appear in a valid memory address. */
1275 #define MAX_REGS_PER_ADDRESS 1
1277 /* We have post-inc load and pre-dec,pre-inc store,
1278 but only for 4 byte vals. */
1279 #define HAVE_PRE_DECREMENT 1
1280 #define HAVE_PRE_INCREMENT 1
1281 #define HAVE_POST_INCREMENT 1
1283 /* Recognize any constant value that is a valid address. */
1284 #define CONSTANT_ADDRESS_P(X) \
1285 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1286 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1288 /* Nonzero if the constant value X is a legitimate general operand.
1289 We don't allow (plus symbol large-constant) as the relocations can't
1290 describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations.
1291 We allow all CONST_DOUBLE's as the md file patterns will force the
1292 constant to memory if they can't handle them. */
1294 #define LEGITIMATE_CONSTANT_P(X) \
1295 (! (GET_CODE (X) == CONST \
1296 && GET_CODE (XEXP (X, 0)) == PLUS \
1297 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
1298 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1299 && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))
1301 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1302 and check its validity for a certain class.
1303 We have two alternate definitions for each of them.
1304 The usual definition accepts all pseudo regs; the other rejects
1305 them unless they have been allocated suitable hard regs.
1306 The symbol REG_OK_STRICT causes the latter definition to be used.
1308 Most source files want to accept pseudo regs in the hope that
1309 they will get allocated to the class that the insn wants them to be in.
1310 Source files for reload pass need to be strict.
1311 After reload, it makes no difference, since pseudo regs have
1312 been eliminated by then. */
1314 #ifdef REG_OK_STRICT
1316 /* Nonzero if X is a hard reg that can be used as a base reg. */
1317 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1318 /* Nonzero if X is a hard reg that can be used as an index. */
1319 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1323 /* Nonzero if X is a hard reg that can be used as a base reg
1324 or if it is a pseudo reg. */
1325 #define REG_OK_FOR_BASE_P(X) \
1326 (GPR_P (REGNO (X)) \
1327 || (REGNO (X)) == ARG_POINTER_REGNUM \
1328 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1329 /* Nonzero if X is a hard reg that can be used as an index
1330 or if it is a pseudo reg. */
1331 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1335 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1336 that is a valid memory address for an instruction.
1337 The MODE argument is the machine mode for the MEM expression
1338 that wants to use this address. */
1340 /* Local to this file. */
1341 #define RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X))
1343 /* Local to this file. */
1344 #define RTX_OK_FOR_OFFSET_P(X) \
1345 (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
1347 /* Local to this file. */
1348 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
1349 (GET_CODE (X) == PLUS \
1350 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1351 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))
1353 /* Local to this file. */
1354 /* For LO_SUM addresses, do not allow them if the MODE is > 1 word,
1355 since more than one instruction will be required. */
1356 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
1357 (GET_CODE (X) == LO_SUM \
1358 && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
1359 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1360 && CONSTANT_P (XEXP (X, 1)))
1362 /* Local to this file. */
1363 /* Is this a load and increment operation. */
1364 #define LOAD_POSTINC_P(MODE, X) \
1365 (((MODE) == SImode || (MODE) == SFmode) \
1366 && GET_CODE (X) == POST_INC \
1367 && GET_CODE (XEXP (X, 0)) == REG \
1368 && RTX_OK_FOR_BASE_P (XEXP (X, 0)))
1370 /* Local to this file. */
1371 /* Is this an increment/decrement and store operation. */
1372 #define STORE_PREINC_PREDEC_P(MODE, X) \
1373 (((MODE) == SImode || (MODE) == SFmode) \
1374 && (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \
1375 && GET_CODE (XEXP (X, 0)) == REG \
1376 && RTX_OK_FOR_BASE_P (XEXP (X, 0)))
1378 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1379 { if (RTX_OK_FOR_BASE_P (X)) \
1381 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
1383 if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
1385 if (LOAD_POSTINC_P ((MODE), (X))) \
1387 if (STORE_PREINC_PREDEC_P ((MODE), (X))) \
1391 /* Try machine-dependent ways of modifying an illegitimate address
1392 to be legitimate. If we find one, return the new, valid address.
1393 This macro is used in only one place: `memory_address' in explow.c.
1395 OLDX is the address as it was before break_out_memory_refs was called.
1396 In some cases it is useful to look at this to decide what needs to be done.
1398 MODE and WIN are passed so that this macro can use
1399 GO_IF_LEGITIMATE_ADDRESS.
1401 It is always safe for this macro to do nothing. It exists to recognize
1402 opportunities to optimize the output.
1404 ??? Is there anything useful we can do here for the M32R? */
1406 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1408 /* Go to LABEL if ADDR (a legitimate address expression)
1409 has an effect that depends on the machine mode it is used for. */
1410 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1412 if (GET_CODE (ADDR) == PRE_DEC \
1413 || GET_CODE (ADDR) == PRE_INC \
1414 || GET_CODE (ADDR) == POST_INC \
1415 || GET_CODE (ADDR) == LO_SUM) \
1419 /* Condition code usage. */
1421 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
1422 floating point inequality comparison. */
1423 #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
1427 /* Compute extra cost of moving data between one register class
1429 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2
1431 /* Compute the cost of moving data between registers and memory. */
1432 /* Memory is 3 times as expensive as registers.
1433 ??? Is that the right way to look at it? */
1434 #define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \
1435 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
1437 /* The cost of a branch insn. */
1438 /* A value of 2 here causes GCC to avoid using branches in comparisons like
1439 while (a < N && a). Branches aren't that expensive on the M32R so
1440 we define this as 1. Defining it as 2 had a heavy hit in fp-bit.c. */
1441 #define BRANCH_COST ((TARGET_BRANCH_COST) ? 2 : 1)
1443 /* Nonzero if access to memory by bytes is slow and undesirable.
1444 For RISC chips, it means that access to memory by bytes is no
1445 better than access by words when possible, so grab a whole word
1446 and maybe make use of that. */
1447 #define SLOW_BYTE_ACCESS 1
1449 /* Define this macro if it is as good or better to call a constant
1450 function address than to call an address kept in a register. */
1451 #define NO_FUNCTION_CSE
1453 /* Define this macro if it is as good or better for a function to call
1454 itself with an explicit address than to call an address kept in a
1456 #define NO_RECURSIVE_FUNCTION_CSE
1458 /* When the `length' insn attribute is used, this macro specifies the
1459 value to be assigned to the address of the first insn in a
1460 function. If not specified, 0 is used. */
1461 #define FIRST_INSN_ADDRESS m32r_first_insn_address ()
1464 /* Section selection. */
1466 #define TEXT_SECTION_ASM_OP "\t.section .text"
1467 #define DATA_SECTION_ASM_OP "\t.section .data"
1468 #define BSS_SECTION_ASM_OP "\t.section .bss"
1470 /* Define this macro if jump tables (for tablejump insns) should be
1471 output in the text section, along with the assembler instructions.
1472 Otherwise, the readonly data section is used.
1473 This macro is irrelevant if there is no separate readonly data section. */
1474 /*#define JUMP_TABLES_IN_TEXT_SECTION*/
1478 /* The register number of the register used to address a table of static
1479 data addresses in memory. In some cases this register is defined by a
1480 processor's ``application binary interface'' (ABI). When this macro
1481 is defined, RTL is generated for this register once, as with the stack
1482 pointer and frame pointer registers. If this macro is not defined, it
1483 is up to the machine-dependent files to allocate such a register (if
1485 /*#define PIC_OFFSET_TABLE_REGNUM 12*/
1487 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
1488 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
1490 /* This register is call-saved on the M32R. */
1491 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
1493 /* By generating position-independent code, when two different programs (A
1494 and B) share a common library (libC.a), the text of the library can be
1495 shared whether or not the library is linked at the same address for both
1496 programs. In some of these environments, position-independent code
1497 requires not only the use of different addressing modes, but also
1498 special code to enable the use of these addressing modes.
1500 The FINALIZE_PIC macro serves as a hook to emit these special
1501 codes once the function is being compiled into assembly code, but not
1502 before. (It is not done before, because in the case of compiling an
1503 inline function, it would lead to multiple PIC prologues being
1504 included in functions which used inline functions and were compiled to
1505 assembly language.) */
1507 /*#define FINALIZE_PIC m32r_finalize_pic ()*/
1509 /* A C expression that is nonzero if X is a legitimate immediate
1510 operand on the target machine when generating position independent code.
1511 You can assume that X satisfies CONSTANT_P, so you need not
1512 check this. You can also assume `flag_pic' is true, so you need not
1513 check it either. You need not define this macro if all constants
1514 (including SYMBOL_REF) can be immediate operands when generating
1515 position independent code. */
1516 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/
1518 /* Control the assembler format that we output. */
1520 /* Output at beginning of assembler file. */
1521 #define ASM_FILE_START(FILE) m32r_asm_file_start (FILE)
1523 /* A C string constant describing how to begin a comment in the target
1524 assembler language. The compiler assumes that the comment will
1525 end at the end of the line. */
1526 #define ASM_COMMENT_START ";"
1528 /* Output to assembler file text saying following lines
1529 may contain character constants, extra white space, comments, etc. */
1530 #define ASM_APP_ON ""
1532 /* Output to assembler file text saying following lines
1533 no longer contain unusual constructs. */
1534 #define ASM_APP_OFF ""
1536 /* Globalizing directive for a label. */
1537 #define GLOBAL_ASM_OP "\t.global\t"
1539 /* If -Os, don't force line number labels to begin at the beginning of
1540 the word; we still want the assembler to try to put things in parallel,
1541 should that be possible.
1542 For m32r/d, instructions are never in parallel (other than with a nop)
1543 and the simulator and stub both handle a breakpoint in the middle of
1544 a word so don't ever force line number labels to begin at the beginning
1547 #undef ASM_OUTPUT_SOURCE_LINE
1548 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1551 static int sym_lineno = 1; \
1552 fprintf (file, ".stabn 68,0,%d,.LM%d-", \
1553 line, sym_lineno); \
1555 (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \
1556 fprintf (file, (optimize_size || TARGET_M32R) \
1557 ? "\n\t.debugsym .LM%d\n" \
1564 /* How to refer to registers in assembler output.
1565 This sequence is indexed by compiler's hard-register-number (see above). */
1566 #ifndef SUBTARGET_REGISTER_NAMES
1567 #define SUBTARGET_REGISTER_NAMES
1570 #define REGISTER_NAMES \
1572 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1573 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
1574 "ap", "cbit", "a0" \
1575 SUBTARGET_REGISTER_NAMES \
1578 /* If defined, a C initializer for an array of structures containing
1579 a name and a register number. This macro defines additional names
1580 for hard registers, thus allowing the `asm' option in declarations
1581 to refer to registers using alternate names. */
1582 #ifndef SUBTARGET_ADDITIONAL_REGISTER_NAMES
1583 #define SUBTARGET_ADDITIONAL_REGISTER_NAMES
1586 #define ADDITIONAL_REGISTER_NAMES \
1588 /*{ "gp", GP_REGNUM },*/ \
1589 { "r13", FRAME_POINTER_REGNUM }, \
1590 { "r14", RETURN_ADDR_REGNUM }, \
1591 { "r15", STACK_POINTER_REGNUM }, \
1592 SUBTARGET_ADDITIONAL_REGISTER_NAMES \
1595 /* A C expression which evaluates to true if CODE is a valid
1596 punctuation character for use in the `PRINT_OPERAND' macro. */
1597 extern char m32r_punct_chars[256];
1598 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1599 m32r_punct_chars[(unsigned char) (CHAR)]
1601 /* Print operand X (an rtx) in assembler syntax to file FILE.
1602 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1603 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1604 #define PRINT_OPERAND(FILE, X, CODE) \
1605 m32r_print_operand (FILE, X, CODE)
1607 /* A C compound statement to output to stdio stream STREAM the
1608 assembler syntax for an instruction operand that is a memory
1609 reference whose address is ADDR. ADDR is an RTL expression. */
1610 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1611 m32r_print_operand_address (FILE, ADDR)
1613 /* If defined, C string expressions to be used for the `%R', `%L',
1614 `%U', and `%I' options of `asm_fprintf' (see `final.c'). These
1615 are useful when a single `md' file must support multiple assembler
1616 formats. In that case, the various `tm.h' files can define these
1617 macros differently. */
1618 #define REGISTER_PREFIX ""
1619 #define LOCAL_LABEL_PREFIX ".L"
1620 #define USER_LABEL_PREFIX ""
1621 #define IMMEDIATE_PREFIX "#"
1623 /* This is how to output an element of a case-vector that is absolute. */
1624 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1628 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1629 fprintf (FILE, "\t.word\t"); \
1630 assemble_name (FILE, label); \
1631 fprintf (FILE, "\n"); \
1635 /* This is how to output an element of a case-vector that is relative. */
1636 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\
1640 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1641 fprintf (FILE, "\t.word\t"); \
1642 assemble_name (FILE, label); \
1643 fprintf (FILE, "-"); \
1644 ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
1645 assemble_name (FILE, label); \
1646 fprintf (FILE, ")\n"); \
1650 /* The desired alignment for the location counter at the beginning
1652 /* On the M32R, align loops to 32 byte boundaries (cache line size)
1653 if -malign-loops. */
1654 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
1656 /* Define this to be the maximum number of insns to move around when moving
1657 a loop test from the top of a loop to the bottom
1658 and seeing whether to duplicate it. The default is thirty.
1660 Loop unrolling currently doesn't like this optimization, so
1661 disable doing if we are unrolling loops and saving space. */
1662 #define LOOP_TEST_THRESHOLD (optimize_size \
1663 && !flag_unroll_loops \
1664 && !flag_unroll_all_loops ? 2 : 30)
1666 /* This is how to output an assembler line
1667 that says to advance the location counter
1668 to a multiple of 2**LOG bytes. */
1669 /* .balign is used to avoid confusion. */
1670 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1674 fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); \
1678 /* Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
1679 separate, explicit argument. If you define this macro, it is used in
1680 place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
1681 handling the required alignment of the variable. The alignment is
1682 specified as the number of bits. */
1684 #define SCOMMON_ASM_OP "\t.scomm\t"
1686 #undef ASM_OUTPUT_ALIGNED_COMMON
1687 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1690 extern unsigned HOST_WIDE_INT g_switch_value; \
1692 if (! TARGET_SDATA_NONE \
1693 && (SIZE) > 0 && (SIZE) <= g_switch_value) \
1694 fprintf ((FILE), "%s", SCOMMON_ASM_OP); \
1696 fprintf ((FILE), "%s", COMMON_ASM_OP); \
1697 assemble_name ((FILE), (NAME)); \
1698 fprintf ((FILE), ",%u,%u\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\
1702 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
1703 separate, explicit argument. If you define this macro, it is used in
1704 place of `ASM_OUTPUT_BSS', and gives you more flexibility in
1705 handling the required alignment of the variable. The alignment is
1706 specified as the number of bits.
1708 For the M32R we need sbss support. */
1710 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1713 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1717 /* Debugging information. */
1719 /* Generate DBX and DWARF debugging information. */
1720 #define DBX_DEBUGGING_INFO 1
1721 #define DWARF_DEBUGGING_INFO 1
1722 #define DWARF2_DEBUGGING_INFO 1
1724 /* Prefer STABS (for now). */
1725 #undef PREFERRED_DEBUGGING_TYPE
1726 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1728 /* Turn off splitting of long stabs. */
1729 #define DBX_CONTIN_LENGTH 0
1731 /* Miscellaneous. */
1733 /* Specify the machine mode that this machine uses
1734 for the index in the tablejump instruction. */
1735 #define CASE_VECTOR_MODE Pmode
1737 /* Define as C expression which evaluates to nonzero if the tablejump
1738 instruction expects the table to contain offsets from the address of the
1740 Do not define this if the table should contain absolute addresses. */
1741 /* It's not clear what PIC will look like or whether we want to use -fpic
1742 for the embedded form currently being talked about. For now require -fpic
1743 to get pc relative switch tables. */
1744 /*#define CASE_VECTOR_PC_RELATIVE 1 */
1746 /* Define if operations between registers always perform the operation
1747 on the full register even if a narrower mode is specified. */
1748 #define WORD_REGISTER_OPERATIONS
1750 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1751 will either zero-extend or sign-extend. The value of this macro should
1752 be the code that says which one of the two operations is implicitly
1753 done, NIL if none. */
1754 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1756 /* Max number of bytes we can move from memory to memory
1757 in one reasonably fast instruction. */
1760 /* Define this to be nonzero if shift instructions ignore all but the low-order
1762 #define SHIFT_COUNT_TRUNCATED 1
1764 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1765 is done just by pretending it is already truncated. */
1766 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1768 /* We assume that the store-condition-codes instructions store 0 for false
1769 and some other value for true. This is the value stored for true. */
1770 #define STORE_FLAG_VALUE 1
1772 /* Specify the machine mode that pointers have.
1773 After generation of rtl, the compiler makes no further distinction
1774 between pointers and any other objects of this machine mode. */
1775 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
1776 it's own problems (you have to add extendpsisi2 and truncsipsi2).
1778 #define Pmode SImode
1780 /* A function address in a call instruction. */
1781 #define FUNCTION_MODE SImode
1783 /* Define the information needed to generate branch and scc insns. This is
1784 stored from the compare operation. Note that we can't use "rtx" here
1785 since it hasn't been defined! */
1786 extern struct rtx_def * m32r_compare_op0;
1787 extern struct rtx_def * m32r_compare_op1;
1789 /* M32R function types. */
1790 enum m32r_function_type
1792 M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT
1795 #define M32R_INTERRUPT_P(TYPE) ((TYPE) == M32R_FUNCTION_INTERRUPT)
1797 /* Define this if you have defined special-purpose predicates in the
1798 file `MACHINE.c'. This macro is called within an initializer of an
1799 array of structures. The first field in the structure is the name
1800 of a predicate and the second field is an array of rtl codes. For
1801 each predicate, list all rtl codes that can be in expressions
1802 matched by the predicate. The list should have a trailing comma. */
1804 #define PREDICATE_CODES \
1805 { "reg_or_zero_operand", { REG, SUBREG, CONST_INT }}, \
1806 { "conditional_move_operand", { REG, SUBREG, CONST_INT }}, \
1807 { "carry_compare_operand", { EQ, NE }}, \
1808 { "eqne_comparison_operator", { EQ, NE }}, \
1809 { "signed_comparison_operator", { EQ, NE, LT, LE, GT, GE }}, \
1810 { "move_dest_operand", { REG, SUBREG, MEM }}, \
1811 { "move_src_operand", { REG, SUBREG, MEM, CONST_INT, \
1812 CONST_DOUBLE, LABEL_REF, CONST, \
1814 { "move_double_src_operand", { REG, SUBREG, MEM, CONST_INT, \
1816 { "two_insn_const_operand", { CONST_INT }}, \
1817 { "symbolic_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1818 { "seth_add3_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1819 { "int8_operand", { CONST_INT }}, \
1820 { "uint16_operand", { CONST_INT }}, \
1821 { "reg_or_int16_operand", { REG, SUBREG, CONST_INT }}, \
1822 { "reg_or_uint16_operand", { REG, SUBREG, CONST_INT }}, \
1823 { "reg_or_cmp_int16_operand", { REG, SUBREG, CONST_INT }}, \
1824 { "reg_or_eq_int16_operand", { REG, SUBREG, CONST_INT }}, \
1825 { "cmp_int16_operand", { CONST_INT }}, \
1826 { "call_address_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1827 { "extend_operand", { REG, SUBREG, MEM }}, \
1828 { "small_insn_p", { INSN, CALL_INSN, JUMP_INSN }}, \
1829 { "m32r_block_immediate_operand",{ CONST_INT }}, \
1830 { "large_insn_p", { INSN, CALL_INSN, JUMP_INSN }}, \
1831 { "seth_add3_operand", { SYMBOL_REF, LABEL_REF, CONST }},