1 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
2 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 /* ??? Create elf.h and have svr4.h include it. */
28 #undef SWITCH_TAKES_ARG
29 #undef WORD_SWITCH_TAKES_ARG
30 #undef HANDLE_SYSV_PRAGMA
34 #undef WCHAR_TYPE_SIZE
36 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
38 /* Print subsidiary information on the compiler version in use. */
39 #define TARGET_VERSION fprintf (stderr, " (m32r)")
42 /* Switch Recognition by gcc.c. Add -G xx support */
44 #undef SWITCH_TAKES_ARG
45 #define SWITCH_TAKES_ARG(CHAR) \
46 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
48 /* Names to predefine in the preprocessor for this target machine. */
49 /* __M32R__ is defined by the existing compiler so we use that. */
50 #define CPP_PREDEFINES "-Acpu(m32r) -Amachine(m32r) -D__M32R__"
53 #define CC1_SPEC "%{G*}"
55 /* Options to pass on to the assembler. */
57 #define ASM_SPEC "%{v}"
59 #if 0 /* not supported yet */
61 #define ASM_SPEC "%{v} %{mrelax:-relax}"
68 #if 0 /* not supported yet */
69 #define LINK_SPEC "%{v} %{mrelax:-relax}"
71 #define LINK_SPEC "%{v}"
75 #define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s"
79 #define ENDFILE_SPEC "-lgloss crtfini.o%s"
84 /* Run-time compilation parameters selecting different hardware subsets. */
86 extern int target_flags;
88 /* If non-zero, tell the linker to do relaxing.
89 We don't do anything with the option, other than recognize it.
90 LINK_SPEC handles passing -relax to the linker.
91 This can cause incorrect debugging information as line numbers may
92 turn out wrong. This shouldn't be specified unless accompanied with -O2
93 [where the user expects debugging information to be less accurate]. */
94 #define TARGET_RELAX_MASK 1
96 /* For miscellaneous debugging purposes. */
97 #define TARGET_DEBUG_MASK 2
98 #define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)
100 /* Align loops to 32 byte boundaries (cache line size). */
101 /* ??? This option is experimental and is not documented. */
102 #define TARGET_ALIGN_LOOPS_MASK 4
103 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)
105 /* Use old compare/branch support (kept around for awhile for
106 comparison and backoff purposes). */
107 /* ??? This option is experimental and is not documented.
108 Eventually it will be deleted. */
109 #define TARGET_OLD_COMPARE_MASK 8
110 #define TARGET_OLD_COMPARE (target_flags & TARGET_OLD_COMPARE_MASK)
112 /* Target machine to compile for. */
113 #define TARGET_M32R 1
116 /* Macro to define tables used to set the flags.
117 This is a list in braces of pairs in braces,
118 each pair being { "NAME", VALUE }
119 where VALUE is the bits to set or minus the bits to clear.
120 An empty string NAME is used to identify the default VALUE. */
122 #define TARGET_SWITCHES \
124 /* { "relax", TARGET_RELAX_MASK }, \
125 { "no-relax", -TARGET_RELAX_MASK },*/ \
126 { "debug", TARGET_DEBUG_MASK }, \
127 { "align-loops", TARGET_ALIGN_LOOPS_MASK }, \
128 { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK }, \
129 { "old-compare", TARGET_OLD_COMPARE_MASK }, \
130 { "no-old-compare", -TARGET_OLD_COMPARE_MASK }, \
132 { "", TARGET_DEFAULT } \
135 #define TARGET_DEFAULT (0)
137 #define SUBTARGET_SWITCHES
139 /* This macro is similar to `TARGET_SWITCHES' but defines names of
140 command options that have values. Its definition is an
141 initializer with a subgrouping for each command option.
143 Each subgrouping contains a string constant, that defines the
144 fixed part of the option name, and the address of a variable.
145 The variable, type `char *', is set to the variable part of the
146 given option if the fixed part matches. The actual option name
147 is made by appending `-m' to the specified name.
149 Here is an example which defines `-mshort-data-NUMBER'. If the
150 given option is `-mshort-data-512', the variable `m88k_short_data'
151 will be set to the string `"512"'.
153 extern char *m88k_short_data;
154 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
156 extern char *m32r_model_string;
157 extern char *m32r_sdata_string;
160 #define TARGET_OPTIONS \
162 { "model=", &m32r_model_string }, \
163 { "sdata=", &m32r_sdata_string }, \
168 Code models are used to select between two choices of two separate
169 possibilities (address space size, call insn to use):
171 small: addresses use 24 bits, use bl to make calls
172 medium: addresses use 32 bits, use bl to make calls (*1)
173 large: addresses use 32 bits, use seth/add3/jl to make calls (*2)
175 The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but
176 using this one doesn't make much sense.
178 (*1) The linker may eventually be able to relax seth/add3 -> ld24.
179 (*2) The linker may eventually be able to relax seth/add3/jl -> bl.
181 Internally these are recorded as TARGET_ADDR{24,32} and
184 The __model__ attribute can be used to select the code model to use when
185 accessing particular objects. */
187 enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE };
189 extern enum m32r_model m32r_model;
190 #define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL)
191 #define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)
192 #define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE)
193 #define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL)
194 #define TARGET_ADDR32 (! TARGET_ADDR24)
195 #define TARGET_CALL26 (! TARGET_CALL32)
196 #define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE)
198 /* The default is the small model. */
199 #define M32R_MODEL_DEFAULT "small"
203 The SDA consists of sections .sdata, .sbss, and .scommon.
204 .scommon isn't a real section, symbols in it have their section index
205 set to SHN_M32R_SCOMMON, though support for it exists in the linker script.
207 Two switches control the SDA:
209 -G NNN - specifies the maximum size of variable to go in the SDA
211 -msdata=foo - specifies how such variables are handled
213 -msdata=none - small data area is disabled
215 -msdata=sdata - small data goes in the SDA, special code isn't
216 generated to use it, and special relocs aren't
219 -msdata=use - small data goes in the SDA, special code is generated
220 to use the SDA and special relocs are generated
222 The SDA is not multilib'd, it isn't necessary.
223 MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd
224 libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use
225 -msdata=use will successfully link with them (references in header files
226 will cause the compiler to emit code that refers to library objects in
227 .data). ??? There can be a problem if the user passes a -G value greater
228 than the default and a library object in a header file is that size.
229 The default is 8 so this should be rare - if it occurs the user
230 is required to rebuild the libraries or use a smaller value for -G.
233 /* Maximum size of variables that go in .sdata/.sbss.
234 The -msdata=foo switch also controls how small variables are handled. */
235 #define SDATA_DEFAULT_SIZE 8
237 extern int g_switch_value; /* value of the -G xx switch */
238 extern int g_switch_set; /* whether -G xx was passed. */
240 enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE };
242 extern enum m32r_sdata m32r_sdata;
243 #define TARGET_SDATA_NONE (m32r_sdata == M32R_SDATA_NONE)
244 #define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA)
245 #define TARGET_SDATA_USE (m32r_sdata == M32R_SDATA_USE)
247 /* Default is to disable the SDA
248 [for upward compatibility with previous toolchains]. */
249 #define M32R_SDATA_DEFAULT "none"
251 /* Define this macro as a C expression for the initializer of an array of
252 strings to tell the driver program which options are defaults for this
253 target and thus do not need to be handled specially when using
254 `MULTILIB_OPTIONS'. */
255 #define MULTILIB_DEFAULTS { "mmodel=small", "m32r" }
257 /* Sometimes certain combinations of command options do not make
258 sense on a particular target machine. You can define a macro
259 `OVERRIDE_OPTIONS' to take account of this. This macro, if
260 defined, is executed once just after all the command options have
263 Don't use this macro to turn on various extra optimizations for
264 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
266 #define OVERRIDE_OPTIONS \
268 /* These need to be done at start up. It's convenient to do them here. */ \
272 /* Define this macro if debugging can be performed even without a
273 frame pointer. If this macro is defined, GNU CC will turn on the
274 `-fomit-frame-pointer' option whenever `-O' is specified. */
275 #define CAN_DEBUG_WITHOUT_FP
277 /* Target machine storage layout. */
279 /* Define to use software floating point emulator for REAL_ARITHMETIC and
280 decimal <-> binary conversion. */
281 #define REAL_ARITHMETIC
283 /* Define this if most significant bit is lowest numbered
284 in instructions that operate on numbered bit-fields. */
285 #define BITS_BIG_ENDIAN 1
287 /* Define this if most significant byte of a word is the lowest numbered. */
288 #define BYTES_BIG_ENDIAN 1
290 /* Define this if most significant word of a multiword number is the lowest
292 #define WORDS_BIG_ENDIAN 1
294 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must
295 be a constant value with the same meaning as WORDS_BIG_ENDIAN,
296 which will be used only when compiling libgcc2.c. Typically the
297 value will be set based on preprocessor defines. */
298 /*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/
300 /* Number of bits in an addressable storage unit. */
301 #define BITS_PER_UNIT 8
303 /* Width in bits of a "word", which is the contents of a machine register.
304 Note that this is not necessarily the width of data type `int';
305 if using 16-bit ints on a 68000, this would still be 32.
306 But on a machine with 16-bit registers, this would be 16. */
307 #define BITS_PER_WORD 32
309 /* Width of a word, in units (bytes). */
310 #define UNITS_PER_WORD 4
312 /* Define this macro if it is advisable to hold scalars in registers
313 in a wider mode than that declared by the program. In such cases,
314 the value is constrained to be within the bounds of the declared
315 type, but kept valid in the wider mode. The signedness of the
316 extension may differ from that of the type. */
317 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
318 if (GET_MODE_CLASS (MODE) == MODE_INT \
319 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
324 /* Define this macro if the promotion described by `PROMOTE_MODE'
325 should also be done for outgoing function arguments. */
326 /*#define PROMOTE_FUNCTION_ARGS*/
328 /* Likewise, if the function return value is promoted.
329 If defined, FUNCTION_VALUE must perform the same promotions done by
331 /*#define PROMOTE_FUNCTION_RETURN*/
333 /* Width in bits of a pointer.
334 See also the macro `Pmode' defined below. */
335 #define POINTER_SIZE 32
337 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
338 #define PARM_BOUNDARY 32
340 /* Boundary (in *bits*) on which stack pointer should be aligned. */
341 #define STACK_BOUNDARY 32
343 /* ALIGN FRAMES on word boundaries */
344 #define M32R_STACK_ALIGN(LOC) (((LOC)+3) & ~3)
346 /* Allocation boundary (in *bits*) for the code of a function. */
347 #define FUNCTION_BOUNDARY 32
349 /* Alignment of field after `int : 0' in a structure. */
350 #define EMPTY_FIELD_BOUNDARY 32
352 /* Every structure's size must be a multiple of this. */
353 #define STRUCTURE_SIZE_BOUNDARY 8
355 /* A bitfield declared as `int' forces `int' alignment for the struct. */
356 #define PCC_BITFIELD_TYPE_MATTERS 1
358 /* No data type wants to be aligned rounder than this. */
359 #define BIGGEST_ALIGNMENT 32
361 /* The best alignment to use in cases where we have a choice. */
362 #define FASTEST_ALIGNMENT 32
364 /* Make strings word-aligned so strcpy from constants will be faster. */
365 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
366 ((TREE_CODE (EXP) == STRING_CST \
367 && (ALIGN) < FASTEST_ALIGNMENT) \
368 ? FASTEST_ALIGNMENT : (ALIGN))
370 /* Make arrays of chars word-aligned for the same reasons. */
371 #define DATA_ALIGNMENT(TYPE, ALIGN) \
372 (TREE_CODE (TYPE) == ARRAY_TYPE \
373 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
374 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
376 /* Set this nonzero if move instructions will actually fail to work
377 when given unaligned data. */
378 #define STRICT_ALIGNMENT 1
380 /* Layout of source language data types. */
382 #define SHORT_TYPE_SIZE 16
383 #define INT_TYPE_SIZE 32
384 #define LONG_TYPE_SIZE 32
385 #define LONG_LONG_TYPE_SIZE 64
386 #define FLOAT_TYPE_SIZE 32
387 #define DOUBLE_TYPE_SIZE 64
388 #define LONG_DOUBLE_TYPE_SIZE 64
390 /* Define this as 1 if `char' should by default be signed; else as 0. */
391 #define DEFAULT_SIGNED_CHAR 1
393 #define SIZE_TYPE "long unsigned int"
394 #define PTRDIFF_TYPE "long int"
395 #define WCHAR_TYPE "short unsigned int"
396 #define WCHAR_TYPE_SIZE 16
398 /* Define results of standard character escape sequences. */
399 #define TARGET_BELL 007
400 #define TARGET_BS 010
401 #define TARGET_TAB 011
402 #define TARGET_NEWLINE 012
403 #define TARGET_VT 013
404 #define TARGET_FF 014
405 #define TARGET_CR 015
407 /* Standard register usage. */
409 /* Number of actual hardware registers.
410 The hardware registers are assigned numbers for the compiler
411 from 0 to just below FIRST_PSEUDO_REGISTER.
412 All registers that the compiler knows about must be given numbers,
413 even those that are not normally considered general registers. */
414 #define FIRST_PSEUDO_REGISTER 18
416 /* 1 for registers that have pervasive standard uses
417 and are not available for the register allocator.
419 0-3 - arguments/results
420 4-5 - call used [4 is used as a tmp during prologue/epilogue generation]
422 7 - call used, static chain pointer
424 12 - call saved [reserved for global pointer]
426 14 - subroutine link register
432 By default, the extension registers are not available. */
434 #define FIXED_REGISTERS \
435 { 0, 0, 0, 0, 0, 0, 0, 0, \
436 0, 0, 0, 0, 0, 0, 0, 1, \
440 /* 1 for registers not available across function calls.
441 These must include the FIXED_REGISTERS and also any
442 registers that can be used without being saved.
443 The latter must include the registers where values are returned
444 and the register where structure-value addresses are passed.
445 Aside from that, you can include as many other registers as you like. */
447 #define CALL_USED_REGISTERS \
448 { 1, 1, 1, 1, 1, 1, 1, 1, \
449 0, 0, 0, 0, 0, 0, 1, 1, \
453 /* Zero or more C statements that may conditionally modify two variables
454 `fixed_regs' and `call_used_regs' (both of type `char []') after they
455 have been initialized from the two preceding macros.
457 This is necessary in case the fixed or call-clobbered registers depend
460 You need not define this macro if it has no work to do. */
462 /*#define CONDITIONAL_REGISTER_USAGE*/
464 /* If defined, an initializer for a vector of integers, containing the
465 numbers of hard registers in the order in which GNU CC should
466 prefer to use them (from most preferred to least). */
467 #if 1 /* better for int code */
468 #define REG_ALLOC_ORDER \
469 { 4, 5, 6, 7, 2, 3, 8, 9, 10, 11, 12, 13, 14, 0, 1, 15, 16, 17 }
470 #else /* better for fp code at expense of int code */
471 #define REG_ALLOC_ORDER \
472 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 }
475 /* Return number of consecutive hard regs needed starting at reg REGNO
476 to hold something of mode MODE.
477 This is ordinarily the length in words of a value of mode MODE
478 but can be less for certain modes in special long registers. */
479 #define HARD_REGNO_NREGS(REGNO, MODE) \
480 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
482 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
483 extern unsigned int m32r_hard_regno_mode_ok[];
484 extern unsigned int m32r_mode_class[];
485 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
486 ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
488 /* A C expression that is nonzero if it is desirable to choose
489 register allocation so as to avoid move instructions between a
490 value of mode MODE1 and a value of mode MODE2.
492 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
493 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
494 MODE2)' must be zero. */
496 /* Tie QI/HI/SI modes together. */
497 #define MODES_TIEABLE_P(MODE1, MODE2) \
498 (GET_MODE_CLASS (MODE1) == MODE_INT \
499 && GET_MODE_CLASS (MODE2) == MODE_INT \
500 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
501 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
503 /* Register classes and constants. */
505 /* Define the classes of registers for register constraints in the
506 machine description. Also define ranges of constants.
508 One of the classes must always be named ALL_REGS and include all hard regs.
509 If there is more than one class, another class must be named NO_REGS
510 and contain no registers.
512 The name GENERAL_REGS must be the name of a class (or an alias for
513 another name such as ALL_REGS). This is the class of registers
514 that is allowed by "g" or "r" in a register constraint.
515 Also, registers outside this class are allocated only when
516 instructions express preferences for them.
518 The classes must be numbered in nondecreasing order; that is,
519 a larger-numbered class must never be contained completely
520 in a smaller-numbered class.
522 For any two classes, it is very desirable that there be another
523 class that represents their union.
525 It is important that any condition codes have class NO_REGS.
526 See `register_operand'. */
529 NO_REGS, CARRY_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
532 #define N_REG_CLASSES (int) LIM_REG_CLASSES
534 /* Give names of register classes as strings for dump file. */
535 #define REG_CLASS_NAMES \
536 { "NO_REGS", "CARRY_REG", "GENERAL_REGS", "ALL_REGS" }
538 /* Define which registers fit in which classes.
539 This is an initializer for a vector of HARD_REG_SET
540 of length N_REG_CLASSES. */
542 #define REG_CLASS_CONTENTS \
543 { {0}, {0x20000}, {0x1ffff}, {0x3ffff} }
546 /* The same information, inverted:
547 Return the class number of the smallest class containing
548 reg number REGNO. This could be a conditional expression
549 or could index an array. */
550 extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
551 #define REGNO_REG_CLASS(REGNO) \
552 (m32r_regno_reg_class[REGNO])
554 /* The class value for index registers, and the one for base regs. */
555 #define INDEX_REG_CLASS GENERAL_REGS
556 #define BASE_REG_CLASS GENERAL_REGS
558 /* Get reg_class from a letter such as appears in the machine description. */
559 #define REG_CLASS_FROM_LETTER(C) NO_REGS
561 /* These assume that REGNO is a hard or pseudo reg number.
562 They give nonzero only if REGNO is a hard reg of the suitable class
563 or a pseudo reg currently allocated to a suitable hard reg.
564 Since they use reg_renumber, they are safe only once reg_renumber
565 has been allocated, which happens in local-alloc.c. */
566 #define REGNO_OK_FOR_BASE_P(REGNO) \
567 ((REGNO) < FIRST_PSEUDO_REGISTER \
568 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \
569 : GPR_P (reg_renumber[REGNO]))
570 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
572 /* Given an rtx X being reloaded into a reg required to be
573 in class CLASS, return the class of reg to actually use.
574 In general this is just CLASS; but on some machines
575 in some cases it is preferable to use a more restrictive class. */
576 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
579 /* Return the maximum number of consecutive registers
580 needed to represent mode MODE in a register of class CLASS. */
581 #define CLASS_MAX_NREGS(CLASS, MODE) \
582 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
584 /* The letters I, J, K, L, M, N, O, P in a register constraint string
585 can be used to stand for particular ranges of immediate operands.
586 This macro defines what the ranges are.
587 C is the letter, and VALUE is a constant value.
588 Return 1 if VALUE is in the range specified by C. */
589 /* 'I' is used for 8 bit signed immediates.
590 'J' is used for 16 bit signed immediates.
591 'K' is used for 16 bit unsigned immediates.
592 'L' is used for 16 bit immediates left shifted by 16 (sign ???).
593 'M' is used for 24 bit unsigned immediates.
594 'N' is used for any 32 bit non-symbolic value.
595 'O' is used for 5 bit unsigned immediates (shift count).
596 'P' is used for 16 bit signed immediates for compares
597 (values in the range -32767 to +32768). */
599 /* local to this file */
600 #define INT8_P(X) ((X) >= -0x80 && (X) <= 0x7f)
601 #define INT16_P(X) ((X) >= -0x8000 && (X) <= 0x7fff)
602 #define CMP_INT16_P(X) ((X) >= -0x7fff && (X) <= 0x8000)
603 #define UINT16_P(X) ((X) >= 0 && (X) <= 0xffff)
604 #define UPPER16_P(X) (((X) & 0xffff) == 0 \
605 && ((X) >> 16) >= -0x8000 \
606 && ((X) >> 16) <= 0x7fff)
607 #define UINT24_P(X) ((X) >= 0 && (X) < 0x1000000)
608 #define INT32_P(X) (((X) >= -(HOST_WIDE_INT) 0x80000000 \
609 && (X) <= (HOST_WIDE_INT) 0x7fffffff) \
610 || (unsigned HOST_WIDE_INT) (X) <= 0xffffffff)
611 #define UINT5_P(X) ((X) >= 0 && (X) < 32)
612 #define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)
614 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
615 ((C) == 'I' ? INT8_P (VALUE) \
616 : (C) == 'J' ? INT16_P (VALUE) \
617 : (C) == 'K' ? UINT16_P (VALUE) \
618 : (C) == 'L' ? UPPER16_P (VALUE) \
619 : (C) == 'M' ? UINT24_P (VALUE) \
620 : (C) == 'N' ? INVERTED_SIGNED_8BIT (VALUE) \
621 : (C) == 'O' ? UINT5_P (VALUE) \
622 : (C) == 'P' ? CMP_INT16_P (VALUE) \
625 /* Similar, but for floating constants, and defining letters G and H.
626 Here VALUE is the CONST_DOUBLE rtx itself.
627 For the m32r, handle a few constants inline.
628 ??? We needn't treat DI and DF modes differently, but for now we do. */
629 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
630 ((C) == 'G' ? easy_di_const (VALUE) \
631 : (C) == 'H' ? easy_df_const (VALUE) \
634 /* A C expression that defines the optional machine-dependent constraint
635 letters that can be used to segregate specific types of operands,
636 usually memory references, for the target machine. It should return 1 if
637 VALUE corresponds to the operand type represented by the constraint letter
638 C. If C is not defined as an extra constraint, the value returned should
639 be 0 regardless of VALUE. */
640 /* Q is for symbolic addresses loadable with ld24.
641 R is for symbolic addresses when ld24 can't be used.
643 T is for indirect of a pointer.
644 U is for pushes and pops of the stack pointer. */
646 #define EXTRA_CONSTRAINT(VALUE, C) \
648 ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
649 || addr24_operand (VALUE, VOIDmode)) \
651 ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
652 || addr32_operand (VALUE, VOIDmode)) \
656 ? (GET_CODE (VALUE) == MEM \
657 && memreg_operand (VALUE, GET_MODE (VALUE))) \
659 ? (GET_CODE (VALUE) == MEM \
660 && PUSH_POP_P (GET_MODE (VALUE), XEXP (VALUE, 0))) \
663 /* Stack layout and stack pointer usage. */
665 /* Define this macro if pushing a word onto the stack moves the stack
666 pointer to a smaller address. */
667 #define STACK_GROWS_DOWNWARD
669 /* Define this if the nominal address of the stack frame
670 is at the high-address end of the local variables;
671 that is, each additional local variable allocated
672 goes at a more negative offset from the frame pointer. */
673 /*#define FRAME_GROWS_DOWNWARD*/
675 /* Offset from frame pointer to start allocating local variables at.
676 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
677 first local allocated. Otherwise, it is the offset to the BEGINNING
678 of the first local allocated. */
679 /* The frame pointer points at the same place as the stack pointer, except if
680 alloca has been called. */
681 #define STARTING_FRAME_OFFSET \
682 M32R_STACK_ALIGN (current_function_outgoing_args_size)
684 /* Offset from the stack pointer register to the first location at which
685 outgoing arguments are placed. */
686 #define STACK_POINTER_OFFSET 0
688 /* Offset of first parameter from the argument pointer register value. */
689 #define FIRST_PARM_OFFSET(FNDECL) 0
691 /* A C expression whose value is RTL representing the address in a
692 stack frame where the pointer to the caller's frame is stored.
693 Assume that FRAMEADDR is an RTL expression for the address of the
696 If you don't define this macro, the default is to return the value
697 of FRAMEADDR--that is, the stack frame address is also the address
698 of the stack word that points to the previous frame. */
699 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
701 /* A C expression whose value is RTL representing the value of the
702 return address for the frame COUNT steps up from the current frame.
703 FRAMEADDR is the frame pointer of the COUNT frame, or the frame
704 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
706 /* The current return address is in r14. */
707 #if 0 /* The default value should work. */
708 #define RETURN_ADDR_RTX(COUNT, FRAME) \
710 ? gen_rtx (REG, Pmode, 14) \
711 : copy_to_reg (gen_rtx (MEM, Pmode, \
712 memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD)))))
715 /* Register to use for pushing function arguments. */
716 #define STACK_POINTER_REGNUM 15
718 /* Base register for access to local variables of the function. */
719 #define FRAME_POINTER_REGNUM 13
721 /* Base register for access to arguments of the function. */
722 #define ARG_POINTER_REGNUM 16
724 /* The register number of the return address pointer register, which
725 is used to access the current function's return address from the
726 stack. On some machines, the return address is not at a fixed
727 offset from the frame pointer or stack pointer or argument
728 pointer. This register can be defined to point to the return
729 address on the stack, and then be converted by `ELIMINABLE_REGS'
730 into either the frame pointer or stack pointer.
732 Do not define this macro unless there is no other way to get the
733 return address from the stack. */
735 /* #define RETURN_ADDRESS_POINTER_REGNUM */
737 /* Register in which static-chain is passed to a function. This must
738 not be a register used by the prologue. */
739 #define STATIC_CHAIN_REGNUM 7
741 /* These aren't official macros. */
742 #define PROLOGUE_TMP_REGNUM 4
743 #define RETURN_ADDR_REGNUM 14
744 /* #define GP_REGNUM 12 */
745 #define CARRY_REGNUM 17
746 #define M32R_MAX_INT_REGS 16
749 #define GPR_P(REGNO) ((unsigned) (REGNO) < M32R_MAX_INT_REGS)
751 /* Eliminating the frame and arg pointers. */
753 /* A C expression which is nonzero if a function must have and use a
754 frame pointer. This expression is evaluated in the reload pass.
755 If its value is nonzero the function will have a frame pointer. */
756 #define FRAME_POINTER_REQUIRED \
757 (current_function_calls_alloca)
760 /* C statement to store the difference between the frame pointer
761 and the stack pointer values immediately after the function prologue.
762 If `ELIMINABLE_REGS' is defined, this macro will be not be used and
763 need not be defined. */
764 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
765 ((VAR) = m32r_compute_frame_size (get_frame_size ()))
768 /* If defined, this macro specifies a table of register pairs used to
769 eliminate unneeded registers that point into the stack frame. If
770 it is not defined, the only elimination attempted by the compiler
771 is to replace references to the frame pointer with references to
774 Note that the elimination of the argument pointer with the stack
775 pointer is specified first since that is the preferred elimination. */
777 #define ELIMINABLE_REGS \
778 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
779 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
780 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }} \
782 /* A C expression that returns non-zero if the compiler is allowed to
783 try to replace register number FROM-REG with register number
784 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
785 defined, and will usually be the constant 1, since most of the
786 cases preventing register elimination are things that the compiler
787 already knows about. */
789 #define CAN_ELIMINATE(FROM, TO) \
790 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
791 ? ! frame_pointer_needed \
794 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
795 specifies the initial difference between the specified pair of
796 registers. This macro must be defined if `ELIMINABLE_REGS' is
799 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
801 int size = m32r_compute_frame_size (get_frame_size ()); \
803 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
805 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
806 (OFFSET) = size - current_function_pretend_args_size; \
807 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
808 (OFFSET) = size - current_function_pretend_args_size; \
813 /* Function argument passing. */
815 /* When a prototype says `char' or `short', really pass an `int'. */
816 #define PROMOTE_PROTOTYPES 1
818 /* If defined, the maximum amount of space required for outgoing
819 arguments will be computed and placed into the variable
820 `current_function_outgoing_args_size'. No space will be pushed
821 onto the stack for each call; instead, the function prologue should
822 increase the stack frame size by this amount. */
823 #define ACCUMULATE_OUTGOING_ARGS
825 /* Define this macro if functions should assume that stack space has
826 been allocated for arguments even when their values are passed in
829 The value of this macro is the size, in bytes, of the area
830 reserved for arguments passed in registers for the function
831 represented by FNDECL.
833 This space can be allocated by the caller, or be a part of the
834 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
837 #define REG_PARM_STACK_SPACE(FNDECL) \
838 (M32R_MAX_PARM_REGS * UNITS_PER_WORD)
841 /* Value is the number of bytes of arguments automatically
842 popped when returning from a subroutine call.
843 FUNDECL is the declaration node of the function (as a tree),
844 FUNTYPE is the data type of the function (as a tree),
845 or for a library call it is an identifier node for the subroutine name.
846 SIZE is the number of bytes of arguments passed on the stack. */
847 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
849 /* Nonzero if we do not know how to pass TYPE solely in registers. */
850 #define MUST_PASS_IN_STACK(MODE,TYPE) \
852 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
853 || TREE_ADDRESSABLE (TYPE)))
855 /* Define a data type for recording info about an argument list
856 during the scan of that argument list. This data type should
857 hold all necessary information about the function itself
858 and about the args processed so far, enough to enable macros
859 such as FUNCTION_ARG to determine where the next arg should go. */
860 #define CUMULATIVE_ARGS int
862 /* Initialize a variable CUM of type CUMULATIVE_ARGS
863 for a call to a function whose data type is FNTYPE.
864 For a library call, FNTYPE is 0. */
865 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
868 /* The number of registers used for parameter passing. Local to this file. */
869 #define M32R_MAX_PARM_REGS 4
871 /* 1 if N is a possible register number for function argument passing. */
872 #define FUNCTION_ARG_REGNO_P(N) \
873 ((unsigned) (N) < M32R_MAX_PARM_REGS)
875 /* The ROUND_ADVANCE* macros are local to this file. */
876 /* Round SIZE up to a word boundary. */
877 #define ROUND_ADVANCE(SIZE) \
878 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
880 /* Round arg MODE/TYPE up to the next word boundary. */
881 #define ROUND_ADVANCE_ARG(MODE, TYPE) \
883 ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
884 : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
886 /* Round CUM up to the necessary point for argument MODE/TYPE. */
888 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \
889 ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \
894 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)
897 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
898 a reg. This includes arguments that have to be passed by reference as the
899 pointer to them is passed in a reg if one is available (and that is what
901 This macro is only used in this file. */
902 #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \
903 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)
905 /* Determine where to put an argument to a function.
906 Value is zero to push the argument on the stack,
907 or a hard register in which to store the argument.
909 MODE is the argument's machine mode.
910 TYPE is the data type of the argument (as a tree).
911 This is null for libcalls where that information may
913 CUM is a variable of type CUMULATIVE_ARGS which gives info about
914 the preceding args and about the function being called.
915 NAMED is nonzero if this argument is a named parameter
916 (otherwise it is an extra parameter matching an ellipsis). */
917 /* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers
918 and the rest are pushed. */
919 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
920 (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
921 ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
924 /* ??? Quick hack to try to get varargs working the normal way. */
925 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
926 (((! current_function_varargs || (NAMED)) \
927 && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \
928 ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
931 /* A C expression for the number of words, at the beginning of an
932 argument, must be put in registers. The value must be zero for
933 arguments that are passed entirely in registers or that are entirely
936 On some machines, certain arguments must be passed partially in
937 registers and partially in memory. On these machines, typically the
938 first @var{n} words of arguments are passed in registers, and the rest
939 on the stack. If a multi-word argument (a @code{double} or a
940 structure) crosses that boundary, its first few words must be passed
941 in registers and the rest must be pushed. This macro tells the
942 compiler when this occurs, and how many of the words should go in
944 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
945 function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)
947 /* A C expression that indicates when an argument must be passed by
948 reference. If nonzero for an argument, a copy of that argument is
949 made in memory and a pointer to the argument is passed instead of
950 the argument itself. The pointer is passed in whatever way is
951 appropriate for passing a pointer to that type. */
952 /* All arguments greater than 8 bytes are passed this way. */
953 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
954 ((TYPE) && int_size_in_bytes (TYPE) > 8)
956 /* Update the data in CUM to advance over an argument
957 of mode MODE and data type TYPE.
958 (TYPE is null for libcalls where that information may not be available.) */
959 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
960 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
961 + ROUND_ADVANCE_ARG ((MODE), (TYPE))))
963 /* If defined, a C expression that gives the alignment boundary, in bits,
964 of an argument with the specified mode and type. If it is not defined,
965 PARM_BOUNDARY is used for all arguments. */
967 /* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */
968 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
969 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
974 /* This macro offers an alternative
975 to using `__builtin_saveregs' and defining the macro
976 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
977 arguments into the stack so that all the arguments appear to have
978 been passed consecutively on the stack. Once this is done, you
979 can use the standard implementation of varargs that works for
980 machines that pass all their arguments on the stack.
982 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure,
983 containing the values that obtain after processing of the named
984 arguments. The arguments MODE and TYPE describe the last named
985 argument--its machine mode and its data type as a tree node.
987 The macro implementation should do two things: first, push onto the
988 stack all the argument registers *not* used for the named
989 arguments, and second, store the size of the data thus pushed into
990 the `int'-valued variable whose name is supplied as the argument
991 PRETEND_SIZE. The value that you store here will serve as
992 additional offset for setting up the stack frame.
994 If the argument NO_RTL is nonzero, it means that the
995 arguments of the function are being analyzed for the second time.
996 This happens for an inline function, which is not actually
997 compiled until the end of the source file. The macro
998 `SETUP_INCOMING_VARARGS' should not generate any instructions in
1001 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
1002 m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
1004 /* Implement `va_arg'. */
1005 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1006 m32r_va_arg (valist, type)
1008 /* Function results. */
1010 /* Define how to find the value returned by a function.
1011 VALTYPE is the data type of the value (as a tree).
1012 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1013 otherwise, FUNC is 0. */
1014 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
1016 /* Define how to find the value returned by a library function
1017 assuming the value has mode MODE. */
1018 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
1020 /* 1 if N is a possible register number for a function value
1021 as seen by the caller. */
1022 /* ??? What about r1 in DI/DF values. */
1023 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
1025 /* A C expression which can inhibit the returning of certain function
1026 values in registers, based on the type of value. A nonzero value says
1027 to return the function value in memory, just as large structures are
1028 always returned. Here TYPE will be a C expression of type `tree',
1029 representing the data type of the value. */
1030 #define RETURN_IN_MEMORY(TYPE) \
1031 (int_size_in_bytes (TYPE) > 8)
1033 /* Tell GCC to use RETURN_IN_MEMORY. */
1034 #define DEFAULT_PCC_STRUCT_RETURN 0
1036 /* Register in which address to store a structure value
1037 is passed to a function, or 0 to use `invisible' first argument. */
1038 #define STRUCT_VALUE 0
1040 /* Function entry and exit. */
1042 /* Initialize data used by insn expanders. This is called from
1043 init_emit, once for each function, before code is generated. */
1044 #define INIT_EXPANDERS m32r_init_expanders ()
1046 /* This macro generates the assembly code for function entry.
1047 FILE is a stdio stream to output the code to.
1048 SIZE is an int: how many units of temporary storage to allocate.
1049 Refer to the array `regs_ever_live' to determine which registers
1050 to save; `regs_ever_live[I]' is nonzero if register number I
1051 is ever used in the function. This macro is responsible for
1052 knowing which registers should not be saved even if used. */
1053 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1054 m32r_output_function_prologue (FILE, SIZE)
1056 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1057 the stack pointer does not matter. The value is tested only in
1058 functions that have frame pointers.
1059 No definition is equivalent to always zero. */
1060 #define EXIT_IGNORE_STACK 1
1062 /* This macro generates the assembly code for function exit,
1063 on machines that need it. If FUNCTION_EPILOGUE is not defined
1064 then individual return instructions are generated for each
1065 return statement. Args are same as for FUNCTION_PROLOGUE.
1067 The function epilogue should not depend on the current stack pointer!
1068 It should use the frame pointer only. This is mandatory because
1069 of alloca; we also take advantage of it to omit stack adjustments
1070 before returning. */
1071 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1072 m32r_output_function_epilogue (FILE, SIZE)
1074 /* Output assembler code to FILE to increment profiler label # LABELNO
1075 for profiling a function entry. */
1076 #define FUNCTION_PROFILER(FILE, LABELNO) abort ()
1080 /* On the M32R, the trampoline is
1087 ??? Need addr32 support.
1090 /* Length in bytes of the trampoline for entering a nested function. */
1091 #define TRAMPOLINE_SIZE 12
1093 /* Emit RTL insns to initialize the variable parts of a trampoline.
1094 FNADDR is an RTX for the address of the function's pure code.
1095 CXT is an RTX for the static chain value for the function. */
1096 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1098 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \
1099 plus_constant ((CXT), 0xe7000000)); \
1100 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \
1101 plus_constant ((FNADDR), 0xe6000000)); \
1102 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \
1103 GEN_INT (0x1fc67000)); \
1104 emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \
1107 /* Library calls. */
1109 /* Generate calls to memcpy, memcmp and memset. */
1110 #define TARGET_MEM_FUNCTIONS
1112 /* Addressing modes, and classification of registers for them. */
1114 /* Maximum number of registers that can appear in a valid memory address. */
1115 #define MAX_REGS_PER_ADDRESS 1
1117 /* We have post-inc load and pre-dec,pre-inc store,
1118 but only for 4 byte vals. */
1120 #define HAVE_PRE_DECREMENT 1
1121 #define HAVE_PRE_INCREMENT 1
1122 #define HAVE_POST_INCREMENT 1
1125 /* Recognize any constant value that is a valid address. */
1126 #define CONSTANT_ADDRESS_P(X) \
1127 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1128 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1130 /* Nonzero if the constant value X is a legitimate general operand.
1131 We don't allow (plus symbol large-constant) as the relocations can't
1132 describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations.
1133 We allow all CONST_DOUBLE's as the md file patterns will force the
1134 constant to memory if they can't handle them. */
1136 #define LEGITIMATE_CONSTANT_P(X) \
1137 (! (GET_CODE (X) == CONST \
1138 && GET_CODE (XEXP (X, 0)) == PLUS \
1139 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
1140 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1141 && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))
1143 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1144 and check its validity for a certain class.
1145 We have two alternate definitions for each of them.
1146 The usual definition accepts all pseudo regs; the other rejects
1147 them unless they have been allocated suitable hard regs.
1148 The symbol REG_OK_STRICT causes the latter definition to be used.
1150 Most source files want to accept pseudo regs in the hope that
1151 they will get allocated to the class that the insn wants them to be in.
1152 Source files for reload pass need to be strict.
1153 After reload, it makes no difference, since pseudo regs have
1154 been eliminated by then. */
1156 #ifdef REG_OK_STRICT
1158 /* Nonzero if X is a hard reg that can be used as a base reg. */
1159 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1160 /* Nonzero if X is a hard reg that can be used as an index. */
1161 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1165 /* Nonzero if X is a hard reg that can be used as a base reg
1166 or if it is a pseudo reg. */
1167 #define REG_OK_FOR_BASE_P(X) \
1168 (GPR_P (REGNO (X)) \
1169 || (REGNO (X)) == ARG_POINTER_REGNUM \
1170 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1171 /* Nonzero if X is a hard reg that can be used as an index
1172 or if it is a pseudo reg. */
1173 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1177 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1178 that is a valid memory address for an instruction.
1179 The MODE argument is the machine mode for the MEM expression
1180 that wants to use this address. */
1182 /* local to this file */
1183 #define RTX_OK_FOR_BASE_P(X) \
1184 (REG_P (X) && REG_OK_FOR_BASE_P (X))
1186 /* local to this file */
1187 #define RTX_OK_FOR_OFFSET_P(X) \
1188 (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
1190 /* local to this file */
1191 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
1192 (GET_CODE (X) == PLUS \
1193 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1194 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))
1196 /* local to this file */
1197 /* For LO_SUM addresses, do not allow them if the MODE is > 1 word,
1198 since more than one instruction will be required. */
1199 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
1200 (GET_CODE (X) == LO_SUM \
1201 && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
1202 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1203 && CONSTANT_P (XEXP (X, 1)))
1205 /* local to this file */
1206 /* Memory address that is a push/pop of the stack pointer. */
1207 #define PUSH_POP_P(MODE, X) \
1209 && (GET_CODE (X) == POST_INC \
1210 || GET_CODE (X) == PRE_INC \
1211 || GET_CODE (X) == PRE_DEC))
1213 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1214 { if (RTX_OK_FOR_BASE_P (X)) \
1216 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
1218 if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
1220 if (PUSH_POP_P ((MODE), (X))) \
1224 /* Try machine-dependent ways of modifying an illegitimate address
1225 to be legitimate. If we find one, return the new, valid address.
1226 This macro is used in only one place: `memory_address' in explow.c.
1228 OLDX is the address as it was before break_out_memory_refs was called.
1229 In some cases it is useful to look at this to decide what needs to be done.
1231 MODE and WIN are passed so that this macro can use
1232 GO_IF_LEGITIMATE_ADDRESS.
1234 It is always safe for this macro to do nothing. It exists to recognize
1235 opportunities to optimize the output.
1237 ??? Is there anything useful we can do here for the M32R? */
1239 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1241 /* Go to LABEL if ADDR (a legitimate address expression)
1242 has an effect that depends on the machine mode it is used for. */
1243 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1245 if (GET_CODE (ADDR) == PRE_DEC \
1246 || GET_CODE (ADDR) == PRE_INC \
1247 || GET_CODE (ADDR) == POST_INC \
1248 || GET_CODE (ADDR) == LO_SUM) \
1252 /* Condition code usage. */
1254 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1255 return the mode to be used for the comparison. */
1256 #define SELECT_CC_MODE(OP, X, Y) \
1257 ((enum machine_mode)m32r_select_cc_mode ((int)OP, X, Y))
1259 /* Return non-zero if SELECT_CC_MODE will never return MODE for a
1260 floating point inequality comparison. */
1261 #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
1265 /* ??? I'm quite sure I don't understand enough of the subtleties involved
1266 in choosing the right numbers to use here, but there doesn't seem to be
1267 enough documentation on this. What I've done is define an insn to cost
1268 4 "units" and work from there. COSTS_N_INSNS (N) is defined as (N) * 4 - 2
1269 so that seems reasonable. Some values are supposed to be defined relative
1270 to each other and thus aren't necessarily related to COSTS_N_INSNS. */
1272 /* Compute the cost of computing a constant rtl expression RTX
1273 whose rtx-code is CODE. The body of this macro is a portion
1274 of a switch statement. If the code is computed here,
1275 return it with a return statement. Otherwise, break from the switch. */
1276 /* Small integers are as cheap as registers. 4 byte values can be fetched
1277 as immediate constants - let's give that the cost of an extra insn. */
1278 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1280 if (INT16_P (INTVAL (X))) \
1282 /* fall through */ \
1287 case CONST_DOUBLE : \
1290 split_double (X, &high, &low); \
1291 return 4 * (!INT16_P (INTVAL (high)) \
1292 + !INT16_P (INTVAL (low))); \
1295 /* Compute the cost of an address. */
1296 #define ADDRESS_COST(ADDR) m32r_address_cost (ADDR)
1298 /* Compute extra cost of moving data between one register class
1300 #define REGISTER_MOVE_COST(CLASS1, CLASS2) 2
1302 /* Compute the cost of moving data between registers and memory. */
1303 /* Memory is 3 times as expensive as registers.
1304 ??? Is that the right way to look at it? */
1305 #define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \
1306 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
1308 /* The cost of a branch insn. */
1309 /* A value of 2 here causes GCC to avoid using branches in comparisons like
1310 while (a < N && a). Branches aren't that expensive on the M32R so
1311 we define this as 1. Defining it as 2 had a heavy hit in fp-bit.c. */
1312 #define BRANCH_COST 1
1314 /* Provide the costs of a rtl expression. This is in the body of a
1315 switch on CODE. The purpose for the cost of MULT is to encourage
1316 `synth_mult' to find a synthetic multiply when reasonable.
1318 If we need more than 12 insns to do a multiply, then go out-of-line,
1319 since the call overhead will be < 10% of the cost of the multiply. */
1320 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1322 return COSTS_N_INSNS (3); \
1327 return COSTS_N_INSNS (10); \
1329 /* Nonzero if access to memory by bytes is slow and undesirable.
1330 For RISC chips, it means that access to memory by bytes is no
1331 better than access by words when possible, so grab a whole word
1332 and maybe make use of that. */
1333 #define SLOW_BYTE_ACCESS 1
1335 /* Define this macro if it is as good or better to call a constant
1336 function address than to call an address kept in a register. */
1337 #define NO_FUNCTION_CSE
1339 /* Define this macro if it is as good or better for a function to call
1340 itself with an explicit address than to call an address kept in a
1342 #define NO_RECURSIVE_FUNCTION_CSE
1344 /* Enable the register move pass.
1345 This is useful for machines with only 2 address instructions.
1346 It's not currently enabled by default because on the stanford benchmarks
1347 the improvement wasn't significant and in a couple of cases caused a
1348 significant de-optimization. */
1349 /* #define ENABLE_REGMOVE_PASS */
1351 /* A C statement (sans semicolon) to update the integer variable COST based on
1352 the relationship between INSN that is dependent on DEP_INSN through the
1353 dependence LINK. The default is to make no adjustment to COST. This can be
1354 used for example to specify to the scheduler that an output- or
1355 anti-dependence does not incur the same cost as a data-dependence. */
1357 /* #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1358 (COST) = m32r_adjust_cost (INSN, LINK, DEP_INSN, COST) */
1360 /* A C statement (sans semicolon) to update the integer scheduling
1361 priority `INSN_PRIORITY(INSN)'. Reduce the priority to execute
1362 the INSN earlier, increase the priority to execute INSN later.
1363 Do not define this macro if you do not need to adjust the
1364 scheduling priorities of insns. */
1365 /* #define ADJUST_PRIORITY (INSN) */
1367 /* Macro to determine whether the Haifa scheduler is used. */
1374 /* Indicate how many instructions can be issued at the same time.
1375 This is 1/2 of a lie. The m32r can issue only 1 long insn at
1376 once, but 2. However doing so allows the scheduler to group
1377 the two short insns together. */
1378 #define ISSUE_RATE 2
1380 /* When the `length' insn attribute is used, this macro specifies the
1381 value to be assigned to the address of the first insn in a
1382 function. If not specified, 0 is used. */
1383 #define FIRST_INSN_ADDRESS m32r_first_insn_address ()
1386 /* Section selection. */
1388 #define TEXT_SECTION_ASM_OP "\t.section .text"
1389 #define DATA_SECTION_ASM_OP "\t.section .data"
1390 #define RODATA_SECTION_ASM_OP "\t.section .rodata"
1391 #define BSS_SECTION_ASM_OP "\t.section .bss"
1392 #define SDATA_SECTION_ASM_OP "\t.section .sdata"
1393 #define SBSS_SECTION_ASM_OP "\t.section .sbss"
1394 /* This one is for svr4.h. */
1395 #undef CONST_SECTION_ASM_OP
1396 #define CONST_SECTION_ASM_OP "\t.section .rodata"
1398 /* A list of names for sections other than the standard two, which are
1399 `in_text' and `in_data'. You need not define this macro
1400 on a system with no other sections (that GCC needs to use). */
1401 #undef EXTRA_SECTIONS
1402 #define EXTRA_SECTIONS in_sdata, in_sbss, in_const, in_ctors, in_dtors
1404 /* One or more functions to be defined in "varasm.c". These
1405 functions should do jobs analogous to those of `text_section' and
1406 `data_section', for your additional sections. Do not define this
1407 macro if you do not define `EXTRA_SECTIONS'. */
1408 #undef EXTRA_SECTION_FUNCTIONS
1409 #define EXTRA_SECTION_FUNCTIONS \
1410 CONST_SECTION_FUNCTION \
1411 CTORS_SECTION_FUNCTION \
1412 DTORS_SECTION_FUNCTION \
1413 SDATA_SECTION_FUNCTION \
1414 SBSS_SECTION_FUNCTION
1416 #define SDATA_SECTION_FUNCTION \
1420 if (in_section != in_sdata) \
1422 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
1423 in_section = in_sdata; \
1427 #define SBSS_SECTION_FUNCTION \
1431 if (in_section != in_sbss) \
1433 fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP); \
1434 in_section = in_sbss; \
1438 /* A C statement or statements to switch to the appropriate section for
1439 output of EXP. You can assume that EXP is either a `VAR_DECL' node
1440 or a constant of some sort. RELOC indicates whether the initial value
1441 of EXP requires link-time relocations. */
1442 extern void m32r_select_section ();
1443 #undef SELECT_SECTION
1444 #define SELECT_SECTION(EXP, RELOC) m32r_select_section ((EXP), (RELOC))
1446 /* A C statement or statements to switch to the appropriate section for
1447 output of RTX in mode MODE. You can assume that RTX
1448 is some kind of constant in RTL. The argument MODE is redundant
1449 except in the case of a `const_int' rtx. Select the section by
1450 calling `text_section' or one of the alternatives for other
1453 Do not define this macro if you put all constants in the read-only
1456 #undef SELECT_RTX_SECTION
1458 /* Define this macro if jump tables (for tablejump insns) should be
1459 output in the text section, along with the assembler instructions.
1460 Otherwise, the readonly data section is used.
1461 This macro is irrelevant if there is no separate readonly data section. */
1462 /*#define JUMP_TABLES_IN_TEXT_SECTION*/
1464 /* Define this macro if references to a symbol must be treated
1465 differently depending on something about the variable or
1466 function named by the symbol (such as what section it is in).
1468 The macro definition, if any, is executed immediately after the
1469 rtl for DECL or other node is created.
1470 The value of the rtl will be a `mem' whose address is a
1473 The usual thing for this macro to do is to store a flag in the
1474 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1475 name string in the `symbol_ref' (if one bit is not enough
1478 #define SDATA_FLAG_CHAR '@'
1479 /* Small objects are recorded with no prefix for space efficiency since
1480 they'll be the most common. This isn't the case if the user passes
1481 -mmodel={medium|large} and one could choose to not mark symbols that
1482 are the default, but that complicates things. */
1483 /*#define SMALL_FLAG_CHAR '#'*/
1484 #define MEDIUM_FLAG_CHAR '%'
1485 #define LARGE_FLAG_CHAR '&'
1487 #define SDATA_NAME_P(NAME) (*(NAME) == SDATA_FLAG_CHAR)
1488 /*#define SMALL_NAME_P(NAME) (*(NAME) == SMALL_FLAG_CHAR)*/
1489 #define SMALL_NAME_P(NAME) (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))
1490 #define MEDIUM_NAME_P(NAME) (*(NAME) == MEDIUM_FLAG_CHAR)
1491 #define LARGE_NAME_P(NAME) (*(NAME) == LARGE_FLAG_CHAR)
1492 /* For string literals, etc. */
1493 #define LIT_NAME_P(NAME) ((NAME)[0] == '*' && (NAME)[1] == '.')
1495 #define ENCODED_NAME_P(SYMBOL_NAME) \
1496 (SDATA_NAME_P (SYMBOL_NAME) \
1497 /*|| SMALL_NAME_P (SYMBOL_NAME)*/ \
1498 || MEDIUM_NAME_P (SYMBOL_NAME) \
1499 || LARGE_NAME_P (SYMBOL_NAME))
1501 #define ENCODE_SECTION_INFO(DECL) m32r_encode_section_info (DECL)
1503 /* Decode SYM_NAME and store the real name part in VAR, sans
1504 the characters that encode section info. Define this macro if
1505 ENCODE_SECTION_INFO alters the symbol's name string. */
1506 /* Note that we have to handle symbols like "%*start". */
1507 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1509 (VAR) = (SYMBOL_NAME) + ENCODED_NAME_P (SYMBOL_NAME); \
1510 (VAR) += *(VAR) == '*'; \
1515 /* The register number of the register used to address a table of static
1516 data addresses in memory. In some cases this register is defined by a
1517 processor's ``application binary interface'' (ABI). When this macro
1518 is defined, RTL is generated for this register once, as with the stack
1519 pointer and frame pointer registers. If this macro is not defined, it
1520 is up to the machine-dependent files to allocate such a register (if
1522 /*#define PIC_OFFSET_TABLE_REGNUM 12*/
1524 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
1525 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
1527 /* This register is call-saved on the M32R. */
1528 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
1530 /* By generating position-independent code, when two different programs (A
1531 and B) share a common library (libC.a), the text of the library can be
1532 shared whether or not the library is linked at the same address for both
1533 programs. In some of these environments, position-independent code
1534 requires not only the use of different addressing modes, but also
1535 special code to enable the use of these addressing modes.
1537 The FINALIZE_PIC macro serves as a hook to emit these special
1538 codes once the function is being compiled into assembly code, but not
1539 before. (It is not done before, because in the case of compiling an
1540 inline function, it would lead to multiple PIC prologues being
1541 included in functions which used inline functions and were compiled to
1542 assembly language.) */
1544 /*#define FINALIZE_PIC m32r_finalize_pic ()*/
1546 /* A C expression that is nonzero if X is a legitimate immediate
1547 operand on the target machine when generating position independent code.
1548 You can assume that X satisfies CONSTANT_P, so you need not
1549 check this. You can also assume `flag_pic' is true, so you need not
1550 check it either. You need not define this macro if all constants
1551 (including SYMBOL_REF) can be immediate operands when generating
1552 position independent code. */
1553 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/
1555 /* Control the assembler format that we output. */
1557 /* Output at beginning of assembler file. */
1558 #define ASM_FILE_START(FILE) m32r_asm_file_start (FILE)
1560 /* A C string constant describing how to begin a comment in the target
1561 assembler language. The compiler assumes that the comment will
1562 end at the end of the line. */
1563 #define ASM_COMMENT_START ";"
1565 /* Output to assembler file text saying following lines
1566 may contain character constants, extra white space, comments, etc. */
1567 #define ASM_APP_ON ""
1569 /* Output to assembler file text saying following lines
1570 no longer contain unusual constructs. */
1571 #define ASM_APP_OFF ""
1573 /* This is how to output an assembler line defining a `char' constant. */
1574 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
1576 fprintf (FILE, "\t.byte\t"); \
1577 output_addr_const (FILE, (VALUE)); \
1578 fprintf (FILE, "\n"); \
1581 /* This is how to output an assembler line defining a `short' constant. */
1582 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
1584 fprintf (FILE, "\t.hword\t"); \
1585 output_addr_const (FILE, (VALUE)); \
1586 fprintf (FILE, "\n"); \
1589 /* This is how to output an assembler line defining an `int' constant.
1590 We also handle symbol output here. */
1591 #define ASM_OUTPUT_INT(FILE, VALUE) \
1593 fprintf (FILE, "\t.word\t"); \
1594 output_addr_const (FILE, (VALUE)); \
1595 fprintf (FILE, "\n"); \
1598 /* This is how to output an assembler line defining a `float' constant. */
1599 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1603 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1604 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1605 fprintf (FILE, "\t.word\t0x%lx %s %s\n", \
1606 t, ASM_COMMENT_START, str); \
1609 /* This is how to output an assembler line defining a `double' constant. */
1610 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1614 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1615 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1616 fprintf (FILE, "\t.word\t0x%lx %s %s\n\t.word\t0x%lx\n", \
1617 t[0], ASM_COMMENT_START, str, t[1]); \
1620 /* This is how to output an assembler line for a numeric constant byte. */
1621 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1622 fprintf (FILE, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
1624 /* The assembler's parentheses characters. */
1625 #define ASM_OPEN_PAREN "("
1626 #define ASM_CLOSE_PAREN ")"
1628 /* This is how to output the definition of a user-level label named NAME,
1629 such as the label on a static function or variable NAME. */
1630 /* On the M32R we need to ensure the next instruction starts on a 32 bit
1631 boundary [the previous insn must either be 2 16 bit insns or 1 32 bit]. */
1632 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1634 assemble_name (FILE, NAME); \
1635 fputs (":\n", FILE); \
1638 /* This is how to output a command to make the user-level label named NAME
1639 defined for reference from other files. */
1640 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1642 fputs ("\t.global\t", FILE); \
1643 assemble_name (FILE, NAME); \
1644 fputs ("\n", FILE); \
1647 /* This is how to output a reference to a user-level label named NAME.
1648 `assemble_name' uses this. */
1649 #undef ASM_OUTPUT_LABELREF
1650 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1652 const char * real_name; \
1653 STRIP_NAME_ENCODING (real_name, (NAME)); \
1654 asm_fprintf (FILE, "%U%s", real_name); \
1657 /* If -Os, don't force line number labels to begin at the beginning of
1658 the word; we still want the assembler to try to put things in parallel,
1659 should that be possible.
1660 For m32r/d, instructions are never in parallel (other than with a nop)
1661 and the simulator and stub both handle a breakpoint in the middle of
1662 a word so don't ever force line number labels to begin at the beginning
1665 #undef ASM_OUTPUT_SOURCE_LINE
1666 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1669 static int sym_lineno = 1; \
1670 fprintf (file, ".stabn 68,0,%d,.LM%d-", \
1671 line, sym_lineno); \
1672 assemble_name (file, \
1673 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));\
1675 (optimize_size || TARGET_M32R) \
1676 ? "\n\t.debugsym .LM%d\n" \
1683 /* Store in OUTPUT a string (made with alloca) containing
1684 an assembler-name for a local static variable named NAME.
1685 LABELNO is an integer which is different for each call. */
1686 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1688 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1689 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \
1692 /* How to refer to registers in assembler output.
1693 This sequence is indexed by compiler's hard-register-number (see above). */
1694 #define REGISTER_NAMES \
1696 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1697 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
1701 /* If defined, a C initializer for an array of structures containing
1702 a name and a register number. This macro defines additional names
1703 for hard registers, thus allowing the `asm' option in declarations
1704 to refer to registers using alternate names. */
1705 #define ADDITIONAL_REGISTER_NAMES \
1707 /*{ "gp", GP_REGNUM },*/ \
1708 { "r13", FRAME_POINTER_REGNUM }, \
1709 { "r14", RETURN_ADDR_REGNUM }, \
1710 { "r15", STACK_POINTER_REGNUM }, \
1713 /* A C expression which evaluates to true if CODE is a valid
1714 punctuation character for use in the `PRINT_OPERAND' macro. */
1715 extern char m32r_punct_chars[];
1716 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1717 m32r_punct_chars[(unsigned char) (CHAR)]
1719 /* Print operand X (an rtx) in assembler syntax to file FILE.
1720 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1721 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1722 #define PRINT_OPERAND(FILE, X, CODE) \
1723 m32r_print_operand (FILE, X, CODE)
1725 /* A C compound statement to output to stdio stream STREAM the
1726 assembler syntax for an instruction operand that is a memory
1727 reference whose address is ADDR. ADDR is an RTL expression.
1729 On some machines, the syntax for a symbolic address depends on
1730 the section that the address refers to. On these machines,
1731 define the macro `ENCODE_SECTION_INFO' to store the information
1732 into the `symbol_ref', and then check for it here. */
1733 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1734 m32r_print_operand_address (FILE, ADDR)
1736 /* If defined, C string expressions to be used for the `%R', `%L',
1737 `%U', and `%I' options of `asm_fprintf' (see `final.c'). These
1738 are useful when a single `md' file must support multiple assembler
1739 formats. In that case, the various `tm.h' files can define these
1740 macros differently. */
1741 #define REGISTER_PREFIX ""
1742 #define LOCAL_LABEL_PREFIX ".L"
1743 #define USER_LABEL_PREFIX ""
1744 #define IMMEDIATE_PREFIX "#"
1746 /* This is how to output an element of a case-vector that is absolute. */
1747 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1750 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1751 fprintf (FILE, "\t.word\t"); \
1752 assemble_name (FILE, label); \
1753 fprintf (FILE, "\n"); \
1756 /* This is how to output an element of a case-vector that is relative. */
1757 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1760 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1761 fprintf (FILE, "\t.word\t"); \
1762 assemble_name (FILE, label); \
1763 fprintf (FILE, "-"); \
1764 ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
1765 assemble_name (FILE, label); \
1766 fprintf (FILE, ")\n"); \
1769 /* The desired alignment for the location counter at the beginning
1771 /* On the M32R, align loops to 32 byte boundaries (cache line size)
1772 if -malign-loops. */
1773 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
1775 /* This is how to output an assembler line
1776 that says to advance the location counter
1777 to a multiple of 2**LOG bytes. */
1778 /* .balign is used to avoid confusion. */
1779 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1780 do { if ((LOG) != 0) fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); } while (0)
1782 /* Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
1783 separate, explicit argument. If you define this macro, it is used in
1784 place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
1785 handling the required alignment of the variable. The alignment is
1786 specified as the number of bits. */
1788 #define SCOMMON_ASM_OP ".scomm"
1790 #undef ASM_OUTPUT_ALIGNED_COMMON
1791 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1793 if (! TARGET_SDATA_NONE \
1794 && (SIZE) > 0 && (SIZE) <= g_switch_value) \
1795 fprintf ((FILE), "\t%s\t", SCOMMON_ASM_OP); \
1797 fprintf ((FILE), "\t%s\t", COMMON_ASM_OP); \
1798 assemble_name ((FILE), (NAME)); \
1799 fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \
1802 #if 0 /* not needed, delete later */
1803 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a
1804 separate, explicit argument. If you define this macro, it is used in
1805 place of `ASM_OUTPUT_LOCAL', and gives you more flexibility in
1806 handling the required alignment of the variable. The alignment is
1807 specified as the number of bits. */
1809 #undef ASM_OUTPUT_ALIGNED_LOCAL
1810 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
1812 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \
1815 ASM_OUTPUT_ALIGN (FILE, exact_log2 (ALIGN / BITS_PER_UNIT)); \
1816 ASM_OUTPUT_LABEL (FILE, NAME); \
1817 ASM_OUTPUT_SKIP (FILE, SIZE); \
1818 if (!flag_inhibit_size_directive) \
1820 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1821 assemble_name (FILE, NAME); \
1822 fprintf (FILE, ",%d\n", SIZE); \
1827 /* This is copied from svr4.h. */ \
1828 fprintf ((FILE), "\t%s\t", LOCAL_ASM_OP); \
1829 assemble_name ((FILE), (NAME)); \
1830 fprintf ((FILE), "\n"); \
1831 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1836 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
1837 separate, explicit argument. If you define this macro, it is used in
1838 place of `ASM_OUTPUT_BSS', and gives you more flexibility in
1839 handling the required alignment of the variable. The alignment is
1840 specified as the number of bits.
1842 For the M32R we need sbss support. */
1844 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1846 ASM_GLOBALIZE_LABEL (FILE, NAME); \
1847 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1850 /* Debugging information. */
1852 /* Generate DBX and DWARF debugging information. */
1853 #define DBX_DEBUGGING_INFO
1854 #define DWARF_DEBUGGING_INFO
1856 /* Prefer STABS (for now). */
1857 #undef PREFERRED_DEBUGGING_TYPE
1858 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1860 /* How to renumber registers for dbx and gdb. */
1861 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1863 /* Turn off splitting of long stabs. */
1864 #define DBX_CONTIN_LENGTH 0
1866 /* Miscellaneous. */
1868 /* Specify the machine mode that this machine uses
1869 for the index in the tablejump instruction. */
1870 #define CASE_VECTOR_MODE Pmode
1872 /* Define as C expression which evaluates to nonzero if the tablejump
1873 instruction expects the table to contain offsets from the address of the
1875 Do not define this if the table should contain absolute addresses. */
1876 /* It's not clear what PIC will look like or whether we want to use -fpic
1877 for the embedded form currently being talked about. For now require -fpic
1878 to get pc relative switch tables. */
1879 /*#define CASE_VECTOR_PC_RELATIVE 1 */
1881 /* Define if operations between registers always perform the operation
1882 on the full register even if a narrower mode is specified. */
1883 #define WORD_REGISTER_OPERATIONS
1885 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1886 will either zero-extend or sign-extend. The value of this macro should
1887 be the code that says which one of the two operations is implicitly
1888 done, NIL if none. */
1889 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1891 /* Specify the tree operation to be used to convert reals to integers. */
1892 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1894 /* This is the kind of divide that is easiest to do in the general case. */
1895 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1897 /* Max number of bytes we can move from memory to memory
1898 in one reasonably fast instruction. */
1901 /* Define this to be nonzero if shift instructions ignore all but the low-order
1903 #define SHIFT_COUNT_TRUNCATED 1
1905 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1906 is done just by pretending it is already truncated. */
1907 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1909 /* We assume that the store-condition-codes instructions store 0 for false
1910 and some other value for true. This is the value stored for true. */
1911 #define STORE_FLAG_VALUE 1
1913 /* Specify the machine mode that pointers have.
1914 After generation of rtl, the compiler makes no further distinction
1915 between pointers and any other objects of this machine mode. */
1916 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
1917 its own problems (you have to add extendpsisi2 and truncsipsi2).
1919 #define Pmode SImode
1921 /* A function address in a call instruction. */
1922 #define FUNCTION_MODE SImode
1924 /* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
1925 is a valid machine specific attribute for DECL.
1926 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1927 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
1928 m32r_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
1930 /* A C expression that returns zero if the attributes on TYPE1 and TYPE2 are
1931 incompatible, one if they are compatible, and two if they are
1932 nearly compatible (which causes a warning to be generated). */
1933 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1934 m32r_comp_type_attributes (TYPE1, TYPE2)
1936 /* Give newly defined TYPE some default attributes. */
1937 #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \
1938 m32r_set_default_type_attributes (TYPE)
1940 /* Define the information needed to generate branch and scc insns. This is
1941 stored from the compare operation. Note that we can't use "rtx" here
1942 since it hasn't been defined! */
1943 extern struct rtx_def * m32r_compare_op0;
1944 extern struct rtx_def * m32r_compare_op1;
1946 /* M32R function types. */
1947 enum m32r_function_type
1949 M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT
1951 #define M32R_INTERRUPT_P(TYPE) \
1952 ((TYPE) == M32R_FUNCTION_INTERRUPT)
1954 /* Define this if you have defined special-purpose predicates in the
1955 file `MACHINE.c'. This macro is called within an initializer of an
1956 array of structures. The first field in the structure is the name
1957 of a predicate and the second field is an array of rtl codes. For
1958 each predicate, list all rtl codes that can be in expressions
1959 matched by the predicate. The list should have a trailing comma. */
1961 #define PREDICATE_CODES \
1962 { "conditional_move_operand", { REG, SUBREG, CONST_INT }}, \
1963 { "carry_compare_operand", { EQ, NE }}, \
1964 { "eqne_comparison_operator", { EQ, NE }}, \
1965 { "signed_comparison_operator", { EQ, NE, LT, LE, GT, GE }}, \
1966 { "move_dest_operand", { REG, SUBREG, MEM }}, \
1967 { "move_src_operand", { REG, SUBREG, MEM, CONST_INT, \
1968 CONST_DOUBLE, LABEL_REF, CONST, \
1970 { "move_double_src_operand", { REG, SUBREG, MEM, CONST_INT, \
1972 { "two_insn_const_operand", { CONST_INT }}, \
1973 { "symbolic_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1974 { "reg_or_int16_operand", { REG, SUBREG, CONST_INT }}, \
1975 { "reg_or_uint16_operand", { REG, SUBREG, CONST_INT }}, \
1976 { "reg_or_cmp_int16_operand", { REG, SUBREG, CONST_INT }}, \
1977 { "reg_or_zero_operand", { REG, SUBREG, CONST_INT }}, \
1978 { "cmp_int16_operand", { CONST_INT }}, \
1979 { "call_address_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1980 { "small_insn_p", { INSN, CALL_INSN, JUMP_INSN }}, \
1981 { "m32r_block_immediate_operand",{ CONST_INT }}, \
1982 { "large_insn_p", { INSN, CALL_INSN, JUMP_INSN }},
1984 /* Functions declared in m32r.c */
1986 #if defined (USE_PROTOTYPES) ? USE_PROTOTYPES : defined (__STDC__)
1987 #define PROTO(ARGS) ARGS
1989 #define PROTO(ARGS) ()
1993 #ifdef BUFSIZ /* stdio.h has been included, ok to use FILE * */
1994 #define STDIO_PROTO(ARGS) PROTO(ARGS)
1996 #define STDIO_PROTO(ARGS) ()
2001 #define Tree union tree_node *
2008 #define Rtx struct rtx_def *
2013 extern void sbss_section PROTO((void));
2014 extern void sdata_section PROTO((void));
2015 extern void m32r_init PROTO((void));
2016 extern int m32r_valid_machine_decl_attribute PROTO((Tree, Tree, Tree, Tree));
2017 extern int m32r_comp_type_attributes PROTO((Tree, Tree));
2018 extern void m32r_select_section PROTO((Tree, int));
2019 extern void m32r_encode_section_info PROTO((Tree));
2020 extern void m32r_init_expanders PROTO((void));
2021 extern int call_address_operand PROTO((Rtx, int));
2022 extern int call_operand PROTO((Rtx, int));
2023 extern int symbolic_operand PROTO((Rtx, int));
2024 extern int small_data_operand PROTO((Rtx, int));
2025 extern int addr24_operand PROTO((Rtx, int));
2026 extern int addr32_operand PROTO((Rtx, int));
2027 extern int call26_operand PROTO((Rtx, int));
2028 extern int seth_add3_operand PROTO((Rtx, int));
2029 extern int cmp_int16_operand PROTO((Rtx, int));
2030 extern int uint16_operand PROTO((Rtx, int));
2031 extern int reg_or_int16_operand PROTO((Rtx, int));
2032 extern int reg_or_uint16_operand PROTO((Rtx, int));
2033 extern int reg_or_cmp_nt16_operand PROTO((Rtx, int));
2034 extern int two_insn_const_operand PROTO((Rtx, int));
2035 extern int move_src_operand PROTO((Rtx, int));
2036 extern int move_double_src_operand PROTO((Rtx, int));
2037 extern int move_dest_operand PROTO((Rtx, int));
2038 extern int easy_di_const PROTO((Rtx));
2039 extern int easy_df_const PROTO((Rtx));
2040 extern int eqne_comparison_operator PROTO((Rtx, int));
2041 extern int signed_comparison_operator PROTO((Rtx, int));
2042 extern int memreg_operand PROTO((Rtx, int));
2043 extern int small_insn_p PROTO((Rtx, int));
2044 extern int large_insn_p PROTO((Rtx, int));
2045 extern int m32r_select_cc_mode PROTO((int, Rtx, Rtx));
2046 extern Rtx gen_compare PROTO((int, Rtx, Rtx, int));
2047 extern Rtx gen_split_move_double PROTO((Rtx *));
2048 extern int function_arg_partial_nregs PROTO((CUMULATIVE_ARGS *,
2050 extern void m32r_setup_incoming_varargs PROTO((CUMULATIVE_ARGS *,
2053 extern struct rtx_def *m32r_va_arg PROTO((Tree, Tree));
2054 extern int m32r_address_code PROTO((Rtx));
2055 extern enum m32r_function_type m32r_compute_function_type
2057 extern unsigned m32r_compute_frame_size PROTO((int));
2058 extern int m32r_first_insn_address PROTO((void));
2059 extern void m32r_expand_prologue PROTO((void));
2060 extern void m32r_output_function_prologue STDIO_PROTO((FILE *, int));
2061 extern void m32r_output_function_epilogue STDIO_PROTO((FILE *, int));
2062 extern void m32r_finalize_pic PROTO((void));
2063 extern void m32r_initialize_trampoline PROTO((Rtx, Rtx, Rtx));
2064 extern void m32r_asm_file_start STDIO_PROTO((FILE *));
2065 extern void m32r_print_operand STDIO_PROTO((FILE *, Rtx, int));
2066 extern void m32r_print_operand_address STDIO_PROTO((FILE *, Rtx));
2067 extern int zero_and_one PROTO((Rtx, Rtx));
2068 extern int conditional_move_operand PROTO((Rtx, int));
2069 extern int carry_compare_operand PROTO((Rtx, int));
2070 extern char *emit_cond_move PROTO((Rtx *, Rtx));
2072 extern char * m32r_output_block_move PROTO((Rtx, Rtx *));
2073 extern int m32r_block_immediate_operand PROTO((Rtx, int));
2074 extern void m32r_expand_block_move PROTO((Rtx *));
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