1 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 /* ??? Create elf.h and have svr4.h include it. */
28 #undef SWITCH_TAKES_ARG
29 #undef WORD_SWITCH_TAKES_ARG
30 #undef HANDLE_SYSV_PRAGMA
34 #undef WCHAR_TYPE_SIZE
36 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
38 /* Print subsidiary information on the compiler version in use. */
39 #define TARGET_VERSION fprintf (stderr, " (m32r)")
41 /* Switch Recognition by gcc.c. Add -G xx support */
43 #undef SWITCH_TAKES_ARG
44 #define SWITCH_TAKES_ARG(CHAR) \
45 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
47 /* Names to predefine in the preprocessor for this target machine. */
48 /* __M32R__ is defined by the existing compiler so we use that. */
49 #define CPP_PREDEFINES "-Acpu(m32r) -Amachine(m32r) -D__M32R__"
51 /* Additional flags for the preprocessor. */
54 #define CC1_SPEC "%{G*}"
57 #if 0 /* not supported yet */
58 #define ASM_SPEC "%{v} %{mrelax:-relax}"
60 #define ASM_SPEC "%{v}"
66 #if 0 /* not supported yet */
67 #define LINK_SPEC "%{v} %{mrelax:-relax}"
69 #define LINK_SPEC "%{v}"
73 #define STARTFILE_SPEC "%{!shared:crt0.o%s crtsysc.o%s} crtinit.o%s"
76 #define ENDFILE_SPEC "crtfini.o%s"
80 /* Run-time compilation parameters selecting different hardware subsets. */
82 extern int target_flags;
84 /* If non-zero, tell the linker to do relaxing.
85 We don't do anything with the option, other than recognize it.
86 LINK_SPEC handles passing -relax to the linker.
87 This can cause incorrect debugging information as line numbers may
88 turn out wrong. This shouldn't be specified unless accompanied with -O2
89 [where the user expects debugging information to be less accurate]. */
90 #define TARGET_RELAX_MASK 1
92 /* For miscellaneous debugging purposes. */
93 #define TARGET_DEBUG_MASK 2
94 #define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)
96 /* Align loops to 32 byte boundaries (cache line size). */
97 /* ??? This option is experimental and is not documented. */
98 #define TARGET_ALIGN_LOOPS_MASK 4
99 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)
101 /* Use old compare/branch support (kept around for awhile for
102 comparison and backoff purposes). */
103 /* ??? This option is experimental and is not documented.
104 Eventually it will be deleted. */
105 #define TARGET_OLD_COMPARE_MASK 8
106 #define TARGET_OLD_COMPARE (target_flags & TARGET_OLD_COMPARE_MASK)
108 /* Macro to define tables used to set the flags.
109 This is a list in braces of pairs in braces,
110 each pair being { "NAME", VALUE }
111 where VALUE is the bits to set or minus the bits to clear.
112 An empty string NAME is used to identify the default VALUE. */
114 #define TARGET_SWITCHES \
116 /* { "relax", TARGET_RELAX_MASK }, \
117 { "no-relax", -TARGET_RELAX_MASK },*/ \
118 { "debug", TARGET_DEBUG_MASK }, \
119 { "align-loops", TARGET_ALIGN_LOOPS_MASK }, \
120 { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK }, \
121 { "old-compare", TARGET_OLD_COMPARE_MASK }, \
122 { "no-old-compare", -TARGET_OLD_COMPARE_MASK }, \
124 { "", TARGET_DEFAULT } \
127 #define TARGET_DEFAULT (0)
129 #define SUBTARGET_SWITCHES
131 /* This macro is similar to `TARGET_SWITCHES' but defines names of
132 command options that have values. Its definition is an
133 initializer with a subgrouping for each command option.
135 Each subgrouping contains a string constant, that defines the
136 fixed part of the option name, and the address of a variable.
137 The variable, type `char *', is set to the variable part of the
138 given option if the fixed part matches. The actual option name
139 is made by appending `-m' to the specified name.
141 Here is an example which defines `-mshort-data-NUMBER'. If the
142 given option is `-mshort-data-512', the variable `m88k_short_data'
143 will be set to the string `"512"'.
145 extern char *m88k_short_data;
146 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
148 extern char *m32r_model_string;
149 extern char *m32r_sdata_string;
150 #define TARGET_OPTIONS \
152 { "model=", &m32r_model_string }, \
153 { "sdata=", &m32r_sdata_string }, \
158 Code models are used to select between two choices of two separate
159 possibilities (address space size, call insn to use):
161 small: addresses use 24 bits, use bl to make calls
162 medium: addresses use 32 bits, use bl to make calls (*1)
163 large: addresses use 32 bits, use seth/add3/jl to make calls (*2)
165 The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but
166 using this one doesn't make much sense.
168 (*1) The linker may eventually be able to relax seth/add3 -> ld24.
169 (*2) The linker may eventually be able to relax seth/add3/jl -> bl.
171 Internally these are recorded as TARGET_ADDR{24,32} and
174 The __model__ attribute can be used to select the code model to use when
175 accessing particular objects. */
177 enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE };
179 extern enum m32r_model m32r_model;
180 #define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL)
181 #define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)
182 #define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE)
183 #define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL)
184 #define TARGET_ADDR32 (! TARGET_ADDR24)
185 #define TARGET_CALL26 (! TARGET_CALL32)
186 #define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE)
188 /* The default is the small model. */
189 #define M32R_MODEL_DEFAULT "small"
193 The SDA consists of sections .sdata, .sbss, and .scommon.
194 .scommon isn't a real section, symbols in it have their section index
195 set to SHN_M32R_SCOMMON, though support for it exists in the linker script.
197 Two switches control the SDA:
199 -G NNN - specifies the maximum size of variable to go in the SDA
201 -msdata=foo - specifies how such variables are handled
203 -msdata=none - small data area is disabled
205 -msdata=sdata - small data goes in the SDA, special code isn't
206 generated to use it, and special relocs aren't
209 -msdata=use - small data goes in the SDA, special code is generated
210 to use the SDA and special relocs are generated
212 The SDA is not multilib'd, it isn't necessary.
213 MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd
214 libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use
215 -msdata=use will successfully link with them (references in header files
216 will cause the compiler to emit code that refers to library objects in
217 .data). ??? There can be a problem if the user passes a -G value greater
218 than the default and a library object in a header file is that size.
219 The default is 8 so this should be rare - if it occurs the user
220 is required to rebuild the libraries or use a smaller value for -G.
223 /* Maximum size of variables that go in .sdata/.sbss.
224 The -msdata=foo switch also controls how small variables are handled. */
225 #define SDATA_DEFAULT_SIZE 8
227 extern int g_switch_value; /* value of the -G xx switch */
228 extern int g_switch_set; /* whether -G xx was passed. */
230 enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE };
232 extern enum m32r_sdata m32r_sdata;
233 #define TARGET_SDATA_NONE (m32r_sdata == M32R_SDATA_NONE)
234 #define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA)
235 #define TARGET_SDATA_USE (m32r_sdata == M32R_SDATA_USE)
237 /* Default is to disable the SDA
238 [for upward compatibility with previous toolchains]. */
239 #define M32R_SDATA_DEFAULT "none"
241 /* Define this macro as a C expression for the initializer of an array of
242 string to tell the driver program which options are defaults for this
243 target and thus do not need to be handled specially when using
244 `MULTILIB_OPTIONS'. */
245 #define MULTILIB_DEFAULTS { "mmodel=small" }
247 /* Sometimes certain combinations of command options do not make
248 sense on a particular target machine. You can define a macro
249 `OVERRIDE_OPTIONS' to take account of this. This macro, if
250 defined, is executed once just after all the command options have
253 Don't use this macro to turn on various extra optimizations for
254 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
256 extern void m32r_init ();
258 #define OVERRIDE_OPTIONS \
260 /* These need to be done at start up. It's convenient to do them here. */ \
264 /* Define this macro if debugging can be performed even without a
265 frame pointer. If this macro is defined, GNU CC will turn on the
266 `-fomit-frame-pointer' option whenever `-O' is specified. */
267 #define CAN_DEBUG_WITHOUT_FP
269 /* Target machine storage layout. */
271 /* Define to use software floating point emulator for REAL_ARITHMETIC and
272 decimal <-> binary conversion. */
273 #define REAL_ARITHMETIC
275 /* Define this if most significant bit is lowest numbered
276 in instructions that operate on numbered bit-fields. */
277 #define BITS_BIG_ENDIAN 1
279 /* Define this if most significant byte of a word is the lowest numbered. */
280 #define BYTES_BIG_ENDIAN 1
282 /* Define this if most significant word of a multiword number is the lowest
284 #define WORDS_BIG_ENDIAN 1
286 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must
287 be a constant value with the same meaning as WORDS_BIG_ENDIAN,
288 which will be used only when compiling libgcc2.c. Typically the
289 value will be set based on preprocessor defines. */
290 /*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/
292 /* Number of bits in an addressable storage unit. */
293 #define BITS_PER_UNIT 8
295 /* Width in bits of a "word", which is the contents of a machine register.
296 Note that this is not necessarily the width of data type `int';
297 if using 16-bit ints on a 68000, this would still be 32.
298 But on a machine with 16-bit registers, this would be 16. */
299 #define BITS_PER_WORD 32
301 /* Width of a word, in units (bytes). */
302 #define UNITS_PER_WORD 4
304 /* Define this macro if it is advisable to hold scalars in registers
305 in a wider mode than that declared by the program. In such cases,
306 the value is constrained to be within the bounds of the declared
307 type, but kept valid in the wider mode. The signedness of the
308 extension may differ from that of the type. */
309 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
310 if (GET_MODE_CLASS (MODE) == MODE_INT \
311 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
316 /* Define this macro if the promotion described by `PROMOTE_MODE'
317 should also be done for outgoing function arguments. */
318 /*#define PROMOTE_FUNCTION_ARGS*/
320 /* Likewise, if the function return value is promoted.
321 If defined, FUNCTION_VALUE must perform the same promotions done by
323 /*#define PROMOTE_FUNCTION_RETURN*/
325 /* Width in bits of a pointer.
326 See also the macro `Pmode' defined below. */
327 #define POINTER_SIZE 32
329 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
330 #define PARM_BOUNDARY 32
332 /* Boundary (in *bits*) on which stack pointer should be aligned. */
333 #define STACK_BOUNDARY 32
335 /* ALIGN FRAMES on word boundaries */
336 #define M32R_STACK_ALIGN(LOC) (((LOC)+3) & ~3)
338 /* Allocation boundary (in *bits*) for the code of a function. */
339 #define FUNCTION_BOUNDARY 32
341 /* Alignment of field after `int : 0' in a structure. */
342 #define EMPTY_FIELD_BOUNDARY 32
344 /* Every structure's size must be a multiple of this. */
345 #define STRUCTURE_SIZE_BOUNDARY 8
347 /* A bitfield declared as `int' forces `int' alignment for the struct. */
348 #define PCC_BITFIELD_TYPE_MATTERS 1
350 /* No data type wants to be aligned rounder than this. */
351 #define BIGGEST_ALIGNMENT 32
353 /* The best alignment to use in cases where we have a choice. */
354 #define FASTEST_ALIGNMENT 32
356 /* Make strings word-aligned so strcpy from constants will be faster. */
357 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
358 ((TREE_CODE (EXP) == STRING_CST \
359 && (ALIGN) < FASTEST_ALIGNMENT) \
360 ? FASTEST_ALIGNMENT : (ALIGN))
362 /* Make arrays of chars word-aligned for the same reasons. */
363 #define DATA_ALIGNMENT(TYPE, ALIGN) \
364 (TREE_CODE (TYPE) == ARRAY_TYPE \
365 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
366 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
368 /* Set this nonzero if move instructions will actually fail to work
369 when given unaligned data. */
370 #define STRICT_ALIGNMENT 1
372 /* Layout of source language data types. */
374 #define SHORT_TYPE_SIZE 16
375 #define INT_TYPE_SIZE 32
376 #define LONG_TYPE_SIZE 32
377 #define LONG_LONG_TYPE_SIZE 64
378 #define FLOAT_TYPE_SIZE 32
379 #define DOUBLE_TYPE_SIZE 64
380 #define LONG_DOUBLE_TYPE_SIZE 64
382 /* Define this as 1 if `char' should by default be signed; else as 0. */
383 #define DEFAULT_SIGNED_CHAR 1
385 #define SIZE_TYPE "long unsigned int"
386 #define PTRDIFF_TYPE "long int"
387 #define WCHAR_TYPE "short unsigned int"
388 #define WCHAR_TYPE_SIZE 16
390 /* Define results of standard character escape sequences. */
391 #define TARGET_BELL 007
392 #define TARGET_BS 010
393 #define TARGET_TAB 011
394 #define TARGET_NEWLINE 012
395 #define TARGET_VT 013
396 #define TARGET_FF 014
397 #define TARGET_CR 015
399 /* Standard register usage. */
401 /* Number of actual hardware registers.
402 The hardware registers are assigned numbers for the compiler
403 from 0 to just below FIRST_PSEUDO_REGISTER.
404 All registers that the compiler knows about must be given numbers,
405 even those that are not normally considered general registers. */
406 #define FIRST_PSEUDO_REGISTER 18
408 /* 1 for registers that have pervasive standard uses
409 and are not available for the register allocator.
411 0-3 - arguments/results
412 4-5 - call used [4 is used as a tmp during prologue/epilogue generation]
414 7 - call used, static chain pointer
416 12 - call saved [reserved for global pointer]
418 14 - subroutine link register
423 By default, the extension registers are not available. */
425 #define FIXED_REGISTERS \
426 { 0, 0, 0, 0, 0, 0, 0, 0, \
427 0, 0, 0, 0, 0, 0, 0, 1, \
430 /* 1 for registers not available across function calls.
431 These must include the FIXED_REGISTERS and also any
432 registers that can be used without being saved.
433 The latter must include the registers where values are returned
434 and the register where structure-value addresses are passed.
435 Aside from that, you can include as many other registers as you like. */
437 #define CALL_USED_REGISTERS \
438 { 1, 1, 1, 1, 1, 1, 1, 1, \
439 0, 0, 0, 0, 0, 0, 1, 1, \
442 /* Zero or more C statements that may conditionally modify two variables
443 `fixed_regs' and `call_used_regs' (both of type `char []') after they
444 have been initialized from the two preceding macros.
446 This is necessary in case the fixed or call-clobbered registers depend
449 You need not define this macro if it has no work to do. */
451 /*#define CONDITIONAL_REGISTER_USAGE*/
453 /* If defined, an initializer for a vector of integers, containing the
454 numbers of hard registers in the order in which GNU CC should
455 prefer to use them (from most preferred to least). */
456 #if 1 /* better for int code */
457 #define REG_ALLOC_ORDER \
458 { 4, 5, 6, 7, 2, 3, 8, 9, 10, 11, 12, 13, 14, 0, 1, 15, 16, 17 }
459 #else /* better for fp code at expense of int code */
460 #define REG_ALLOC_ORDER \
461 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 }
464 /* Return number of consecutive hard regs needed starting at reg REGNO
465 to hold something of mode MODE.
466 This is ordinarily the length in words of a value of mode MODE
467 but can be less for certain modes in special long registers. */
468 #define HARD_REGNO_NREGS(REGNO, MODE) \
469 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
471 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
472 extern unsigned int m32r_hard_regno_mode_ok[];
473 extern unsigned int m32r_mode_class[];
474 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
475 ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
477 /* A C expression that is nonzero if it is desirable to choose
478 register allocation so as to avoid move instructions between a
479 value of mode MODE1 and a value of mode MODE2.
481 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
482 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
483 MODE2)' must be zero. */
485 /* Tie QI/HI/SI modes together. */
486 #define MODES_TIEABLE_P(MODE1, MODE2) \
487 (GET_MODE_CLASS (MODE1) == MODE_INT \
488 && GET_MODE_CLASS (MODE2) == MODE_INT \
489 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
490 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
492 /* Register classes and constants. */
494 /* Define the classes of registers for register constraints in the
495 machine description. Also define ranges of constants.
497 One of the classes must always be named ALL_REGS and include all hard regs.
498 If there is more than one class, another class must be named NO_REGS
499 and contain no registers.
501 The name GENERAL_REGS must be the name of a class (or an alias for
502 another name such as ALL_REGS). This is the class of registers
503 that is allowed by "g" or "r" in a register constraint.
504 Also, registers outside this class are allocated only when
505 instructions express preferences for them.
507 The classes must be numbered in nondecreasing order; that is,
508 a larger-numbered class must never be contained completely
509 in a smaller-numbered class.
511 For any two classes, it is very desirable that there be another
512 class that represents their union.
514 It is important that any condition codes have class NO_REGS.
515 See `register_operand'. */
518 NO_REGS, CARRY_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
521 #define N_REG_CLASSES (int) LIM_REG_CLASSES
523 /* Give names of register classes as strings for dump file. */
524 #define REG_CLASS_NAMES \
525 { "NO_REGS", "CARRY_REG", "GENERAL_REGS", "ALL_REGS" }
527 /* Define which registers fit in which classes.
528 This is an initializer for a vector of HARD_REG_SET
529 of length N_REG_CLASSES. */
531 #define REG_CLASS_CONTENTS \
532 { {0}, {0x20000}, {0x1ffff}, {0x3ffff} }
534 /* The same information, inverted:
535 Return the class number of the smallest class containing
536 reg number REGNO. This could be a conditional expression
537 or could index an array. */
538 extern enum reg_class m32r_regno_reg_class[];
539 #define REGNO_REG_CLASS(REGNO) \
540 (m32r_regno_reg_class[REGNO])
542 /* The class value for index registers, and the one for base regs. */
543 #define INDEX_REG_CLASS GENERAL_REGS
544 #define BASE_REG_CLASS GENERAL_REGS
546 /* Get reg_class from a letter such as appears in the machine description. */
547 #define REG_CLASS_FROM_LETTER(C) NO_REGS
549 /* These assume that REGNO is a hard or pseudo reg number.
550 They give nonzero only if REGNO is a hard reg of the suitable class
551 or a pseudo reg currently allocated to a suitable hard reg.
552 Since they use reg_renumber, they are safe only once reg_renumber
553 has been allocated, which happens in local-alloc.c. */
554 #define REGNO_OK_FOR_BASE_P(REGNO) \
555 ((REGNO) < FIRST_PSEUDO_REGISTER \
556 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \
557 : GPR_P (reg_renumber[REGNO]))
558 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
560 /* Given an rtx X being reloaded into a reg required to be
561 in class CLASS, return the class of reg to actually use.
562 In general this is just CLASS; but on some machines
563 in some cases it is preferable to use a more restrictive class. */
564 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
567 /* Return the maximum number of consecutive registers
568 needed to represent mode MODE in a register of class CLASS. */
569 #define CLASS_MAX_NREGS(CLASS, MODE) \
570 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
572 /* The letters I, J, K, L, M, N, O, P in a register constraint string
573 can be used to stand for particular ranges of immediate operands.
574 This macro defines what the ranges are.
575 C is the letter, and VALUE is a constant value.
576 Return 1 if VALUE is in the range specified by C. */
577 /* 'I' is used for 8 bit signed immediates.
578 'J' is used for 16 bit signed immediates.
579 'K' is used for 16 bit unsigned immediates.
580 'L' is used for 16 bit immediates left shifted by 16 (sign ???).
581 'M' is used for 24 bit unsigned immediates.
582 'N' is used for any 32 bit non-symbolic value.
583 'O' is used for 5 bit unsigned immediates (shift count).
584 'P' is used for 16 bit signed immediates for compares
585 (values in the range -32767 to +32768). */
587 /* local to this file */
588 #define INT8_P(X) ((unsigned) ((X) + 0x80) < 0x100)
589 #define INT16_P(X) ((unsigned) ((X) + 0x8000) < 0x10000)
590 #define CMP_INT16_P(X) ((unsigned) ((X) - 1 + 0x8000) < 0x10000)
591 #define UINT16_P(X) ((unsigned) (X) < 0x10000)
592 #define UPPER16_P(X) (((X) & ~0xffff0000) == 0)
593 #define UINT24_P(X) ((unsigned) (X) < 0x1000000)
594 #define INT32_P(X) ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \
595 && (X) <= (unsigned HOST_WIDE_INT) 0xffffffff)
596 #define UINT5_P(X) ((unsigned) (X) < 32)
598 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
599 ((C) == 'I' ? INT8_P (VALUE) \
600 : (C) == 'J' ? INT16_P (VALUE) \
601 : (C) == 'K' ? UINT16_P (VALUE) \
602 : (C) == 'L' ? UPPER16_P (VALUE) \
603 : (C) == 'M' ? UINT24_P (VALUE) \
604 : (C) == 'N' ? INT32_P (VALUE) \
605 : (C) == 'O' ? UINT5_P (VALUE) \
606 : (C) == 'P' ? CMP_INT16_P (VALUE) \
609 /* Similar, but for floating constants, and defining letters G and H.
610 Here VALUE is the CONST_DOUBLE rtx itself.
611 For the m32r, handle a few constants inline.
612 ??? We needn't treat DI and DF modes differently, but for now we do. */
613 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
614 ((C) == 'G' ? easy_di_const (VALUE) \
615 : (C) == 'H' ? easy_df_const (VALUE) \
618 /* A C expression that defines the optional machine-dependent constraint
619 letters that can be used to segregate specific types of operands,
620 usually memory references, for the target machine. It should return 1 if
621 VALUE corresponds to the operand type represented by the constraint letter
622 C. If C is not defined as an extra constraint, the value returned should
623 be 0 regardless of VALUE. */
624 /* Q is for symbolic addresses loadable with ld24.
625 R is for symbolic addresses when ld24 can't be used. */
626 #define EXTRA_CONSTRAINT(VALUE, C) \
628 ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
629 || addr24_operand (VALUE, VOIDmode)) \
631 ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
632 || addr32_operand (VALUE, VOIDmode)) \
635 /* Stack layout and stack pointer usage. */
637 /* Define this macro if pushing a word onto the stack moves the stack
638 pointer to a smaller address. */
639 #define STACK_GROWS_DOWNWARD
641 /* Define this if the nominal address of the stack frame
642 is at the high-address end of the local variables;
643 that is, each additional local variable allocated
644 goes at a more negative offset from the frame pointer. */
645 /*#define FRAME_GROWS_DOWNWARD*/
647 /* Offset from frame pointer to start allocating local variables at.
648 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
649 first local allocated. Otherwise, it is the offset to the BEGINNING
650 of the first local allocated. */
651 /* The frame pointer points at the same place as the stack pointer, except if
652 alloca has been called. */
653 #define STARTING_FRAME_OFFSET \
654 M32R_STACK_ALIGN (current_function_outgoing_args_size)
656 /* Offset from the stack pointer register to the first location at which
657 outgoing arguments are placed. */
658 #define STACK_POINTER_OFFSET 0
660 /* Offset of first parameter from the argument pointer register value. */
661 #define FIRST_PARM_OFFSET(FNDECL) 0
663 /* A C expression whose value is RTL representing the address in a
664 stack frame where the pointer to the caller's frame is stored.
665 Assume that FRAMEADDR is an RTL expression for the address of the
668 If you don't define this macro, the default is to return the value
669 of FRAMEADDR--that is, the stack frame address is also the address
670 of the stack word that points to the previous frame. */
671 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
673 /* A C expression whose value is RTL representing the value of the
674 return address for the frame COUNT steps up from the current frame.
675 FRAMEADDR is the frame pointer of the COUNT frame, or the frame
676 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
678 /* The current return address is in r14. */
679 #if 0 /* The default value should work. */
680 #define RETURN_ADDR_RTX(COUNT, FRAME) \
682 ? gen_rtx (REG, Pmode, 14) \
683 : copy_to_reg (gen_rtx (MEM, Pmode, \
684 memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD)))))
687 /* Register to use for pushing function arguments. */
688 #define STACK_POINTER_REGNUM 15
690 /* Base register for access to local variables of the function. */
691 #define FRAME_POINTER_REGNUM 13
693 /* Base register for access to arguments of the function. */
694 #define ARG_POINTER_REGNUM 16
696 /* The register number of the return address pointer register, which
697 is used to access the current function's return address from the
698 stack. On some machines, the return address is not at a fixed
699 offset from the frame pointer or stack pointer or argument
700 pointer. This register can be defined to point to the return
701 address on the stack, and then be converted by `ELIMINABLE_REGS'
702 into either the frame pointer or stack pointer.
704 Do not define this macro unless there is no other way to get the
705 return address from the stack. */
707 /* #define RETURN_ADDRESS_POINTER_REGNUM */
709 /* Register in which static-chain is passed to a function. This must
710 not be a register used by the prologue. */
711 #define STATIC_CHAIN_REGNUM 7
713 /* These aren't official macros. */
714 #define PROLOGUE_TMP_REGNUM 4
715 #define RETURN_ADDR_REGNUM 14
716 /* #define GP_REGNUM 12 */
717 #define CARRY_REGNUM 17
718 #define M32R_MAX_INT_REGS 16
720 #define GPR_P(REGNO) ((unsigned) (REGNO) < M32R_MAX_INT_REGS)
722 /* Eliminating the frame and arg pointers. */
724 /* A C expression which is nonzero if a function must have and use a
725 frame pointer. This expression is evaluated in the reload pass.
726 If its value is nonzero the function will have a frame pointer. */
727 #define FRAME_POINTER_REQUIRED \
728 (current_function_calls_alloca)
731 /* C statement to store the difference between the frame pointer
732 and the stack pointer values immediately after the function prologue.
733 If `ELIMINABLE_REGS' is defined, this macro will be not be used and
734 need not be defined. */
735 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
736 ((VAR) = m32r_compute_frame_size (get_frame_size ()))
739 /* If defined, this macro specifies a table of register pairs used to
740 eliminate unneeded registers that point into the stack frame. If
741 it is not defined, the only elimination attempted by the compiler
742 is to replace references to the frame pointer with references to
745 Note that the elimination of the argument pointer with the stack
746 pointer is specified first since that is the preferred elimination. */
748 #define ELIMINABLE_REGS \
749 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
750 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
751 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }} \
753 /* A C expression that returns non-zero if the compiler is allowed to
754 try to replace register number FROM-REG with register number
755 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
756 defined, and will usually be the constant 1, since most of the
757 cases preventing register elimination are things that the compiler
758 already knows about. */
760 #define CAN_ELIMINATE(FROM, TO) \
761 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
762 ? ! frame_pointer_needed \
765 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
766 specifies the initial difference between the specified pair of
767 registers. This macro must be defined if `ELIMINABLE_REGS' is
770 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
772 int size = m32r_compute_frame_size (get_frame_size ()); \
774 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
776 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
777 (OFFSET) = size - current_function_pretend_args_size; \
778 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
779 (OFFSET) = size - current_function_pretend_args_size; \
784 /* Function argument passing. */
786 /* When a prototype says `char' or `short', really pass an `int'. */
787 #define PROMOTE_PROTOTYPES
789 /* If defined, the maximum amount of space required for outgoing
790 arguments will be computed and placed into the variable
791 `current_function_outgoing_args_size'. No space will be pushed
792 onto the stack for each call; instead, the function prologue should
793 increase the stack frame size by this amount. */
794 #define ACCUMULATE_OUTGOING_ARGS
796 /* Define this macro if functions should assume that stack space has
797 been allocated for arguments even when their values are passed in
800 The value of this macro is the size, in bytes, of the area
801 reserved for arguments passed in registers for the function
802 represented by FNDECL.
804 This space can be allocated by the caller, or be a part of the
805 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
808 #define REG_PARM_STACK_SPACE(FNDECL) \
809 (M32R_MAX_PARM_REGS * UNITS_PER_WORD)
812 /* Value is the number of bytes of arguments automatically
813 popped when returning from a subroutine call.
814 FUNDECL is the declaration node of the function (as a tree),
815 FUNTYPE is the data type of the function (as a tree),
816 or for a library call it is an identifier node for the subroutine name.
817 SIZE is the number of bytes of arguments passed on the stack. */
818 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
820 /* Define a data type for recording info about an argument list
821 during the scan of that argument list. This data type should
822 hold all necessary information about the function itself
823 and about the args processed so far, enough to enable macros
824 such as FUNCTION_ARG to determine where the next arg should go. */
825 #define CUMULATIVE_ARGS int
827 /* Initialize a variable CUM of type CUMULATIVE_ARGS
828 for a call to a function whose data type is FNTYPE.
829 For a library call, FNTYPE is 0. */
830 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
833 /* The number of registers used for parameter passing. Local to this file. */
834 #define M32R_MAX_PARM_REGS 4
836 /* 1 if N is a possible register number for function argument passing. */
837 #define FUNCTION_ARG_REGNO_P(N) \
838 ((unsigned) (N) < M32R_MAX_PARM_REGS)
840 /* The ROUND_ADVANCE* macros are local to this file. */
841 /* Round SIZE up to a word boundary. */
842 #define ROUND_ADVANCE(SIZE) \
843 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
845 /* Round arg MODE/TYPE up to the next word boundary. */
846 #define ROUND_ADVANCE_ARG(MODE, TYPE) \
848 ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
849 : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
851 /* Round CUM up to the necessary point for argument MODE/TYPE. */
853 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \
854 ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \
859 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)
862 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
863 a reg. This includes arguments that have to be passed by reference as the
864 pointer to them is passed in a reg if one is available (and that is what
866 This macro is only used in this file. */
867 #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \
868 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)
870 /* Determine where to put an argument to a function.
871 Value is zero to push the argument on the stack,
872 or a hard register in which to store the argument.
874 MODE is the argument's machine mode.
875 TYPE is the data type of the argument (as a tree).
876 This is null for libcalls where that information may
878 CUM is a variable of type CUMULATIVE_ARGS which gives info about
879 the preceding args and about the function being called.
880 NAMED is nonzero if this argument is a named parameter
881 (otherwise it is an extra parameter matching an ellipsis). */
882 /* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers
883 and the rest are pushed. */
884 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
885 (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
886 ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
889 /* ??? Quick hack to try to get varargs working the normal way. */
890 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
891 (((! current_function_varargs || (NAMED)) \
892 && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \
893 ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
896 /* A C expression for the number of words, at the beginning of an
897 argument, must be put in registers. The value must be zero for
898 arguments that are passed entirely in registers or that are entirely
901 On some machines, certain arguments must be passed partially in
902 registers and partially in memory. On these machines, typically the
903 first @var{n} words of arguments are passed in registers, and the rest
904 on the stack. If a multi-word argument (a @code{double} or a
905 structure) crosses that boundary, its first few words must be passed
906 in registers and the rest must be pushed. This macro tells the
907 compiler when this occurs, and how many of the words should go in
909 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
910 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
912 /* A C expression that indicates when an argument must be passed by
913 reference. If nonzero for an argument, a copy of that argument is
914 made in memory and a pointer to the argument is passed instead of
915 the argument itself. The pointer is passed in whatever way is
916 appropriate for passing a pointer to that type. */
917 /* All arguments greater than 8 bytes are passed this way. */
918 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
919 ((TYPE) && int_size_in_bytes (TYPE) > 8)
921 /* Update the data in CUM to advance over an argument
922 of mode MODE and data type TYPE.
923 (TYPE is null for libcalls where that information may not be available.) */
924 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
925 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
926 + ROUND_ADVANCE_ARG ((MODE), (TYPE))))
928 /* If defined, a C expression that gives the alignment boundary, in bits,
929 of an argument with the specified mode and type. If it is not defined,
930 PARM_BOUNDARY is used for all arguments. */
932 /* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */
933 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
934 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
940 /* If defined, is a C expression that produces the machine-specific
941 code for a call to `__builtin_saveregs'. This code will be moved
942 to the very beginning of the function, before any parameter access
943 are made. The return value of this function should be an RTX that
944 contains the value to use as the return of `__builtin_saveregs'.
946 The argument ARGS is a `tree_list' containing the arguments that
947 were passed to `__builtin_saveregs'.
949 If this macro is not defined, the compiler will output an ordinary
950 call to the library function `__builtin_saveregs'. */
951 extern struct rtx *m32r_expand_builtin_savergs ();
952 #define EXPAND_BUILTIN_SAVEREGS(ARGS) m32r_expand_builtin_saveregs (ARGS)
955 /* This macro offers an alternative
956 to using `__builtin_saveregs' and defining the macro
957 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
958 arguments into the stack so that all the arguments appear to have
959 been passed consecutively on the stack. Once this is done, you
960 can use the standard implementation of varargs that works for
961 machines that pass all their arguments on the stack.
963 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure,
964 containing the values that obtain after processing of the named
965 arguments. The arguments MODE and TYPE describe the last named
966 argument--its machine mode and its data type as a tree node.
968 The macro implementation should do two things: first, push onto the
969 stack all the argument registers *not* used for the named
970 arguments, and second, store the size of the data thus pushed into
971 the `int'-valued variable whose name is supplied as the argument
972 PRETEND_SIZE. The value that you store here will serve as
973 additional offset for setting up the stack frame.
975 If the argument NO_RTL is nonzero, it means that the
976 arguments of the function are being analyzed for the second time.
977 This happens for an inline function, which is not actually
978 compiled until the end of the source file. The macro
979 `SETUP_INCOMING_VARARGS' should not generate any instructions in
982 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
983 m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
985 /* Function results. */
987 /* Define how to find the value returned by a function.
988 VALTYPE is the data type of the value (as a tree).
989 If the precise function being called is known, FUNC is its FUNCTION_DECL;
990 otherwise, FUNC is 0. */
991 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
993 /* Define how to find the value returned by a library function
994 assuming the value has mode MODE. */
995 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
997 /* 1 if N is a possible register number for a function value
998 as seen by the caller. */
999 /* ??? What about r1 in DI/DF values. */
1000 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
1002 /* A C expression which can inhibit the returning of certain function
1003 values in registers, based on the type of value. A nonzero value says
1004 to return the function value in memory, just as large structures are
1005 always returned. Here TYPE will be a C expression of type `tree',
1006 representing the data type of the value. */
1007 #define RETURN_IN_MEMORY(TYPE) \
1008 (int_size_in_bytes (TYPE) > 8)
1010 /* Tell GCC to use RETURN_IN_MEMORY. */
1011 #define DEFAULT_PCC_STRUCT_RETURN 0
1013 /* Register in which address to store a structure value
1014 is passed to a function, or 0 to use `invisible' first argument. */
1015 #define STRUCT_VALUE 0
1017 /* Function entry and exit. */
1019 /* Initialize data used by insn expanders. This is called from
1020 init_emit, once for each function, before code is generated. */
1021 #define INIT_EXPANDERS m32r_init_expanders ()
1023 /* This macro generates the assembly code for function entry.
1024 FILE is a stdio stream to output the code to.
1025 SIZE is an int: how many units of temporary storage to allocate.
1026 Refer to the array `regs_ever_live' to determine which registers
1027 to save; `regs_ever_live[I]' is nonzero if register number I
1028 is ever used in the function. This macro is responsible for
1029 knowing which registers should not be saved even if used. */
1030 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1031 m32r_output_function_prologue (FILE, SIZE)
1033 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1034 the stack pointer does not matter. The value is tested only in
1035 functions that have frame pointers.
1036 No definition is equivalent to always zero. */
1037 #define EXIT_IGNORE_STACK 1
1039 /* This macro generates the assembly code for function exit,
1040 on machines that need it. If FUNCTION_EPILOGUE is not defined
1041 then individual return instructions are generated for each
1042 return statement. Args are same as for FUNCTION_PROLOGUE.
1044 The function epilogue should not depend on the current stack pointer!
1045 It should use the frame pointer only. This is mandatory because
1046 of alloca; we also take advantage of it to omit stack adjustments
1047 before returning. */
1048 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1049 m32r_output_function_epilogue (FILE, SIZE)
1051 /* Output assembler code to FILE to increment profiler label # LABELNO
1052 for profiling a function entry. */
1053 #define FUNCTION_PROFILER(FILE, LABELNO)
1057 /* On the M32R, the trampoline is
1064 ??? Need addr32 support.
1067 /* Length in bytes of the trampoline for entering a nested function. */
1068 #define TRAMPOLINE_SIZE 12
1070 /* Emit RTL insns to initialize the variable parts of a trampoline.
1071 FNADDR is an RTX for the address of the function's pure code.
1072 CXT is an RTX for the static chain value for the function. */
1073 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1075 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \
1076 plus_constant ((CXT), 0xe7000000)); \
1077 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \
1078 plus_constant ((FNADDR), 0xe6000000)); \
1079 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \
1080 GEN_INT (0x1fc67000)); \
1081 emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \
1084 /* Library calls. */
1086 /* Generate calls to memcpy, memcmp and memset. */
1087 #define TARGET_MEM_FUNCTIONS
1089 /* Addressing modes, and classification of registers for them. */
1091 /* Maximum number of registers that can appear in a valid memory address. */
1092 #define MAX_REGS_PER_ADDRESS 1
1094 /* We have post-inc load and pre-dec,pre-inc store,
1095 but only for 4 byte vals. */
1097 #define HAVE_PRE_DECREMENT
1098 #define HAVE_PRE_INCREMENT
1099 #define HAVE_POST_INCREMENT
1102 /* Recognize any constant value that is a valid address. */
1103 #define CONSTANT_ADDRESS_P(X) \
1104 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1105 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1107 /* Nonzero if the constant value X is a legitimate general operand.
1108 We don't allow (plus symbol large-constant) as the relocations can't
1109 describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations.
1110 We allow all CONST_DOUBLE's as the md file patterns will force the
1111 constant to memory if they can't handle them. */
1113 #define LEGITIMATE_CONSTANT_P(X) \
1114 (! (GET_CODE (X) == CONST \
1115 && GET_CODE (XEXP (X, 0)) == PLUS \
1116 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
1117 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1118 && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))
1120 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1121 and check its validity for a certain class.
1122 We have two alternate definitions for each of them.
1123 The usual definition accepts all pseudo regs; the other rejects
1124 them unless they have been allocated suitable hard regs.
1125 The symbol REG_OK_STRICT causes the latter definition to be used.
1127 Most source files want to accept pseudo regs in the hope that
1128 they will get allocated to the class that the insn wants them to be in.
1129 Source files for reload pass need to be strict.
1130 After reload, it makes no difference, since pseudo regs have
1131 been eliminated by then. */
1133 #ifdef REG_OK_STRICT
1135 /* Nonzero if X is a hard reg that can be used as a base reg. */
1136 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1137 /* Nonzero if X is a hard reg that can be used as an index. */
1138 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1142 /* Nonzero if X is a hard reg that can be used as a base reg
1143 or if it is a pseudo reg. */
1144 #define REG_OK_FOR_BASE_P(X) \
1145 (GPR_P (REGNO (X)) \
1146 || (REGNO (X)) == ARG_POINTER_REGNUM \
1147 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1148 /* Nonzero if X is a hard reg that can be used as an index
1149 or if it is a pseudo reg. */
1150 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1154 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1155 that is a valid memory address for an instruction.
1156 The MODE argument is the machine mode for the MEM expression
1157 that wants to use this address. */
1159 /* local to this file */
1160 #define RTX_OK_FOR_BASE_P(X) \
1161 (REG_P (X) && REG_OK_FOR_BASE_P (X))
1163 /* local to this file */
1164 #define RTX_OK_FOR_OFFSET_P(X) \
1165 (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
1167 /* local to this file */
1168 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
1169 (GET_CODE (X) == PLUS \
1170 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1171 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))
1173 /* local to this file */
1174 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
1175 (GET_CODE (X) == LO_SUM \
1176 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1177 && CONSTANT_P (XEXP (X, 1)))
1179 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1180 { if (RTX_OK_FOR_BASE_P (X)) \
1182 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
1184 if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
1188 /* Try machine-dependent ways of modifying an illegitimate address
1189 to be legitimate. If we find one, return the new, valid address.
1190 This macro is used in only one place: `memory_address' in explow.c.
1192 OLDX is the address as it was before break_out_memory_refs was called.
1193 In some cases it is useful to look at this to decide what needs to be done.
1195 MODE and WIN are passed so that this macro can use
1196 GO_IF_LEGITIMATE_ADDRESS.
1198 It is always safe for this macro to do nothing. It exists to recognize
1199 opportunities to optimize the output.
1201 ??? Is there anything useful we can do here for the M32R? */
1203 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1205 /* Go to LABEL if ADDR (a legitimate address expression)
1206 has an effect that depends on the machine mode it is used for. */
1207 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1209 if (GET_CODE (ADDR) == PRE_DEC) \
1211 if (GET_CODE (ADDR) == PRE_INC) \
1213 if (GET_CODE (ADDR) == POST_INC) \
1217 /* Condition code usage. */
1219 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1220 return the mode to be used for the comparison. */
1221 extern enum machine_mode m32r_select_cc_mode ();
1222 #define SELECT_CC_MODE(OP, X, Y) \
1223 m32r_select_cc_mode (OP, X, Y)
1225 /* Return non-zero if SELECT_CC_MODE will never return MODE for a
1226 floating point inequality comparison. */
1227 #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
1231 /* ??? I'm quite sure I don't understand enough of the subtleties involved
1232 in choosing the right numbers to use here, but there doesn't seem to be
1233 enough documentation on this. What I've done is define an insn to cost
1234 4 "units" and work from there. COSTS_N_INSNS (N) is defined as (N) * 4 - 2
1235 so that seems reasonable. Some values are supposed to be defined relative
1236 to each other and thus aren't necessarily related to COSTS_N_INSNS. */
1238 /* Compute the cost of computing a constant rtl expression RTX
1239 whose rtx-code is CODE. The body of this macro is a portion
1240 of a switch statement. If the code is computed here,
1241 return it with a return statement. Otherwise, break from the switch. */
1242 /* Small integers are as cheap as registers. 4 byte values can be fetched
1243 as immediate constants - let's give that the cost of an extra insn. */
1244 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1246 if (INT16_P (INTVAL (X))) \
1248 /* fall through */ \
1253 case CONST_DOUBLE : \
1256 split_double (X, &high, &low); \
1257 return 4 * (!INT16_P (INTVAL (high)) \
1258 + !INT16_P (INTVAL (low))); \
1261 /* Compute the cost of an address. */
1262 #define ADDRESS_COST(ADDR) m32r_address_cost (ADDR)
1264 /* Compute extra cost of moving data between one register class
1266 #define REGISTER_MOVE_COST(CLASS1, CLASS2) 2
1268 /* Compute the cost of moving data between registers and memory. */
1269 /* Memory is 3 times as expensive as registers.
1270 ??? Is that the right way to look at it? */
1271 #define MEMORY_MOVE_COST(MODE) \
1272 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
1274 /* The cost of a branch insn. */
1275 /* A value of 2 here causes GCC to avoid using branches in comparisons like
1276 while (a < N && a). Branches aren't that expensive on the M32R so
1277 we define this as 1. Defining it as 2 had a heavy hit in fp-bit.c. */
1278 #define BRANCH_COST 1
1280 /* Provide the costs of a rtl expression. This is in the body of a
1281 switch on CODE. The purpose for the cost of MULT is to encourage
1282 `synth_mult' to find a synthetic multiply when reasonable.
1284 If we need more than 12 insns to do a multiply, then go out-of-line,
1285 since the call overhead will be < 10% of the cost of the multiply. */
1286 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1288 return COSTS_N_INSNS (3); \
1293 return COSTS_N_INSNS (10); \
1295 /* Nonzero if access to memory by bytes is slow and undesirable.
1296 For RISC chips, it means that access to memory by bytes is no
1297 better than access by words when possible, so grab a whole word
1298 and maybe make use of that. */
1299 #define SLOW_BYTE_ACCESS 1
1301 /* Define this macro if it is as good or better to call a constant
1302 function address than to call an address kept in a register. */
1303 #define NO_FUNCTION_CSE
1305 /* Define this macro if it is as good or better for a function to call
1306 itself with an explicit address than to call an address kept in a
1308 #define NO_RECURSIVE_FUNCTION_CSE
1310 /* Enable the register move pass.
1311 This is useful for machines with only 2 address instructions.
1312 It's not currently enabled by default because on the stanford benchmarks
1313 the improvement wasn't significant and in a couple of cases caused a
1314 significant de-optimization. */
1315 /* #define ENABLE_REGMOVE_PASS */
1317 /* Section selection. */
1319 #define TEXT_SECTION_ASM_OP "\t.section .text"
1320 #define DATA_SECTION_ASM_OP "\t.section .data"
1321 #define RODATA_SECTION_ASM_OP "\t.section .rodata"
1322 #define BSS_SECTION_ASM_OP "\t.section .bss"
1323 #define SDATA_SECTION_ASM_OP "\t.section .sdata"
1324 #define SBSS_SECTION_ASM_OP "\t.section .sbss"
1325 /* This one is for svr4.h. */
1326 #undef CONST_SECTION_ASM_OP
1327 #define CONST_SECTION_ASM_OP "\t.section .rodata"
1329 /* A list of names for sections other than the standard two, which are
1330 `in_text' and `in_data'. You need not define this macro
1331 on a system with no other sections (that GCC needs to use). */
1332 #undef EXTRA_SECTIONS
1333 #define EXTRA_SECTIONS in_sdata, in_sbss, in_const, in_ctors, in_dtors
1335 /* One or more functions to be defined in "varasm.c". These
1336 functions should do jobs analogous to those of `text_section' and
1337 `data_section', for your additional sections. Do not define this
1338 macro if you do not define `EXTRA_SECTIONS'. */
1339 #undef EXTRA_SECTION_FUNCTIONS
1340 #define EXTRA_SECTION_FUNCTIONS \
1341 CONST_SECTION_FUNCTION \
1342 CTORS_SECTION_FUNCTION \
1343 DTORS_SECTION_FUNCTION \
1344 SDATA_SECTION_FUNCTION \
1345 SBSS_SECTION_FUNCTION
1347 #define SDATA_SECTION_FUNCTION \
1351 if (in_section != in_sdata) \
1353 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
1354 in_section = in_sdata; \
1358 #define SBSS_SECTION_FUNCTION \
1362 if (in_section != in_sbss) \
1364 fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP); \
1365 in_section = in_sbss; \
1369 /* A C statement or statements to switch to the appropriate section for
1370 output of EXP. You can assume that EXP is either a `VAR_DECL' node
1371 or a constant of some sort. RELOC indicates whether the initial value
1372 of EXP requires link-time relocations. */
1373 extern void m32r_select_section ();
1374 #undef SELECT_SECTION
1375 #define SELECT_SECTION(EXP, RELOC) m32r_select_section ((EXP), (RELOC))
1377 /* A C statement or statements to switch to the appropriate section for
1378 output of RTX in mode MODE. You can assume that RTX
1379 is some kind of constant in RTL. The argument MODE is redundant
1380 except in the case of a `const_int' rtx. Select the section by
1381 calling `text_section' or one of the alternatives for other
1384 Do not define this macro if you put all constants in the read-only
1387 #undef SELECT_RTX_SECTION
1389 /* Define this macro if jump tables (for tablejump insns) should be
1390 output in the text section, along with the assembler instructions.
1391 Otherwise, the readonly data section is used.
1392 This macro is irrelevant if there is no separate readonly data section. */
1393 /*#define JUMP_TABLES_IN_TEXT_SECTION*/
1395 /* Define this macro if references to a symbol must be treated
1396 differently depending on something about the variable or
1397 function named by the symbol (such as what section it is in).
1399 The macro definition, if any, is executed immediately after the
1400 rtl for DECL or other node is created.
1401 The value of the rtl will be a `mem' whose address is a
1404 The usual thing for this macro to do is to store a flag in the
1405 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1406 name string in the `symbol_ref' (if one bit is not enough
1409 #define SDATA_FLAG_CHAR '@'
1410 /* Small objects are recorded with no prefix for space efficiency since
1411 they'll be the most common. This isn't the case if the user passes
1412 -mmodel={medium|large} and one could choose to not mark symbols that
1413 are the default, but that complicates things. */
1414 /*#define SMALL_FLAG_CHAR '#'*/
1415 #define MEDIUM_FLAG_CHAR '%'
1416 #define LARGE_FLAG_CHAR '&'
1418 #define SDATA_NAME_P(NAME) (*(NAME) == SDATA_FLAG_CHAR)
1419 /*#define SMALL_NAME_P(NAME) (*(NAME) == SMALL_FLAG_CHAR)*/
1420 #define SMALL_NAME_P(NAME) (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))
1421 #define MEDIUM_NAME_P(NAME) (*(NAME) == MEDIUM_FLAG_CHAR)
1422 #define LARGE_NAME_P(NAME) (*(NAME) == LARGE_FLAG_CHAR)
1423 /* For string literals, etc. */
1424 #define LIT_NAME_P(NAME) ((NAME)[0] == '*' && (NAME)[1] == '.')
1426 #define ENCODED_NAME_P(SYMBOL_NAME) \
1427 (SDATA_NAME_P (SYMBOL_NAME) \
1428 /*|| SMALL_NAME_P (SYMBOL_NAME)*/ \
1429 || MEDIUM_NAME_P (SYMBOL_NAME) \
1430 || LARGE_NAME_P (SYMBOL_NAME))
1432 extern void m32r_encode_section_info ();
1433 #define ENCODE_SECTION_INFO(DECL) m32r_encode_section_info (DECL)
1435 /* Decode SYM_NAME and store the real name part in VAR, sans
1436 the characters that encode section info. Define this macro if
1437 ENCODE_SECTION_INFO alters the symbol's name string. */
1438 /* Note that we have to handle symbols like "%*start". */
1439 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1441 (VAR) = (SYMBOL_NAME) + ENCODED_NAME_P (SYMBOL_NAME); \
1442 (VAR) += *(VAR) == '*'; \
1447 /* The register number of the register used to address a table of static
1448 data addresses in memory. In some cases this register is defined by a
1449 processor's ``application binary interface'' (ABI). When this macro
1450 is defined, RTL is generated for this register once, as with the stack
1451 pointer and frame pointer registers. If this macro is not defined, it
1452 is up to the machine-dependent files to allocate such a register (if
1454 /*#define PIC_OFFSET_TABLE_REGNUM 12*/
1456 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
1457 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
1459 /* This register is call-saved on the M32R. */
1460 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
1462 /* By generating position-independent code, when two different programs (A
1463 and B) share a common library (libC.a), the text of the library can be
1464 shared whether or not the library is linked at the same address for both
1465 programs. In some of these environments, position-independent code
1466 requires not only the use of different addressing modes, but also
1467 special code to enable the use of these addressing modes.
1469 The FINALIZE_PIC macro serves as a hook to emit these special
1470 codes once the function is being compiled into assembly code, but not
1471 before. (It is not done before, because in the case of compiling an
1472 inline function, it would lead to multiple PIC prologues being
1473 included in functions which used inline functions and were compiled to
1474 assembly language.) */
1476 /*#define FINALIZE_PIC m32r_finalize_pic ()*/
1478 /* A C expression that is nonzero if X is a legitimate immediate
1479 operand on the target machine when generating position independent code.
1480 You can assume that X satisfies CONSTANT_P, so you need not
1481 check this. You can also assume `flag_pic' is true, so you need not
1482 check it either. You need not define this macro if all constants
1483 (including SYMBOL_REF) can be immediate operands when generating
1484 position independent code. */
1485 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/
1487 /* Control the assembler format that we output. */
1489 /* Output at beginning of assembler file. */
1490 extern void m32r_asm_file_start ();
1491 #define ASM_FILE_START(FILE) m32r_asm_file_start (FILE)
1493 /* A C string constant describing how to begin a comment in the target
1494 assembler language. The compiler assumes that the comment will
1495 end at the end of the line. */
1496 #define ASM_COMMENT_START ";"
1498 /* Output to assembler file text saying following lines
1499 may contain character constants, extra white space, comments, etc. */
1500 #define ASM_APP_ON ""
1502 /* Output to assembler file text saying following lines
1503 no longer contain unusual constructs. */
1504 #define ASM_APP_OFF ""
1506 /* This is how to output an assembler line defining a `char' constant. */
1507 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
1509 fprintf (FILE, "\t.byte\t"); \
1510 output_addr_const (FILE, (VALUE)); \
1511 fprintf (FILE, "\n"); \
1514 /* This is how to output an assembler line defining a `short' constant. */
1515 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
1517 fprintf (FILE, "\t.hword\t"); \
1518 output_addr_const (FILE, (VALUE)); \
1519 fprintf (FILE, "\n"); \
1522 /* This is how to output an assembler line defining an `int' constant.
1523 We also handle symbol output here. */
1524 #define ASM_OUTPUT_INT(FILE, VALUE) \
1526 fprintf (FILE, "\t.word\t"); \
1527 output_addr_const (FILE, (VALUE)); \
1528 fprintf (FILE, "\n"); \
1531 /* This is how to output an assembler line defining a `float' constant. */
1532 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1536 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1537 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1538 fprintf (FILE, "\t.word\t0x%lx %s %s\n", \
1539 t, ASM_COMMENT_START, str); \
1542 /* This is how to output an assembler line defining a `double' constant. */
1543 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1547 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1548 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1549 fprintf (FILE, "\t.word\t0x%lx %s %s\n\t.word\t0x%lx\n", \
1550 t[0], ASM_COMMENT_START, str, t[1]); \
1553 /* This is how to output an assembler line for a numeric constant byte. */
1554 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1555 fprintf (FILE, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
1557 /* The assembler's parentheses characters. */
1558 #define ASM_OPEN_PAREN "("
1559 #define ASM_CLOSE_PAREN ")"
1561 /* This is how to output the definition of a user-level label named NAME,
1562 such as the label on a static function or variable NAME. */
1563 /* On the M32R we need to ensure the next instruction starts on a 32 bit
1564 boundary [the previous insn must either be 2 16 bit insns or 1 32 bit]. */
1565 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1567 assemble_name (FILE, NAME); \
1568 fputs (":\n", FILE); \
1571 /* This is how to output a command to make the user-level label named NAME
1572 defined for reference from other files. */
1573 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1575 fputs ("\t.global\t", FILE); \
1576 assemble_name (FILE, NAME); \
1577 fputs ("\n", FILE); \
1580 /* This is how to output a reference to a user-level label named NAME.
1581 `assemble_name' uses this. */
1582 #undef ASM_OUTPUT_LABELREF
1583 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1586 STRIP_NAME_ENCODING (real_name, (NAME)); \
1587 fprintf (FILE, "%s%s", USER_LABEL_PREFIX, real_name); \
1590 /* Store in OUTPUT a string (made with alloca) containing
1591 an assembler-name for a local static variable named NAME.
1592 LABELNO is an integer which is different for each call. */
1593 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1595 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1596 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \
1599 /* How to refer to registers in assembler output.
1600 This sequence is indexed by compiler's hard-register-number (see above). */
1601 #define REGISTER_NAMES \
1603 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1604 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
1608 /* If defined, a C initializer for an array of structures containing
1609 a name and a register number. This macro defines additional names
1610 for hard registers, thus allowing the `asm' option in declarations
1611 to refer to registers using alternate names. */
1612 #define ADDITIONAL_REGISTER_NAMES \
1614 /*{ "gp", GP_REGNUM },*/ \
1615 { "r13", FRAME_POINTER_REGNUM }, \
1616 { "r14", RETURN_ADDR_REGNUM }, \
1617 { "r15", STACK_POINTER_REGNUM }, \
1620 /* A C expression which evaluates to true if CODE is a valid
1621 punctuation character for use in the `PRINT_OPERAND' macro. */
1622 extern char m32r_punct_chars[];
1623 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1624 m32r_punct_chars[(unsigned char) (CHAR)]
1626 /* Print operand X (an rtx) in assembler syntax to file FILE.
1627 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1628 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1629 #define PRINT_OPERAND(FILE, X, CODE) \
1630 m32r_print_operand (FILE, X, CODE)
1632 /* A C compound statement to output to stdio stream STREAM the
1633 assembler syntax for an instruction operand that is a memory
1634 reference whose address is ADDR. ADDR is an RTL expression.
1636 On some machines, the syntax for a symbolic address depends on
1637 the section that the address refers to. On these machines,
1638 define the macro `ENCODE_SECTION_INFO' to store the information
1639 into the `symbol_ref', and then check for it here. */
1640 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1641 m32r_print_operand_address (FILE, ADDR)
1643 /* If defined, C string expressions to be used for the `%R', `%L',
1644 `%U', and `%I' options of `asm_fprintf' (see `final.c'). These
1645 are useful when a single `md' file must support multiple assembler
1646 formats. In that case, the various `tm.h' files can define these
1647 macros differently. */
1648 #define REGISTER_PREFIX ""
1649 #define LOCAL_LABEL_PREFIX ".L"
1650 #define USER_LABEL_PREFIX ""
1651 #define IMMEDIATE_PREFIX "#"
1653 /* This is how to output an element of a case-vector that is absolute. */
1654 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1657 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1658 fprintf (FILE, "\t.word\t"); \
1659 assemble_name (FILE, label); \
1660 fprintf (FILE, "\n"); \
1663 /* This is how to output an element of a case-vector that is relative. */
1664 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1667 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1668 fprintf (FILE, "\t.word\t"); \
1669 assemble_name (FILE, label); \
1670 fprintf (FILE, "-"); \
1671 ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
1672 assemble_name (FILE, label); \
1673 fprintf (FILE, ")\n"); \
1676 /* The desired alignment for the location counter at the beginning
1678 /* On the M32R, align loops to 32 byte boundaries (cache line size)
1679 if -malign-loops. */
1680 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
1682 /* This is how to output an assembler line
1683 that says to advance the location counter
1684 to a multiple of 2**LOG bytes. */
1685 /* .balign is used to avoid confusion. */
1686 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1687 do { if ((LOG) != 0) fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); } while (0)
1689 /* Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
1690 separate, explicit argument. If you define this macro, it is used in
1691 place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
1692 handling the required alignment of the variable. The alignment is
1693 specified as the number of bits. */
1695 #define SCOMMON_ASM_OP ".scomm"
1697 #undef ASM_OUTPUT_ALIGNED_COMMON
1698 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1700 if (! TARGET_SDATA_NONE \
1701 && (SIZE) > 0 && (SIZE) <= g_switch_value) \
1702 fprintf ((FILE), "\t%s\t", SCOMMON_ASM_OP); \
1704 fprintf ((FILE), "\t%s\t", COMMON_ASM_OP); \
1705 assemble_name ((FILE), (NAME)); \
1706 fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \
1709 #if 0 /* not needed, delete later */
1710 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a
1711 separate, explicit argument. If you define this macro, it is used in
1712 place of `ASM_OUTPUT_LOCAL', and gives you more flexibility in
1713 handling the required alignment of the variable. The alignment is
1714 specified as the number of bits. */
1716 extern void sbss_section ();
1718 #undef ASM_OUTPUT_ALIGNED_LOCAL
1719 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
1721 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \
1724 ASM_OUTPUT_ALIGN (FILE, exact_log2 (ALIGN / BITS_PER_UNIT)); \
1725 ASM_OUTPUT_LABEL (FILE, NAME); \
1726 ASM_OUTPUT_SKIP (FILE, SIZE); \
1727 if (!flag_inhibit_size_directive) \
1729 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1730 assemble_name (FILE, NAME); \
1731 fprintf (FILE, ",%d\n", SIZE); \
1736 /* This is copied from svr4.h. */ \
1737 fprintf ((FILE), "\t%s\t", LOCAL_ASM_OP); \
1738 assemble_name ((FILE), (NAME)); \
1739 fprintf ((FILE), "\n"); \
1740 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1745 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
1746 separate, explicit argument. If you define this macro, it is used in
1747 place of `ASM_OUTPUT_BSS', and gives you more flexibility in
1748 handling the required alignment of the variable. The alignment is
1749 specified as the number of bits.
1751 For the M32R we need sbss support. */
1753 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1755 ASM_GLOBALIZE_LABEL (FILE, NAME); \
1756 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1759 /* Debugging information. */
1761 /* Generate DBX and DWARF debugging information. */
1762 #define DBX_DEBUGGING_INFO
1763 #define DWARF_DEBUGGING_INFO
1765 /* Prefer STABS (for now). */
1766 #undef PREFERRED_DEBUGGING_TYPE
1767 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1769 /* How to renumber registers for dbx and gdb. */
1770 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1772 /* Turn off splitting of long stabs. */
1773 #define DBX_CONTIN_LENGTH 0
1775 /* Miscellaneous. */
1777 /* Specify the machine mode that this machine uses
1778 for the index in the tablejump instruction. */
1779 #define CASE_VECTOR_MODE Pmode
1781 /* Define as C expression which evaluates to nonzero if the tablejump
1782 instruction expects the table to contain offsets from the address of the
1784 Do not define this if the table should contain absolute addresses. */
1785 /* It's not clear what PIC will look like or whether we want to use -fpic
1786 for the embedded form currently being talked about. For now require -fpic
1787 to get pc relative switch tables. */
1788 /*#define CASE_VECTOR_PC_RELATIVE 1 */
1790 /* Define if operations between registers always perform the operation
1791 on the full register even if a narrower mode is specified. */
1792 #define WORD_REGISTER_OPERATIONS
1794 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1795 will either zero-extend or sign-extend. The value of this macro should
1796 be the code that says which one of the two operations is implicitly
1797 done, NIL if none. */
1798 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1800 /* Specify the tree operation to be used to convert reals to integers. */
1801 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1803 /* This is the kind of divide that is easiest to do in the general case. */
1804 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1806 /* Max number of bytes we can move from memory to memory
1807 in one reasonably fast instruction. */
1810 /* Define this to be nonzero if shift instructions ignore all but the low-order
1812 #define SHIFT_COUNT_TRUNCATED 1
1814 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1815 is done just by pretending it is already truncated. */
1816 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1818 /* We assume that the store-condition-codes instructions store 0 for false
1819 and some other value for true. This is the value stored for true. */
1820 #define STORE_FLAG_VALUE 1
1822 /* Specify the machine mode that pointers have.
1823 After generation of rtl, the compiler makes no further distinction
1824 between pointers and any other objects of this machine mode. */
1825 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
1826 it's own problems (you have to add extendpsisi2 and truncsipsi2).
1828 #define Pmode SImode
1830 /* A function address in a call instruction. */
1831 #define FUNCTION_MODE SImode
1833 /* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
1834 is a valid machine specific attribute for DECL.
1835 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1836 extern int m32r_valid_machine_attribute ();
1837 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
1838 m32r_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
1840 /* A C expression that returns zero if the attributes on TYPE1 and TYPE2 are
1841 incompatible, one if they are compatible, and two if they are
1842 nearly compatible (which causes a warning to be generated). */
1843 extern int m32r_comp_type_attributes ();
1844 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1845 m32r_comp_type_attributes (TYPE1, TYPE2)
1847 /* Give newly defined TYPE some default attributes. */
1848 extern void m32r_set_default_type_attributes ();
1849 #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \
1850 m32r_set_default_type_attributes (TYPE)
1852 /* Define the information needed to generate branch and scc insns. This is
1853 stored from the compare operation. Note that we can't use "rtx" here
1854 since it hasn't been defined! */
1855 extern struct rtx_def *m32r_compare_op0, *m32r_compare_op1;
1857 /* Define the function that build the compare insn for scc and bcc. */
1858 extern struct rtx_def *gen_compare ();
1860 /* M32R function types. */
1861 enum m32r_function_type {
1862 M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT
1864 #define M32R_INTERRUPT_P(TYPE) \
1865 ((TYPE) == M32R_FUNCTION_INTERRUPT)
1866 /* Compute the type of a function from its DECL. */
1867 enum m32r_function_type m32r_compute_function_type ();
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