gcc/config/m32c/shift.md

   1 ;; Machine Descriptions for R8C/M16C/M32C
   2 ;; Copyright (C) 2005, 2007
   3 ;; Free Software Foundation, Inc.
   4 ;; Contributed by Red Hat.
   5 ;;
   6 ;; This file is part of GCC.
   7 ;;
   8 ;; GCC is free software; you can redistribute it and/or modify it
   9 ;; under the terms of the GNU General Public License as published
  10 ;; by the Free Software Foundation; either version 3, or (at your
  11 ;; option) any later version.
  12 ;;
  13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
  14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16 ;; License for more details.
  17 ;;
  18 ;; You should have received a copy of the GNU General Public License
  19 ;; along with GCC; see the file COPYING3.  If not see
  20 ;; <http://www.gnu.org/licenses/>.
  21
  22 ;; bit shifting
  23
  24 ; Shifts are unusual for m32c.  We only support shifting in one
  25 ; "direction" but the shift count is signed.  Also, immediate shift
  26 ; counts have a limited range, and variable shift counts have to be in
  27 ; $r1h which GCC normally doesn't even know about.
  28
  29 ; Other than compensating for the above, the patterns below are pretty
  30 ; straightforward.
  31
  32 (define_insn "ashlqi3_i"
  33   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
  34         (ashift:QI (match_operand:QI 1 "mra_operand" "0,0")
  35                    (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
  36    (clobber (match_scratch:HI 3 "=X,R1w"))]
  37   ""
  38   "@
  39    sha.b\t%2,%0
  40    mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
  41   [(set_attr "flags" "oszc,oszc")]
  42   )
  43
  44 (define_insn "ashrqi3_i"
  45   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
  46         (ashiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
  47                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
  48    (clobber (match_scratch:HI 3 "=X,R1w"))]
  49   ""
  50   "@
  51    sha.b\t%2,%0
  52    mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
  53   [(set_attr "flags" "oszc,oszc")]
  54   )
  55
  56 (define_insn "lshrqi3_i"
  57   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
  58         (lshiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
  59                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
  60    (clobber (match_scratch:HI 3 "=X,R1w"))]
  61   ""
  62   "@
  63    shl.b\t%2,%0
  64    mov.b\t%2,r1h\n\tshl.b\tr1h,%0"
  65   [(set_attr "flags" "szc,szc")]
  66   )
  67
  68
  69 (define_expand "ashlqi3"
  70   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
  71         (ashift:QI (match_operand:QI 1 "mra_operand" "")
  72                    (match_operand:QI 2 "general_operand" "")))
  73    (clobber (match_scratch:HI 3 ""))])]
  74   ""
  75   "if (m32c_prepare_shift (operands, 1, ASHIFT))
  76      DONE;"
  77   )
  78
  79 (define_expand "ashrqi3"
  80   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
  81         (ashiftrt:QI (match_operand:QI 1 "mra_operand" "")
  82                      (neg:QI (match_operand:QI 2 "general_operand" ""))))
  83    (clobber (match_scratch:HI 3 ""))])]
  84   ""
  85   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
  86      DONE;"
  87   )
  88
  89 (define_expand "lshrqi3"
  90   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
  91                    (lshiftrt:QI (match_operand:QI 1 "mra_operand" "")
  92                                 (neg:QI (match_operand:QI 2 "general_operand" ""))))
  93               (clobber (match_scratch:HI 3 ""))])]
  94   ""
  95   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
  96      DONE;"
  97   )
  98
  99 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 100
 101 (define_insn "ashlhi3_i"
 102   [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
 103         (ashift:HI (match_operand:HI 1 "mra_operand" "0,0")
 104                    (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
 105    (clobber (match_scratch:HI 3 "=X,R1w"))]
 106   ""
 107   "@
 108    sha.w\t%2,%0
 109    mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
 110   [(set_attr "flags" "oszc,oszc")]
 111   )
 112
 113 (define_insn "ashrhi3_i"
 114   [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
 115         (ashiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
 116                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
 117    (clobber (match_scratch:HI 3 "=X,R1w"))]
 118   ""
 119   "@
 120    sha.w\t%2,%0
 121    mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
 122   [(set_attr "flags" "oszc,oszc")]
 123   )
 124
 125 (define_insn "lshrhi3_i"
 126   [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,RhiSd*Rmm")
 127         (lshiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
 128                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
 129    (clobber (match_scratch:HI 3 "=X,R1w"))]
 130   ""
 131   "@
 132    shl.w\t%2,%0
 133    mov.b\t%2,r1h\n\tshl.w\tr1h,%0"
 134   [(set_attr "flags" "szc,szc")]
 135   )
 136
 137
 138 (define_expand "ashlhi3"
 139   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
 140                    (ashift:HI (match_operand:HI 1 "mra_operand" "")
 141                               (match_operand:QI 2 "general_operand" "")))
 142               (clobber (match_scratch:HI 3 ""))])]
 143   ""
 144   "if (m32c_prepare_shift (operands, 1, ASHIFT))
 145      DONE;"
 146   )
 147
 148 (define_expand "ashrhi3"
 149   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
 150                    (ashiftrt:HI (match_operand:HI 1 "mra_operand" "")
 151                                 (neg:QI (match_operand:QI 2 "general_operand" ""))))
 152               (clobber (match_scratch:HI 3 ""))])]
 153   ""
 154   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
 155      DONE;"
 156   )
 157
 158 (define_expand "lshrhi3"
 159   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
 160                    (lshiftrt:HI (match_operand:HI 1 "mra_operand" "")
 161                                 (neg:QI (match_operand:QI 2 "general_operand" ""))))
 162               (clobber (match_scratch:HI 3 ""))])]
 163   ""
 164   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
 165      DONE;"
 166   )
 167
 168
 169
 170
 171 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 172
 173
 174 (define_insn "ashlpsi3_i"
 175   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
 176         (ashift:PSI (match_operand:PSI 1 "mra_operand" "0,0")
 177                     (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd")))
 178    (clobber (match_scratch:HI 3 "=X,R1w"))]
 179   "TARGET_A24"
 180   "@
 181    sha.l\t%2,%0
 182    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
 183   [(set_attr "flags" "oszc,oszc")]
 184   )
 185
 186 (define_insn "ashrpsi3_i"
 187   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
 188         (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
 189                       (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
 190    (clobber (match_scratch:HI 3 "=X,R1w"))]
 191   "TARGET_A24"
 192   "@
 193    sha.l\t%2,%0
 194    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
 195   [(set_attr "flags" "oszc,oszc")]
 196   )
 197
 198 (define_insn "lshrpsi3_i"
 199   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd,??Rmm")
 200         (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
 201                       (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
 202    (clobber (match_scratch:HI 3 "=X,R1w"))]
 203   "TARGET_A24"
 204   "@
 205    shl.l\t%2,%0
 206    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
 207   [(set_attr "flags" "szc,szc")]
 208   )
 209
 210
 211 (define_expand "ashlpsi3"
 212   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
 213                    (ashift:PSI (match_operand:PSI 1 "mra_operand" "")
 214                                (match_operand:QI 2 "shiftcount_operand" "")))
 215               (clobber (match_scratch:HI 3 ""))])]
 216   "TARGET_A24"
 217   "if (m32c_prepare_shift (operands, 1, ASHIFT))
 218      DONE;"
 219   )
 220
 221 (define_expand "ashrpsi3"
 222   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
 223                    (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
 224                                  (neg:QI (match_operand:QI 2 "shiftcount_operand" ""))))
 225               (clobber (match_scratch:HI 3 ""))])]
 226   "TARGET_A24"
 227   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
 228      DONE;"
 229   )
 230
 231 (define_expand "lshrpsi3"
 232   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
 233                    (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
 234                                  (neg:QI (match_operand:QI 2 "shiftcount_operand" ""))))
 235               (clobber (match_scratch:HI 3 ""))])]
 236   "TARGET_A24"
 237   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
 238      DONE;"
 239   )
 240
 241 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 242
 243 ; The m16c has a maximum shift count of -16..16, even when in a
 244 ; register.  It's optimal to use multiple shifts of -8..8 rather than
 245 ; loading larger constants into R1H multiple time.  The m32c can shift
 246 ; -32..32 either via immediates or in registers.  Hence, separate
 247 ; patterns.
 248
 249
 250 (define_insn "ashlsi3_16"
 251   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
 252         (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
 253                    (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd")))
 254    (clobber (match_scratch:HI 3 "=X,R1w"))]
 255   "TARGET_A16"
 256   "@
 257    sha.l\t%2,%0
 258    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
 259   [(set_attr "flags" "oszc,oszc")]
 260   )
 261
 262 (define_insn "ashrsi3_16"
 263   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
 264         (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
 265                      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
 266    (clobber (match_scratch:HI 3 "=X,R1w"))]
 267   "TARGET_A16"
 268   "@
 269    sha.l\t%2,%0
 270    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
 271   [(set_attr "flags" "oszc,oszc")]
 272   )
 273
 274 (define_insn "lshrsi3_16"
 275   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
 276         (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
 277                      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
 278    (clobber (match_scratch:HI 3 "=X,R1w"))]
 279   "TARGET_A16"
 280   "@
 281    shl.l\t%2,%0
 282    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
 283   [(set_attr "flags" "szc,szc")]
 284   )
 285
 286
 287
 288 (define_insn "ashlsi3_24"
 289   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
 290         (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
 291                    (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd")))
 292    (clobber (match_scratch:HI 3 "=X,R1w"))]
 293   "TARGET_A24"
 294   "@
 295    sha.l\t%2,%0
 296    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
 297   )
 298
 299 (define_insn "ashrsi3_24"
 300   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
 301         (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
 302                      (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
 303    (clobber (match_scratch:HI 3 "=X,R1w"))]
 304   "TARGET_A24"
 305   "@
 306    sha.l\t%2,%0
 307    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
 308   )
 309
 310 (define_insn "lshrsi3_24"
 311   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
 312         (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
 313                      (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
 314    (clobber (match_scratch:HI 3 "=X,R1w"))]
 315   "TARGET_A24"
 316   "@
 317    shl.l\t%2,%0
 318    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
 319   )
 320
 321
 322
 323
 324 (define_expand "ashlsi3"
 325   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
 326                    (ashift:SI (match_operand:SI 1 "r0123_operand" "")
 327                               (match_operand:QI 2 "mrai_operand" "")))
 328               (clobber (match_scratch:HI 3 ""))])]
 329   ""
 330   "if (m32c_prepare_shift (operands, 1, ASHIFT))
 331      DONE;"
 332   )
 333
 334 (define_expand "ashrsi3"
 335   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
 336                    (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "")
 337                                 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
 338               (clobber (match_scratch:HI 3 ""))])]
 339   ""
 340   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
 341      DONE;"
 342   )
 343
 344 (define_expand "lshrsi3"
 345   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
 346                    (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "")
 347                                 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
 348               (clobber (match_scratch:HI 3 ""))])]
 349   ""
 350   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
 351      DONE;"
 352   )