gcc/config/ip2k/ip2k.h

   1 /* Definitions of target machine for GCC,
   2    For Ubicom IP2022 Communications Controller
   3
   4    Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
   5    Contributed by Red Hat, Inc and Ubicom, Inc.
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 GCC is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330,
  22 Boston, MA 02111-1307, USA.  */
  23
  24 \f
  25 #undef ASM_SPEC /* We have a GAS assembler.  */
  26
  27 #define TARGET_CPU_CPP_BUILTINS()               \
  28   do                                            \
  29     {                                           \
  30       builtin_define_std ("IP2K");              \
  31       builtin_define ("_DOUBLE_IS_32BITS");     \
  32       builtin_define ("_BUFSIZ=512");           \
  33       builtin_define ("__FILENAME_MAX__=128");  \
  34     }                                           \
  35   while (0)
  36
  37 #define TARGET_VERSION fprintf (stderr, " (ip2k, GNU assembler syntax)")
  38
  39 /* Caller-saves is not a win for the IP2K.  Pretty much anywhere that
  40    a register is permitted allows SP-relative addresses too.
  41
  42    This machine doesn't have PIC addressing modes, so disable that also.  */
  43
  44 #define OVERRIDE_OPTIONS        \
  45     do {                        \
  46         flag_caller_saves = 0;  \
  47         flag_pic = 0;           \
  48     } while (0)
  49
  50 /* Put each function in its own section so that PAGE-instruction
  51    relaxation can do its best.  */
  52 #define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG)   \
  53     do {                                        \
  54         if ((LEVEL) || (SIZEFLAG))              \
  55             flag_function_sections = 1; \
  56     } while (0)
  57
  58 #define BITS_BIG_ENDIAN 0
  59 #define BYTES_BIG_ENDIAN 1
  60 #define WORDS_BIG_ENDIAN 1
  61 #define BITS_PER_WORD 8
  62 #define UNITS_PER_WORD (BITS_PER_WORD / BITS_PER_UNIT)
  63
  64 /* Width in bits of a pointer.
  65    See also the macro `Pmode' defined below.  */
  66 #define POINTER_SIZE 16
  67
  68 /* Maximum sized of reasonable data type DImode or Dfmode ...  */
  69 #define MAX_FIXED_MODE_SIZE 64
  70
  71 #define PARM_BOUNDARY 8
  72 #define FUNCTION_BOUNDARY 16
  73 #define EMPTY_FIELD_BOUNDARY 8
  74 #define BIGGEST_ALIGNMENT 8
  75
  76 #define STRICT_ALIGNMENT 0
  77
  78 #define PCC_BITFIELD_TYPE_MATTERS 1
  79
  80 #undef INT_TYPE_SIZE
  81 #define INT_TYPE_SIZE 16
  82
  83 #undef SHORT_TYPE_SIZE
  84 #define SHORT_TYPE_SIZE 16
  85
  86 #undef LONG_TYPE_SIZE
  87 #define LONG_TYPE_SIZE 32
  88
  89 #undef LONG_LONG_TYPE_SIZE
  90 #define LONG_LONG_TYPE_SIZE     64
  91
  92 #undef CHAR_TYPE_SIZE
  93 #define  CHAR_TYPE_SIZE 8
  94
  95 #undef FLOAT_TYPE_SIZE
  96 #define FLOAT_TYPE_SIZE 32
  97
  98 #undef DOUBLE_TYPE_SIZE
  99 #define DOUBLE_TYPE_SIZE 32
 100
 101 #undef LONG_DOUBLE_TYPE_SIZE
 102 #define LONG_DOUBLE_TYPE_SIZE   32
 103
 104 #define DEFAULT_SIGNED_CHAR 1
 105
 106 #define SIZE_TYPE "unsigned int"
 107
 108 #define PTRDIFF_TYPE "int"
 109
 110 #undef WCHAR_TYPE
 111 #define WCHAR_TYPE "int"
 112 #undef WCHAR_TYPE_SIZE
 113 #define WCHAR_TYPE_SIZE 16
 114
 115 #define HARD_REG_SIZE           (UNITS_PER_WORD)
 116 /* Standard register usage.
 117
 118    for the IP2K, we are going to have a LOT of registers, but only some of them
 119    are named.  */
 120
 121 #define FIRST_PSEUDO_REGISTER (0x104) /* Skip over physical regs, VFP, AP.  */
 122
 123 #define REG_IP          0x4
 124 #define REG_IPH         REG_IP
 125 #define REG_IPL         0x5
 126
 127 #define REG_SP          0x6
 128 #define REG_SPH         REG_SP
 129 #define REG_SPL         0x7
 130
 131 #define REG_PCH         0x8
 132 #define REG_PCL         0x9
 133
 134 #define REG_W           0xa
 135 #define REG_STATUS      0xb
 136
 137 #define REG_DP          0xc
 138 #define REG_DPH         REG_DP
 139 #define REG_DPL         0xd
 140
 141 #define REG_MULH        0xf
 142
 143 #define REG_CALLH       0x7e            /* Call-stack readout.  */
 144 #define REG_CALLL       0x7f
 145
 146
 147 #define REG_RESULT      0x80    /* Result register (upto 8 bytes).  */
 148 #define REG_FP          0xfd    /* 2 bytes for FRAME chain  */
 149
 150 #define REG_ZERO        0xff    /* Initialized to zero by runtime.  */
 151
 152 #define REG_VFP         0x100   /* Virtual frame pointer.  */
 153 #define REG_AP          0x102   /* Virtual arg pointer.  */
 154
 155 /* Status register bits.  */
 156 #define Z_FLAG  0x2
 157 #define DC_FLAG 0x1
 158 #define C_FLAG  0x0
 159
 160 #define FIXED_REGISTERS {\
 161 1,1,1,1,0,0,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
 162 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
 163 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
 164 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
 165 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/*r128..r159*/\
 166 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
 167 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
 168 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
 169 1,1,1,1}
 170
 171 #define CALL_USED_REGISTERS {                   \
 172 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
 173 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
 174 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
 175 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
 176 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r128..r159*/\
 177 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
 178 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
 179 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
 180 1,1,1,1}
 181
 182 #define REG_ALLOC_ORDER {                       \
 183     0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f,    \
 184     0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,    \
 185     0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,    \
 186     0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,    \
 187     0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7,    \
 188     0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf,    \
 189     0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7,    \
 190     0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf,    \
 191     0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,    \
 192     0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf,    \
 193     0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd7,    \
 194     0xd8,0xd9,0xda,0xdb,0xdc,0xdd,0xde,0xdf,    \
 195     0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,    \
 196     0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,    \
 197     0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,    \
 198     0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,    \
 199     0x00,0x01,0x02,0x03,0x0c,0x0d,0x06,0x07,    \
 200     0x08,0x09,0x0a,0x0b,0x04,0x05,0x0e,0x0f,    \
 201     0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,    \
 202     0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,    \
 203     0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,    \
 204     0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,    \
 205     0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,    \
 206     0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,    \
 207     0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,    \
 208     0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,    \
 209     0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,    \
 210     0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f,    \
 211     0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,    \
 212     0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f,    \
 213     0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,    \
 214     0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,    \
 215     0x100,0x101,0x102,0x103}
 216
 217
 218 #define ORDER_REGS_FOR_LOCAL_ALLOC ip2k_init_local_alloc (reg_alloc_order)
 219
 220 /* Are we allowed to rename registers?  For some reason, regrename was
 221    changing DP to IP (when it appeared in addresses like (plus:HI
 222    (reg: DP) (const_int 37)) - and that's bad because IP doesn't
 223    permit offsets!  */
 224
 225 #define HARD_REGNO_RENAME_OK(REG, NREG)                         \
 226   (((REG) == REG_DPH) ? 0                                       \
 227     : ((REG) == REG_IPH) ? ((NREG) == REG_DPH)                  \
 228     : (((NREG) == REG_IPL) || ((NREG) == REG_DPL)) ? 0 : 1)
 229
 230 #define HARD_REGNO_NREGS(REGNO, MODE) \
 231   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 232
 233 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
 234
 235 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 236    (((MODE1) == QImode && (MODE2) == HImode)    \
 237     || ((MODE2) == QImode && (MODE1) == HImode))
 238 /* We originally had this as follows - this isn't a win on the IP2k
 239    though as registers just get in our way!
 240
 241    #define MODES_TIEABLE_P(MODE1, MODE2) \
 242     (((MODE1) > HImode && (MODE2) == HImode)
 243      || ((MODE1) == HImode && (MODE2) > HImode))  */
 244
 245 enum reg_class {
 246   NO_REGS,
 247   DPH_REGS,
 248   DPL_REGS,
 249   DP_REGS,
 250   SP_REGS,
 251   IPH_REGS,
 252   IPL_REGS,
 253   IP_REGS,
 254   DP_SP_REGS,
 255   PTR_REGS,
 256   NONPTR_REGS,
 257   NONSP_REGS,
 258   GENERAL_REGS,
 259   ALL_REGS = GENERAL_REGS,
 260   LIM_REG_CLASSES
 261 };
 262
 263 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 264
 265 #define REG_CLASS_NAMES {                       \
 266                 "NO_REGS",                      \
 267                 "DPH_REGS",                     \
 268                 "DPL_REGS",                     \
 269                 "DP_REGS",                      \
 270                 "SP_REGS",                      \
 271                 "IPH_REGS",                     \
 272                 "IPL_REGS",                     \
 273                 "IP_REGS",                      \
 274                 "DP_SP_REGS",                   \
 275                 "PTR_REGS",                     \
 276                 "NONPTR_REGS",                  \
 277                 "NONSP_REGS",                   \
 278                 "GENERAL_REGS"                  \
 279                 }
 280
 281
 282 #define REG_CLASS_CONTENTS {                            \
 283 {0x00000000, 0, 0, 0, 0, 0, 0, 0, 0}, /* NO_REGS */     \
 284 {0x00001000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPH_REGS */    \
 285 {0x00002000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPL_REGS */    \
 286 {0x00003000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_REGS */     \
 287 {0x000000c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SP_REGS */     \
 288 {0x00000010, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPH_REGS */    \
 289 {0x00000020, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPL_REGS */    \
 290 {0x00000030, 0, 0, 0, 0, 0, 0, 0, 0}, /* IP_REGS */     \
 291 {0x000030c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_SP_REGS */  \
 292 {0x000030f0, 0, 0, 0, 0, 0, 0, 0, 0}, /* PTR_REGS */    \
 293 {0xffffcf0f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONPTR_REGS */ \
 294 {0xffffff3f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONSP_REGS */  \
 295 {0xffffffff,-1,-1,-1,-1,-1,-1,-1,15}  /* GENERAL_REGS */ \
 296 }
 297
 298 #define REGNO_REG_CLASS(R)      \
 299   ( (R) == REG_IPH ? IPH_REGS   \
 300   : (R) == REG_IPL ? IPL_REGS   \
 301   : (R) == REG_DPH ? DPH_REGS   \
 302   : (R) == REG_DPL ? DPL_REGS   \
 303   : (R) == REG_SPH ? SP_REGS    \
 304   : (R) == REG_SPL ? SP_REGS    \
 305   : NONPTR_REGS)
 306
 307 #define MODE_BASE_REG_CLASS(MODE) ((MODE) == QImode ? PTR_REGS : DP_SP_REGS)
 308
 309 #define BASE_REG_CLASS PTR_REGS
 310
 311 #define INDEX_REG_CLASS NO_REGS
 312
 313 #define REG_CLASS_FROM_LETTER(C)        \
 314   ( (C) == 'j' ? IPH_REGS               \
 315   : (C) == 'k' ? IPL_REGS               \
 316   : (C) == 'f' ? IP_REGS                \
 317   : (C) == 'y' ? DPH_REGS               \
 318   : (C) == 'z' ? DPL_REGS               \
 319   : (C) == 'b' ? DP_REGS                \
 320   : (C) == 'u' ? NONSP_REGS             \
 321   : (C) == 'q' ? SP_REGS                \
 322   : (C) == 'c' ? DP_SP_REGS             \
 323   : (C) == 'a' ? PTR_REGS               \
 324   : (C) == 'd' ? NONPTR_REGS            \
 325   : NO_REGS)
 326
 327 #define REGNO_OK_FOR_BASE_P(R) \
 328   ((R) == REG_DP || (R) == REG_IP || (R) == REG_SP)
 329
 330 #define REGNO_MODE_OK_FOR_BASE_P(R,M)           \
 331   ((R) == REG_DP || (R) == REG_SP               \
 332    || ((R) == REG_IP && GET_MODE_SIZE (M) <= 1))
 333
 334 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 335
 336 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
 337
 338 #define SMALL_REGISTER_CLASSES 1
 339
 340 #define CLASS_LIKELY_SPILLED_P(CLASS)  class_likely_spilled_p(CLASS)
 341
 342 #define CLASS_MAX_NREGS(CLASS, MODE)   GET_MODE_SIZE (MODE)
 343
 344 #define CONST_OK_FOR_LETTER_P(VALUE, C)                         \
 345   ((C) == 'I' ? (VALUE) >= -255 && (VALUE) <= -1 :              \
 346    (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 7 :                  \
 347    (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 127 :                \
 348    (C) == 'L' ? (VALUE) > 0 && (VALUE) < 128:                   \
 349    (C) == 'M' ? (VALUE) == -1:                                  \
 350    (C) == 'N' ? (VALUE) == 1:                                   \
 351    (C) == 'O' ? (VALUE) == 0:                                   \
 352    (C) == 'P' ? (VALUE) >= 0 && (VALUE) <= 255:                 \
 353    0)
 354
 355 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
 356
 357 #define EXTRA_CONSTRAINT(X, C) ip2k_extra_constraint (X, C)
 358
 359 /* This is an undocumented variable which describes
 360    how GCC will pop a data.  */
 361 #define STACK_POP_CODE PRE_INC
 362
 363 #define STACK_PUSH_CODE POST_DEC
 364
 365 #define STACK_CHECK_BUILTIN     1
 366 /* Prologue code will do stack checking as necessary.  */
 367
 368 #define STARTING_FRAME_OFFSET (0)
 369
 370 #define FRAME_GROWS_DOWNWARD    1
 371 #define STACK_GROWS_DOWNWARD    1
 372
 373 /* On IP2K arg pointer is virtual and resolves to either SP or FP
 374    after we've resolved what registers are saved (fp chain, return
 375    pc, etc.  */
 376
 377 #define FIRST_PARM_OFFSET(FUNDECL) 0
 378
 379 #define STACK_POINTER_OFFSET 1
 380 /* IP2K stack is post-decremented, so 0(sp) is address of open space
 381    and 1(sp) is offset to the location avobe the forst location at which
 382    outgoing arguments are placed.  */
 383
 384 #define STACK_BOUNDARY 8
 385
 386 #define STACK_POINTER_REGNUM REG_SP
 387
 388 #define FRAME_POINTER_REGNUM REG_VFP
 389 #define HARD_FRAME_POINTER_REGNUM REG_FP
 390
 391 #define ARG_POINTER_REGNUM  REG_AP
 392
 393 /* We don't really want to support nested functions.  But we'll crash
 394    in various testsuite tests if we don't at least define the register
 395    to contain the static chain. The return value register is about as
 396    bad a place as any for this.  */
 397
 398 #define STATIC_CHAIN_REGNUM     REG_RESULT
 399
 400 #define FRAME_POINTER_REQUIRED (!flag_omit_frame_pointer)
 401
 402 #define ELIMINABLE_REGS {                                       \
 403         {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},             \
 404         {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},        \
 405         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},           \
 406         {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},      \
 407         {HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 408 }
 409
 410 #define CAN_ELIMINATE(FROM, TO)                                 \
 411   ((FROM) == HARD_FRAME_POINTER_REGNUM                          \
 412    ? (flag_omit_frame_pointer && !frame_pointer_needed) : 1)
 413 /* Don't eliminate FP unless we EXPLICITLY_ASKED  */
 414
 415 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 416   ((OFFSET) = ip2k_init_elim_offset ((FROM), (TO)))
 417
 418 #define RETURN_ADDR_RTX(COUNT, X) \
 419   (((COUNT) == 0) ? gen_rtx_REG (HImode, REG_CALLH) : NULL_RTX)
 420
 421 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
 422
 423 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
 424   ip2k_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
 425
 426 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
 427
 428 #define CUMULATIVE_ARGS int
 429
 430 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 431   ((CUM) = 0)
 432
 433 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
 434
 435 /* All arguments are passed on stack - do nothing here.  */
 436
 437 #define FUNCTION_ARG_REGNO_P(R) 0
 438
 439 #define FUNCTION_VALUE(VALTYPE, FUNC)                           \
 440    ((TYPE_MODE (VALTYPE) == QImode)                             \
 441     ? gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT + 1) \
 442     : gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT))
 443
 444 /* Because functions returning 'char' actually widen to 'int', we have to
 445    use $81 as the return location if we think we only have a 'char'.  */
 446
 447 #define LIBCALL_VALUE(MODE)  gen_rtx_REG ((MODE), REG_RESULT)
 448
 449 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_RESULT)
 450
 451 #define DEFAULT_PCC_STRUCT_RETURN 0
 452
 453 #define EPILOGUE_USES(REGNO) 0
 454
 455
 456 /*  Hmmm.  We don't actually like constants as addresses - they always need
 457     to be loaded to a register, except for function calls which take an
 458     address by immediate value.  But changing this to zero had negative
 459     effects, causing the compiler to get very confused....  */
 460
 461 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
 462
 463 #define MAX_REGS_PER_ADDRESS 1
 464
 465 #ifdef REG_OK_STRICT
 466 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
 467 {                                                       \
 468   if (legitimate_address_p ((MODE), (OPERAND), 1))      \
 469     goto ADDR;                                          \
 470 }
 471 #else
 472 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
 473 {                                                       \
 474   if (legitimate_address_p ((MODE), (OPERAND), 0))      \
 475     goto ADDR;                                          \
 476 }
 477 #endif
 478
 479 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 480
 481 #define REG_OK_FOR_BASE_NOSTRICT_P(X)   \
 482   (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 483    || (REGNO (X) == REG_FP)             \
 484    || (REGNO (X) == REG_VFP)            \
 485    || (REGNO (X) == REG_AP)             \
 486    || REG_OK_FOR_BASE_STRICT_P(X))
 487
 488 #ifdef REG_OK_STRICT
 489 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
 490 #else
 491 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
 492 #endif
 493
 494 #define REG_OK_FOR_INDEX_P(X) 0
 495
 496 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)             \
 497 do { rtx orig_x = (X);                                  \
 498   (X) = legitimize_address ((X), (OLDX), (MODE), 0);    \
 499   if ((X) != orig_x && memory_address_p ((MODE), (X)))  \
 500     goto WIN;                                           \
 501 } while (0)
 502
 503 /* Is X a legitimate register to reload, or is it a pseudo stack-temp
 504    that is problematic for push_reload() ?  */
 505
 506 #define LRA_REG(X)                                              \
 507   (! (reg_equiv_memory_loc[REGNO (X)]                           \
 508       && (reg_equiv_address[REGNO (X)]                          \
 509           || num_not_at_initial_offset)))
 510
 511 /* Given a register X that failed the LRA_REG test, replace X
 512    by its memory equivalent, find the reloads needed for THAT memory
 513    location and substitute that back for the higher-level reload
 514    that we're conducting...  */
 515
 516 /* WARNING: we reference 'ind_levels' and 'insn' which are local variables
 517    in find_reloads_address (), where the LEGITIMIZE_RELOAD_ADDRESS macro
 518    expands.  */
 519
 520 #define FRA_REG(X,MODE,OPNUM,TYPE)                                      \
 521 do {                                                                    \
 522   rtx tem = make_memloc ((X), REGNO (X));                               \
 523                                                                         \
 524   if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))        \
 525     {                                                                   \
 526       /* Note that we're doing address in address - cf. ADDR_TYPE  */   \
 527       find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),        \
 528                             &XEXP (tem, 0), (OPNUM),                    \
 529                             ADDR_TYPE (TYPE), ind_levels, insn);        \
 530     }                                                                   \
 531   (X) = tem;                                                            \
 532 } while (0)
 533
 534
 535 /* For the IP2K, we want to be clever about picking IP vs DP for a
 536    base pointer since IP only directly supports a zero displacement.
 537    (Note that we have modified all the HI patterns to correctly handle
 538    IP references by manipulating iph:ipl as we fetch the pieces).  */
 539 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND,WIN)                 \
 540 {                                                                            \
 541   if (GET_CODE (X) == PLUS                                                   \
 542       && REG_P (XEXP (X, 0))                                                 \
 543       && GET_CODE (XEXP (X, 1)) == CONST_INT)                                \
 544     {                                                                        \
 545       int disp = INTVAL (XEXP (X, 1));                                       \
 546       int fit = (disp >= 0 && disp <= (127 - 2 * GET_MODE_SIZE (MODE)));     \
 547       rtx reg = XEXP (X, 0);                                                 \
 548       if (!fit)                                                              \
 549         {                                                                    \
 550           push_reload ((X), NULL_RTX, &(X),                                  \
 551                        NULL, MODE_BASE_REG_CLASS (MODE), GET_MODE (X),       \
 552                        VOIDmode, 0, 0, OPNUM, TYPE);                         \
 553           goto WIN;                                                          \
 554         }                                                                    \
 555       if (reg_equiv_memory_loc[REGNO (reg)]                                  \
 556           && (reg_equiv_address[REGNO (reg)] || num_not_at_initial_offset))  \
 557         {                                                                    \
 558           rtx mem = make_memloc (reg, REGNO (reg));                          \
 559           if (! strict_memory_address_p (GET_MODE (mem), XEXP (mem, 0)))     \
 560             {                                                                \
 561               /* Note that we're doing address in address - cf. ADDR_TYPE  */\
 562                find_reloads_address (GET_MODE (mem), &mem, XEXP (mem, 0),    \
 563                                     &XEXP (mem, 0), (OPNUM),                 \
 564                                     ADDR_TYPE (TYPE), (IND), insn);          \
 565             }                                                                \
 566           push_reload (mem, NULL, &XEXP (X, 0), NULL,                        \
 567                        GENERAL_REGS, Pmode, VOIDmode, 0, 0,                  \
 568                        OPNUM, TYPE);                                         \
 569           push_reload (X, NULL, &X, NULL,                                    \
 570                        MODE_BASE_REG_CLASS (MODE), GET_MODE (X), VOIDmode,   \
 571                        0, 0, OPNUM, TYPE);                                   \
 572           goto WIN;                                                          \
 573         }                                                                    \
 574    }                                                                         \
 575 }
 576
 577 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)                \
 578     do {                                                        \
 579         if (ip2k_mode_dependent_address (ADDR)) goto LABEL;     \
 580     } while (0)
 581
 582 #define LEGITIMATE_CONSTANT_P(X) 1
 583
 584 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 7
 585
 586 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 6
 587
 588 #define SLOW_BYTE_ACCESS 0
 589
 590 #define NO_FUNCTION_CSE
 591
 592 #define TEXT_SECTION_ASM_OP ".text"
 593 #define DATA_SECTION_ASM_OP ".data"
 594
 595 #define JUMP_TABLES_IN_TEXT_SECTION 1
 596
 597 #define ASM_COMMENT_START " ; "
 598
 599 #define ASM_APP_ON "/* #APP */\n"
 600
 601 #define ASM_APP_OFF "/* #NOAPP */\n"
 602
 603 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
 604   fprintf ((STREAM), ".double %.20e\n", (VALUE))
 605 #define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
 606   asm_output_float ((STREAM), (VALUE))
 607
 608 #define ASM_OUTPUT_INT(FILE, VALUE)                     \
 609  ( fprintf ((FILE), "\t.long "),                        \
 610    output_addr_const ((FILE), (VALUE)),                 \
 611    fputs ("\n", (FILE)))
 612
 613 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
 614   asm_output_short ((FILE), (VALUE))
 615 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
 616   asm_output_char ((FILE), (VALUE))
 617
 618 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
 619   asm_output_byte ((FILE), (VALUE))
 620
 621 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) \
 622   ((C) == '\n' || ((C) == '$'))
 623
 624 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)  \
 625 do {                                                    \
 626      fputs ("\t.comm ", (STREAM));                      \
 627      assemble_name ((STREAM), (NAME));                  \
 628      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
 629 } while (0)
 630
 631 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)   \
 632 do {                                                    \
 633      fputs ("\t.lcomm ", (STREAM));                     \
 634      assemble_name ((STREAM), (NAME));                  \
 635      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
 636 } while (0)
 637
 638 #undef WEAK_ASM_OP
 639 #define WEAK_ASM_OP     ".weak"
 640
 641 #undef ASM_DECLARE_FUNCTION_SIZE
 642 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)            \
 643   do {                                                          \
 644     if (!flag_inhibit_size_directive)                           \
 645       ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME);                   \
 646   } while (0)
 647
 648 #define ESCAPES \
 649 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 650 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
 651 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
 652 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
 653 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 654 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 655 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 656 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
 657 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
 658    ASM_OUTPUT_LIMITED_STRING macros.  Each byte in the table
 659    corresponds to a particular byte value [0..255].  For any
 660    given byte value, if the value in the corresponding table
 661    position is zero, the given character can be output directly.
 662    If the table value is 1, the byte must be output as a \ooo
 663    octal escape.  If the tables value is anything else, then the
 664    byte value should be output as a \ followed by the value
 665    in the table.  Note that we can use standard UN*X escape
 666    sequences for many control characters, but we don't use
 667    \a to represent BEL because some svr4 assemblers (e.g. on
 668    the i386) don't know about that.  Also, we don't use \v
 669    since some versions of gas, such as 2.2 did not accept it.  */
 670
 671 /* Globalizing directive for a label.  */
 672 #define GLOBAL_ASM_OP ".global\t"
 673
 674 #define REGISTER_NAMES  {                                       \
 675   "$00","$01","$02","$03","iph","ipl","sph","spl",              \
 676   "pch","pcl","wreg","status","dph","dpl","$0e","mulh",         \
 677   "$10","$11","$12","$13","$14","$15","$16","$17",              \
 678   "$18","$19","$1a","$1b","$1c","$1d","$1e","$1f",              \
 679   "$20","$21","$22","$23","$24","$25","$26","$27",              \
 680   "$28","$29","$2a","$2b","$2c","$2d","$2e","$2f",              \
 681   "$30","$31","$32","$33","$34","$35","$36","$37",              \
 682   "$38","$39","$3a","$3b","$3c","$3d","$3e","$3f",              \
 683   "$40","$41","$42","$43","$44","$45","$46","$47",              \
 684   "$48","$49","$4a","$4b","$4c","$4d","$4e","$4f",              \
 685   "$50","$51","$52","$53","$54","$55","$56","$57",              \
 686   "$58","$59","$5a","$5b","$5c","$5d","$5e","$5f",              \
 687   "$60","$61","$62","$63","$64","$65","$66","$67",              \
 688   "$68","$69","$6a","$6b","$6c","$6d","$6e","$6f",              \
 689   "$70","$71","$72","$73","$74","$75","$76","$77",              \
 690   "$78","$79","$7a","$7b","$7c","$7d","callh","calll",          \
 691   "$80","$81","$82","$83","$84","$85","$86","$87",              \
 692   "$88","$89","$8a","$8b","$8c","$8d","$8e","$8f",              \
 693   "$90","$91","$92","$93","$94","$95","$96","$97",              \
 694   "$98","$99","$9a","$9b","$9c","$9d","$9e","$9f",              \
 695   "$a0","$a1","$a2","$a3","$a4","$a5","$a6","$a7",              \
 696   "$a8","$a9","$aa","$ab","$ac","$ad","$ae","$af",              \
 697   "$b0","$b1","$b2","$b3","$b4","$b5","$b6","$b7",              \
 698   "$b8","$b9","$ba","$bb","$bc","$bd","$be","$bf",              \
 699   "$c0","$c1","$c2","$c3","$c4","$c5","$c6","$c7",              \
 700   "$c8","$c9","$ca","$cb","$cc","$cd","$ce","$cf",              \
 701   "$d0","$d1","$d2","$d3","$d4","$d5","$d6","$d7",              \
 702   "$d8","$d9","$da","$db","$dc","$dd","$de","$df",              \
 703   "$e0","$e1","$e2","$e3","$e4","$e5","$e6","$e7",              \
 704   "$e8","$e9","$ea","$eb","$ec","$ed","$ee","$ef",              \
 705   "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7",              \
 706   "$f8","$f9","$fa","$fb","$fc","$fd","$fe","$ff",              \
 707   "vfph","vfpl","vaph","vapl"}
 708
 709 #define PRINT_OPERAND(STREAM, X, CODE) \
 710   print_operand ((STREAM), (X), (CODE))
 711
 712 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
 713   ((CODE) == '<' || (CODE) == '>')
 714
 715 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
 716
 717 /* Since register names don't have a prefix, we must preface all
 718    user identifiers with the '_' to prevent confusion.  */
 719
 720 #undef USER_LABEL_PREFIX
 721 #define USER_LABEL_PREFIX "_"
 722 #define LOCAL_LABEL_PREFIX ".L"
 723
 724 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 725   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
 726
 727 /* elfos.h presumes that we will want switch/case dispatch tables aligned.
 728    This is not so for the ip2k.  */
 729 #undef ASM_OUTPUT_CASE_LABEL
 730
 731 #undef ASM_OUTPUT_ADDR_VEC_ELT
 732 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 733   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
 734
 735 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
 736   fprintf ((STREAM), "\t.align %d\n", (POWER))
 737
 738 /* Since instructions are 16 bit word addresses, we should lie and claim that
 739    the dispatch vectors are in QImode.  Otherwise the offset into the jump
 740    table will be scaled by the MODE_SIZE.  */
 741
 742 #define CASE_VECTOR_MODE QImode
 743
 744 #undef WORD_REGISTER_OPERATIONS
 745
 746 #define MOVE_MAX 1
 747
 748 #define MOVE_RATIO              3
 749 /* MOVE_RATIO is the number of move instructions that is better than a
 750    block move.  Make this small on the IP2k, since the code size grows very
 751    large with each move.  */
 752
 753 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 754
 755 #define Pmode HImode
 756
 757 #define FUNCTION_MODE HImode
 758
 759 #define DOLLARS_IN_IDENTIFIERS 0
 760
 761 extern int ip2k_reorg_in_progress;
 762 /* Flag if we're in the middle of IP2k-specific reorganization.  */
 763
 764 extern int ip2k_reorg_completed;
 765 /* Flag if we've completed our IP2k-specific reorganization.  If we have
 766    then we allow quite a few more tricks than before.  */
 767
 768 extern int ip2k_reorg_split_dimode;
 769 extern int ip2k_reorg_split_simode;
 770 extern int ip2k_reorg_split_qimode;
 771 extern int ip2k_reorg_split_himode;
 772 /* Flags for various split operations that we run in sequence.  */
 773
 774 extern int ip2k_reorg_merge_qimode;
 775 /* Flag to indicate that it's safe to merge QImode operands.  */
 776
 777 #define TRAMPOLINE_TEMPLATE(FILE) abort ()
 778
 779 #define TRAMPOLINE_SIZE 4
 780
 781 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                       \
 782 {                                                                       \
 783   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)),     \
 784                            CXT);                                        \
 785   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)),     \
 786                            FNADDR);                                     \
 787 }
 788 /* Store in cc_status the expressions
 789    that the condition codes will describe
 790    after execution of an instruction whose pattern is EXP.
 791    Do not alter them if the instruction would not alter the cc's.  */
 792
 793 #define NOTICE_UPDATE_CC(EXP, INSN) (void)(0)
 794
 795 /* Output assembler code to FILE to increment profiler label # LABELNO
 796    for profiling a function entry.  */
 797
 798 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 799   fprintf ((FILE), "/* profiler %d */", (LABELNO))
 800
 801 #undef ENDFILE_SPEC
 802 #undef LINK_SPEC
 803 #undef STARTFILE_SPEC
 804
 805 #if defined(__STDC__) || defined(ALMOST_STDC)
 806 #define AS2(a,b,c) #a "\t" #b "," #c
 807 #define AS1(a,b) #a "\t" #b
 808 #else
 809 #define AS1(a,b) "a     b"
 810 #define AS2(a,b,c) "a   b,c"
 811 #endif
 812 #define OUT_AS1(a,b) output_asm_insn (AS1 (a,b), operands)
 813 #define OUT_AS2(a,b,c) output_asm_insn (AS2 (a,b,c), operands)
 814 #define CR_TAB "\n\t"
 815
 816 #define PREDICATE_CODES                                 \
 817   {"ip2k_ip_operand", {MEM}},                           \
 818   {"ip2k_short_operand", {MEM}},                        \
 819   {"ip2k_gen_operand", {MEM, REG, SUBREG}},             \
 820   {"ip2k_nonptr_operand", {REG, SUBREG}},               \
 821   {"ip2k_ptr_operand", {REG, SUBREG}},                  \
 822   {"ip2k_split_dest_operand", {REG, SUBREG, MEM}},      \
 823   {"ip2k_sp_operand", {REG}},                           \
 824   {"ip2k_nonsp_reg_operand", {REG, SUBREG}},            \
 825   {"ip2k_symbol_ref_operand", {SYMBOL_REF}},            \
 826   {"ip2k_binary_operator", {PLUS, MINUS, MULT, DIV,     \
 827                             UDIV, MOD, UMOD, AND, IOR,  \
 828                             XOR, COMPARE, ASHIFT,       \
 829                             ASHIFTRT, LSHIFTRT}},       \
 830   {"ip2k_unary_operator", {NEG, NOT, SIGN_EXTEND,       \
 831                            ZERO_EXTEND}},               \
 832   {"ip2k_unsigned_comparison_operator", {LTU, GTU, NE,  \
 833                                          EQ, LEU, GEU}},\
 834   {"ip2k_signed_comparison_operator", {LT, GT, LE, GE}},
 835
 836 #define DWARF2_DEBUGGING_INFO 1
 837
 838 #define DWARF2_ASM_LINE_DEBUG_INFO      1
 839
 840 #define DBX_REGISTER_NUMBER(REGNO)      (REGNO)
 841
 842 /* Miscellaneous macros to describe machine specifics.  */
 843
 844 #define IS_PSEUDO_P(R)  (REGNO (R) >= FIRST_PSEUDO_REGISTER)
 845
 846 /* Default calculations would cause DWARF address sizes to be 2 bytes,
 847    but the Harvard architecture of the IP2k and the word-addressed 64k
 848    of instruction memory causes us to want a 32-bit "address" field.  */
 849 #undef DWARF2_ADDR_SIZE
 850 #define DWARF2_ADDR_SIZE        4
 851