1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by James E. Wilson <wilson@cygnus.com> and
4 David Mosberger <davidm@hpl.hp.com>.
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* ??? Look at ABI group documents for list of preprocessor macros and
24 other features required for ABI compliance. */
26 /* ??? Functions containing a non-local goto target save many registers. Why?
27 See for instance execute/920428-2.c. */
29 /* ??? Add support for short data/bss sections. */
32 /* Run-time target specifications */
34 /* Define this to be a string constant containing `-D' options to define the
35 predefined macros that identify this machine and system. These macros will
36 be predefined unless the `-ansi' option is specified. */
37 /* ??? This is undefed in svr4.h. */
38 #define CPP_PREDEFINES "-Dia64 -Amachine=ia64"
40 /* This declaration should be present. */
41 extern int target_flags;
43 /* This series of macros is to allow compiler command arguments to enable or
44 disable the use of optional features of the target machine. */
46 #define MASK_BIG_ENDIAN 0x00000001 /* Generate big endian code. */
48 #define MASK_GNU_AS 0x00000002 /* Generate code for GNU as. */
50 #define MASK_GNU_LD 0x00000004 /* Generate code for GNU ld. */
52 #define MASK_NO_PIC 0x00000008 /* Generate code without GP reg. */
54 #define MASK_VOL_ASM_STOP 0x00000010 /* Emit stop bits for vol ext asm. */
56 /* 0x00000020 is available. */
58 #define MASK_B_STEP 0x00000040 /* Emit code for Itanium B step. */
60 #define MASK_REG_NAMES 0x00000080 /* Use in/loc/out register names. */
62 #define MASK_NO_SDATA 0x00000100 /* Disable sdata/scommon/sbss. */
64 #define MASK_CONST_GP 0x00000200 /* treat gp as program-wide constant */
66 #define MASK_AUTO_PIC 0x00000400 /* generate automatically PIC */
68 #define MASK_INLINE_DIV_LAT 0x00000800 /* inline div, min latency. */
70 #define MASK_INLINE_DIV_THR 0x00001000 /* inline div, max throughput. */
72 #define MASK_DWARF2_ASM 0x40000000 /* test dwarf2 line info via gas. */
74 #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
76 #define TARGET_GNU_AS (target_flags & MASK_GNU_AS)
78 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
80 #define TARGET_NO_PIC (target_flags & MASK_NO_PIC)
82 #define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP)
84 #define TARGET_B_STEP (target_flags & MASK_B_STEP)
86 #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES)
88 #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA)
90 #define TARGET_CONST_GP (target_flags & MASK_CONST_GP)
92 #define TARGET_AUTO_PIC (target_flags & MASK_AUTO_PIC)
94 #define TARGET_INLINE_DIV_LAT (target_flags & MASK_INLINE_DIV_LAT)
96 #define TARGET_INLINE_DIV_THR (target_flags & MASK_INLINE_DIV_THR)
98 #define TARGET_INLINE_DIV \
99 (target_flags & (MASK_INLINE_DIV_LAT | MASK_INLINE_DIV_THR))
101 #define TARGET_DWARF2_ASM (target_flags & MASK_DWARF2_ASM)
103 /* This macro defines names of command options to set and clear bits in
104 `target_flags'. Its definition is an initializer with a subgrouping for
105 each command option. */
107 #define TARGET_SWITCHES \
109 { "big-endian", MASK_BIG_ENDIAN, \
110 N_("Generate big endian code") }, \
111 { "little-endian", -MASK_BIG_ENDIAN, \
112 N_("Generate little endian code") }, \
113 { "gnu-as", MASK_GNU_AS, \
114 N_("Generate code for GNU as") }, \
115 { "no-gnu-as", -MASK_GNU_AS, \
116 N_("Generate code for Intel as") }, \
117 { "gnu-ld", MASK_GNU_LD, \
118 N_("Generate code for GNU ld") }, \
119 { "no-gnu-ld", -MASK_GNU_LD, \
120 N_("Generate code for Intel ld") }, \
121 { "no-pic", MASK_NO_PIC, \
122 N_("Generate code without GP reg") }, \
123 { "volatile-asm-stop", MASK_VOL_ASM_STOP, \
124 N_("Emit stop bits before and after volatile extended asms") }, \
125 { "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \
126 N_("Don't emit stop bits before and after volatile extended asms") }, \
127 { "b-step", MASK_B_STEP, \
128 N_("Emit code for Itanium (TM) processor B step")}, \
129 { "register-names", MASK_REG_NAMES, \
130 N_("Use in/loc/out register names")}, \
131 { "no-sdata", MASK_NO_SDATA, \
132 N_("Disable use of sdata/scommon/sbss")}, \
133 { "sdata", -MASK_NO_SDATA, \
134 N_("Enable use of sdata/scommon/sbss")}, \
135 { "constant-gp", MASK_CONST_GP, \
136 N_("gp is constant (but save/restore gp on indirect calls)") }, \
137 { "auto-pic", MASK_AUTO_PIC, \
138 N_("Generate self-relocatable code") }, \
139 { "inline-divide-min-latency", MASK_INLINE_DIV_LAT, \
140 N_("Generate inline division, optimize for latency") }, \
141 { "inline-divide-max-throughput", MASK_INLINE_DIV_THR, \
142 N_("Generate inline division, optimize for throughput") }, \
143 { "dwarf2-asm", MASK_DWARF2_ASM, \
144 N_("Enable Dwarf 2 line debug info via GNU as")}, \
145 { "no-dwarf2-asm", -MASK_DWARF2_ASM, \
146 N_("Disable Dwarf 2 line debug info via GNU as")}, \
147 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
151 /* Default target_flags if no switches are specified */
153 #ifndef TARGET_DEFAULT
154 #define TARGET_DEFAULT MASK_DWARF2_ASM
157 #ifndef TARGET_CPU_DEFAULT
158 #define TARGET_CPU_DEFAULT 0
161 /* This macro is similar to `TARGET_SWITCHES' but defines names of command
162 options that have values. Its definition is an initializer with a
163 subgrouping for each command option. */
165 extern const char *ia64_fixed_range_string;
166 #define TARGET_OPTIONS \
168 { "fixed-range=", &ia64_fixed_range_string, \
169 N_("Specify range of registers to make fixed.")}, \
172 /* This macro is a C statement to print on `stderr' a string describing the
173 particular machine description choice. */
175 #define TARGET_VERSION fprintf (stderr, " (IA-64)");
177 /* Sometimes certain combinations of command options do not make sense on a
178 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
179 take account of this. This macro, if defined, is executed once just after
180 all the command options have been parsed. */
182 #define OVERRIDE_OPTIONS ia64_override_options ()
184 /* Some machines may desire to change what optimizations are performed for
185 various optimization levels. This macro, if defined, is executed once just
186 after the optimization level is determined and before the remainder of the
187 command options have been parsed. Values set in this macro are used as the
188 default values for the other command line options. */
190 /* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
192 /* Driver configuration */
194 /* A C string constant that tells the GNU CC driver program options to pass to
195 CPP. It can also specify how to translate options you give to GNU CC into
196 options for GNU CC to pass to the CPP. */
198 /* ??? __LONG_MAX__ depends on LP64/ILP32 switch. */
199 /* ??? An alternative is to modify glimits.h to check for __LP64__ instead
200 of checked for CPU specific defines. We could also get rid of all LONG_MAX
201 defines in other tm.h files. */
203 "%{mcpu=itanium:-D__itanium__} %{mbig-endian:-D__BIG_ENDIAN__} \
204 -D__LONG_MAX__=9223372036854775807L"
206 /* If this macro is defined, the preprocessor will not define the builtin macro
207 `__SIZE_TYPE__'. The macro `__SIZE_TYPE__' must then be defined by
210 This should be defined if `SIZE_TYPE' depends on target dependent flags
211 which are not accessible to the preprocessor. Otherwise, it should not be
213 /* ??? Needs to be defined for P64 code. */
214 /* #define NO_BUILTIN_SIZE_TYPE */
216 /* If this macro is defined, the preprocessor will not define the builtin macro
217 `__PTRDIFF_TYPE__'. The macro `__PTRDIFF_TYPE__' must then be defined by
220 This should be defined if `PTRDIFF_TYPE' depends on target dependent flags
221 which are not accessible to the preprocessor. Otherwise, it should not be
223 /* ??? Needs to be defined for P64 code. */
224 /* #define NO_BUILTIN_PTRDIFF_TYPE */
226 /* A C string constant that tells the GNU CC driver program options to pass to
227 `cc1'. It can also specify how to translate options you give to GNU CC into
228 options for GNU CC to pass to the `cc1'. */
231 #define CC1_SPEC "%{G*}"
233 /* A C string constant that tells the GNU CC driver program options to pass to
234 `cc1plus'. It can also specify how to translate options you give to GNU CC
235 into options for GNU CC to pass to the `cc1plus'. */
237 /* #define CC1PLUS_SPEC "" */
239 /* A C string constant that tells the GNU CC driver program options to pass to
240 the assembler. It can also specify how to translate options you give to GNU
241 CC into options for GNU CC to pass to the assembler. */
243 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_AS) != 0
246 "%{mno-gnu-as:-N so} %{!mno-gnu-as:-x} %{mconstant-gp} %{mauto-pic}"
250 "%{!mgnu-as:-N so} %{mgnu-as:-x} %{mconstant-gp:-M const_gp}\
251 %{mauto-pic:-M no_plabel}"
254 /* A C string constant that tells the GNU CC driver program options to pass to
255 the linker. It can also specify how to translate options you give to GNU CC
256 into options for GNU CC to pass to the linker. */
258 /* The Intel linker does not support dynamic linking, so we need -dn.
259 The Intel linker gives annoying messages unless -N so is used. */
260 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_LD) != 0
262 #define LINK_SPEC "%{mno-gnu-ld:-dn -N so}"
265 #define LINK_SPEC "%{!mgnu-ld:-dn -N so}"
271 /* Define this macro to have the value 1 if the most significant bit in a byte
272 has the lowest number; otherwise define it to have the value zero. */
274 #define BITS_BIG_ENDIAN 0
276 /* Define this macro to have the value 1 if the most significant byte in a word
277 has the lowest number. This macro need not be a constant. */
279 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
281 /* Define this macro to have the value 1 if, in a multiword object, the most
282 significant word has the lowest number. */
284 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
286 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must be a
287 constant value with the same meaning as WORDS_BIG_ENDIAN, which will be used
288 only when compiling libgcc2.c. Typically the value will be set based on
289 preprocessor defines. */
290 #if defined(__BIG_ENDIAN__)
291 #define LIBGCC2_WORDS_BIG_ENDIAN 1
293 #define LIBGCC2_WORDS_BIG_ENDIAN 0
296 /* Define this macro to be the number of bits in an addressable storage unit
297 (byte); normally 8. */
298 #define BITS_PER_UNIT 8
300 /* Number of bits in a word; normally 32. */
301 #define BITS_PER_WORD 64
303 /* Number of storage units in a word; normally 4. */
304 #define UNITS_PER_WORD 8
306 /* Width of a pointer, in bits. You must specify a value no wider than the
307 width of `Pmode'. If it is not equal to the width of `Pmode', you must
308 define `POINTERS_EXTEND_UNSIGNED'. */
309 /* ??? Implement optional 32 bit pointer size later? */
310 #define POINTER_SIZE 64
312 /* A C expression whose value is nonzero if pointers that need to be extended
313 from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and zero if
314 they are zero-extended.
316 You need not define this macro if the `POINTER_SIZE' is equal to the width
318 /* ??? May need this for 32 bit pointers. */
319 /* #define POINTERS_EXTEND_UNSIGNED */
321 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
322 which has the specified mode and signedness is to be stored in a register.
323 This macro is only called when TYPE is a scalar type. */
324 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
327 if (GET_MODE_CLASS (MODE) == MODE_INT \
328 && GET_MODE_SIZE (MODE) < 4) \
333 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
334 be done for outgoing function arguments. */
335 /* ??? ABI doesn't allow us to define this. */
336 /* #define PROMOTE_FUNCTION_ARGS */
338 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
339 be done for the return value of functions.
341 If this macro is defined, `FUNCTION_VALUE' must perform the same promotions
342 done by `PROMOTE_MODE'. */
343 /* ??? ABI doesn't allow us to define this. */
344 /* #define PROMOTE_FUNCTION_RETURN */
346 /* Normal alignment required for function parameters on the stack, in bits.
347 All stack parameters receive at least this much alignment regardless of data
348 type. On most machines, this is the same as the size of an integer. */
349 #define PARM_BOUNDARY 64
351 /* Define this macro if you wish to preserve a certain alignment for the stack
352 pointer. The definition is a C expression for the desired alignment
353 (measured in bits). */
355 #define STACK_BOUNDARY 128
357 /* Align frames on double word boundaries */
358 #ifndef IA64_STACK_ALIGN
359 #define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
362 /* Alignment required for a function entry point, in bits. */
363 #define FUNCTION_BOUNDARY 128
365 /* Biggest alignment that any data type can require on this machine,
367 /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
368 128 bit integers all require 128 bit alignment. */
369 #define BIGGEST_ALIGNMENT 128
371 /* If defined, a C expression to compute the alignment for a static variable.
372 TYPE is the data type, and ALIGN is the alignment that the object
373 would ordinarily have. The value of this macro is used instead of that
374 alignment to align the object. */
376 #define DATA_ALIGNMENT(TYPE, ALIGN) \
377 (TREE_CODE (TYPE) == ARRAY_TYPE \
378 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
379 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
381 /* If defined, a C expression to compute the alignment given to a constant that
382 is being placed in memory. CONSTANT is the constant and ALIGN is the
383 alignment that the object would ordinarily have. The value of this macro is
384 used instead of that alignment to align the object. */
386 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
387 (TREE_CODE (EXP) == STRING_CST \
388 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
390 /* Define this macro to be the value 1 if instructions will fail to work if
391 given data not on the nominal alignment. If instructions will merely go
392 slower in that case, define this macro as 0. */
393 #define STRICT_ALIGNMENT 1
395 /* Define this if you wish to imitate the way many other C compilers handle
396 alignment of bitfields and the structures that contain them.
397 The behavior is that the type written for a bitfield (`int', `short', or
398 other integer type) imposes an alignment for the entire structure, as if the
399 structure really did contain an ordinary field of that type. In addition,
400 the bitfield is placed within the structure so that it would fit within such
401 a field, not crossing a boundary for it. */
402 #define PCC_BITFIELD_TYPE_MATTERS 1
404 /* An integer expression for the size in bits of the largest integer machine
405 mode that should actually be used. */
407 /* Allow pairs of registers to be used, which is the intent of the default. */
408 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
410 /* A code distinguishing the floating point format of the target machine. */
411 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
413 /* GNU CC supports two ways of implementing C++ vtables: traditional or with
414 so-called "thunks". The flag `-fvtable-thunk' chooses between them. Define
415 this macro to be a C expression for the default value of that flag. If
416 `DEFAULT_VTABLE_THUNKS' is 0, GNU CC uses the traditional implementation by
417 default. The "thunk" implementation is more efficient (especially if you
418 have provided an implementation of `ASM_OUTPUT_MI_THUNK', but is not binary
419 compatible with code compiled using the traditional implementation. If you
420 are writing a new ports, define `DEFAULT_VTABLE_THUNKS' to 1.
422 If you do not define this macro, the default for `-fvtable-thunk' is 0. */
423 #define DEFAULT_VTABLE_THUNKS 1
426 /* Layout of Source Language Data Types */
428 /* A C expression for the size in bits of the type `int' on the target machine.
429 If you don't define this, the default is one word. */
430 #define INT_TYPE_SIZE 32
432 /* A C expression for the size in bits of the type `short' on the target
433 machine. If you don't define this, the default is half a word. (If this
434 would be less than one storage unit, it is rounded up to one unit.) */
435 #define SHORT_TYPE_SIZE 16
437 /* A C expression for the size in bits of the type `long' on the target
438 machine. If you don't define this, the default is one word. */
439 /* ??? Should be 32 for ILP32 code. */
440 #define LONG_TYPE_SIZE 64
442 /* Maximum number for the size in bits of the type `long' on the target
443 machine. If this is undefined, the default is `LONG_TYPE_SIZE'. Otherwise,
444 it is the constant value that is the largest value that `LONG_TYPE_SIZE' can
445 have at run-time. This is used in `cpp'. */
446 /* ??? Should be 64 for ILP32 code. */
447 /* #define MAX_LONG_TYPE_SIZE */
449 /* A C expression for the size in bits of the type `long long' on the target
450 machine. If you don't define this, the default is two words. If you want
451 to support GNU Ada on your machine, the value of macro must be at least 64. */
452 #define LONG_LONG_TYPE_SIZE 64
454 /* A C expression for the size in bits of the type `char' on the target
455 machine. If you don't define this, the default is one quarter of a word.
456 (If this would be less than one storage unit, it is rounded up to one unit.) */
457 #define CHAR_TYPE_SIZE 8
459 /* A C expression for the size in bits of the type `float' on the target
460 machine. If you don't define this, the default is one word. */
461 #define FLOAT_TYPE_SIZE 32
463 /* A C expression for the size in bits of the type `double' on the target
464 machine. If you don't define this, the default is two words. */
465 #define DOUBLE_TYPE_SIZE 64
467 /* A C expression for the size in bits of the type `long double' on the target
468 machine. If you don't define this, the default is two words. */
469 #define LONG_DOUBLE_TYPE_SIZE 128
471 /* Tell real.c that this is the 80-bit Intel extended float format
472 packaged in a 128-bit entity. */
474 #define INTEL_EXTENDED_IEEE_FORMAT 1
476 /* An expression whose value is 1 or 0, according to whether the type `char'
477 should be signed or unsigned by default. The user can always override this
478 default with the options `-fsigned-char' and `-funsigned-char'. */
479 #define DEFAULT_SIGNED_CHAR 1
481 /* A C expression for a string describing the name of the data type to use for
482 size values. The typedef name `size_t' is defined using the contents of the
484 /* ??? Needs to be defined for P64 code. */
485 /* #define SIZE_TYPE */
487 /* A C expression for a string describing the name of the data type to use for
488 the result of subtracting two pointers. The typedef name `ptrdiff_t' is
489 defined using the contents of the string. See `SIZE_TYPE' above for more
491 /* ??? Needs to be defined for P64 code. */
492 /* #define PTRDIFF_TYPE */
494 /* A C expression for a string describing the name of the data type to use for
495 wide characters. The typedef name `wchar_t' is defined using the contents
496 of the string. See `SIZE_TYPE' above for more information. */
497 /* #define WCHAR_TYPE */
499 /* A C expression for the size in bits of the data type for wide characters.
500 This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
501 /* #define WCHAR_TYPE_SIZE */
503 /* Maximum number for the size in bits of the data type for wide characters.
504 If this is undefined, the default is `WCHAR_TYPE_SIZE'. Otherwise, it is
505 the constant value that is the largest value that `WCHAR_TYPE_SIZE' can have
506 at run-time. This is used in `cpp'. */
507 /* #define MAX_WCHAR_TYPE_SIZE */
510 /* Register Basics */
512 /* Number of hardware registers known to the compiler.
513 We have 128 general registers, 128 floating point registers,
514 64 predicate registers, 8 branch registers, one frame pointer,
515 and several "application" registers. */
517 #define FIRST_PSEUDO_REGISTER 335
519 /* Ranges for the various kinds of registers. */
520 #define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
521 #define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
522 #define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
523 #define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
524 #define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
525 #define GENERAL_REGNO_P(REGNO) \
526 (GR_REGNO_P (REGNO) \
527 || (REGNO) == FRAME_POINTER_REGNUM \
528 || (REGNO) == RETURN_ADDRESS_POINTER_REGNUM)
530 #define GR_REG(REGNO) ((REGNO) + 0)
531 #define FR_REG(REGNO) ((REGNO) + 128)
532 #define PR_REG(REGNO) ((REGNO) + 256)
533 #define BR_REG(REGNO) ((REGNO) + 320)
534 #define OUT_REG(REGNO) ((REGNO) + 120)
535 #define IN_REG(REGNO) ((REGNO) + 112)
536 #define LOC_REG(REGNO) ((REGNO) + 32)
538 #define AR_CCV_REGNUM 330
539 #define AR_UNAT_REGNUM 331
540 #define AR_PFS_REGNUM 332
541 #define AR_LC_REGNUM 333
542 #define AR_EC_REGNUM 334
544 #define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
545 #define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
546 #define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
548 #define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \
549 || (REGNO) == AR_UNAT_REGNUM)
550 #define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \
551 && (REGNO) < FIRST_PSEUDO_REGISTER)
552 #define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \
553 && (REGNO) < FIRST_PSEUDO_REGISTER)
556 /* ??? Don't really need two sets of macros. I like this one better because
557 it is less typing. */
558 #define R_GR(REGNO) GR_REG (REGNO)
559 #define R_FR(REGNO) FR_REG (REGNO)
560 #define R_PR(REGNO) PR_REG (REGNO)
561 #define R_BR(REGNO) BR_REG (REGNO)
563 /* An initializer that says which registers are used for fixed purposes all
564 throughout the compiled code and are therefore not available for general
568 r1: global pointer (gp)
569 r12: stack pointer (sp)
570 r13: thread pointer (tp)
574 fp: eliminable frame pointer */
576 /* The last 16 stacked regs are reserved for the 8 input and 8 output
579 #define FIXED_REGISTERS \
580 { /* General registers. */ \
581 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
582 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
583 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
584 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
585 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
586 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
587 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
588 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
589 /* Floating-point registers. */ \
590 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
591 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
592 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
593 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
594 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
595 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
596 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
597 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
598 /* Predicate registers. */ \
599 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
600 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
601 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
602 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
603 /* Branch registers. */ \
604 0, 0, 0, 0, 0, 0, 0, 0, \
605 /*FP RA CCV UNAT PFS LC EC */ \
606 1, 1, 1, 1, 1, 0, 1 \
609 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
610 (in general) by function calls as well as for fixed registers. This
611 macro therefore identifies the registers that are not available for
612 general allocation of values that must live across function calls. */
614 #define CALL_USED_REGISTERS \
615 { /* General registers. */ \
616 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
617 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
618 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
619 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
620 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
621 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
622 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
623 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
624 /* Floating-point registers. */ \
625 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
626 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
627 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
628 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
629 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
630 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
631 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
632 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
633 /* Predicate registers. */ \
634 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
635 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
636 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
637 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
638 /* Branch registers. */ \
639 1, 0, 0, 0, 0, 0, 1, 1, \
640 /*FP RA CCV UNAT PFS LC EC */ \
641 1, 1, 1, 1, 1, 0, 1 \
644 /* Define this macro if the target machine has register windows. This C
645 expression returns the register number as seen by the called function
646 corresponding to the register number OUT as seen by the calling function.
647 Return OUT if register number OUT is not an outbound register. */
649 #define INCOMING_REGNO(OUT) \
650 ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
652 /* Define this macro if the target machine has register windows. This C
653 expression returns the register number as seen by the calling function
654 corresponding to the register number IN as seen by the called function.
655 Return IN if register number IN is not an inbound register. */
657 #define OUTGOING_REGNO(IN) \
658 ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
660 /* Define this macro if the target machine has register windows. This
661 C expression returns true if the register is call-saved but is in the
664 #define LOCAL_REGNO(REGNO) \
665 (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
667 /* Add any extra modes needed to represent the condition code.
669 CCImode is used to mark a single predicate register instead
670 of a register pair. This is currently only used in reg_raw_mode
671 so that flow doesn't do something stupid. */
673 #define EXTRA_CC_MODES CC(CCImode, "CCI")
675 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
676 return the mode to be used for the comparison. Must be defined if
677 EXTRA_CC_MODES is defined. */
679 #define SELECT_CC_MODE(OP,X,Y) CCmode
681 /* Order of allocation of registers */
683 /* If defined, an initializer for a vector of integers, containing the numbers
684 of hard registers in the order in which GNU CC should prefer to use them
685 (from most preferred to least).
687 If this macro is not defined, registers are used lowest numbered first (all
690 One use of this macro is on machines where the highest numbered registers
691 must always be saved and the save-multiple-registers instruction supports
692 only sequences of consecutive registers. On such machines, define
693 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
694 allocatable register first. */
696 /* ??? Should the GR return value registers come before or after the rest
697 of the caller-save GRs? */
699 #define REG_ALLOC_ORDER \
701 /* Caller-saved general registers. */ \
702 R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
703 R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
704 R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
705 R_GR (30), R_GR (31), \
706 /* Output registers. */ \
707 R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
708 R_GR (126), R_GR (127), \
709 /* Caller-saved general registers, also used for return values. */ \
710 R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
711 /* addl caller-saved general registers. */ \
712 R_GR (2), R_GR (3), \
713 /* Caller-saved FP registers. */ \
714 R_FR (6), R_FR (7), \
715 /* Caller-saved FP registers, used for parameters and return values. */ \
716 R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
717 R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
718 /* Rotating caller-saved FP registers. */ \
719 R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
720 R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
721 R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
722 R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
723 R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
724 R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
725 R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
726 R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
727 R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
728 R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
729 R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
730 R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
731 R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
732 R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
733 R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
734 R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
735 R_FR (126), R_FR (127), \
736 /* Caller-saved predicate registers. */ \
737 R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
738 R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
739 /* Rotating caller-saved predicate registers. */ \
740 R_PR (16), R_PR (17), \
741 R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
742 R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
743 R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
744 R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
745 R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
746 R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
747 R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
748 R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
749 /* Caller-saved branch registers. */ \
750 R_BR (6), R_BR (7), \
752 /* Stacked callee-saved general registers. */ \
753 R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
754 R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
755 R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
756 R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
757 R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
758 R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
759 R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
760 R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
761 R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
762 R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
763 R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
764 R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
765 R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
767 /* Input registers. */ \
768 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
769 R_GR (118), R_GR (119), \
770 /* Callee-saved general registers. */ \
771 R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
772 /* Callee-saved FP registers. */ \
773 R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
774 R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
775 R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
776 R_FR (30), R_FR (31), \
777 /* Callee-saved predicate registers. */ \
778 R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
779 /* Callee-saved branch registers. */ \
780 R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
782 /* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
783 R_GR (109), R_GR (110), R_GR (111), \
785 /* Special general registers. */ \
786 R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
787 /* Special FP registers. */ \
788 R_FR (0), R_FR (1), \
789 /* Special predicate registers. */ \
791 /* Special branch registers. */ \
793 /* Other fixed registers. */ \
794 FRAME_POINTER_REGNUM, RETURN_ADDRESS_POINTER_REGNUM, \
795 AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
799 /* How Values Fit in Registers */
801 /* A C expression for the number of consecutive hard registers, starting at
802 register number REGNO, required to hold a value of mode MODE. */
804 /* ??? We say that BImode PR values require two registers. This allows us to
805 easily store the normal and inverted values. We use CCImode to indicate
806 a single predicate register. */
808 #define HARD_REGNO_NREGS(REGNO, MODE) \
809 ((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
810 : PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \
811 : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
812 : FR_REGNO_P (REGNO) && (MODE) == TFmode && INTEL_EXTENDED_IEEE_FORMAT ? 1 \
813 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
815 /* A C expression that is nonzero if it is permissible to store a value of mode
816 MODE in hard register number REGNO (or in several registers starting with
819 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
820 (FR_REGNO_P (REGNO) ? \
821 GET_MODE_CLASS (MODE) != MODE_CC && \
822 (MODE) != TImode && \
823 (MODE) != BImode && \
824 ((MODE) != TFmode || INTEL_EXTENDED_IEEE_FORMAT) \
825 : PR_REGNO_P (REGNO) ? \
826 (MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
827 : GR_REGNO_P (REGNO) ? (MODE) != CCImode && (MODE) != TFmode \
828 : AR_REGNO_P (REGNO) ? (MODE) == DImode \
829 : BR_REGNO_P (REGNO) ? (MODE) == DImode \
832 /* A C expression that is nonzero if it is desirable to choose register
833 allocation so as to avoid move instructions between a value of mode MODE1
834 and a value of mode MODE2.
836 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
837 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
839 /* Don't tie integer and FP modes, as that causes us to get integer registers
840 allocated for FP instructions. TFmode only supported in FP registers so
841 we can't tie it with any other modes. */
842 #define MODES_TIEABLE_P(MODE1, MODE2) \
843 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
844 && (((MODE1) == TFmode) == ((MODE2) == TFmode)) \
845 && (((MODE1) == BImode) == ((MODE2) == BImode)))
847 /* Handling Leaf Functions */
849 /* A C initializer for a vector, indexed by hard register number, which
850 contains 1 for a register that is allowable in a candidate for leaf function
852 /* ??? This might be useful. */
853 /* #define LEAF_REGISTERS */
855 /* A C expression whose value is the register number to which REGNO should be
856 renumbered, when a function is treated as a leaf function. */
857 /* ??? This might be useful. */
858 /* #define LEAF_REG_REMAP(REGNO) */
861 /* Register Classes */
863 /* An enumeral type that must be defined with all the register class names as
864 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
865 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
866 which is not a register class but rather tells how many classes there
868 /* ??? When compiling without optimization, it is possible for the only use of
869 a pseudo to be a parameter load from the stack with a REG_EQUIV note.
870 Regclass handles this case specially and does not assign any costs to the
871 pseudo. The pseudo then ends up using the last class before ALL_REGS.
872 Thus we must not let either PR_REGS or BR_REGS be the last class. The
873 testcase for this is gcc.c-torture/execute/va-arg-7.c. */
889 #define GENERAL_REGS GR_REGS
891 /* The number of distinct register classes. */
892 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
894 /* An initializer containing the names of the register classes as C string
895 constants. These names are used in writing some of the debugging dumps. */
896 #define REG_CLASS_NAMES \
897 { "NO_REGS", "PR_REGS", "BR_REGS", "ADDL_REGS", "GR_REGS", "FR_REGS", \
898 "GR_AND_FR_REGS", "AR_M_REGS", "AR_I_REGS", "ALL_REGS" }
900 /* An initializer containing the contents of the register classes, as integers
901 which are bit masks. The Nth integer specifies the contents of class N.
902 The way the integer MASK is interpreted is that register R is in the class
903 if `MASK & (1 << R)' is 1. */
904 #define REG_CLASS_CONTENTS \
907 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
908 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
909 0x00000000, 0x00000000, 0x0000 }, \
911 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
912 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
913 0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \
915 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
916 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
917 0x00000000, 0x00000000, 0x00FF }, \
919 { 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
920 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
921 0x00000000, 0x00000000, 0x0000 }, \
923 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
924 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
925 0x00000000, 0x00000000, 0x0300 }, \
927 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
928 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
929 0x00000000, 0x00000000, 0x0000 }, \
930 /* GR_AND_FR_REGS. */ \
931 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
932 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
933 0x00000000, 0x00000000, 0x0300 }, \
935 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
936 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
937 0x00000000, 0x00000000, 0x0C00 }, \
939 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
940 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
941 0x00000000, 0x00000000, 0x7000 }, \
943 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
944 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
945 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFF }, \
948 /* A C expression whose value is a register class containing hard register
949 REGNO. In general there is more than one such class; choose a class which
950 is "minimal", meaning that no smaller class also contains the register. */
951 /* The NO_REGS case is primarily for the benefit of rws_access_reg, which
952 may call here with private (invalid) register numbers, such as
954 #define REGNO_REG_CLASS(REGNO) \
955 (ADDL_REGNO_P (REGNO) ? ADDL_REGS \
956 : GENERAL_REGNO_P (REGNO) ? GR_REGS \
957 : FR_REGNO_P (REGNO) ? FR_REGS \
958 : PR_REGNO_P (REGNO) ? PR_REGS \
959 : BR_REGNO_P (REGNO) ? BR_REGS \
960 : AR_M_REGNO_P (REGNO) ? AR_M_REGS \
961 : AR_I_REGNO_P (REGNO) ? AR_I_REGS \
964 /* A macro whose definition is the name of the class to which a valid base
965 register must belong. A base register is one used in an address which is
966 the register value plus a displacement. */
967 #define BASE_REG_CLASS GENERAL_REGS
969 /* A macro whose definition is the name of the class to which a valid index
970 register must belong. An index register is one used in an address where its
971 value is either multiplied by a scale factor or added to another register
972 (as well as added to a displacement). This is needed for POST_MODIFY. */
973 #define INDEX_REG_CLASS GENERAL_REGS
975 /* A C expression which defines the machine-dependent operand constraint
976 letters for register classes. If CHAR is such a letter, the value should be
977 the register class corresponding to it. Otherwise, the value should be
978 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
979 will not be passed to this macro; you do not need to handle it. */
981 #define REG_CLASS_FROM_LETTER(CHAR) \
982 ((CHAR) == 'f' ? FR_REGS \
983 : (CHAR) == 'a' ? ADDL_REGS \
984 : (CHAR) == 'b' ? BR_REGS \
985 : (CHAR) == 'c' ? PR_REGS \
986 : (CHAR) == 'd' ? AR_M_REGS \
987 : (CHAR) == 'e' ? AR_I_REGS \
990 /* A C expression which is nonzero if register number NUM is suitable for use
991 as a base register in operand addresses. It may be either a suitable hard
992 register or a pseudo register that has been allocated such a hard reg. */
993 #define REGNO_OK_FOR_BASE_P(REGNO) \
994 (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
996 /* A C expression which is nonzero if register number NUM is suitable for use
997 as an index register in operand addresses. It may be either a suitable hard
998 register or a pseudo register that has been allocated such a hard reg.
999 This is needed for POST_MODIFY. */
1000 #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
1002 /* A C expression that places additional restrictions on the register class to
1003 use when it is necessary to copy value X into a register in class CLASS.
1004 The value is a register class; perhaps CLASS, or perhaps another, smaller
1007 /* Don't allow volatile mem reloads into floating point registers. This
1008 is defined to force reload to choose the r/m case instead of the f/f case
1009 when reloading (set (reg fX) (mem/v)).
1011 Do not reload expressions into AR regs. */
1013 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
1014 (CLASS == FR_REGS && GET_CODE (X) == MEM && MEM_VOLATILE_P (X) ? NO_REGS \
1015 : CLASS == FR_REGS && GET_CODE (X) == CONST_DOUBLE ? NO_REGS \
1016 : GET_RTX_CLASS (GET_CODE (X)) != 'o' && CLASS > GR_AND_FR_REGS ? NO_REGS \
1019 /* You should define this macro to indicate to the reload phase that it may
1020 need to allocate at least one register for a reload in addition to the
1021 register to contain the data. Specifically, if copying X to a register
1022 CLASS in MODE requires an intermediate register, you should define this
1023 to return the largest register class all of whose registers can be used
1024 as intermediate registers or scratch registers. */
1026 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
1027 ia64_secondary_reload_class (CLASS, MODE, X)
1029 /* Certain machines have the property that some registers cannot be copied to
1030 some other registers without using memory. Define this macro on those
1031 machines to be a C expression that is non-zero if objects of mode M in
1032 registers of CLASS1 can only be copied to registers of class CLASS2 by
1033 storing a register of CLASS1 into memory and loading that memory location
1034 into a register of CLASS2. */
1037 /* ??? May need this, but since we've disallowed TFmode in GR_REGS,
1038 I'm not quite sure how it could be invoked. The normal problems
1039 with unions should be solved with the addressof fiddling done by
1040 movtf and friends. */
1041 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1042 ((MODE) == TFmode && (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \
1043 || ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS)))
1046 /* A C expression for the maximum number of consecutive registers of
1047 class CLASS needed to hold a value of mode MODE.
1048 This is closely related to the macro `HARD_REGNO_NREGS'. */
1050 #define CLASS_MAX_NREGS(CLASS, MODE) \
1051 ((MODE) == BImode && (CLASS) == PR_REGS ? 2 \
1052 : ((CLASS) == FR_REGS && (MODE) == TFmode) ? 1 \
1053 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1055 /* If defined, gives a class of registers that cannot be used as the
1056 operand of a SUBREG that changes the mode of the object illegally. */
1058 #define CLASS_CANNOT_CHANGE_MODE FR_REGS
1060 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE.
1061 In FP regs, we can't change FP values to integer values and vice
1062 versa, but we can change e.g. DImode to SImode. */
1064 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
1065 (GET_MODE_CLASS (FROM) != GET_MODE_CLASS (TO))
1067 /* A C expression that defines the machine-dependent operand constraint
1068 letters (`I', `J', `K', .. 'P') that specify particular ranges of
1071 /* 14 bit signed immediate for arithmetic instructions. */
1072 #define CONST_OK_FOR_I(VALUE) \
1073 ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
1074 /* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */
1075 #define CONST_OK_FOR_J(VALUE) \
1076 ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
1077 /* 8 bit signed immediate for logical instructions. */
1078 #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
1079 /* 8 bit adjusted signed immediate for compare pseudo-ops. */
1080 #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
1081 /* 6 bit unsigned immediate for shift counts. */
1082 #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
1083 /* 9 bit signed immediate for load/store post-increments. */
1084 #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
1085 /* 0 for r0. Used by Linux kernel, do not change. */
1086 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1087 /* 0 or -1 for dep instruction. */
1088 #define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1)
1090 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1091 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \
1092 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
1093 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
1094 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
1095 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
1096 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
1097 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
1098 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
1101 /* A C expression that defines the machine-dependent operand constraint letters
1102 (`G', `H') that specify particular ranges of `const_double' values. */
1104 /* 0.0 and 1.0 for fr0 and fr1. */
1105 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1106 ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
1107 || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))
1109 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1110 ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0)
1112 /* A C expression that defines the optional machine-dependent constraint
1113 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1114 types of operands, usually memory references, for the target machine. */
1116 /* Non-volatile memory for FP_REG loads/stores. */
1117 #define CONSTRAINT_OK_FOR_Q(VALUE) \
1118 (memory_operand((VALUE), VOIDmode) && ! MEM_VOLATILE_P (VALUE))
1119 /* 1..4 for shladd arguments. */
1120 #define CONSTRAINT_OK_FOR_R(VALUE) \
1121 (GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4)
1122 /* Non-post-inc memory for asms and other unsavory creatures. */
1123 #define CONSTRAINT_OK_FOR_S(VALUE) \
1124 (GET_CODE (VALUE) == MEM \
1125 && GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \
1126 && (reload_in_progress || memory_operand ((VALUE), VOIDmode)))
1128 #define EXTRA_CONSTRAINT(VALUE, C) \
1129 ((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) \
1130 : (C) == 'R' ? CONSTRAINT_OK_FOR_R (VALUE) \
1131 : (C) == 'S' ? CONSTRAINT_OK_FOR_S (VALUE) \
1134 /* Basic Stack Layout */
1136 /* Define this macro if pushing a word onto the stack moves the stack pointer
1137 to a smaller address. */
1138 #define STACK_GROWS_DOWNWARD 1
1140 /* Define this macro if the addresses of local variable slots are at negative
1141 offsets from the frame pointer. */
1142 /* #define FRAME_GROWS_DOWNWARD */
1144 /* Offset from the frame pointer to the first local variable slot to
1146 #define STARTING_FRAME_OFFSET 0
1148 /* Offset from the stack pointer register to the first location at which
1149 outgoing arguments are placed. If not specified, the default value of zero
1150 is used. This is the proper value for most machines. */
1151 /* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
1152 #define STACK_POINTER_OFFSET 16
1154 /* Offset from the argument pointer register to the first argument's address.
1155 On some machines it may depend on the data type of the function. */
1156 #define FIRST_PARM_OFFSET(FUNDECL) 0
1158 /* A C expression whose value is RTL representing the value of the return
1159 address for the frame COUNT steps up from the current frame, after the
1162 /* ??? Frames other than zero would likely require interpreting the frame
1163 unwind info, so we don't try to support them. We would also need to define
1164 DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
1166 #define RETURN_ADDR_RTX(COUNT, FRAME) \
1167 ((COUNT) == 0 ? return_address_pointer_rtx : const0_rtx)
1169 /* A C expression whose value is RTL representing the location of the incoming
1170 return address at the beginning of any function, before the prologue. This
1171 RTL is either a `REG', indicating that the return value is saved in `REG',
1172 or a `MEM' representing a location in the stack. This enables DWARF2
1173 unwind info for C++ EH. */
1174 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
1176 /* ??? This is not defined because of three problems.
1177 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte.
1178 The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be
1179 worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise
1180 unused register number.
1181 2) dwarf2out_frame_debug core dumps while processing prologue insns. We
1182 need to refine which insns have RTX_FRAME_RELATED_P set and which don't.
1183 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO
1184 to zero, despite what the documentation implies, because it is tested in
1185 a few places with #ifdef instead of #if. */
1186 #undef INCOMING_RETURN_ADDR_RTX
1188 /* A C expression whose value is an integer giving the offset, in bytes, from
1189 the value of the stack pointer register to the top of the stack frame at the
1190 beginning of any function, before the prologue. The top of the frame is
1191 defined to be the value of the stack pointer in the previous frame, just
1192 before the call instruction. */
1193 #define INCOMING_FRAME_SP_OFFSET 0
1196 /* Register That Address the Stack Frame. */
1198 /* The register number of the stack pointer register, which must also be a
1199 fixed register according to `FIXED_REGISTERS'. On most machines, the
1200 hardware determines which register this is. */
1202 #define STACK_POINTER_REGNUM 12
1204 /* The register number of the frame pointer register, which is used to access
1205 automatic variables in the stack frame. On some machines, the hardware
1206 determines which register this is. On other machines, you can choose any
1207 register you wish for this purpose. */
1209 #define FRAME_POINTER_REGNUM 328
1211 /* Base register for access to local variables of the function. */
1212 #define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
1214 /* The register number of the arg pointer register, which is used to access the
1215 function's argument list. */
1216 /* r0 won't otherwise be used, so put the always eliminated argument pointer
1218 #define ARG_POINTER_REGNUM R_GR(0)
1220 /* The register number for the return address register. For IA-64, this
1221 is not actually a pointer as the name suggests, but that's a name that
1222 gen_rtx_REG already takes care to keep unique. We modify
1223 return_address_pointer_rtx in ia64_expand_prologue to reference the
1224 final output regnum. */
1225 #define RETURN_ADDRESS_POINTER_REGNUM 329
1227 /* Register numbers used for passing a function's static chain pointer. */
1228 /* ??? The ABI sez the static chain should be passed as a normal parameter. */
1229 #define STATIC_CHAIN_REGNUM 15
1231 /* Eliminating the Frame Pointer and the Arg Pointer */
1233 /* A C expression which is nonzero if a function must have and use a frame
1234 pointer. This expression is evaluated in the reload pass. If its value is
1235 nonzero the function will have a frame pointer. */
1236 #define FRAME_POINTER_REQUIRED 0
1238 /* Show we can debug even without a frame pointer. */
1239 #define CAN_DEBUG_WITHOUT_FP
1241 /* If defined, this macro specifies a table of register pairs used to eliminate
1242 unneeded registers that point into the stack frame. */
1244 #define ELIMINABLE_REGS \
1246 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1247 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1248 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1249 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1250 {RETURN_ADDRESS_POINTER_REGNUM, BR_REG (0)}, \
1253 /* A C expression that returns non-zero if the compiler is allowed to try to
1254 replace register number FROM with register number TO. The frame pointer
1255 is automatically handled. */
1257 #define CAN_ELIMINATE(FROM, TO) \
1258 (TO == BR_REG (0) ? current_function_is_leaf : 1)
1260 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1261 specifies the initial difference between the specified pair of
1262 registers. This macro must be defined if `ELIMINABLE_REGS' is
1264 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1265 ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
1267 /* Passing Function Arguments on the Stack */
1269 /* Define this macro if an argument declared in a prototype as an integral type
1270 smaller than `int' should actually be passed as an `int'. In addition to
1271 avoiding errors in certain cases of mismatch, it also makes for better code
1272 on certain machines. */
1273 /* ??? Investigate. */
1274 /* #define PROMOTE_PROTOTYPES */
1276 /* If defined, the maximum amount of space required for outgoing arguments will
1277 be computed and placed into the variable
1278 `current_function_outgoing_args_size'. */
1280 #define ACCUMULATE_OUTGOING_ARGS 1
1282 /* A C expression that should indicate the number of bytes of its own arguments
1283 that a function pops on returning, or 0 if the function pops no arguments
1284 and the caller must therefore pop them all after the function returns. */
1286 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
1289 /* Function Arguments in Registers */
1291 #define MAX_ARGUMENT_SLOTS 8
1292 #define MAX_INT_RETURN_SLOTS 4
1293 #define GR_ARG_FIRST IN_REG (0)
1294 #define GR_RET_FIRST GR_REG (8)
1295 #define GR_RET_LAST GR_REG (11)
1296 #define FR_ARG_FIRST FR_REG (8)
1297 #define FR_RET_FIRST FR_REG (8)
1298 #define FR_RET_LAST FR_REG (15)
1299 #define AR_ARG_FIRST OUT_REG (0)
1301 /* A C expression that controls whether a function argument is passed in a
1302 register, and which register. */
1304 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1305 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
1307 /* Define this macro if the target machine has "register windows", so that the
1308 register in which a function sees an arguments is not necessarily the same
1309 as the one in which the caller passed the argument. */
1311 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1312 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
1314 /* A C expression for the number of words, at the beginning of an argument,
1315 must be put in registers. The value must be zero for arguments that are
1316 passed entirely in registers or that are entirely pushed on the stack. */
1318 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1319 ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1321 /* A C expression that indicates when an argument must be passed by reference.
1322 If nonzero for an argument, a copy of that argument is made in memory and a
1323 pointer to the argument is passed instead of the argument itself. The
1324 pointer is passed in whatever way is appropriate for passing a pointer to
1327 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0
1329 /* A C type for declaring a variable that is used as the first argument of
1330 `FUNCTION_ARG' and other related values. For some target machines, the type
1331 `int' suffices and can hold the number of bytes of argument so far. */
1333 typedef struct ia64_args
1335 int words; /* # words of arguments so far */
1336 int fp_regs; /* # FR registers used so far */
1337 int prototype; /* whether function prototyped */
1340 /* A C statement (sans semicolon) for initializing the variable CUM for the
1341 state at the beginning of the argument list. */
1343 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
1346 (CUM).fp_regs = 0; \
1347 (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
1350 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1351 arguments for the function being compiled. If this macro is undefined,
1352 `INIT_CUMULATIVE_ARGS' is used instead. */
1354 /* We set prototype to true so that we never try to return a PARALLEL from
1356 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1359 (CUM).fp_regs = 0; \
1360 (CUM).prototype = 1; \
1363 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1364 advance past an argument in the argument list. The values MODE, TYPE and
1365 NAMED describe that argument. Once this is done, the variable CUM is
1366 suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
1368 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1369 ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1371 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1372 argument with the specified mode and type. */
1374 /* Arguments with alignment larger than 8 bytes start at the next even
1375 boundary. See ia64_function_arg. */
1377 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1378 (((TYPE) ? (TYPE_ALIGN (TYPE) > 8 * BITS_PER_UNIT) \
1379 : (((((MODE) == BLKmode \
1380 ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1381 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) > 1)) \
1382 ? 128 : PARM_BOUNDARY)
1384 /* A C expression that is nonzero if REGNO is the number of a hard register in
1385 which function arguments are sometimes passed. This does *not* include
1386 implicit arguments such as the static chain and the structure-value address.
1387 On many machines, no registers can be used for this purpose since all
1388 function arguments are pushed on the stack. */
1389 #define FUNCTION_ARG_REGNO_P(REGNO) \
1390 (((REGNO) >= GR_ARG_FIRST && (REGNO) < (GR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
1391 || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
1393 /* Implement `va_start' for varargs and stdarg. */
1394 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1395 ia64_va_start (stdarg, valist, nextarg)
1397 /* Implement `va_arg'. */
1398 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1399 ia64_va_arg (valist, type)
1401 /* How Scalar Function Values are Returned */
1403 /* A C expression to create an RTX representing the place where a function
1404 returns a value of data type VALTYPE. */
1406 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1407 ia64_function_value (VALTYPE, FUNC)
1409 /* A C expression to create an RTX representing the place where a library
1410 function returns a value of mode MODE. */
1412 #define LIBCALL_VALUE(MODE) \
1413 gen_rtx_REG (MODE, \
1414 (((GET_MODE_CLASS (MODE) == MODE_FLOAT \
1415 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) && \
1416 ((MODE) != TFmode || INTEL_EXTENDED_IEEE_FORMAT)) \
1417 ? FR_RET_FIRST : GR_RET_FIRST))
1419 /* A C expression that is nonzero if REGNO is the number of a hard register in
1420 which the values of called function may come back. */
1422 #define FUNCTION_VALUE_REGNO_P(REGNO) \
1423 (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
1424 || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
1427 /* How Large Values are Returned */
1429 /* A nonzero value says to return the function value in memory, just as large
1430 structures are always returned. */
1432 #define RETURN_IN_MEMORY(TYPE) \
1433 ia64_return_in_memory (TYPE)
1435 /* If you define this macro to be 0, then the conventions used for structure
1436 and union return values are decided by the `RETURN_IN_MEMORY' macro. */
1438 #define DEFAULT_PCC_STRUCT_RETURN 0
1440 /* If the structure value address is passed in a register, then
1441 `STRUCT_VALUE_REGNUM' should be the number of that register. */
1443 #define STRUCT_VALUE_REGNUM GR_REG (8)
1446 /* Caller-Saves Register Allocation */
1448 /* A C expression to determine whether it is worthwhile to consider placing a
1449 pseudo-register in a call-clobbered hard register and saving and restoring
1450 it around each function call. The expression should be 1 when this is worth
1451 doing, and 0 otherwise.
1453 If you don't define this macro, a default is used which is good on most
1454 machines: `4 * CALLS < REFS'. */
1455 /* ??? Investigate. */
1456 /* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
1459 /* Function Entry and Exit */
1461 /* Define this macro as a C expression that is nonzero if the return
1462 instruction or the function epilogue ignores the value of the stack pointer;
1463 in other words, if it is safe to delete an instruction to adjust the stack
1464 pointer before a return from the function. */
1466 #define EXIT_IGNORE_STACK 1
1468 /* Define this macro as a C expression that is nonzero for registers
1469 used by the epilogue or the `return' pattern. */
1471 #define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
1473 /* Output at beginning of assembler file. */
1475 #define ASM_FILE_START(FILE) \
1476 emit_safe_across_calls (FILE)
1478 /* A C compound statement that outputs the assembler code for a thunk function,
1479 used to implement C++ virtual function calls with multiple inheritance. */
1481 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1483 if (CONST_OK_FOR_I (DELTA)) \
1484 fprintf (FILE, "\tadds r32 = %d, r32\n", (DELTA)); \
1487 if (CONST_OK_FOR_J (DELTA)) \
1488 fprintf (FILE, "\taddl r2 = %d, r0\n", (DELTA)); \
1490 fprintf (FILE, "\tmovl r2 = %d\n", (DELTA)); \
1491 fprintf (FILE, "\t;;\n"); \
1492 fprintf (FILE, "\tadd r32 = r2, r32\n"); \
1494 fprintf (FILE, "\tbr "); \
1495 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
1496 fprintf (FILE, "\n"); \
1500 /* Generating Code for Profiling. */
1502 /* A C statement or compound statement to output to FILE some assembler code to
1503 call the profiling subroutine `mcount'. */
1505 /* ??? Unclear if this will actually work. No way to test this currently. */
1507 #define FUNCTION_PROFILER(FILE, LABELNO) \
1510 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", LABELNO); \
1511 fputs ("\taddl r16 = @ltoff(", FILE); \
1512 assemble_name (FILE, buf); \
1513 fputs ("), gp\n", FILE); \
1514 fputs ("\tmov r17 = r1;;\n", FILE); \
1515 fputs ("\tld8 out0 = [r16]\n", FILE); \
1516 fputs ("\tmov r18 = b0\n", FILE); \
1517 fputs ("\tbr.call.sptk.many rp = mcount;;\n", FILE); \
1518 fputs ("\tmov b0 = r18\n", FILE); \
1519 fputs ("\tmov r1 = r17;;\n", FILE); \
1522 /* A C statement or compound statement to output to FILE some assembler code to
1523 initialize basic-block profiling for the current object module. */
1525 /* ??? Unclear if this will actually work. No way to test this currently. */
1527 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1529 int labelno = LABELNO; \
1530 switch (profile_block_flag) \
1533 fputs ("\taddl r16 = @ltoff(LPBX0), gp\n", FILE); \
1534 fprintf (FILE, "\tmov out1 = %d;;\n", labelno); \
1535 fputs ("\tld8 out0 = [r16]\n", FILE); \
1536 fputs ("\tmov r17 = r1\n", FILE); \
1537 fputs ("\tmov r18 = b0\n", FILE); \
1538 fputs ("\tbr.call.sptk.many rp = __bb_init_trace_func;;\n", FILE);\
1539 fputs ("\tmov r1 = r17\n", FILE); \
1540 fputs ("\tmov b0 = r18;;\n", FILE); \
1543 fputs ("\taddl r16 = @ltoff(LPBX0), gp;;\n", FILE); \
1544 fputs ("\tld8 out0 = [r16];;\n", FILE); \
1545 fputs ("\tld8 r17 = [out0];;\n", FILE); \
1546 fputs ("\tcmp.eq p6, p0 = r0, r17;;\n", FILE); \
1547 fputs ("(p6)\tmov r16 = r1\n", FILE); \
1548 fputs ("(p6)\tmov r17 = b0\n", FILE); \
1549 fputs ("(p6)\tbr.call.sptk.many rp = __bb_init_func;;\n", FILE); \
1550 fputs ("(p6)\tmov r1 = r16\n", FILE); \
1551 fputs ("(p6)\tmov b0 = r17;;\n", FILE); \
1556 /* A C statement or compound statement to output to FILE some assembler code to
1557 increment the count associated with the basic block number BLOCKNO. */
1559 /* ??? This can't work unless we mark some registers as fixed, so that we
1560 can use them as temporaries in this macro. We need two registers for -a
1561 profiling and 4 registers for -ax profiling. */
1563 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1565 int blockn = BLOCKNO; \
1566 switch (profile_block_flag) \
1569 fputs ("\taddl r2 = @ltoff(__bb), gp\n", FILE); \
1570 fputs ("\taddl r3 = @ltoff(LPBX0), gp;;\n", FILE); \
1571 fprintf (FILE, "\tmov r9 = %d\n", blockn); \
1572 fputs ("\tld8 r2 = [r2]\n", FILE); \
1573 fputs ("\tld8 r3 = [r3];;\n", FILE); \
1574 fputs ("\tadd r8 = 8, r2\n", FILE); \
1575 fputs ("\tst8 [r2] = r9;;\n", FILE); \
1576 fputs ("\tst8 [r8] = r3\n", FILE); \
1577 fputs ("\tbr.call.sptk.many rp = __bb_trace_func\n", FILE); \
1581 fputs ("\taddl r2 = @ltoff(LPBX2), gp;;\n", FILE); \
1582 fputs ("\tld8 r2 = [r2];;\n", FILE); \
1583 fprintf (FILE, "\taddl r2 = %d, r2;;\n", 8 * blockn); \
1584 fputs ("\tld8 r3 = [r2];;\n", FILE); \
1585 fputs ("\tadd r3 = 1, r3;;\n", FILE); \
1586 fputs ("\tst8 [r2] = r3;;\n", FILE); \
1591 /* A C statement or compound statement to output to FILE assembler
1592 code to call function `__bb_trace_ret'. */
1594 /* ??? Unclear if this will actually work. No way to test this currently. */
1596 /* ??? This needs to be emitted into the epilogue. Perhaps rewrite to emit
1597 rtl and call from ia64_expand_epilogue? */
1599 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1600 fputs ("\tbr.call.sptk.many rp = __bb_trace_ret\n", FILE);
1601 #undef FUNCTION_BLOCK_PROFILER_EXIT
1603 /* A C statement or compound statement to save all registers, which may be
1604 clobbered by a function call, including condition codes. */
1606 /* ??? We would have to save 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1607 other things. This is not practical. Perhaps leave this feature (-ax)
1608 unsupported by undefining above macros? */
1610 /* #define MACHINE_STATE_SAVE(ID) */
1612 /* A C statement or compound statement to restore all registers, including
1613 condition codes, saved by `MACHINE_STATE_SAVE'. */
1615 /* ??? We would have to restore 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1616 other things. This is not practical. Perhaps leave this feature (-ax)
1617 unsupported by undefining above macros? */
1619 /* #define MACHINE_STATE_RESTORE(ID) */
1622 /* Implementing the Varargs Macros. */
1624 /* Define this macro to store the anonymous register arguments into the stack
1625 so that all the arguments appear to have been passed consecutively on the
1628 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_ARGS_SIZE, SECOND_TIME) \
1629 ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME)
1631 /* Define this macro if the location where a function argument is passed
1632 depends on whether or not it is a named argument. */
1634 #define STRICT_ARGUMENT_NAMING 1
1637 /* Trampolines for Nested Functions. */
1639 /* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
1640 the function containing a non-local goto target. */
1642 #define STACK_SAVEAREA_MODE(LEVEL) \
1643 ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
1645 /* Output assembler code for a block containing the constant parts of
1646 a trampoline, leaving space for the variable parts.
1648 The trampoline should set the static chain pointer to value placed
1649 into the trampoline and should branch to the specified routine.
1650 To make the normal indirect-subroutine calling convention work,
1651 the trampoline must look like a function descriptor; the first
1652 word being the target address and the second being the target's
1655 We abuse the concept of a global pointer by arranging for it
1656 to point to the data we need to load. The complete trampoline
1657 has the following form:
1659 +-------------------+ \
1660 TRAMP: | __ia64_trampoline | |
1661 +-------------------+ > fake function descriptor
1663 +-------------------+ /
1664 | target descriptor |
1665 +-------------------+
1667 +-------------------+
1670 /* A C expression for the size in bytes of the trampoline, as an integer. */
1672 #define TRAMPOLINE_SIZE 32
1674 /* Alignment required for trampolines, in bits. */
1676 #define TRAMPOLINE_ALIGNMENT 64
1678 /* A C statement to initialize the variable parts of a trampoline. */
1680 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
1681 ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
1683 /* Implicit Calls to Library Routines */
1685 /* Define this macro if GNU CC should generate calls to the System V (and ANSI
1686 C) library functions `memcpy' and `memset' rather than the BSD functions
1687 `bcopy' and `bzero'. */
1689 #define TARGET_MEM_FUNCTIONS
1692 /* Addressing Modes */
1694 /* Define this macro if the machine supports post-increment addressing. */
1696 #define HAVE_POST_INCREMENT 1
1697 #define HAVE_POST_DECREMENT 1
1698 #define HAVE_POST_MODIFY_DISP 1
1699 #define HAVE_POST_MODIFY_REG 1
1701 /* A C expression that is 1 if the RTX X is a constant which is a valid
1704 #define CONSTANT_ADDRESS_P(X) 0
1706 /* The max number of registers that can appear in a valid memory address. */
1708 #define MAX_REGS_PER_ADDRESS 2
1710 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
1711 RTX) is a legitimate memory address on the target machine for a memory
1712 operand of mode MODE. */
1714 #define LEGITIMATE_ADDRESS_REG(X) \
1715 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1716 || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
1717 && REG_OK_FOR_BASE_P (XEXP (X, 0))))
1719 #define LEGITIMATE_ADDRESS_DISP(R, X) \
1720 (GET_CODE (X) == PLUS \
1721 && rtx_equal_p (R, XEXP (X, 0)) \
1722 && (LEGITIMATE_ADDRESS_REG (XEXP (X, 1)) \
1723 || (GET_CODE (XEXP (X, 1)) == CONST_INT \
1724 && INTVAL (XEXP (X, 1)) >= -256 \
1725 && INTVAL (XEXP (X, 1)) < 256)))
1727 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
1729 if (LEGITIMATE_ADDRESS_REG (X)) \
1731 else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
1732 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1733 && XEXP (X, 0) != arg_pointer_rtx) \
1735 else if (GET_CODE (X) == POST_MODIFY \
1736 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1737 && XEXP (X, 0) != arg_pointer_rtx \
1738 && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
1742 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1743 use as a base register. */
1745 #ifdef REG_OK_STRICT
1746 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1748 #define REG_OK_FOR_BASE_P(X) \
1749 (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1752 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1753 use as an index register. This is needed for POST_MODIFY. */
1755 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1757 /* A C compound statement that attempts to replace X with a valid memory
1758 address for an operand of mode MODE.
1760 This must be present, but there is nothing useful to be done here. */
1762 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1764 /* A C statement or compound statement with a conditional `goto LABEL;'
1765 executed if memory address X (an RTX) can have different meanings depending
1766 on the machine mode of the memory reference it is used for or if the address
1767 is valid for some modes but not others. */
1769 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1770 if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
1773 /* A C expression that is nonzero if X is a legitimate constant for an
1774 immediate operand on the target machine. */
1776 #define LEGITIMATE_CONSTANT_P(X) \
1777 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1778 || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X)) \
1781 /* Condition Code Status */
1783 /* One some machines not all possible comparisons are defined, but you can
1784 convert an invalid comparison into a valid one. */
1785 /* ??? Investigate. See the alpha definition. */
1786 /* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
1789 /* Describing Relative Costs of Operations */
1791 /* A part of a C `switch' statement that describes the relative costs of
1792 constant RTL expressions. */
1794 /* ??? This is incomplete. */
1796 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1798 if ((X) == const0_rtx) \
1800 switch (OUTER_CODE) \
1803 return CONST_OK_FOR_J (INTVAL (X)) ? 0 : COSTS_N_INSNS (1); \
1805 if (CONST_OK_FOR_I (INTVAL (X))) \
1807 if (CONST_OK_FOR_J (INTVAL (X))) \
1809 return COSTS_N_INSNS (1); \
1811 if (CONST_OK_FOR_K (INTVAL (X)) || CONST_OK_FOR_L (INTVAL (X))) \
1813 return COSTS_N_INSNS (1); \
1815 case CONST_DOUBLE: \
1816 return COSTS_N_INSNS (1); \
1820 return COSTS_N_INSNS (3);
1822 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. */
1824 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1826 /* For multiplies wider than HImode, we have to go to the FPU, \
1827 which normally involves copies. Plus there's the latency \
1828 of the multiply itself, and the latency of the instructions to \
1829 transfer integer regs to FP regs. */ \
1830 if (GET_MODE_SIZE (GET_MODE (X)) > 2) \
1831 return COSTS_N_INSNS (10); \
1832 return COSTS_N_INSNS (2); \
1838 return COSTS_N_INSNS (1); \
1843 /* We make divide expensive, so that divide-by-constant will be \
1844 optimized to a multiply. */ \
1845 return COSTS_N_INSNS (60);
1847 /* An expression giving the cost of an addressing mode that contains ADDRESS.
1848 If not defined, the cost is computed from the ADDRESS expression and the
1849 `CONST_COSTS' values. */
1851 #define ADDRESS_COST(ADDRESS) 0
1853 /* A C expression for the cost of moving data from a register in class FROM to
1856 #define REGISTER_MOVE_COST(MODE, FROM, TO) \
1857 ia64_register_move_cost((FROM), (TO))
1859 /* A C expression for the cost of moving data of mode M between a
1860 register and memory. */
1861 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1862 ((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS ? 4 : 10)
1864 /* A C expression for the cost of a branch instruction. A value of 1 is the
1865 default; other values are interpreted relative to that. Used by the
1866 if-conversion code as max instruction count. */
1867 /* ??? This requires investigation. The primary effect might be how
1868 many additional insn groups we run into, vs how good the dynamic
1869 branch predictor is. */
1871 #define BRANCH_COST 6
1873 /* Define this macro as a C expression which is nonzero if accessing less than
1874 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1877 #define SLOW_BYTE_ACCESS 1
1879 /* Define this macro if it is as good or better to call a constant function
1880 address than to call an address kept in a register.
1882 Indirect function calls are more expensive that direct function calls, so
1883 don't cse function addresses. */
1885 #define NO_FUNCTION_CSE
1888 /* Dividing the output into sections. */
1890 /* A C expression whose value is a string containing the assembler operation
1891 that should precede instructions and read-only data. */
1893 #define TEXT_SECTION_ASM_OP "\t.text"
1895 /* A C expression whose value is a string containing the assembler operation to
1896 identify the following data as writable initialized data. */
1898 #define DATA_SECTION_ASM_OP "\t.data"
1900 /* If defined, a C expression whose value is a string containing the assembler
1901 operation to identify the following data as uninitialized global data. */
1903 #define BSS_SECTION_ASM_OP "\t.bss"
1905 /* Define this macro if jump tables (for `tablejump' insns) should be output in
1906 the text section, along with the assembler instructions. */
1908 /* ??? It is probably better for the jump tables to be in the rodata section,
1909 which is where they go by default. Unfortunately, that currently does not
1910 work, because of some problem with pcrelative relocations not getting
1911 resolved correctly. */
1912 /* ??? FIXME ??? rth says that we should use @gprel to solve this problem. */
1913 /* ??? If jump tables are in the text section, then we can use 4 byte
1914 entries instead of 8 byte entries. */
1916 #define JUMP_TABLES_IN_TEXT_SECTION 1
1918 /* Define this macro if references to a symbol must be treated differently
1919 depending on something about the variable or function named by the symbol
1920 (such as what section it is in). */
1922 #define ENCODE_SECTION_INFO(DECL) ia64_encode_section_info (DECL)
1924 /* If a variable is weakened, made one only or moved into a different
1925 section, it may be necessary to redo the section info to move the
1926 variable out of sdata. */
1928 #define REDO_SECTION_INFO_P(DECL) \
1929 ((TREE_CODE (DECL) == VAR_DECL) \
1930 && (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL) \
1931 || DECL_SECTION_NAME (DECL) != 0))
1933 #define SDATA_NAME_FLAG_CHAR '@'
1935 #define IA64_DEFAULT_GVALUE 8
1937 /* Decode SYM_NAME and store the real name part in VAR, sans the characters
1938 that encode section info. */
1940 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1941 (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == SDATA_NAME_FLAG_CHAR)
1944 /* Position Independent Code. */
1946 /* The register number of the register used to address a table of static data
1947 addresses in memory. */
1949 /* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
1950 gen_rtx_REG (DImode, 1). */
1952 /* ??? Should we set flag_pic? Probably need to define
1953 LEGITIMIZE_PIC_OPERAND_P to make that work. */
1955 #define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
1957 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
1958 clobbered by calls. */
1960 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
1963 /* The Overall Framework of an Assembler File. */
1965 /* A C string constant describing how to begin a comment in the target
1966 assembler language. The compiler assumes that the comment will end at the
1969 #define ASM_COMMENT_START "//"
1971 /* A C string constant for text to be output before each `asm' statement or
1972 group of consecutive ones. */
1974 /* ??? This won't work with the Intel assembler, because it does not accept
1975 # as a comment start character. However, //APP does not work in gas, so we
1976 can't use that either. Same problem for ASM_APP_OFF below. */
1978 #define ASM_APP_ON "#APP\n"
1980 /* A C string constant for text to be output after each `asm' statement or
1981 group of consecutive ones. */
1983 #define ASM_APP_OFF "#NO_APP\n"
1986 /* Output of Data. */
1988 /* A C statement to output to the stdio stream STREAM an assembler instruction
1989 to assemble a floating-point constant of `TFmode', `DFmode', `SFmode',
1990 respectively, whose value is VALUE. */
1992 /* ??? Must reverse the word order for big-endian code? */
1994 #define ASM_OUTPUT_LONG_DOUBLE(FILE, VALUE) \
1997 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, t); \
1998 fprintf (FILE, "\tdata4 0x%08lx, 0x%08lx, 0x%08lx, 0x%08lx\n", \
1999 t[0] & 0xffffffff, t[1] & 0xffffffff, t[2] & 0xffffffff, 0L);\
2002 /* ??? Must reverse the word order for big-endian code? */
2004 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2007 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, t); \
2008 fprintf (FILE, "\tdata8 0x%08lx%08lx\n", \
2009 t[1] & 0xffffffff, t[0] & 0xffffffff); \
2012 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2015 REAL_VALUE_TO_TARGET_SINGLE (VALUE, t); \
2016 fprintf (FILE, "\tdata4 0x%lx\n", t & 0xffffffff); \
2019 /* A C statement to output to the stdio stream STREAM an assembler instruction
2020 to assemble an integer of 1, 2, 4, or 8 bytes, respectively, whose value
2023 /* This is how to output an assembler line defining a `char' constant. */
2025 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
2027 fprintf (FILE, "%s", ASM_BYTE_OP); \
2028 output_addr_const (FILE, (VALUE)); \
2029 fprintf (FILE, "\n"); \
2032 /* This is how to output an assembler line defining a `short' constant. */
2034 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
2036 fprintf (FILE, "\tdata2\t"); \
2037 output_addr_const (FILE, (VALUE)); \
2038 fprintf (FILE, "\n"); \
2041 /* This is how to output an assembler line defining an `int' constant.
2042 We also handle symbol output here. */
2044 /* ??? For ILP32, also need to handle function addresses here. */
2046 #define ASM_OUTPUT_INT(FILE, VALUE) \
2048 fprintf (FILE, "\tdata4\t"); \
2049 output_addr_const (FILE, (VALUE)); \
2050 fprintf (FILE, "\n"); \
2053 /* This is how to output an assembler line defining a `long' constant.
2054 We also handle symbol output here. */
2056 #define ASM_OUTPUT_DOUBLE_INT(FILE, VALUE) \
2058 fprintf (FILE, "\tdata8\t"); \
2059 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2060 fprintf (FILE, "@fptr("); \
2061 output_addr_const (FILE, (VALUE)); \
2062 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2063 fprintf (FILE, ")"); \
2064 fprintf (FILE, "\n"); \
2067 /* This is how to output an assembler line defining a `char' constant
2068 to an xdata segment. */
2070 #define ASM_OUTPUT_XDATA_CHAR(FILE, SECTION, VALUE) \
2072 fprintf (FILE, "\t.xdata1\t\"%s\", ", SECTION); \
2073 output_addr_const (FILE, (VALUE)); \
2074 fprintf (FILE, "\n"); \
2077 /* This is how to output an assembler line defining a `short' constant
2078 to an xdata segment. */
2080 #define ASM_OUTPUT_XDATA_SHORT(FILE, SECTION, VALUE) \
2082 fprintf (FILE, "\t.xdata2\t\"%s\", ", SECTION); \
2083 output_addr_const (FILE, (VALUE)); \
2084 fprintf (FILE, "\n"); \
2087 /* This is how to output an assembler line defining an `int' constant
2088 to an xdata segment. We also handle symbol output here. */
2090 /* ??? For ILP32, also need to handle function addresses here. */
2092 #define ASM_OUTPUT_XDATA_INT(FILE, SECTION, VALUE) \
2094 fprintf (FILE, "\t.xdata4\t\"%s\", ", SECTION); \
2095 output_addr_const (FILE, (VALUE)); \
2096 fprintf (FILE, "\n"); \
2099 /* This is how to output an assembler line defining a `long' constant
2100 to an xdata segment. We also handle symbol output here. */
2102 #define ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, SECTION, VALUE) \
2104 int need_closing_paren = 0; \
2105 fprintf (FILE, "\t.xdata8\t\"%s\", ", SECTION); \
2106 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) \
2107 && GET_CODE (VALUE) == SYMBOL_REF) \
2109 fprintf (FILE, SYMBOL_REF_FLAG (VALUE) ? "@fptr(" : "@segrel("); \
2110 need_closing_paren = 1; \
2112 output_addr_const (FILE, VALUE); \
2113 if (need_closing_paren) \
2114 fprintf (FILE, ")"); \
2115 fprintf (FILE, "\n"); \
2119 /* A C statement to output to the stdio stream STREAM an assembler instruction
2120 to assemble a single byte containing the number VALUE. */
2122 #define ASM_OUTPUT_BYTE(STREAM, VALUE) \
2123 fprintf (STREAM, "%s0x%x\n", ASM_BYTE_OP, (int)(VALUE) & 0xff)
2126 /* Output of Uninitialized Variables. */
2128 /* This is all handled by svr4.h. */
2131 /* Output and Generation of Labels. */
2133 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2134 assembler definition of a label named NAME. */
2136 /* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
2137 why ia64_asm_output_label exists. */
2139 extern int ia64_asm_output_label;
2140 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2142 ia64_asm_output_label = 1; \
2143 assemble_name (STREAM, NAME); \
2144 fputs (":\n", STREAM); \
2145 ia64_asm_output_label = 0; \
2148 /* A C statement (sans semicolon) to output to the stdio stream STREAM some
2149 commands that will make the label NAME global; that is, available for
2150 reference from other files. */
2152 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
2154 fputs ("\t.global ", STREAM); \
2155 assemble_name (STREAM, NAME); \
2156 fputs ("\n", STREAM); \
2159 /* A C statement (sans semicolon) to output to the stdio stream STREAM any text
2160 necessary for declaring the name of an external symbol named NAME which is
2161 referenced in this compilation but not defined. */
2163 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2164 ia64_asm_output_external (FILE, DECL, NAME)
2166 /* A C statement to store into the string STRING a label whose name is made
2167 from the string PREFIX and the number NUM. */
2169 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2171 sprintf (LABEL, "*.%s%d", PREFIX, NUM); \
2174 /* A C expression to assign to OUTVAR (which is a variable of type `char *') a
2175 newly allocated string made from the string NAME and the number NUMBER, with
2176 some suitable punctuation added. */
2178 /* ??? Not sure if using a ? in the name for Intel as is safe. */
2180 #define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \
2182 (OUTVAR) = (char *) alloca (strlen (NAME) + 12); \
2183 sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'), \
2187 /* A C statement to output to the stdio stream STREAM assembler code which
2188 defines (equates) the symbol NAME to have the value VALUE. */
2190 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
2192 assemble_name (STREAM, NAME); \
2193 fputs (" = ", STREAM); \
2194 assemble_name (STREAM, VALUE); \
2195 fputc ('\n', STREAM); \
2199 /* Macros Controlling Initialization Routines. */
2201 /* This is handled by svr4.h and sysv4.h. */
2204 /* Output of Assembler Instructions. */
2206 /* A C initializer containing the assembler's names for the machine registers,
2207 each one as a C string constant. */
2209 #define REGISTER_NAMES \
2211 /* General registers. */ \
2212 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
2213 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
2214 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
2216 /* Local registers. */ \
2217 "loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \
2218 "loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \
2219 "loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \
2220 "loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \
2221 "loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \
2222 "loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \
2223 "loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \
2224 "loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \
2225 "loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \
2226 "loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \
2227 /* Input registers. */ \
2228 "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \
2229 /* Output registers. */ \
2230 "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \
2231 /* Floating-point registers. */ \
2232 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
2233 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
2234 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
2235 "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \
2236 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
2237 "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
2238 "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
2239 "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
2240 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
2241 "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
2242 "f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\
2243 "f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\
2244 "f120","f121","f122","f123","f124","f125","f126","f127", \
2245 /* Predicate registers. */ \
2246 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \
2247 "p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \
2248 "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
2249 "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
2250 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
2251 "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
2252 "p60", "p61", "p62", "p63", \
2253 /* Branch registers. */ \
2254 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \
2255 /* Frame pointer. Return address. */ \
2256 "sfp", "retaddr", "ar.ccv", "ar.unat", "ar.pfs", "ar.lc", "ar.ec", \
2259 /* If defined, a C initializer for an array of structures containing a name and
2260 a register number. This macro defines additional names for hard registers,
2261 thus allowing the `asm' option in declarations to refer to registers using
2264 #define ADDITIONAL_REGISTER_NAMES \
2266 { "gp", R_GR (1) }, \
2267 { "sp", R_GR (12) }, \
2268 { "in0", IN_REG (0) }, \
2269 { "in1", IN_REG (1) }, \
2270 { "in2", IN_REG (2) }, \
2271 { "in3", IN_REG (3) }, \
2272 { "in4", IN_REG (4) }, \
2273 { "in5", IN_REG (5) }, \
2274 { "in6", IN_REG (6) }, \
2275 { "in7", IN_REG (7) }, \
2276 { "out0", OUT_REG (0) }, \
2277 { "out1", OUT_REG (1) }, \
2278 { "out2", OUT_REG (2) }, \
2279 { "out3", OUT_REG (3) }, \
2280 { "out4", OUT_REG (4) }, \
2281 { "out5", OUT_REG (5) }, \
2282 { "out6", OUT_REG (6) }, \
2283 { "out7", OUT_REG (7) }, \
2284 { "loc0", LOC_REG (0) }, \
2285 { "loc1", LOC_REG (1) }, \
2286 { "loc2", LOC_REG (2) }, \
2287 { "loc3", LOC_REG (3) }, \
2288 { "loc4", LOC_REG (4) }, \
2289 { "loc5", LOC_REG (5) }, \
2290 { "loc6", LOC_REG (6) }, \
2291 { "loc7", LOC_REG (7) }, \
2292 { "loc8", LOC_REG (8) }, \
2293 { "loc9", LOC_REG (9) }, \
2294 { "loc10", LOC_REG (10) }, \
2295 { "loc11", LOC_REG (11) }, \
2296 { "loc12", LOC_REG (12) }, \
2297 { "loc13", LOC_REG (13) }, \
2298 { "loc14", LOC_REG (14) }, \
2299 { "loc15", LOC_REG (15) }, \
2300 { "loc16", LOC_REG (16) }, \
2301 { "loc17", LOC_REG (17) }, \
2302 { "loc18", LOC_REG (18) }, \
2303 { "loc19", LOC_REG (19) }, \
2304 { "loc20", LOC_REG (20) }, \
2305 { "loc21", LOC_REG (21) }, \
2306 { "loc22", LOC_REG (22) }, \
2307 { "loc23", LOC_REG (23) }, \
2308 { "loc24", LOC_REG (24) }, \
2309 { "loc25", LOC_REG (25) }, \
2310 { "loc26", LOC_REG (26) }, \
2311 { "loc27", LOC_REG (27) }, \
2312 { "loc28", LOC_REG (28) }, \
2313 { "loc29", LOC_REG (29) }, \
2314 { "loc30", LOC_REG (30) }, \
2315 { "loc31", LOC_REG (31) }, \
2316 { "loc32", LOC_REG (32) }, \
2317 { "loc33", LOC_REG (33) }, \
2318 { "loc34", LOC_REG (34) }, \
2319 { "loc35", LOC_REG (35) }, \
2320 { "loc36", LOC_REG (36) }, \
2321 { "loc37", LOC_REG (37) }, \
2322 { "loc38", LOC_REG (38) }, \
2323 { "loc39", LOC_REG (39) }, \
2324 { "loc40", LOC_REG (40) }, \
2325 { "loc41", LOC_REG (41) }, \
2326 { "loc42", LOC_REG (42) }, \
2327 { "loc43", LOC_REG (43) }, \
2328 { "loc44", LOC_REG (44) }, \
2329 { "loc45", LOC_REG (45) }, \
2330 { "loc46", LOC_REG (46) }, \
2331 { "loc47", LOC_REG (47) }, \
2332 { "loc48", LOC_REG (48) }, \
2333 { "loc49", LOC_REG (49) }, \
2334 { "loc50", LOC_REG (50) }, \
2335 { "loc51", LOC_REG (51) }, \
2336 { "loc52", LOC_REG (52) }, \
2337 { "loc53", LOC_REG (53) }, \
2338 { "loc54", LOC_REG (54) }, \
2339 { "loc55", LOC_REG (55) }, \
2340 { "loc56", LOC_REG (56) }, \
2341 { "loc57", LOC_REG (57) }, \
2342 { "loc58", LOC_REG (58) }, \
2343 { "loc59", LOC_REG (59) }, \
2344 { "loc60", LOC_REG (60) }, \
2345 { "loc61", LOC_REG (61) }, \
2346 { "loc62", LOC_REG (62) }, \
2347 { "loc63", LOC_REG (63) }, \
2348 { "loc64", LOC_REG (64) }, \
2349 { "loc65", LOC_REG (65) }, \
2350 { "loc66", LOC_REG (66) }, \
2351 { "loc67", LOC_REG (67) }, \
2352 { "loc68", LOC_REG (68) }, \
2353 { "loc69", LOC_REG (69) }, \
2354 { "loc70", LOC_REG (70) }, \
2355 { "loc71", LOC_REG (71) }, \
2356 { "loc72", LOC_REG (72) }, \
2357 { "loc73", LOC_REG (73) }, \
2358 { "loc74", LOC_REG (74) }, \
2359 { "loc75", LOC_REG (75) }, \
2360 { "loc76", LOC_REG (76) }, \
2361 { "loc77", LOC_REG (77) }, \
2362 { "loc78", LOC_REG (78) }, \
2363 { "loc79", LOC_REG (79) }, \
2366 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2367 for an instruction operand X. X is an RTL expression. */
2369 #define PRINT_OPERAND(STREAM, X, CODE) \
2370 ia64_print_operand (STREAM, X, CODE)
2372 /* A C expression which evaluates to true if CODE is a valid punctuation
2373 character for use in the `PRINT_OPERAND' macro. */
2375 /* ??? Keep this around for now, as we might need it later. */
2377 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2378 ((CODE) == '+' || (CODE) == ',')
2380 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2381 for an instruction operand that is a memory reference whose address is X. X
2382 is an RTL expression. */
2384 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
2385 ia64_print_operand_address (STREAM, X)
2387 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2388 `%I' options of `asm_fprintf' (see `final.c'). */
2390 #define REGISTER_PREFIX ""
2391 #define LOCAL_LABEL_PREFIX "."
2392 #define USER_LABEL_PREFIX ""
2393 #define IMMEDIATE_PREFIX ""
2396 /* Output of dispatch tables. */
2398 /* This macro should be provided on machines where the addresses in a dispatch
2399 table are relative to the table's own address. */
2401 /* ??? Depends on the pointer size. */
2403 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2404 fprintf (STREAM, "\tdata8 .L%d-.L%d\n", VALUE, REL)
2406 /* This is how to output an element of a case-vector that is absolute.
2407 (Ia64 does not use such vectors, but we must define this macro anyway.) */
2409 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) abort ()
2411 /* Define this if something special must be output at the end of a jump-table.
2412 We need to align back to a 16 byte boundary because offsets are smaller than
2415 #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) ASM_OUTPUT_ALIGN (STREAM, 4)
2417 /* Jump tables only need 8 byte alignment. */
2419 #define ADDR_VEC_ALIGN(ADDR_VEC) 3
2422 /* Assembler Commands for Exception Regions. */
2424 /* If defined, a C string constant for the assembler operation to switch to the
2425 section for exception handling frame unwind information. If not defined,
2426 GNU CC will provide a default definition if the target supports named
2427 sections. `crtstuff.c' uses this macro to switch to the appropriate
2430 You should define this symbol if your target supports DWARF 2 frame unwind
2431 information and the default definition does not work. */
2432 #define EH_FRAME_SECTION_ASM_OP "\t.section\t.IA_64.unwind,\"aw\""
2434 /* Select a format to encode pointers in exception handling data. CODE
2435 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
2436 true if the symbol may be affected by dynamic relocations. */
2437 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
2438 (((CODE) == 1 ? DW_EH_PE_textrel : DW_EH_PE_datarel) \
2439 | ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_udata8)
2441 /* Handle special EH pointer encodings. Absolute, pc-relative, and
2442 indirect are handled automatically. */
2443 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
2445 const char *reltag = NULL; \
2446 if (((ENCODING) & 0xF0) == DW_EH_PE_textrel) \
2447 reltag = "@segrel("; \
2448 else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel) \
2449 reltag = "@gprel("; \
2452 fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \
2453 : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \
2454 : (abort (), "")), FILE); \
2455 fputs (reltag, FILE); \
2456 assemble_name (FILE, XSTR (ADDR, 0)); \
2457 fputc (')', FILE); \
2463 /* Assembler Commands for Alignment. */
2465 /* The alignment (log base 2) to put in front of LABEL, which follows
2468 /* ??? Investigate. */
2470 /* ??? Emitting align directives increases the size of the line number debug
2471 info, because each .align forces use of an extended opcode. Perhaps try
2472 to fix this in the assembler? */
2474 /* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
2476 /* The desired alignment for the location counter at the beginning
2479 /* ??? Investigate. */
2480 /* #define LOOP_ALIGN(LABEL) */
2482 /* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
2483 section because it fails put zeros in the bytes that are skipped. */
2485 #define ASM_NO_SKIP_IN_TEXT 1
2487 /* A C statement to output to the stdio stream STREAM an assembler command to
2488 advance the location counter to a multiple of 2 to the POWER bytes. */
2490 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2491 fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
2494 /* Macros Affecting all Debug Formats. */
2496 /* This is handled in svr4.h and sysv4.h. */
2499 /* Specific Options for DBX Output. */
2501 /* This is handled by dbxelf.h which is included by svr4.h. */
2504 /* Open ended Hooks for DBX Output. */
2509 /* File names in DBX format. */
2514 /* Macros for SDB and Dwarf Output. */
2516 /* Define this macro if GNU CC should produce dwarf version 2 format debugging
2517 output in response to the `-g' option. */
2519 #define DWARF2_DEBUGGING_INFO
2521 /* Section names for DWARF2 debug info. */
2523 #define DEBUG_INFO_SECTION ".debug_info, \"\", \"progbits\""
2524 #define DEBUG_ABBREV_SECTION ".debug_abbrev, \"\", \"progbits\""
2525 #define DEBUG_ARANGES_SECTION ".debug_aranges, \"\", \"progbits\""
2526 #define DEBUG_MACINFO_SECTION ".debug_macinfo, \"\", \"progbits\""
2527 #define DEBUG_LINE_SECTION ".debug_line, \"\", \"progbits\""
2528 #define DEBUG_LOC_SECTION ".debug_loc, \"\", \"progbits\""
2529 #define DEBUG_PUBNAMES_SECTION ".debug_pubnames, \"\", \"progbits\""
2530 #define DEBUG_STR_SECTION ".debug_str, \"\", \"progbits\""
2532 /* C string constants giving the pseudo-op to use for a sequence of
2533 2, 4, and 8 byte unaligned constants. dwarf2out.c needs these. */
2535 #define UNALIGNED_SHORT_ASM_OP "\tdata2.ua\t"
2536 #define UNALIGNED_INT_ASM_OP "\tdata4.ua\t"
2537 #define UNALIGNED_DOUBLE_INT_ASM_OP "\tdata8.ua\t"
2539 /* We need to override the default definition for this in dwarf2out.c so that
2540 we can emit the necessary # postfix. */
2541 #define ASM_NAME_TO_STRING(STR, NAME) \
2543 if ((NAME)[0] == '*') \
2544 dyn_string_append (STR, NAME + 1); \
2548 STRIP_NAME_ENCODING (newstr, NAME); \
2549 dyn_string_append (STR, user_label_prefix); \
2550 dyn_string_append (STR, newstr); \
2551 dyn_string_append (STR, "#"); \
2556 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
2558 /* Use tags for debug info labels, so that they don't break instruction
2559 bundles. This also avoids getting spurious DV warnings from the
2560 assembler. This is similar to ASM_OUTPUT_INTERNAL_LABEL, except that we
2561 add brackets around the label. */
2563 #define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \
2564 fprintf (FILE, "[.%s%d:]\n", PREFIX, NUM)
2566 /* Use section-relative relocations for debugging offsets. Unlike other
2567 targets that fake this by putting the section VMA at 0, IA-64 has
2568 proper relocations for them. */
2569 #define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL) \
2571 fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \
2572 : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \
2573 : (abort (), "")), FILE); \
2574 fputs ("@secrel(", FILE); \
2575 assemble_name (FILE, LABEL); \
2576 fputc (')', FILE); \
2579 /* Emit a PC-relative relocation. */
2580 #define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \
2582 fputs (((SIZE) == 4 ? UNALIGNED_INT_ASM_OP \
2583 : (SIZE) == 8 ? UNALIGNED_DOUBLE_INT_ASM_OP \
2584 : (abort (), "")), FILE); \
2585 fputs ("@pcrel(", FILE); \
2586 assemble_name (FILE, LABEL); \
2587 fputc (')', FILE); \
2590 /* Cross Compilation and Floating Point. */
2592 /* Define to enable software floating point emulation. */
2593 #define REAL_ARITHMETIC
2596 /* Register Renaming Parameters. */
2598 /* A C expression that is nonzero if hard register number REGNO2 can be
2599 considered for use as a rename register for REGNO1 */
2601 #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
2602 ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
2604 /* Define this macro if the compiler should use extended basic blocks
2605 when renaming registers. Define this macro if the target has predicate
2608 #define RENAME_EXTENDED_BLOCKS
2611 /* Miscellaneous Parameters. */
2613 /* Define this if you have defined special-purpose predicates in the file
2614 `MACHINE.c'. For each predicate, list all rtl codes that can be in
2615 expressions matched by the predicate. */
2617 #define PREDICATE_CODES \
2618 { "call_operand", {SUBREG, REG, SYMBOL_REF}}, \
2619 { "got_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2620 { "sdata_symbolic_operand", {SYMBOL_REF, CONST}}, \
2621 { "symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2622 { "function_operand", {SYMBOL_REF}}, \
2623 { "setjmp_operand", {SYMBOL_REF}}, \
2624 { "destination_operand", {SUBREG, REG, MEM}}, \
2625 { "not_postinc_memory_operand", {MEM}}, \
2626 { "move_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2627 CONSTANT_P_RTX, SYMBOL_REF, CONST, LABEL_REF}}, \
2628 { "gr_register_operand", {SUBREG, REG}}, \
2629 { "fr_register_operand", {SUBREG, REG}}, \
2630 { "grfr_register_operand", {SUBREG, REG}}, \
2631 { "gr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
2632 { "fr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
2633 { "grfr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
2634 { "gr_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2635 { "gr_reg_or_5bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2636 { "gr_reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2637 { "gr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2638 { "grfr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2639 { "gr_reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \
2641 { "gr_reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \
2643 { "gr_reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2644 { "gr_reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2645 { "shift_count_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2646 { "shift_32bit_count_operand", {SUBREG, REG, CONST_INT, \
2648 { "shladd_operand", {CONST_INT}}, \
2649 { "fetchadd_operand", {CONST_INT}}, \
2650 { "fr_reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE}}, \
2651 { "normal_comparison_operator", {EQ, NE, GT, LE, GTU, LEU}}, \
2652 { "adjusted_comparison_operator", {LT, GE, LTU, GEU}}, \
2653 { "signed_inequality_operator", {GE, GT, LE, LT}}, \
2654 { "predicate_operator", {NE, EQ}}, \
2655 { "ar_lc_reg_operand", {REG}}, \
2656 { "ar_ccv_reg_operand", {REG}}, \
2657 { "general_tfmode_operand", {SUBREG, REG, CONST_DOUBLE, MEM}}, \
2658 { "destination_tfmode_operand", {SUBREG, REG, MEM}}, \
2659 { "tfreg_or_fp01_operand", {REG, CONST_DOUBLE}},
2661 /* An alias for a machine mode name. This is the machine mode that elements of
2662 a jump-table should have. */
2664 #define CASE_VECTOR_MODE Pmode
2666 /* Define as C expression which evaluates to nonzero if the tablejump
2667 instruction expects the table to contain offsets from the address of the
2670 #define CASE_VECTOR_PC_RELATIVE 1
2672 /* Define this macro if operations between registers with integral mode smaller
2673 than a word are always performed on the entire register. */
2675 #define WORD_REGISTER_OPERATIONS
2677 /* Define this macro to be a C expression indicating when insns that read
2678 memory in MODE, an integral mode narrower than a word, set the bits outside
2679 of MODE to be either the sign-extension or the zero-extension of the data
2682 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2684 /* An alias for a tree code that should be used by default for conversion of
2685 floating point values to fixed point. */
2687 /* ??? Looks like this macro is obsolete and should be deleted everywhere. */
2689 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2691 /* An alias for a tree code that is the easiest kind of division to compile
2692 code for in the general case. */
2694 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2696 /* The maximum number of bytes that a single instruction can move quickly from
2697 memory to memory. */
2700 /* A C expression which is nonzero if on this machine it is safe to "convert"
2701 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2702 than INPREC) by merely operating on it as if it had only OUTPREC bits. */
2704 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2706 /* A C expression describing the value returned by a comparison operator with
2707 an integral mode and stored by a store-flag instruction (`sCOND') when the
2708 condition is true. */
2710 /* ??? Investigate using -1 instead of 1. */
2712 #define STORE_FLAG_VALUE 1
2714 /* An alias for the machine mode for pointers. */
2716 /* ??? This would change if we had ILP32 support. */
2718 #define Pmode DImode
2720 /* An alias for the machine mode used for memory references to functions being
2721 called, in `call' RTL expressions. */
2723 #define FUNCTION_MODE Pmode
2725 /* Define this macro to handle System V style pragmas: #pragma pack and
2726 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2729 #define HANDLE_SYSV_PRAGMA
2731 /* In rare cases, correct code generation requires extra machine dependent
2732 processing between the second jump optimization pass and delayed branch
2733 scheduling. On those machines, define this macro as a C statement to act on
2734 the code starting at INSN. */
2736 #define MACHINE_DEPENDENT_REORG(INSN) ia64_reorg (INSN)
2738 /* A C expression for the maximum number of instructions to execute via
2739 conditional execution instructions instead of a branch. A value of
2740 BRANCH_COST+1 is the default if the machine does not use
2741 cc0, and 1 if it does use cc0. */
2742 /* ??? Investigate. */
2743 #define MAX_CONDITIONAL_EXECUTE 12
2745 /* A C statement (sans semicolon) to update the integer scheduling
2746 priority `INSN_PRIORITY(INSN)'. */
2748 /* ??? Investigate. */
2749 /* #define ADJUST_PRIORITY (INSN) */
2751 /* A C statement (sans semicolon) to update the integer variable COST
2752 based on the relationship between INSN that is dependent on
2753 DEP_INSN through the dependence LINK. The default is to make no
2754 adjustment to COST. This can be used for example to specify to
2755 the scheduler that an output- or anti-dependence does not incur
2756 the same cost as a data-dependence. */
2758 #define ADJUST_COST(insn,link,dep_insn,cost) \
2759 (cost) = ia64_adjust_cost(insn, link, dep_insn, cost)
2761 #define ISSUE_RATE ia64_issue_rate ()
2763 #define MD_SCHED_INIT(DUMP, SCHED_VERBOSE, MAX_READY) \
2764 ia64_sched_init (DUMP, SCHED_VERBOSE, MAX_READY)
2766 #define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
2767 (CIM) = ia64_sched_reorder (DUMP, SCHED_VERBOSE, READY, &N_READY, 0, CLOCK)
2769 #define MD_SCHED_REORDER2(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
2770 (CIM) = ia64_sched_reorder2 (DUMP, SCHED_VERBOSE, READY, &N_READY, CLOCK)
2772 #define MD_SCHED_FINISH(DUMP, SCHED_VERBOSE) \
2773 ia64_sched_finish (DUMP, SCHED_VERBOSE)
2775 #define MD_SCHED_VARIABLE_ISSUE(DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE) \
2777 = ia64_variable_issue (DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE))
2779 extern int ia64_final_schedule;
2781 #define IA64_UNWIND_INFO 1
2782 #define IA64_UNWIND_EMIT(f,i) process_for_unwind_directive (f,i)
2784 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
2786 /* This function contains machine specific function data. */
2787 struct machine_function
2789 /* The new stack pointer when unwinding from EH. */
2790 struct rtx_def* ia64_eh_epilogue_sp;
2792 /* The new bsp value when unwinding from EH. */
2793 struct rtx_def* ia64_eh_epilogue_bsp;
2795 /* The GP value save register. */
2796 struct rtx_def* ia64_gp_save;
2798 /* The number of varargs registers to save. */
2805 IA64_BUILTIN_SYNCHRONIZE,
2807 IA64_BUILTIN_FETCH_AND_ADD_SI,
2808 IA64_BUILTIN_FETCH_AND_SUB_SI,
2809 IA64_BUILTIN_FETCH_AND_OR_SI,
2810 IA64_BUILTIN_FETCH_AND_AND_SI,
2811 IA64_BUILTIN_FETCH_AND_XOR_SI,
2812 IA64_BUILTIN_FETCH_AND_NAND_SI,
2814 IA64_BUILTIN_ADD_AND_FETCH_SI,
2815 IA64_BUILTIN_SUB_AND_FETCH_SI,
2816 IA64_BUILTIN_OR_AND_FETCH_SI,
2817 IA64_BUILTIN_AND_AND_FETCH_SI,
2818 IA64_BUILTIN_XOR_AND_FETCH_SI,
2819 IA64_BUILTIN_NAND_AND_FETCH_SI,
2821 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI,
2822 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI,
2824 IA64_BUILTIN_SYNCHRONIZE_SI,
2826 IA64_BUILTIN_LOCK_TEST_AND_SET_SI,
2828 IA64_BUILTIN_LOCK_RELEASE_SI,
2830 IA64_BUILTIN_FETCH_AND_ADD_DI,
2831 IA64_BUILTIN_FETCH_AND_SUB_DI,
2832 IA64_BUILTIN_FETCH_AND_OR_DI,
2833 IA64_BUILTIN_FETCH_AND_AND_DI,
2834 IA64_BUILTIN_FETCH_AND_XOR_DI,
2835 IA64_BUILTIN_FETCH_AND_NAND_DI,
2837 IA64_BUILTIN_ADD_AND_FETCH_DI,
2838 IA64_BUILTIN_SUB_AND_FETCH_DI,
2839 IA64_BUILTIN_OR_AND_FETCH_DI,
2840 IA64_BUILTIN_AND_AND_FETCH_DI,
2841 IA64_BUILTIN_XOR_AND_FETCH_DI,
2842 IA64_BUILTIN_NAND_AND_FETCH_DI,
2844 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI,
2845 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI,
2847 IA64_BUILTIN_SYNCHRONIZE_DI,
2849 IA64_BUILTIN_LOCK_TEST_AND_SET_DI,
2851 IA64_BUILTIN_LOCK_RELEASE_DI,
2854 IA64_BUILTIN_FLUSHRS
2857 /* Codes for expand_compare_and_swap and expand_swap_and_compare. */
2859 IA64_ADD_OP, IA64_SUB_OP, IA64_OR_OP, IA64_AND_OP, IA64_XOR_OP, IA64_NAND_OP
2862 #define MD_INIT_BUILTINS do { \
2863 ia64_init_builtins (); \
2866 #define MD_EXPAND_BUILTIN(EXP, TARGET, SUBTARGET, MODE, IGNORE) \
2867 ia64_expand_builtin ((EXP), (TARGET), (SUBTARGET), (MODE), (IGNORE))
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