1 ;; Predicate definitions for IA-32 and x86-64.
2 ;; Copyright (C) 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Return nonzero if OP is either a i387 or SSE fp register.
21 (define_predicate "any_fp_register_operand"
22 (and (match_code "reg")
23 (match_test "ANY_FP_REGNO_P (REGNO (op))")))
25 ;; Return nonzero if OP is an i387 fp register.
26 (define_predicate "fp_register_operand"
27 (and (match_code "reg")
28 (match_test "FP_REGNO_P (REGNO (op))")))
30 ;; Return nonzero if OP is a non-fp register_operand.
31 (define_predicate "register_and_not_any_fp_reg_operand"
32 (and (match_code "reg")
33 (not (match_test "ANY_FP_REGNO_P (REGNO (op))"))))
35 ;; Return nonzero if OP is a register operand other than an i387 fp register.
36 (define_predicate "register_and_not_fp_reg_operand"
37 (and (match_code "reg")
38 (not (match_test "FP_REGNO_P (REGNO (op))"))))
40 ;; True if the operand is an MMX register.
41 (define_predicate "mmx_reg_operand"
42 (and (match_code "reg")
43 (match_test "MMX_REGNO_P (REGNO (op))")))
45 ;; True if the operand is a Q_REGS class register.
46 (define_predicate "q_regs_operand"
47 (match_operand 0 "register_operand")
49 if (GET_CODE (op) == SUBREG)
51 return ANY_QI_REG_P (op);
54 ;; Match an SI or HImode register for a zero_extract.
55 (define_special_predicate "ext_register_operand"
56 (match_operand 0 "register_operand")
58 if ((!TARGET_64BIT || GET_MODE (op) != DImode)
59 && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
61 if (GET_CODE (op) == SUBREG)
64 /* Be careful to accept only registers having upper parts. */
65 return REGNO (op) > LAST_VIRTUAL_REGISTER || REGNO (op) < 4;
68 ;; Return true if op is the AX register.
69 (define_predicate "ax_reg_operand"
70 (and (match_code "reg")
71 (match_test "REGNO (op) == 0")))
73 ;; Return true if op is the flags register.
74 (define_predicate "flags_reg_operand"
75 (and (match_code "reg")
76 (match_test "REGNO (op) == FLAGS_REG")))
78 ;; Return true if op is not xmm0 register.
79 (define_predicate "reg_not_xmm0_operand"
80 (and (match_operand 0 "register_operand")
81 (match_test "GET_CODE (op) != REG
82 || REGNO (op) != FIRST_SSE_REG")))
84 ;; As above, but allow nonimmediate operands.
85 (define_predicate "nonimm_not_xmm0_operand"
86 (and (match_operand 0 "nonimmediate_operand")
87 (match_test "GET_CODE (op) != REG
88 || REGNO (op) != FIRST_SSE_REG")))
90 ;; Return 1 if VALUE can be stored in a sign extended immediate field.
91 (define_predicate "x86_64_immediate_operand"
92 (match_code "const_int,symbol_ref,label_ref,const")
95 return immediate_operand (op, mode);
97 switch (GET_CODE (op))
100 /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
101 to be at least 32 and this all acceptable constants are
102 represented as CONST_INT. */
103 if (HOST_BITS_PER_WIDE_INT == 32)
107 HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
108 return trunc_int_for_mode (val, SImode) == val;
113 /* For certain code models, the symbolic references are known to fit.
114 in CM_SMALL_PIC model we know it fits if it is local to the shared
115 library. Don't count TLS SYMBOL_REFs here, since they should fit
116 only if inside of UNSPEC handled below. */
117 /* TLS symbols are not constant. */
118 if (SYMBOL_REF_TLS_MODEL (op))
120 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL
121 || (ix86_cmodel == CM_MEDIUM && !SYMBOL_REF_FAR_ADDR_P (op)));
124 /* For certain code models, the code is near as well. */
125 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
126 || ix86_cmodel == CM_KERNEL);
129 /* We also may accept the offsetted memory references in certain
131 if (GET_CODE (XEXP (op, 0)) == UNSPEC)
132 switch (XINT (XEXP (op, 0), 1))
134 case UNSPEC_GOTPCREL:
136 case UNSPEC_GOTNTPOFF:
143 if (GET_CODE (XEXP (op, 0)) == PLUS)
145 rtx op1 = XEXP (XEXP (op, 0), 0);
146 rtx op2 = XEXP (XEXP (op, 0), 1);
147 HOST_WIDE_INT offset;
149 if (ix86_cmodel == CM_LARGE)
151 if (!CONST_INT_P (op2))
153 offset = trunc_int_for_mode (INTVAL (op2), DImode);
154 switch (GET_CODE (op1))
157 /* TLS symbols are not constant. */
158 if (SYMBOL_REF_TLS_MODEL (op1))
160 /* For CM_SMALL assume that latest object is 16MB before
161 end of 31bits boundary. We may also accept pretty
162 large negative constants knowing that all objects are
163 in the positive half of address space. */
164 if ((ix86_cmodel == CM_SMALL
165 || (ix86_cmodel == CM_MEDIUM
166 && !SYMBOL_REF_FAR_ADDR_P (op1)))
167 && offset < 16*1024*1024
168 && trunc_int_for_mode (offset, SImode) == offset)
170 /* For CM_KERNEL we know that all object resist in the
171 negative half of 32bits address space. We may not
172 accept negative offsets, since they may be just off
173 and we may accept pretty large positive ones. */
174 if (ix86_cmodel == CM_KERNEL
176 && trunc_int_for_mode (offset, SImode) == offset)
181 /* These conditions are similar to SYMBOL_REF ones, just the
182 constraints for code models differ. */
183 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
184 && offset < 16*1024*1024
185 && trunc_int_for_mode (offset, SImode) == offset)
187 if (ix86_cmodel == CM_KERNEL
189 && trunc_int_for_mode (offset, SImode) == offset)
194 switch (XINT (op1, 1))
199 && trunc_int_for_mode (offset, SImode) == offset)
217 ;; Return 1 if VALUE can be stored in the zero extended immediate field.
218 (define_predicate "x86_64_zext_immediate_operand"
219 (match_code "const_double,const_int,symbol_ref,label_ref,const")
221 switch (GET_CODE (op))
224 if (HOST_BITS_PER_WIDE_INT == 32)
225 return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
230 if (HOST_BITS_PER_WIDE_INT == 32)
231 return INTVAL (op) >= 0;
233 return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
236 /* For certain code models, the symbolic references are known to fit. */
237 /* TLS symbols are not constant. */
238 if (SYMBOL_REF_TLS_MODEL (op))
240 return (ix86_cmodel == CM_SMALL
241 || (ix86_cmodel == CM_MEDIUM
242 && !SYMBOL_REF_FAR_ADDR_P (op)));
245 /* For certain code models, the code is near as well. */
246 return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
249 /* We also may accept the offsetted memory references in certain
251 if (GET_CODE (XEXP (op, 0)) == PLUS)
253 rtx op1 = XEXP (XEXP (op, 0), 0);
254 rtx op2 = XEXP (XEXP (op, 0), 1);
256 if (ix86_cmodel == CM_LARGE)
258 switch (GET_CODE (op1))
261 /* TLS symbols are not constant. */
262 if (SYMBOL_REF_TLS_MODEL (op1))
264 /* For small code model we may accept pretty large positive
265 offsets, since one bit is available for free. Negative
266 offsets are limited by the size of NULL pointer area
267 specified by the ABI. */
268 if ((ix86_cmodel == CM_SMALL
269 || (ix86_cmodel == CM_MEDIUM
270 && !SYMBOL_REF_FAR_ADDR_P (op1)))
272 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
273 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
275 /* ??? For the kernel, we may accept adjustment of
276 -0x10000000, since we know that it will just convert
277 negative address space to positive, but perhaps this
278 is not worthwhile. */
282 /* These conditions are similar to SYMBOL_REF ones, just the
283 constraints for code models differ. */
284 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
286 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
287 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
303 ;; Return nonzero if OP is general operand representable on x86_64.
304 (define_predicate "x86_64_general_operand"
305 (if_then_else (match_test "TARGET_64BIT")
306 (ior (match_operand 0 "nonimmediate_operand")
307 (match_operand 0 "x86_64_immediate_operand"))
308 (match_operand 0 "general_operand")))
310 ;; Return nonzero if OP is general operand representable on x86_64
311 ;; as either sign extended or zero extended constant.
312 (define_predicate "x86_64_szext_general_operand"
313 (if_then_else (match_test "TARGET_64BIT")
314 (ior (match_operand 0 "nonimmediate_operand")
315 (ior (match_operand 0 "x86_64_immediate_operand")
316 (match_operand 0 "x86_64_zext_immediate_operand")))
317 (match_operand 0 "general_operand")))
319 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
320 (define_predicate "x86_64_nonmemory_operand"
321 (if_then_else (match_test "TARGET_64BIT")
322 (ior (match_operand 0 "register_operand")
323 (match_operand 0 "x86_64_immediate_operand"))
324 (match_operand 0 "nonmemory_operand")))
326 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
327 (define_predicate "x86_64_szext_nonmemory_operand"
328 (if_then_else (match_test "TARGET_64BIT")
329 (ior (match_operand 0 "register_operand")
330 (ior (match_operand 0 "x86_64_immediate_operand")
331 (match_operand 0 "x86_64_zext_immediate_operand")))
332 (match_operand 0 "nonmemory_operand")))
334 ;; Return true when operand is PIC expression that can be computed by lea
336 (define_predicate "pic_32bit_operand"
337 (match_code "const,symbol_ref,label_ref")
341 /* Rule out relocations that translate into 64bit constants. */
342 if (TARGET_64BIT && GET_CODE (op) == CONST)
345 if (GET_CODE (op) == PLUS && CONST_INT_P (XEXP (op, 1)))
347 if (GET_CODE (op) == UNSPEC
348 && (XINT (op, 1) == UNSPEC_GOTOFF
349 || XINT (op, 1) == UNSPEC_GOT))
352 return symbolic_operand (op, mode);
356 ;; Return nonzero if OP is nonmemory operand acceptable by movabs patterns.
357 (define_predicate "x86_64_movabs_operand"
358 (if_then_else (match_test "!TARGET_64BIT || !flag_pic")
359 (match_operand 0 "nonmemory_operand")
360 (ior (match_operand 0 "register_operand")
361 (and (match_operand 0 "const_double_operand")
362 (match_test "GET_MODE_SIZE (mode) <= 8")))))
364 ;; Returns nonzero if OP is either a symbol reference or a sum of a symbol
365 ;; reference and a constant.
366 (define_predicate "symbolic_operand"
367 (match_code "symbol_ref,label_ref,const")
369 switch (GET_CODE (op))
377 if (GET_CODE (op) == SYMBOL_REF
378 || GET_CODE (op) == LABEL_REF
379 || (GET_CODE (op) == UNSPEC
380 && (XINT (op, 1) == UNSPEC_GOT
381 || XINT (op, 1) == UNSPEC_GOTOFF
382 || XINT (op, 1) == UNSPEC_GOTPCREL)))
384 if (GET_CODE (op) != PLUS
385 || !CONST_INT_P (XEXP (op, 1)))
389 if (GET_CODE (op) == SYMBOL_REF
390 || GET_CODE (op) == LABEL_REF)
392 /* Only @GOTOFF gets offsets. */
393 if (GET_CODE (op) != UNSPEC
394 || XINT (op, 1) != UNSPEC_GOTOFF)
397 op = XVECEXP (op, 0, 0);
398 if (GET_CODE (op) == SYMBOL_REF
399 || GET_CODE (op) == LABEL_REF)
408 ;; Return true if the operand contains a @GOT or @GOTOFF reference.
409 (define_predicate "pic_symbolic_operand"
415 if (GET_CODE (op) == UNSPEC
416 && XINT (op, 1) == UNSPEC_GOTPCREL)
418 if (GET_CODE (op) == PLUS
419 && GET_CODE (XEXP (op, 0)) == UNSPEC
420 && XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL)
425 if (GET_CODE (op) == UNSPEC)
427 if (GET_CODE (op) != PLUS
428 || !CONST_INT_P (XEXP (op, 1)))
431 if (GET_CODE (op) == UNSPEC
432 && XINT (op, 1) != UNSPEC_MACHOPIC_OFFSET)
438 ;; Return true if OP is a symbolic operand that resolves locally.
439 (define_predicate "local_symbolic_operand"
440 (match_code "const,label_ref,symbol_ref")
442 if (GET_CODE (op) == CONST
443 && GET_CODE (XEXP (op, 0)) == PLUS
444 && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
445 op = XEXP (XEXP (op, 0), 0);
447 if (GET_CODE (op) == LABEL_REF)
450 if (GET_CODE (op) != SYMBOL_REF)
453 if (SYMBOL_REF_TLS_MODEL (op) != 0)
456 if (SYMBOL_REF_LOCAL_P (op))
459 /* There is, however, a not insubstantial body of code in the rest of
460 the compiler that assumes it can just stick the results of
461 ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */
462 /* ??? This is a hack. Should update the body of the compiler to
463 always create a DECL an invoke targetm.encode_section_info. */
464 if (strncmp (XSTR (op, 0), internal_label_prefix,
465 internal_label_prefix_len) == 0)
471 ;; Test for a legitimate @GOTOFF operand.
473 ;; VxWorks does not impose a fixed gap between segments; the run-time
474 ;; gap can be different from the object-file gap. We therefore can't
475 ;; use @GOTOFF unless we are absolutely sure that the symbol is in the
476 ;; same segment as the GOT. Unfortunately, the flexibility of linker
477 ;; scripts means that we can't be sure of that in general, so assume
478 ;; that @GOTOFF is never valid on VxWorks.
479 (define_predicate "gotoff_operand"
480 (and (match_test "!TARGET_VXWORKS_RTP")
481 (match_operand 0 "local_symbolic_operand")))
483 ;; Test for various thread-local symbols.
484 (define_predicate "tls_symbolic_operand"
485 (and (match_code "symbol_ref")
486 (match_test "SYMBOL_REF_TLS_MODEL (op) != 0")))
488 (define_predicate "tls_modbase_operand"
489 (and (match_code "symbol_ref")
490 (match_test "op == ix86_tls_module_base ()")))
492 (define_predicate "tp_or_register_operand"
493 (ior (match_operand 0 "register_operand")
494 (and (match_code "unspec")
495 (match_test "XINT (op, 1) == UNSPEC_TP"))))
497 ;; Test for a pc-relative call operand
498 (define_predicate "constant_call_address_operand"
499 (match_code "symbol_ref")
501 if (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
503 if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
508 ;; True for any non-virtual or eliminable register. Used in places where
509 ;; instantiation of such a register may cause the pattern to not be recognized.
510 (define_predicate "register_no_elim_operand"
511 (match_operand 0 "register_operand")
513 if (GET_CODE (op) == SUBREG)
514 op = SUBREG_REG (op);
515 return !(op == arg_pointer_rtx
516 || op == frame_pointer_rtx
517 || IN_RANGE (REGNO (op),
518 FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
521 ;; Similarly, but include the stack pointer. This is used to prevent esp
522 ;; from being used as an index reg.
523 (define_predicate "index_register_operand"
524 (match_operand 0 "register_operand")
526 if (GET_CODE (op) == SUBREG)
527 op = SUBREG_REG (op);
528 if (reload_in_progress || reload_completed)
529 return REG_OK_FOR_INDEX_STRICT_P (op);
531 return REG_OK_FOR_INDEX_NONSTRICT_P (op);
534 ;; Return false if this is any eliminable register. Otherwise general_operand.
535 (define_predicate "general_no_elim_operand"
536 (if_then_else (match_code "reg,subreg")
537 (match_operand 0 "register_no_elim_operand")
538 (match_operand 0 "general_operand")))
540 ;; Return false if this is any eliminable register. Otherwise
541 ;; register_operand or a constant.
542 (define_predicate "nonmemory_no_elim_operand"
543 (ior (match_operand 0 "register_no_elim_operand")
544 (match_operand 0 "immediate_operand")))
546 ;; Test for a valid operand for a call instruction.
547 (define_predicate "call_insn_operand"
548 (ior (match_operand 0 "constant_call_address_operand")
549 (ior (match_operand 0 "register_no_elim_operand")
550 (match_operand 0 "memory_operand"))))
552 ;; Similarly, but for tail calls, in which we cannot allow memory references.
553 (define_predicate "sibcall_insn_operand"
554 (ior (match_operand 0 "constant_call_address_operand")
555 (match_operand 0 "register_no_elim_operand")))
557 ;; Match exactly zero.
558 (define_predicate "const0_operand"
559 (match_code "const_int,const_double,const_vector")
561 if (mode == VOIDmode)
562 mode = GET_MODE (op);
563 return op == CONST0_RTX (mode);
566 ;; Match exactly one.
567 (define_predicate "const1_operand"
568 (and (match_code "const_int")
569 (match_test "op == const1_rtx")))
571 ;; Match exactly eight.
572 (define_predicate "const8_operand"
573 (and (match_code "const_int")
574 (match_test "INTVAL (op) == 8")))
576 ;; Match 2, 4, or 8. Used for leal multiplicands.
577 (define_predicate "const248_operand"
578 (match_code "const_int")
580 HOST_WIDE_INT i = INTVAL (op);
581 return i == 2 || i == 4 || i == 8;
585 (define_predicate "const_0_to_1_operand"
586 (and (match_code "const_int")
587 (match_test "op == const0_rtx || op == const1_rtx")))
590 (define_predicate "const_0_to_3_operand"
591 (and (match_code "const_int")
592 (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
595 (define_predicate "const_0_to_7_operand"
596 (and (match_code "const_int")
597 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
600 (define_predicate "const_0_to_15_operand"
601 (and (match_code "const_int")
602 (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
605 (define_predicate "const_0_to_31_operand"
606 (and (match_code "const_int")
607 (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
610 (define_predicate "const_0_to_63_operand"
611 (and (match_code "const_int")
612 (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
615 (define_predicate "const_0_to_255_operand"
616 (and (match_code "const_int")
617 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
619 ;; Match (0 to 255) * 8
620 (define_predicate "const_0_to_255_mul_8_operand"
621 (match_code "const_int")
623 unsigned HOST_WIDE_INT val = INTVAL (op);
624 return val <= 255*8 && val % 8 == 0;
627 ;; Return nonzero if OP is CONST_INT >= 1 and <= 31 (a valid operand
628 ;; for shift & compare patterns, as shifting by 0 does not change flags).
629 (define_predicate "const_1_to_31_operand"
630 (and (match_code "const_int")
631 (match_test "IN_RANGE (INTVAL (op), 1, 31)")))
633 ;; Return nonzero if OP is CONST_INT >= 1 and <= 63 (a valid operand
634 ;; for 64bit shift & compare patterns, as shifting by 0 does not change flags).
635 (define_predicate "const_1_to_63_operand"
636 (and (match_code "const_int")
637 (match_test "IN_RANGE (INTVAL (op), 1, 63)")))
640 (define_predicate "const_2_to_3_operand"
641 (and (match_code "const_int")
642 (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
645 (define_predicate "const_4_to_5_operand"
646 (and (match_code "const_int")
647 (match_test "IN_RANGE (INTVAL (op), 4, 5)")))
650 (define_predicate "const_4_to_7_operand"
651 (and (match_code "const_int")
652 (match_test "IN_RANGE (INTVAL (op), 4, 7)")))
655 (define_predicate "const_6_to_7_operand"
656 (and (match_code "const_int")
657 (match_test "IN_RANGE (INTVAL (op), 6, 7)")))
660 (define_predicate "const_8_to_11_operand"
661 (and (match_code "const_int")
662 (match_test "IN_RANGE (INTVAL (op), 8, 11)")))
665 (define_predicate "const_12_to_15_operand"
666 (and (match_code "const_int")
667 (match_test "IN_RANGE (INTVAL (op), 12, 15)")))
669 ;; Match exactly one bit in 2-bit mask.
670 (define_predicate "const_pow2_1_to_2_operand"
671 (and (match_code "const_int")
672 (match_test "INTVAL (op) == 1 || INTVAL (op) == 2")))
674 ;; Match exactly one bit in 4-bit mask.
675 (define_predicate "const_pow2_1_to_8_operand"
676 (match_code "const_int")
678 unsigned int log = exact_log2 (INTVAL (op));
682 ;; Match exactly one bit in 8-bit mask.
683 (define_predicate "const_pow2_1_to_128_operand"
684 (match_code "const_int")
686 unsigned int log = exact_log2 (INTVAL (op));
690 ;; Match exactly one bit in 16-bit mask.
691 (define_predicate "const_pow2_1_to_32768_operand"
692 (match_code "const_int")
694 unsigned int log = exact_log2 (INTVAL (op));
698 ;; True if this is a constant appropriate for an increment or decrement.
699 (define_predicate "incdec_operand"
700 (match_code "const_int")
702 /* On Pentium4, the inc and dec operations causes extra dependency on flag
703 registers, since carry flag is not set. */
704 if (!TARGET_USE_INCDEC && !optimize_size)
706 return op == const1_rtx || op == constm1_rtx;
709 ;; True for registers, or 1 or -1. Used to optimize double-word shifts.
710 (define_predicate "reg_or_pm1_operand"
711 (ior (match_operand 0 "register_operand")
712 (and (match_code "const_int")
713 (match_test "op == const1_rtx || op == constm1_rtx"))))
715 ;; True if OP is acceptable as operand of DImode shift expander.
716 (define_predicate "shiftdi_operand"
717 (if_then_else (match_test "TARGET_64BIT")
718 (match_operand 0 "nonimmediate_operand")
719 (match_operand 0 "register_operand")))
721 (define_predicate "ashldi_input_operand"
722 (if_then_else (match_test "TARGET_64BIT")
723 (match_operand 0 "nonimmediate_operand")
724 (match_operand 0 "reg_or_pm1_operand")))
726 ;; Return true if OP is a vector load from the constant pool with just
727 ;; the first element nonzero.
728 (define_predicate "zero_extended_scalar_load_operand"
732 op = maybe_get_pool_constant (op);
735 if (GET_CODE (op) != CONST_VECTOR)
738 (GET_MODE_SIZE (GET_MODE (op)) /
739 GET_MODE_SIZE (GET_MODE_INNER (GET_MODE (op))));
740 for (n_elts--; n_elts > 0; n_elts--)
742 rtx elt = CONST_VECTOR_ELT (op, n_elts);
743 if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
749 /* Return true if operand is a vector constant that is all ones. */
750 (define_predicate "vector_all_ones_operand"
751 (match_code "const_vector")
753 int nunits = GET_MODE_NUNITS (mode);
755 if (GET_CODE (op) == CONST_VECTOR
756 && CONST_VECTOR_NUNITS (op) == nunits)
759 for (i = 0; i < nunits; ++i)
761 rtx x = CONST_VECTOR_ELT (op, i);
762 if (x != constm1_rtx)
771 ; Return 1 when OP is operand acceptable for standard SSE move.
772 (define_predicate "vector_move_operand"
773 (ior (match_operand 0 "nonimmediate_operand")
774 (match_operand 0 "const0_operand")))
776 ;; Return 1 when OP is nonimmediate or standard SSE constant.
777 (define_predicate "nonimmediate_or_sse_const_operand"
778 (match_operand 0 "general_operand")
780 if (nonimmediate_operand (op, mode))
782 if (standard_sse_constant_p (op) > 0)
787 ;; Return true if OP is a register or a zero.
788 (define_predicate "reg_or_0_operand"
789 (ior (match_operand 0 "register_operand")
790 (match_operand 0 "const0_operand")))
792 ;; Return true if op if a valid address, and does not contain
793 ;; a segment override.
794 (define_special_predicate "no_seg_address_operand"
795 (match_operand 0 "address_operand")
797 struct ix86_address parts;
800 ok = ix86_decompose_address (op, &parts);
802 return parts.seg == SEG_DEFAULT;
805 ;; Return nonzero if the rtx is known to be at least 32 bits aligned.
806 (define_predicate "aligned_operand"
807 (match_operand 0 "general_operand")
809 struct ix86_address parts;
812 /* Registers and immediate operands are always "aligned". */
813 if (GET_CODE (op) != MEM)
816 /* All patterns using aligned_operand on memory operands ends up
817 in promoting memory operand to 64bit and thus causing memory mismatch. */
818 if (TARGET_MEMORY_MISMATCH_STALL && !optimize_size)
821 /* Don't even try to do any aligned optimizations with volatiles. */
822 if (MEM_VOLATILE_P (op))
825 if (MEM_ALIGN (op) >= 32)
830 /* Pushes and pops are only valid on the stack pointer. */
831 if (GET_CODE (op) == PRE_DEC
832 || GET_CODE (op) == POST_INC)
835 /* Decode the address. */
836 ok = ix86_decompose_address (op, &parts);
839 /* Look for some component that isn't known to be aligned. */
842 if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
847 if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
852 if (!CONST_INT_P (parts.disp)
853 || (INTVAL (parts.disp) & 3) != 0)
857 /* Didn't find one -- this must be an aligned address. */
861 ;; Returns 1 if OP is memory operand with a displacement.
862 (define_predicate "memory_displacement_operand"
863 (match_operand 0 "memory_operand")
865 struct ix86_address parts;
868 ok = ix86_decompose_address (XEXP (op, 0), &parts);
870 return parts.disp != NULL_RTX;
873 ;; Returns 1 if OP is memory operand with a displacement only.
874 (define_predicate "memory_displacement_only_operand"
875 (match_operand 0 "memory_operand")
877 struct ix86_address parts;
880 ok = ix86_decompose_address (XEXP (op, 0), &parts);
883 if (parts.base || parts.index)
886 return parts.disp != NULL_RTX;
889 ;; Returns 1 if OP is memory operand that cannot be represented
890 ;; by the modRM array.
891 (define_predicate "long_memory_operand"
892 (and (match_operand 0 "memory_operand")
893 (match_test "memory_address_length (op) != 0")))
895 ;; Return 1 if OP is a comparison operator that can be issued by fcmov.
896 (define_predicate "fcmov_comparison_operator"
897 (match_operand 0 "comparison_operator")
899 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
900 enum rtx_code code = GET_CODE (op);
902 if (inmode == CCFPmode || inmode == CCFPUmode)
904 enum rtx_code second_code, bypass_code;
905 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
906 if (bypass_code != UNKNOWN || second_code != UNKNOWN)
908 code = ix86_fp_compare_code_to_integer (code);
910 /* i387 supports just limited amount of conditional codes. */
913 case LTU: case GTU: case LEU: case GEU:
914 if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode
915 || inmode == CCCmode)
918 case ORDERED: case UNORDERED:
926 ;; Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS insns.
927 ;; The first set are supported directly; the second set can't be done with
928 ;; full IEEE support, i.e. NaNs.
930 ;; ??? It would seem that we have a lot of uses of this predicate that pass
931 ;; it the wrong mode. We got away with this because the old function didn't
932 ;; check the mode at all. Mirror that for now by calling this a special
935 (define_special_predicate "sse_comparison_operator"
936 (match_code "eq,lt,le,unordered,ne,unge,ungt,ordered"))
938 ;; Return 1 if OP is a comparison operator that can be issued by
939 ;; avx predicate generation instructions
940 (define_predicate "avx_comparison_float_operator"
941 (match_code "ne,eq,ge,gt,le,lt,unordered,ordered,uneq,unge,ungt,unle,unlt,ltgt"))
943 ;; Return 1 if OP is a comparison operator that can be issued by sse predicate
944 ;; generation instructions
945 (define_predicate "sse5_comparison_float_operator"
946 (and (match_test "TARGET_SSE5")
947 (match_code "ne,eq,ge,gt,le,lt,unordered,ordered,uneq,unge,ungt,unle,unlt,ltgt")))
949 (define_predicate "ix86_comparison_int_operator"
950 (match_code "ne,eq,ge,gt,le,lt"))
952 (define_predicate "ix86_comparison_uns_operator"
953 (match_code "ne,eq,geu,gtu,leu,ltu"))
955 (define_predicate "bt_comparison_operator"
956 (match_code "ne,eq"))
958 ;; Return 1 if OP is a valid comparison operator in valid mode.
959 (define_predicate "ix86_comparison_operator"
960 (match_operand 0 "comparison_operator")
962 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
963 enum rtx_code code = GET_CODE (op);
965 if (inmode == CCFPmode || inmode == CCFPUmode)
967 enum rtx_code second_code, bypass_code;
968 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
969 return (bypass_code == UNKNOWN && second_code == UNKNOWN);
976 if (inmode == CCmode || inmode == CCGCmode
977 || inmode == CCGOCmode || inmode == CCNOmode)
980 case LTU: case GTU: case LEU: case GEU:
981 if (inmode == CCmode || inmode == CCCmode)
984 case ORDERED: case UNORDERED:
985 if (inmode == CCmode)
989 if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
997 ;; Return 1 if OP is a valid comparison operator testing carry flag to be set.
998 (define_predicate "ix86_carry_flag_operator"
999 (match_code "ltu,lt,unlt,gtu,gt,ungt,le,unle,ge,unge,ltgt,uneq")
1001 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
1002 enum rtx_code code = GET_CODE (op);
1004 if (!REG_P (XEXP (op, 0))
1005 || REGNO (XEXP (op, 0)) != FLAGS_REG
1006 || XEXP (op, 1) != const0_rtx)
1009 if (inmode == CCFPmode || inmode == CCFPUmode)
1011 enum rtx_code second_code, bypass_code;
1012 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
1013 if (bypass_code != UNKNOWN || second_code != UNKNOWN)
1015 code = ix86_fp_compare_code_to_integer (code);
1017 else if (inmode == CCCmode)
1018 return code == LTU || code == GTU;
1019 else if (inmode != CCmode)
1025 ;; Nearly general operand, but accept any const_double, since we wish
1026 ;; to be able to drop them into memory rather than have them get pulled
1028 (define_predicate "cmp_fp_expander_operand"
1029 (ior (match_code "const_double")
1030 (match_operand 0 "general_operand")))
1032 ;; Return true if this is a valid binary floating-point operation.
1033 (define_predicate "binary_fp_operator"
1034 (match_code "plus,minus,mult,div"))
1036 ;; Return true if this is a multiply operation.
1037 (define_predicate "mult_operator"
1038 (match_code "mult"))
1040 ;; Return true if this is a division operation.
1041 (define_predicate "div_operator"
1044 ;; Return true if this is a float extend operation.
1045 (define_predicate "float_operator"
1046 (match_code "float"))
1048 ;; Return true for ARITHMETIC_P.
1049 (define_predicate "arith_or_logical_operator"
1050 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
1051 mod,udiv,umod,ashift,rotate,ashiftrt,lshiftrt,rotatert"))
1053 ;; Return 1 if OP is a binary operator that can be promoted to wider mode.
1054 (define_predicate "promotable_binary_operator"
1055 (ior (match_code "plus,and,ior,xor,ashift")
1056 (and (match_code "mult")
1057 (match_test "TARGET_TUNE_PROMOTE_HIMODE_IMUL"))))
1059 ;; To avoid problems when jump re-emits comparisons like testqi_ext_ccno_0,
1060 ;; re-recognize the operand to avoid a copy_to_mode_reg that will fail.
1062 ;; ??? It seems likely that this will only work because cmpsi is an
1063 ;; expander, and no actual insns use this.
1065 (define_predicate "cmpsi_operand"
1066 (ior (match_operand 0 "nonimmediate_operand")
1067 (and (match_code "and")
1068 (match_code "zero_extract" "0")
1069 (match_code "const_int" "1")
1070 (match_code "const_int" "01")
1071 (match_code "const_int" "02")
1072 (match_test "INTVAL (XEXP (XEXP (op, 0), 1)) == 8")
1073 (match_test "INTVAL (XEXP (XEXP (op, 0), 2)) == 8")
1076 (define_predicate "compare_operator"
1077 (match_code "compare"))
1079 (define_predicate "absneg_operator"
1080 (match_code "abs,neg"))
1082 ;; Return 1 if OP is misaligned memory operand
1083 (define_predicate "misaligned_operand"
1084 (and (match_code "mem")
1085 (match_test "MEM_ALIGN (op) < GET_MODE_ALIGNMENT (mode)")))
1087 ;; Return 1 if OP is a vzeroall operation, known to be a PARALLEL.
1088 (define_predicate "vzeroall_operation"
1089 (match_code "parallel")
1091 int nregs = TARGET_64BIT ? 16 : 8;
1093 if (XVECLEN (op, 0) != nregs + 1)