1 ; Options for the IA-32 and AMD64 ports of the compiler.
3 ; Copyright (C) 2005, 2006, 2007, 2008, 2009,
4 ; 2010, 2011 Free Software Foundation, Inc.
6 ; This file is part of GCC.
8 ; GCC is free software; you can redistribute it and/or modify it under
9 ; the terms of the GNU General Public License as published by the Free
10 ; Software Foundation; either version 3, or (at your option) any later
13 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 ; You should have received a copy of the GNU General Public License
19 ; along with GCC; see the file COPYING3. If not see
20 ; <http://www.gnu.org/licenses/>.
23 config/i386/i386-opts.h
25 ; Bit flags that specify the ISA we are compiling for.
27 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT
29 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared
30 ; on the command line.
32 HOST_WIDE_INT ix86_isa_flags_explicit
34 ;; Definitions to add to the cl_target_option structure
45 unsigned char schedule
49 unsigned char branch_cost
51 ;; which flags were passed by the user
53 HOST_WIDE_INT x_ix86_isa_flags_explicit
55 ;; which flags were passed by the user
57 int ix86_target_flags_explicit
59 ;; whether -mtune was not specified
61 unsigned char tune_defaulted
63 ;; whether -march was specified
65 unsigned char arch_specified
69 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
70 sizeof(long double) is 16
73 Target Report Mask(80387) Save
77 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
78 sizeof(long double) is 12
80 maccumulate-outgoing-args
81 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
82 Reserve space for outgoing arguments in the function prologue
85 Target Report Mask(ALIGN_DOUBLE) Save
86 Align some doubles on dword boundary
89 Target RejectNegative Joined UInteger
90 Function starts are aligned to this power of 2
93 Target RejectNegative Joined UInteger
94 Jump targets are aligned to this power of 2
97 Target RejectNegative Joined UInteger
98 Loop code aligned to this power of 2
101 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
102 Align destination of the string operations
105 Target RejectNegative Joined Var(ix86_arch_string)
106 Generate code for given CPU
109 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT)
110 Use given assembler dialect
113 Name(asm_dialect) Type(enum asm_dialect)
114 Known assembler dialects (for use with the -masm-dialect= option):
117 Enum(asm_dialect) String(intel) Value(ASM_INTEL)
120 Enum(asm_dialect) String(att) Value(ASM_ATT)
123 Target RejectNegative Joined UInteger Var(ix86_branch_cost)
124 Branches are this expensive (1-5, arbitrary units)
126 mlarge-data-threshold=
127 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(65536)
128 Data greater than given threshold will go into .ldata section in x86-64 medium model
131 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32)
132 Use given x86-64 code model
135 Name(cmodel) Type(enum cmodel)
136 Known code models (for use with the -mcmodel= option):
139 Enum(cmodel) String(small) Value(CM_SMALL)
142 Enum(cmodel) String(medium) Value(CM_MEDIUM)
145 Enum(cmodel) String(large) Value(CM_LARGE)
148 Enum(cmodel) String(32) Value(CM_32)
151 Enum(cmodel) String(kernel) Value(CM_KERNEL)
154 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead)
157 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
158 Generate sin, cos, sqrt for FPU
161 Target Report Var(ix86_force_drap)
162 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack
165 Target Report Mask(FLOAT_RETURNS) Save
166 Return values of functions in FPU registers
169 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save
170 Generate floating point mathematics using given instruction set
173 Name(fpmath_unit) Type(enum fpmath_unit)
174 Valid arguments to -mfpmath=:
177 Enum(fpmath_unit) String(387) Value(FPMATH_387)
180 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE)
183 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
186 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
189 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
192 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
195 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
198 Target RejectNegative Mask(80387) MaskExists Save
202 Target Report Mask(IEEE_FP) Save
203 Use IEEE math for fp comparisons
205 minline-all-stringops
206 Target Report Mask(INLINE_ALL_STRINGOPS) Save
207 Inline all known string operations
209 minline-stringops-dynamically
210 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
211 Inline memset/memcpy string operations, but perform inline version only for small blocks
214 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
218 Target Report Mask(MS_BITFIELD_LAYOUT) Save
219 Use native (MS) bitfield layout
222 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
225 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
228 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
231 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
233 momit-leaf-frame-pointer
234 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
235 Omit the frame pointer in leaf functions
238 Target RejectNegative Report
239 Set 80387 floating-point precision to 32-bit
242 Target RejectNegative Report
243 Set 80387 floating-point precision to 64-bit
246 Target RejectNegative Report
247 Set 80387 floating-point precision to 80-bit
249 mpreferred-stack-boundary=
250 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
251 Attempt to keep stack aligned to this power of 2
253 mincoming-stack-boundary=
254 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg)
255 Assume incoming stack aligned to this power of 2
258 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
259 Use push instructions to save outgoing arguments
262 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
263 Use red-zone in the x86-64 code
266 Target RejectNegative Joined UInteger Var(ix86_regparm)
267 Number of registers used to pass integer arguments
270 Target Report Mask(RTD) Save
271 Alternate calling convention
274 Target InverseMask(80387) Save
275 Do not use hardware fp
278 Target RejectNegative Mask(SSEREGPARM) Save
279 Use SSE register passing conventions for SF and DF mode
282 Target Report Var(ix86_force_align_arg_pointer) Init(-1)
283 Realign stack in prologue
286 Target Report Mask(STACK_PROBE) Save
290 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop)
291 Chose strategy to generate stringop using
294 Name(stringop_alg) Type(enum stringop_alg)
295 Valid arguments to -mstringop-strategy=:
298 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte)
301 Enum(stringop_alg) String(libcall) Value(libcall)
304 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte)
307 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte)
310 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte)
313 Enum(stringop_alg) String(loop) Value(loop)
316 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop)
319 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU)
320 Use given thread-local storage dialect
323 Name(tls_dialect) Type(enum tls_dialect)
324 Known TLS dialects (for use with the -mtls-dialect= option):
327 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU)
330 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2)
333 Target Report Mask(TLS_DIRECT_SEG_REFS)
334 Use direct references against %gs when accessing tls data
337 Target RejectNegative Joined Var(ix86_tune_string)
338 Schedule code for given CPU
341 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI)
342 Generate code that conforms to the given ABI
345 Name(calling_abi) Type(enum calling_abi)
346 Known ABIs (for use with the -mabi= option):
349 Enum(calling_abi) String(sysv) Value(SYSV_ABI)
352 Enum(calling_abi) String(ms) Value(MS_ABI)
355 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
356 Vector library ABI to use
359 Name(ix86_veclibabi) Type(enum ix86_veclibabi)
360 Known vectorization library ABIs (for use with the -mveclibabi= option):
363 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml)
366 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml)
369 Target Report Mask(VECT8_RETURNS) Save
370 Return 8-byte vectors in memory
373 Target Report Mask(RECIP) Save
374 Generate reciprocals instead of divss and sqrtss.
377 Target Report Mask(CLD) Save
378 Generate cld instruction in the function prologue.
381 Target Report Mask(VZEROUPPER) Save
382 Generate vzeroupper instruction before a transfer of control flow out of
386 Target RejectNegative Var(flag_dispatch_scheduler)
387 Do dispatch scheduling if processor is bdver1 or bdver2 and Haifa scheduling
391 Target Report Mask(PREFER_AVX128) SAVE
392 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
397 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
398 Generate 32bit i386 code
401 Target RejectNegative Negative(mx32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) Save
402 Generate 64bit x86-64 code
405 Target RejectNegative Negative(m32) Report Mask(ISA_X32) Var(ix86_isa_flags) Save
406 Generate 32bit x86-64 code
409 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
410 Support MMX built-in functions
413 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save
414 Support 3DNow! built-in functions
417 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save
418 Support Athlon 3Dnow! built-in functions
421 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
422 Support MMX and SSE built-in functions and code generation
425 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
426 Support MMX, SSE and SSE2 built-in functions and code generation
429 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
430 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
433 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
434 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
437 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
438 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation
441 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
442 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
445 Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save
446 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
449 Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save
450 Do not support SSE4.1 and SSE4.2 built-in functions and code generation
453 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed)
457 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
458 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation
461 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
462 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation
465 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
466 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation
469 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
470 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
473 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
474 Support FMA4 built-in functions and code generation
477 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save
478 Support XOP built-in functions and code generation
481 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save
482 Support LWP built-in functions and code generation
485 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save
486 Support code generation of Advanced Bit Manipulation (ABM) instructions.
489 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save
490 Support code generation of popcnt instruction.
493 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
494 Support BMI built-in functions and code generation
497 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save
498 Support LZCNT built-in function and code generation
501 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save
502 Support TBM built-in functions and code generation
505 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save
506 Support code generation of cmpxchg16b instruction.
509 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save
510 Support code generation of sahf instruction in 64bit x86-64 code.
513 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
514 Support code generation of movbe instruction.
517 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save
518 Support code generation of crc32 instruction.
521 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save
522 Support AES built-in functions and code generation
525 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save
526 Support PCLMUL built-in functions and code generation
529 Target Report Var(ix86_sse2avx)
530 Encode SSE instructions with VEX prefix
533 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save
534 Support FSGSBASE built-in functions and code generation
537 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save
538 Support RDRND built-in functions and code generation
541 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save
542 Support F16C built-in functions and code generation
545 Target Report Var(flag_fentry) Init(-1)
546 Emit profiling counter call at function entry before prologue.
549 Target Report Mask(USE_8BIT_IDIV) Save
550 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check
552 mavx256-split-unaligned-load
553 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save
554 Split 32-byte AVX unaligned load
556 mavx256-split-unaligned-store
557 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save
558 Split 32-byte AVX unaligned store