1 /* Definitions of target machine for GNU compiler for Intel 80386.
2 Copyright (C) 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags;
58 /* Macros used in the machine description to test the flags. */
60 /* configure can arrage to make this 2, to force a 486. */
61 #ifndef TARGET_CPU_DEFAULT
62 #define TARGET_CPU_DEFAULT 0
65 /* Compile 80387 insns for floating point (not library calls). */
66 #define TARGET_80387 (target_flags & 1)
67 /* Compile code for an i486. */
68 #define TARGET_486 (target_flags & 2)
69 /* Compile using ret insn that pops args.
70 This will not work unless you use prototypes at least
71 for all functions that can take varying numbers of args. */
72 #define TARGET_RTD (target_flags & 8)
73 /* Compile passing first two args in regs 0 and 1.
74 This exists only to test compiler features that will
75 be needed for RISC chips. It is not usable
76 and is not intended to be usable on this cpu. */
77 #define TARGET_REGPARM (target_flags & 020)
79 /* Put uninitialized locals into bss, not data.
80 Meaningful only on svr3. */
81 #define TARGET_SVR3_SHLIB (target_flags & 040)
83 /* Use IEEE floating point comparisons. These handle correctly the cases
84 where the result of a comparison is unordered. Normally SIGFPE is
85 generated in such cases, in which case this isn't needed. */
86 #define TARGET_IEEE_FP (target_flags & 0100)
88 /* Functions that return a floating point value may return that value
89 in the 387 FPU or in 386 integer registers. If set, this flag causes
90 the 387 to be used, which is compatible with most calling conventions. */
91 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200)
93 /* Macro to define tables used to set the flags.
94 This is a list in braces of pairs in braces,
95 each pair being { "NAME", VALUE }
96 where VALUE is the bits to set or minus the bits to clear.
97 An empty string NAME is used to identify the default VALUE. */
99 #define TARGET_SWITCHES \
102 { "soft-float", -1}, \
103 { "no-soft-float", 1}, \
110 { "no-regparm", -020}, \
111 { "svr3-shlib", 040}, \
112 { "no-svr3-shlib", -040}, \
113 { "ieee-fp", 0100}, \
114 { "no-ieee-fp", -0100}, \
115 { "fp-ret-in-387", 0200}, \
116 { "no-fp-ret-in-387", -0200}, \
118 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
120 /* This is meant to be redefined in the host dependent files */
121 #define SUBTARGET_SWITCHES
124 /* target machine storage layout */
126 /* Define this if most significant byte of a word is the lowest numbered. */
127 /* That is true on the 80386. */
129 #define BITS_BIG_ENDIAN 0
131 /* Define this if most significant byte of a word is the lowest numbered. */
132 /* That is not true on the 80386. */
133 #define BYTES_BIG_ENDIAN 0
135 /* Define this if most significant word of a multiword number is the lowest
137 /* Not true for 80386 */
138 #define WORDS_BIG_ENDIAN 0
140 /* number of bits in an addressable storage unit */
141 #define BITS_PER_UNIT 8
143 /* Width in bits of a "word", which is the contents of a machine register.
144 Note that this is not necessarily the width of data type `int';
145 if using 16-bit ints on a 80386, this would still be 32.
146 But on a machine with 16-bit registers, this would be 16. */
147 #define BITS_PER_WORD 32
149 /* Width of a word, in units (bytes). */
150 #define UNITS_PER_WORD 4
152 /* Width in bits of a pointer.
153 See also the macro `Pmode' defined below. */
154 #define POINTER_SIZE 32
156 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
157 #define PARM_BOUNDARY 32
159 /* Boundary (in *bits*) on which stack pointer should be aligned. */
160 #define STACK_BOUNDARY 32
162 /* Allocation boundary (in *bits*) for the code of a function.
163 For i486, we get better performance by aligning to a cache
164 line (i.e. 16 byte) boundary. */
165 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
167 /* Alignment of field after `int : 0' in a structure. */
169 #define EMPTY_FIELD_BOUNDARY 32
171 /* Minimum size in bits of the largest boundary to which any
172 and all fundamental data types supported by the hardware
173 might need to be aligned. No data type wants to be aligned
174 rounder than this. The i386 supports 64-bit floating point
175 quantities, but these can be aligned on any 32-bit boundary. */
176 #define BIGGEST_ALIGNMENT 32
178 /* Set this non-zero if move instructions will actually fail to work
179 when given unaligned data. */
180 #define STRICT_ALIGNMENT 0
182 /* If bit field type is int, don't let it cross an int,
183 and give entire struct the alignment of an int. */
184 /* Required on the 386 since it doesn't have bitfield insns. */
185 #define PCC_BITFIELD_TYPE_MATTERS 1
187 /* Align loop starts for optimal branching. */
188 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
189 ASM_OUTPUT_ALIGN (FILE, 2)
191 /* This is how to align an instruction for optimal branching.
192 On i486 we'll get better performance by aligning on a
193 cache line (i.e. 16 byte) boundary. */
194 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
195 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
197 /* Standard register usage. */
199 /* This processor has special stack-like registers. See reg-stack.c
204 /* Number of actual hardware registers.
205 The hardware registers are assigned numbers for the compiler
206 from 0 to just below FIRST_PSEUDO_REGISTER.
207 All registers that the compiler knows about must be given numbers,
208 even those that are not normally considered general registers.
210 In the 80386 we give the 8 general purpose registers the numbers 0-7.
211 We number the floating point registers 8-15.
212 Note that registers 0-7 can be accessed as a short or int,
213 while only 0-3 may be used with byte `mov' instructions.
215 Reg 16 does not correspond to any hardware register, but instead
216 appears in the RTL as an argument pointer prior to reload, and is
217 eliminated during reloading in favor of either the stack or frame
220 #define FIRST_PSEUDO_REGISTER 17
222 /* 1 for registers that have pervasive standard uses
223 and are not available for the register allocator.
224 On the 80386, the stack pointer is such, as is the arg pointer. */
225 #define FIXED_REGISTERS \
226 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
227 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
229 /* 1 for registers not available across function calls.
230 These must include the FIXED_REGISTERS and also any
231 registers that can be used without being saved.
232 The latter must include the registers where values are returned
233 and the register where structure-value addresses are passed.
234 Aside from that, you can include as many other registers as you like. */
236 #define CALL_USED_REGISTERS \
237 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
238 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
240 /* Macro to conditionally modify fixed_regs/call_used_regs. */
241 #define CONDITIONAL_REGISTER_USAGE \
245 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
246 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
248 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
252 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
253 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
254 if (TEST_HARD_REG_BIT (x, i)) \
255 fixed_regs[i] = call_used_regs[i] = 1; \
259 /* Return number of consecutive hard regs needed starting at reg REGNO
260 to hold something of mode MODE.
261 This is ordinarily the length in words of a value of mode MODE
262 but can be less for certain modes in special long registers.
264 Actually there are no two word move instructions for consecutive
265 registers. And only registers 0-3 may have mov byte instructions
269 #define HARD_REGNO_NREGS(REGNO, MODE) \
270 (FP_REGNO_P (REGNO) ? 1 \
271 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
273 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
274 On the 80386, the first 4 cpu registers can hold any mode
275 while the floating point registers may hold only floating point.
276 Make it clear that the fp regs could not hold a 16-byte float. */
278 /* The casts to int placate a compiler on a microvax,
279 for cross-compiler testing. */
281 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
284 : FP_REGNO_P ((REGNO)) \
285 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
286 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
287 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
288 : (int) (MODE) != (int) QImode)
290 /* Value is 1 if it is a good idea to tie two pseudo registers
291 when one has mode MODE1 and one has mode MODE2.
292 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
293 for any hard reg, then this must be 0 for correct output. */
295 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
297 /* A C expression returning the cost of moving data from a register of class
298 CLASS1 to one of CLASS2.
300 On the i386, copying between floating-point and fixed-point
301 registers is expensive. */
303 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
304 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
305 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
308 /* Specify the registers used for certain standard purposes.
309 The values of these macros are register numbers. */
311 /* on the 386 the pc register is %eip, and is not usable as a general
312 register. The ordinary mov instructions won't work */
313 /* #define PC_REGNUM */
315 /* Register to use for pushing function arguments. */
316 #define STACK_POINTER_REGNUM 7
318 /* Base register for access to local variables of the function. */
319 #define FRAME_POINTER_REGNUM 6
321 /* First floating point reg */
322 #define FIRST_FLOAT_REG 8
324 /* First & last stack-like regs */
325 #define FIRST_STACK_REG FIRST_FLOAT_REG
326 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
328 /* Value should be nonzero if functions must have frame pointers.
329 Zero means the frame pointer need not be set up (and parms
330 may be accessed via the stack pointer) in functions that seem suitable.
331 This is computed in `reload', in reload1.c. */
332 #define FRAME_POINTER_REQUIRED 0
334 /* Base register for access to arguments of the function. */
335 #define ARG_POINTER_REGNUM 16
337 /* Register in which static-chain is passed to a function. */
338 #define STATIC_CHAIN_REGNUM 2
340 /* Register to hold the addressing base for position independent
341 code access to data items. */
342 #define PIC_OFFSET_TABLE_REGNUM 3
344 /* Register in which address to store a structure value
345 arrives in the function. On the 386, the prologue
346 copies this from the stack to register %eax. */
347 #define STRUCT_VALUE_INCOMING 0
349 /* Place in which caller passes the structure value address.
350 0 means push the value on the stack like an argument. */
351 #define STRUCT_VALUE 0
353 /* Define the classes of registers for register constraints in the
354 machine description. Also define ranges of constants.
356 One of the classes must always be named ALL_REGS and include all hard regs.
357 If there is more than one class, another class must be named NO_REGS
358 and contain no registers.
360 The name GENERAL_REGS must be the name of a class (or an alias for
361 another name such as ALL_REGS). This is the class of registers
362 that is allowed by "g" or "r" in a register constraint.
363 Also, registers outside this class are allocated only when
364 instructions express preferences for them.
366 The classes must be numbered in nondecreasing order; that is,
367 a larger-numbered class must never be contained completely
368 in a smaller-numbered class.
370 For any two classes, it is very desirable that there be another
371 class that represents their union.
373 It might seem that class BREG is unnecessary, since no useful 386
374 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
375 and the "b" register constraint is useful in asms for syscalls. */
380 AREG, DREG, CREG, BREG,
381 Q_REGS, /* %eax %ebx %ecx %edx */
383 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
384 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
385 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
387 ALL_REGS, LIM_REG_CLASSES
390 #define N_REG_CLASSES (int) LIM_REG_CLASSES
392 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
394 /* Give names of register classes as strings for dump file. */
396 #define REG_CLASS_NAMES \
398 "AREG", "DREG", "CREG", "BREG", \
403 "FP_TOP_REG", "FP_SECOND_REG", \
407 /* Define which registers fit in which classes.
408 This is an initializer for a vector of HARD_REG_SET
409 of length N_REG_CLASSES. */
411 #define REG_CLASS_CONTENTS \
413 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
415 0x10, 0x20, /* SIREG, DIREG */ \
416 0x1007f, /* INDEX_REGS */ \
417 0x100ff, /* GENERAL_REGS */ \
418 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
419 0xff00, /* FLOAT_REGS */ \
422 /* The same information, inverted:
423 Return the class number of the smallest class containing
424 reg number REGNO. This could be a conditional expression
425 or could index an array. */
427 extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
428 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
430 /* When defined, the compiler allows registers explicitly used in the
431 rtl to be used as spill registers but prevents the compiler from
432 extending the lifetime of these registers. */
434 #define SMALL_REGISTER_CLASSES
436 #define QI_REG_P(X) \
437 (REG_P (X) && REGNO (X) < 4)
438 #define NON_QI_REG_P(X) \
439 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
441 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
442 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
444 #define STACK_REG_P(xop) (REG_P (xop) && \
445 REGNO (xop) >= FIRST_STACK_REG && \
446 REGNO (xop) <= LAST_STACK_REG)
448 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
450 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
452 /* Try to maintain the accuracy of the death notes for regs satisfying the
453 following. Important for stack like regs, to know when to pop. */
455 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
457 /* 1 if register REGNO can magically overlap other regs.
458 Note that nonzero values work only in very special circumstances. */
460 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
462 /* The class value for index registers, and the one for base regs. */
464 #define INDEX_REG_CLASS INDEX_REGS
465 #define BASE_REG_CLASS GENERAL_REGS
467 /* Get reg_class from a letter such as appears in the machine description. */
469 #define REG_CLASS_FROM_LETTER(C) \
470 ((C) == 'r' ? GENERAL_REGS : \
471 (C) == 'q' ? Q_REGS : \
472 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
475 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
478 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
481 (C) == 'a' ? AREG : \
482 (C) == 'b' ? BREG : \
483 (C) == 'c' ? CREG : \
484 (C) == 'd' ? DREG : \
485 (C) == 'D' ? DIREG : \
486 (C) == 'S' ? SIREG : NO_REGS)
488 /* The letters I, J, K, L and M in a register constraint string
489 can be used to stand for particular ranges of immediate operands.
490 This macro defines what the ranges are.
491 C is the letter, and VALUE is a constant value.
492 Return 1 if VALUE is in the range specified by C.
494 I is for non-DImode shifts.
495 J is for DImode shifts.
496 K and L are for an `andsi' optimization.
497 M is for shifts that can be executed by the "lea" opcode.
500 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
501 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
502 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
503 (C) == 'K' ? (VALUE) == 0xff : \
504 (C) == 'L' ? (VALUE) == 0xffff : \
505 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
508 /* Similar, but for floating constants, and defining letters G and H.
509 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
510 TARGET_387 isn't set, because the stack register converter may need to
511 load 0.0 into the function value register. */
513 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
514 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
516 /* Place additional restrictions on the register class to use when it
517 is necessary to be able to hold a value of mode MODE in a reload
518 register for which class CLASS would ordinarily be used. */
520 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
521 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
524 /* Given an rtx X being reloaded into a reg required to be
525 in class CLASS, return the class of reg to actually use.
526 In general this is just CLASS; but on some machines
527 in some cases it is preferable to use a more restrictive class.
528 On the 80386 series, we prevent floating constants from being
529 reloaded into floating registers (since no move-insn can do that)
530 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
532 /* Don't put float CONST_DOUBLE into fp regs.
533 QImode must go into class Q_REGS.
534 MODE_INT must not go into FLOAT_REGS. */
536 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
537 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
538 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
539 : (FLOAT_CLASS_P (CLASS) \
540 && (GET_MODE (X) == VOIDmode \
541 || GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)) ? GENERAL_REGS \
542 : (CLASS) == ALL_REGS ? GENERAL_REGS \
545 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
546 ((CLASS) == ALL_REGS ? GENERAL_REGS \
549 /* If we are copying between general and FP registers, we need a memory
552 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
553 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
554 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
556 /* Return the maximum number of consecutive registers
557 needed to represent mode MODE in a register of class CLASS. */
558 /* On the 80386, this is the size of MODE in words,
559 except in the FP regs, where a single reg is always enough. */
560 #define CLASS_MAX_NREGS(CLASS, MODE) \
561 (FLOAT_CLASS_P (CLASS) ? 1 : \
562 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
564 /* Stack layout; function entry, exit and calling. */
566 /* Define this if pushing a word on the stack
567 makes the stack pointer a smaller address. */
568 #define STACK_GROWS_DOWNWARD
570 /* Define this if the nominal address of the stack frame
571 is at the high-address end of the local variables;
572 that is, each additional local variable allocated
573 goes at a more negative offset in the frame. */
574 #define FRAME_GROWS_DOWNWARD
576 /* Offset within stack frame to start allocating local variables at.
577 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
578 first local allocated. Otherwise, it is the offset to the BEGINNING
579 of the first local allocated. */
580 #define STARTING_FRAME_OFFSET 0
582 /* If we generate an insn to push BYTES bytes,
583 this says how many the stack pointer really advances by.
584 On 386 pushw decrements by exactly 2 no matter what the position was.
585 On the 386 there is no pushb; we use pushw instead, and this
586 has the effect of rounding up to 2. */
588 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
590 /* Offset of first parameter from the argument pointer register value. */
591 #define FIRST_PARM_OFFSET(FNDECL) 0
593 /* Value is the number of bytes of arguments automatically
594 popped when returning from a subroutine call.
595 FUNTYPE is the data type of the function (as a tree),
596 or for a library call it is an identifier node for the subroutine name.
597 SIZE is the number of bytes of arguments passed on the stack.
599 On the 80386, the RTD insn may be used to pop them if the number
600 of args is fixed, but if the number is variable then the caller
601 must pop them all. RTD can't be used for library calls now
602 because the library is compiled with the Unix compiler.
603 Use of RTD is a selectable option, since it is incompatible with
604 standard Unix calling sequences. If the option is not selected,
605 the caller must always pop the args. */
607 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
608 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
610 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
611 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
612 == void_type_node))) ? (SIZE) \
613 : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)
615 /* Define how to find the value returned by a function.
616 VALTYPE is the data type of the value (as a tree).
617 If the precise function being called is known, FUNC is its FUNCTION_DECL;
618 otherwise, FUNC is 0. */
619 #define FUNCTION_VALUE(VALTYPE, FUNC) \
620 gen_rtx (REG, TYPE_MODE (VALTYPE), \
621 VALUE_REGNO (TYPE_MODE (VALTYPE)))
623 /* Define how to find the value returned by a library function
624 assuming the value has mode MODE. */
626 #define LIBCALL_VALUE(MODE) \
627 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
629 /* 1 if N is a possible register number for function argument passing.
630 On the 80386, no registers are used in this way.
631 *NOTE* -mregparm does not work.
632 It exists only to test register calling conventions. */
634 #define FUNCTION_ARG_REGNO_P(N) 0
636 /* Define a data type for recording info about an argument list
637 during the scan of that argument list. This data type should
638 hold all necessary information about the function itself
639 and about the args processed so far, enough to enable macros
640 such as FUNCTION_ARG to determine where the next arg should go.
642 On the 80386, this is a single integer, which is a number of bytes
643 of arguments scanned so far. */
645 #define CUMULATIVE_ARGS int
647 /* Initialize a variable CUM of type CUMULATIVE_ARGS
648 for a call to a function whose data type is FNTYPE.
649 For a library call, FNTYPE is 0.
651 On the 80386, the offset starts at 0. */
653 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
656 /* Update the data in CUM to advance over an argument
657 of mode MODE and data type TYPE.
658 (TYPE is null for libcalls where that information may not be available.) */
660 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
661 ((CUM) += ((MODE) != BLKmode \
662 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
663 : (int_size_in_bytes (TYPE) + 3) & ~3))
665 /* Define where to put the arguments to a function.
666 Value is zero to push the argument on the stack,
667 or a hard register in which to store the argument.
669 MODE is the argument's machine mode.
670 TYPE is the data type of the argument (as a tree).
671 This is null for libcalls where that information may
673 CUM is a variable of type CUMULATIVE_ARGS which gives info about
674 the preceding args and about the function being called.
675 NAMED is nonzero if this argument is a named parameter
676 (otherwise it is an extra parameter matching an ellipsis). */
679 /* On the 80386 all args are pushed, except if -mregparm is specified
680 then the first two words of arguments are passed in EAX, EDX.
681 *NOTE* -mregparm does not work.
682 It exists only to test register calling conventions. */
684 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
685 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
687 /* For an arg passed partly in registers and partly in memory,
688 this is the number of registers used.
689 For args passed entirely in registers or entirely in memory, zero. */
692 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
693 ((TARGET_REGPARM && (CUM) < 8 \
694 && 8 < ((CUM) + ((MODE) == BLKmode \
695 ? int_size_in_bytes (TYPE) \
696 : GET_MODE_SIZE (MODE)))) \
699 /* This macro generates the assembly code for function entry.
700 FILE is a stdio stream to output the code to.
701 SIZE is an int: how many units of temporary storage to allocate.
702 Refer to the array `regs_ever_live' to determine which registers
703 to save; `regs_ever_live[I]' is nonzero if register number I
704 is ever used in the function. This macro is responsible for
705 knowing which registers should not be saved even if used. */
707 #define FUNCTION_PROLOGUE(FILE, SIZE) \
708 function_prologue (FILE, SIZE)
710 /* Output assembler code to FILE to increment profiler label # LABELNO
711 for profiling a function entry. */
713 #define FUNCTION_PROFILER(FILE, LABELNO) \
717 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
718 LPREFIX, (LABELNO)); \
719 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
723 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
724 fprintf (FILE, "\tcall _mcount\n"); \
728 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
729 the stack pointer does not matter. The value is tested only in
730 functions that have frame pointers.
731 No definition is equivalent to always zero. */
732 /* Note on the 386 it might be more efficient not to define this since
733 we have to restore it ourselves from the frame pointer, in order to
736 #define EXIT_IGNORE_STACK 1
738 /* This macro generates the assembly code for function exit,
739 on machines that need it. If FUNCTION_EPILOGUE is not defined
740 then individual return instructions are generated for each
741 return statement. Args are same as for FUNCTION_PROLOGUE.
743 The function epilogue should not depend on the current stack pointer!
744 It should use the frame pointer only. This is mandatory because
745 of alloca; we also take advantage of it to omit stack adjustments
748 If the last non-note insn in the function is a BARRIER, then there
749 is no need to emit a function prologue, because control does not fall
750 off the end. This happens if the function ends in an "exit" call, or
751 if a `return' insn is emitted directly into the function. */
753 #define FUNCTION_EPILOGUE(FILE, SIZE) \
755 rtx last = get_last_insn (); \
756 if (last && GET_CODE (last) == NOTE) \
757 last = prev_nonnote_insn (last); \
758 if (! last || GET_CODE (last) != BARRIER) \
759 function_epilogue (FILE, SIZE); \
762 /* Output assembler code for a block containing the constant parts
763 of a trampoline, leaving space for the variable parts. */
765 /* On the 386, the trampoline contains three instructions:
769 #define TRAMPOLINE_TEMPLATE(FILE) \
771 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
772 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
773 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
774 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
775 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
776 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
777 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
778 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
781 /* Length in units of the trampoline for entering a nested function. */
783 #define TRAMPOLINE_SIZE 12
785 /* Emit RTL insns to initialize the variable parts of a trampoline.
786 FNADDR is an RTX for the address of the function's pure code.
787 CXT is an RTX for the static chain value for the function. */
789 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
791 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
792 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
795 /* Definitions for register eliminations.
797 This is an array of structures. Each structure initializes one pair
798 of eliminable registers. The "from" register number is given first,
799 followed by "to". Eliminations of the same "from" register are listed
800 in order of preference.
802 We have two registers that can be eliminated on the i386. First, the
803 frame pointer register can often be eliminated in favor of the stack
804 pointer register. Secondly, the argument pointer register can always be
805 eliminated; it is replaced with either the stack or frame pointer. */
807 #define ELIMINABLE_REGS \
808 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
809 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
810 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
812 /* Given FROM and TO register numbers, say whether this elimination is allowed.
813 Frame pointer elimination is automatically handled.
815 For the i386, if frame pointer elimination is being done, we would like to
816 convert ap into sp, not fp.
818 All other eliminations are valid. */
820 #define CAN_ELIMINATE(FROM, TO) \
821 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
822 ? ! frame_pointer_needed \
825 /* Define the offset between two registers, one to be eliminated, and the other
826 its replacement, at the start of a routine. */
828 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
830 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
831 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
837 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
838 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
839 || (current_function_uses_pic_offset_table \
840 && regno == PIC_OFFSET_TABLE_REGNUM)) \
843 (OFFSET) = offset + get_frame_size (); \
845 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
846 (OFFSET) += 4; /* Skip saved PC */ \
850 /* Addressing modes, and classification of registers for them. */
852 /* #define HAVE_POST_INCREMENT */
853 /* #define HAVE_POST_DECREMENT */
855 /* #define HAVE_PRE_DECREMENT */
856 /* #define HAVE_PRE_INCREMENT */
858 /* Macros to check register numbers against specific register classes. */
860 /* These assume that REGNO is a hard or pseudo reg number.
861 They give nonzero only if REGNO is a hard reg of the suitable class
862 or a pseudo reg currently allocated to a suitable hard reg.
863 Since they use reg_renumber, they are safe only once reg_renumber
864 has been allocated, which happens in local-alloc.c. */
866 #define REGNO_OK_FOR_INDEX_P(REGNO) \
867 ((REGNO) < STACK_POINTER_REGNUM \
868 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
870 #define REGNO_OK_FOR_BASE_P(REGNO) \
871 ((REGNO) <= STACK_POINTER_REGNUM \
872 || (REGNO) == ARG_POINTER_REGNUM \
873 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
875 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
876 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
878 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
879 and check its validity for a certain class.
880 We have two alternate definitions for each of them.
881 The usual definition accepts all pseudo regs; the other rejects
882 them unless they have been allocated suitable hard regs.
883 The symbol REG_OK_STRICT causes the latter definition to be used.
885 Most source files want to accept pseudo regs in the hope that
886 they will get allocated to the class that the insn wants them to be in.
887 Source files for reload pass need to be strict.
888 After reload, it makes no difference, since pseudo regs have
889 been eliminated by then. */
891 #ifndef REG_OK_STRICT
893 /* Nonzero if X is a hard reg that can be used as an index or if
894 it is a pseudo reg. */
896 #define REG_OK_FOR_INDEX_P(X) \
897 (REGNO (X) < STACK_POINTER_REGNUM \
898 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
900 /* Nonzero if X is a hard reg that can be used as a base reg
901 of if it is a pseudo reg. */
904 #define REG_OK_FOR_BASE_P(X) \
905 (REGNO (X) <= STACK_POINTER_REGNUM \
906 || REGNO (X) == ARG_POINTER_REGNUM \
907 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
909 #define REG_OK_FOR_STRREG_P(X) \
910 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
914 /* Nonzero if X is a hard reg that can be used as an index. */
915 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
916 /* Nonzero if X is a hard reg that can be used as a base reg. */
917 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
918 #define REG_OK_FOR_STRREG_P(X) \
919 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
923 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
924 that is a valid memory address for an instruction.
925 The MODE argument is the machine mode for the MEM expression
926 that wants to use this address.
928 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
929 except for CONSTANT_ADDRESS_P which is usually machine-independent.
931 See legitimize_pic_address in i386.c for details as to what
932 constitutes a legitimate address when -fpic is used. */
934 #define MAX_REGS_PER_ADDRESS 2
936 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
938 /* Nonzero if the constant value X is a legitimate general operand.
939 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
941 #define LEGITIMATE_CONSTANT_P(X) 1
943 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
944 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
946 #define LEGITIMATE_INDEX_REG_P(X) \
947 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
949 /* Return 1 if X is an index or an index times a scale. */
951 #define LEGITIMATE_INDEX_P(X) \
952 (LEGITIMATE_INDEX_REG_P (X) \
953 || (GET_CODE (X) == MULT \
954 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
955 && GET_CODE (XEXP (X, 1)) == CONST_INT \
956 && (INTVAL (XEXP (X, 1)) == 2 \
957 || INTVAL (XEXP (X, 1)) == 4 \
958 || INTVAL (XEXP (X, 1)) == 8)))
960 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
962 #define GO_IF_INDEXING(X, ADDR) \
963 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
964 GO_IF_INDEXABLE_BASE (X, ADDR); \
965 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
966 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
967 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
968 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
970 /* We used to allow this, but it isn't ever used.
971 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
972 && REG_P (XEXP (X, 0)) \
973 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
976 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
978 if (CONSTANT_ADDRESS_P (X) \
979 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
981 GO_IF_INDEXING (X, ADDR); \
982 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
984 rtx x0 = XEXP (X, 0); \
985 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
986 { GO_IF_INDEXING (x0, ADDR); } \
987 else if (x0 == pic_offset_table_rtx) \
989 else if (GET_CODE (x0) == PLUS) \
991 if (XEXP (x0, 0) == pic_offset_table_rtx) \
992 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
993 if (XEXP (x0, 1) == pic_offset_table_rtx) \
994 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
999 /* Try machine-dependent ways of modifying an illegitimate address
1000 to be legitimate. If we find one, return the new, valid address.
1001 This macro is used in only one place: `memory_address' in explow.c.
1003 OLDX is the address as it was before break_out_memory_refs was called.
1004 In some cases it is useful to look at this to decide what needs to be done.
1006 MODE and WIN are passed so that this macro can use
1007 GO_IF_LEGITIMATE_ADDRESS.
1009 It is always safe for this macro to do nothing. It exists to recognize
1010 opportunities to optimize the output.
1012 For the 80386, we handle X+REG by loading X into a register R and
1013 using R+REG. R will go in a general reg and indexing will be used.
1014 However, if REG is a broken-out memory address or multiplication,
1015 nothing needs to be done because REG can certainly go in a general reg.
1017 When -fpic is used, special handling is needed for symbolic references.
1018 See comments by legitimize_pic_address in i386.c for details. */
1020 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1021 { extern rtx legitimize_pic_address (); \
1022 int ch = (X) != (OLDX); \
1023 if (flag_pic && SYMBOLIC_CONST (X)) \
1025 (X) = legitimize_pic_address (X, 0); \
1026 if (memory_address_p (MODE, X)) \
1029 if (GET_CODE (X) == PLUS) \
1030 { if (GET_CODE (XEXP (X, 0)) == MULT) \
1031 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
1032 if (GET_CODE (XEXP (X, 1)) == MULT) \
1033 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
1034 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1035 && GET_CODE (XEXP (X, 0)) == REG) \
1037 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
1038 ch = 1, (X) = legitimize_pic_address (X, 0); \
1039 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1040 if (GET_CODE (XEXP (X, 0)) == REG) \
1041 { register rtx temp = gen_reg_rtx (Pmode); \
1042 register rtx val = force_operand (XEXP (X, 1), temp); \
1043 if (val != temp) emit_move_insn (temp, val); \
1044 XEXP (X, 1) = temp; \
1046 else if (GET_CODE (XEXP (X, 1)) == REG) \
1047 { register rtx temp = gen_reg_rtx (Pmode); \
1048 register rtx val = force_operand (XEXP (X, 0), temp); \
1049 if (val != temp) emit_move_insn (temp, val); \
1050 XEXP (X, 0) = temp; \
1053 /* Nonzero if the constant value X is a legitimate general operand
1054 when generating PIC code. It is given that flag_pic is on and
1055 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1057 #define LEGITIMATE_PIC_OPERAND_P(X) \
1058 (! SYMBOLIC_CONST (X) \
1059 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1061 #define SYMBOLIC_CONST(X) \
1062 (GET_CODE (X) == SYMBOL_REF \
1063 || GET_CODE (X) == LABEL_REF \
1064 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1066 /* Go to LABEL if ADDR (a legitimate address expression)
1067 has an effect that depends on the machine mode it is used for.
1068 On the 80386, only postdecrement and postincrement address depend thus
1069 (the amount of decrement or increment being the length of the operand). */
1070 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1071 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1073 /* Define this macro if references to a symbol must be treated
1074 differently depending on something about the variable or
1075 function named by the symbol (such as what section it is in).
1077 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1078 so that we may access it directly in the GOT. */
1080 #define ENCODE_SECTION_INFO(DECL) \
1085 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1086 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1087 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1088 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1089 || ! TREE_PUBLIC (DECL)); \
1094 /* Specify the machine mode that this machine uses
1095 for the index in the tablejump instruction. */
1096 #define CASE_VECTOR_MODE Pmode
1098 /* Define this if the tablejump instruction expects the table
1099 to contain offsets from the address of the table.
1100 Do not define this if the table should contain absolute addresses. */
1101 /* #define CASE_VECTOR_PC_RELATIVE */
1103 /* Specify the tree operation to be used to convert reals to integers.
1104 This should be changed to take advantage of fist --wfs ??
1106 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1108 /* This is the kind of divide that is easiest to do in the general case. */
1109 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1111 /* Define this as 1 if `char' should by default be signed; else as 0. */
1112 #define DEFAULT_SIGNED_CHAR 1
1114 /* Max number of bytes we can move from memory to memory
1115 in one reasonably fast instruction. */
1118 /* MOVE_RATIO is the number of move instructions that is better than a
1119 block move. Make this large on i386, since the block move is very
1120 inefficient with small blocks, and the hard register needs of the
1121 block move require much reload work. */
1122 #define MOVE_RATIO 5
1124 /* Define this if zero-extension is slow (more than one real instruction). */
1125 /* #define SLOW_ZERO_EXTEND */
1127 /* Nonzero if access to memory by bytes is slow and undesirable. */
1128 #define SLOW_BYTE_ACCESS 0
1130 /* Define if shifts truncate the shift count
1131 which implies one can omit a sign-extension or zero-extension
1132 of a shift count. */
1133 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1135 /* #define SHIFT_COUNT_TRUNCATED */
1137 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1138 is done just by pretending it is already truncated. */
1139 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1141 /* We assume that the store-condition-codes instructions store 0 for false
1142 and some other value for true. This is the value stored for true. */
1144 #define STORE_FLAG_VALUE 1
1146 /* When a prototype says `char' or `short', really pass an `int'.
1147 (The 386 can't easily push less than an int.) */
1149 #define PROMOTE_PROTOTYPES
1151 /* Specify the machine mode that pointers have.
1152 After generation of rtl, the compiler makes no further distinction
1153 between pointers and any other objects of this machine mode. */
1154 #define Pmode SImode
1156 /* A function address in a call instruction
1157 is a byte address (for indexing purposes)
1158 so give the MEM rtx a byte's mode. */
1159 #define FUNCTION_MODE QImode
1161 /* Define this if addresses of constant functions
1162 shouldn't be put through pseudo regs where they can be cse'd.
1163 Desirable on the 386 because a CALL with a constant address is
1164 not much slower than one with a register address. */
1165 #define NO_FUNCTION_CSE
1167 /* Provide the costs of a rtl expression. This is in the body of a
1170 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1172 return COSTS_N_INSNS (10); \
1177 return COSTS_N_INSNS (40); \
1179 if (GET_CODE (XEXP (X, 0)) == REG \
1180 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1185 /* Compute the cost of computing a constant rtl expression RTX
1186 whose rtx-code is CODE. The body of this macro is a portion
1187 of a switch statement. If the code is computed here,
1188 return it with a return statement. Otherwise, break from the switch. */
1190 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1195 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1196 case CONST_DOUBLE: \
1199 if (GET_MODE (RTX) == VOIDmode) \
1201 code = standard_80387_constant_p (RTX); \
1202 return code == 1 ? 0 : \
1207 /* Compute the cost of an address. This is meant to approximate the size
1208 and/or execution delay of an insn using that address. If the cost is
1209 approximated by the RTL complexity, including CONST_COSTS above, as
1210 is usually the case for CISC machines, this macro should not be defined.
1211 For aggressively RISCy machines, only one insn format is allowed, so
1212 this macro should be a constant. The value of this macro only matters
1213 for valid addresses.
1215 For i386, it is better to use a complex address than let gcc copy
1216 the address into a reg and make a new pseudo. But not if the address
1217 requires to two regs - that would mean more pseudos with longer
1220 #define ADDRESS_COST(RTX) \
1221 ((CONSTANT_P (RTX) \
1222 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1223 && REG_P (XEXP (RTX, 0)))) ? 0 \
1227 /* Add any extra modes needed to represent the condition code.
1229 For the i386, we need separate modes when floating-point equality
1230 comparisons are being done. */
1232 #define EXTRA_CC_MODES CCFPEQmode
1234 /* Define the names for the modes specified above. */
1235 #define EXTRA_CC_NAMES "CCFPEQ"
1237 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1238 return the mode to be used for the comparison.
1240 For floating-point equality comparisons, CCFPEQmode should be used.
1241 VOIDmode should be used in all other cases. */
1243 #define SELECT_CC_MODE(OP,X,Y) \
1244 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1245 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1247 /* Define the information needed to generate branch and scc insns. This is
1248 stored from the compare operation. Note that we can't use "rtx" here
1249 since it hasn't been defined! */
1251 extern struct rtx_def *i386_compare_op0, *i386_compare_op1;
1252 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1254 /* Tell final.c how to eliminate redundant test instructions. */
1256 /* Here we define machine-dependent flags and fields in cc_status
1257 (see `conditions.h'). */
1259 /* Set if the cc value is actually in the 80387, so a floating point
1260 conditional branch must be output. */
1261 #define CC_IN_80387 04000
1263 /* Set if the CC value was stored in a nonstandard way, so that
1264 the state of equality is indicated by zero in the carry bit. */
1265 #define CC_Z_IN_NOT_C 010000
1267 /* Store in cc_status the expressions
1268 that the condition codes will describe
1269 after execution of an instruction whose pattern is EXP.
1270 Do not alter them if the instruction would not alter the cc's. */
1272 #define NOTICE_UPDATE_CC(EXP, INSN) \
1273 notice_update_cc((EXP))
1275 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1276 FLOAT following a floating point comparison.
1277 Use NO_OV following an arithmetic insn that set the cc's
1278 before a test insn that was deleted.
1279 NO_OV may be zero, meaning final should reinsert the test insn
1280 because the jump cannot be handled properly without it. */
1282 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1284 if (cc_prev_status.flags & CC_IN_80387) \
1286 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1291 /* Control the assembler format that we output, to the extent
1292 this does not vary between assemblers. */
1294 /* How to refer to registers in assembler output.
1295 This sequence is indexed by compiler's hard-register-number (see above). */
1297 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1298 For non floating point regs, the following are the HImode names.
1300 For float regs, the stack top is sometimes referred to as "%st(0)"
1301 instead of just "%st". PRINT_REG handles this with the "y" code. */
1303 #define HI_REGISTER_NAMES \
1304 {"ax","dx","cx","bx","si","di","bp","sp", \
1305 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1307 #define REGISTER_NAMES HI_REGISTER_NAMES
1309 /* Table of additional register names to use in user input. */
1311 #define ADDITIONAL_REGISTER_NAMES \
1312 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1313 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1314 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1315 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1317 /* Note we are omitting these since currently I don't know how
1318 to get gcc to use these, since they want the same but different
1319 number as al, and ax.
1322 /* note the last four are not really qi_registers, but
1323 the md will have to never output movb into one of them
1324 only a movw . There is no movb into the last four regs */
1326 #define QI_REGISTER_NAMES \
1327 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1329 /* These parallel the array above, and can be used to access bits 8:15
1330 of regs 0 through 3. */
1332 #define QI_HIGH_REGISTER_NAMES \
1333 {"ah", "dh", "ch", "bh", }
1335 /* How to renumber registers for dbx and gdb. */
1337 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1338 #define DBX_REGISTER_NUMBER(n) \
1349 /* This is how to output the definition of a user-level label named NAME,
1350 such as the label on a static function or variable NAME. */
1352 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1353 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1355 /* This is how to output an assembler line defining a `double' constant. */
1357 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1358 fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE))
1361 /* This is how to output an assembler line defining a `float' constant. */
1363 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1364 do { union { float f; long l;} tem; \
1366 fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \
1370 /* Store in OUTPUT a string (made with alloca) containing
1371 an assembler-name for a local static variable named NAME.
1372 LABELNO is an integer which is different for each call. */
1374 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1375 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1376 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1380 /* This is how to output an assembler line defining an `int' constant. */
1382 #define ASM_OUTPUT_INT(FILE,VALUE) \
1383 ( fprintf (FILE, "%s ", ASM_LONG), \
1384 output_addr_const (FILE,(VALUE)), \
1387 /* Likewise for `char' and `short' constants. */
1388 /* is this supposed to do align too?? */
1390 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1391 ( fprintf (FILE, "%s ", ASM_SHORT), \
1392 output_addr_const (FILE,(VALUE)), \
1396 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1397 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1398 output_addr_const (FILE,(VALUE)), \
1399 fputs (",", FILE), \
1400 output_addr_const (FILE,(VALUE)), \
1401 fputs (" >> 8\n",FILE))
1405 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1406 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1407 output_addr_const (FILE, (VALUE)), \
1410 /* This is how to output an assembler line for a numeric constant byte. */
1412 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1413 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1415 /* This is how to output an insn to push a register on the stack.
1416 It need not be very fast code. */
1418 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1419 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1421 /* This is how to output an insn to pop a register from the stack.
1422 It need not be very fast code. */
1424 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1425 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1427 /* This is how to output an element of a case-vector that is absolute.
1430 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1431 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1433 /* This is how to output an element of a case-vector that is relative.
1434 We don't use these on the 386 yet, because the ATT assembler can't do
1435 forward reference the differences.
1438 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1439 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1441 /* Define the parentheses used to group arithmetic operations
1442 in assembler code. */
1444 #define ASM_OPEN_PAREN ""
1445 #define ASM_CLOSE_PAREN ""
1447 /* Define results of standard character escape sequences. */
1448 #define TARGET_BELL 007
1449 #define TARGET_BS 010
1450 #define TARGET_TAB 011
1451 #define TARGET_NEWLINE 012
1452 #define TARGET_VT 013
1453 #define TARGET_FF 014
1454 #define TARGET_CR 015
1456 /* Print operand X (an rtx) in assembler syntax to file FILE.
1457 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1458 The CODE z takes the size of operand from the following digit, and
1459 outputs b,w,or l respectively.
1461 On the 80386, we use several such letters:
1462 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1463 L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1464 R -- print the prefix for register names.
1465 z -- print the opcode suffix for the size of the current operand.
1466 * -- print a star (in certain assembler syntax)
1467 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1468 b -- print the operand as if it's a byte (QImode) even if it isn't.
1469 c -- don't print special prefixes before constant operands. */
1471 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1474 /* Print the name of a register based on its machine mode and number.
1475 If CODE is 'w', pretend the mode is HImode.
1476 If CODE is 'b', pretend the mode is QImode.
1477 If CODE is 'k', pretend the mode is SImode.
1478 If CODE is 'h', pretend the reg is the `high' byte register.
1479 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1481 extern char *hi_reg_name[];
1482 extern char *qi_reg_name[];
1483 extern char *qi_high_reg_name[];
1485 #define PRINT_REG(X, CODE, FILE) \
1486 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1488 fprintf (FILE, "%s", RP); \
1489 switch ((CODE == 'w' ? 2 \
1494 : GET_MODE_SIZE (GET_MODE (X)))) \
1497 if (STACK_TOP_P (X)) \
1499 fputs ("st(0)", FILE); \
1504 if (! FP_REG_P (X)) fputs ("e", FILE); \
1506 fputs (hi_reg_name[REGNO (X)], FILE); \
1509 fputs (qi_reg_name[REGNO (X)], FILE); \
1512 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1517 #define PRINT_OPERAND(FILE, X, CODE) \
1518 print_operand (FILE, X, CODE)
1520 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1521 print_operand_address (FILE, ADDR)
1523 /* Print the name of a register for based on its machine mode and number.
1524 This macro is used to print debugging output.
1525 This macro is different from PRINT_REG in that it may be used in
1526 programs that are not linked with aux-output.o. */
1528 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1529 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1530 static char *qi_name[] = QI_REGISTER_NAMES; \
1531 fprintf (FILE, "%d %s", REGNO (X), RP); \
1532 if (REGNO (X) == ARG_POINTER_REGNUM) \
1533 { fputs ("argp", FILE); break; } \
1534 if (STACK_TOP_P (X)) \
1535 { fputs ("st(0)", FILE); break; } \
1536 switch (GET_MODE_SIZE (GET_MODE (X))) \
1540 if (! FP_REG_P (X)) fputs ("e", FILE); \
1542 fputs (hi_name[REGNO (X)], FILE); \
1545 fputs (qi_name[REGNO (X)], FILE); \
1550 /* Output the prefix for an immediate operand, or for an offset operand. */
1551 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1552 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1554 /* Routines in libgcc that return floats must return them in an fp reg,
1555 just as other functions do which return such values.
1556 These macros make that happen. */
1558 #define FLOAT_VALUE_TYPE float
1559 #define INTIFY(FLOATVAL) FLOATVAL
1561 /* Nonzero if INSN magically clobbers register REGNO. */
1563 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1564 (FP_REGNO_P (REGNO) \
1565 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1568 /* a letter which is not needed by the normal asm syntax, which
1569 we can use for operand syntax in the extended asm */
1571 #define ASM_OPERAND_LETTER '#'
1573 #define RET return ""
1574 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))