2 * Copyright (C) 2005 Free Software Foundation, Inc.
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34 #define MXCSR_DAZ (1 << 6) /* Enable denormals are zero mode */
35 #define MXCSR_FTZ (1 << 15) /* Enable flush to zero mode */
37 static void __attribute__((constructor))
41 /* SSE is the part of 64bit. Only need to check it for 32bit. */
42 unsigned int eax, ebx, ecx, edx;
44 /* See if we can use cpuid. */
45 asm volatile ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
46 "pushl %0; popfl; pushfl; popl %0; popfl"
47 : "=&r" (eax), "=&r" (ebx)
50 if (((eax ^ ebx) & 0x00200000) == 0)
53 /* Check the highest input value for eax. */
54 asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
55 : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
61 asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
62 : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
68 unsigned int mxcsr = __builtin_ia32_stmxcsr ();
69 mxcsr |= MXCSR_DAZ | MXCSR_FTZ;
70 __builtin_ia32_ldmxcsr (mxcsr);