1 /* Definitions of target machine for GNU compiler. AT&T DSP1600.
2 Copyright (C) 1994, 95-98, 2000 Free Software Foundation, Inc.
3 Contributed by Michael Collison (collison@world.std.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 1, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 extern const char *low_reg_names[];
23 extern const char *text_seg_name;
24 extern const char *rsect_text;
25 extern const char *data_seg_name;
26 extern const char *rsect_data;
27 extern const char *bss_seg_name;
28 extern const char *rsect_bss;
29 extern const char *const_seg_name;
30 extern const char *rsect_const;
31 extern const char *chip_name;
32 extern const char *save_chip_name;
33 extern struct rtx_def *dsp16xx_compare_op0, *dsp16xx_compare_op1;
34 extern struct rtx_def *dsp16xx_addhf3_libcall;
35 extern struct rtx_def *dsp16xx_subhf3_libcall;
36 extern struct rtx_def *dsp16xx_mulhf3_libcall;
37 extern struct rtx_def *dsp16xx_divhf3_libcall;
38 extern struct rtx_def *dsp16xx_cmphf3_libcall;
39 extern struct rtx_def *dsp16xx_fixhfhi2_libcall;
40 extern struct rtx_def *dsp16xx_floathihf2_libcall;
41 extern struct rtx_def *dsp16xx_neghf2_libcall;
42 extern struct rtx_def *dsp16xx_umulhi3_libcall;
43 extern struct rtx_def *dsp16xx_mulhi3_libcall;
44 extern struct rtx_def *dsp16xx_udivqi3_libcall;
45 extern struct rtx_def *dsp16xx_udivhi3_libcall;
46 extern struct rtx_def *dsp16xx_divqi3_libcall;
47 extern struct rtx_def *dsp16xx_divhi3_libcall;
48 extern struct rtx_def *dsp16xx_modqi3_libcall;
49 extern struct rtx_def *dsp16xx_modhi3_libcall;
50 extern struct rtx_def *dsp16xx_umodqi3_libcall;
51 extern struct rtx_def *dsp16xx_umodhi3_libcall;
53 extern struct rtx_def *dsp16xx_ashrhi3_libcall;
54 extern struct rtx_def *dsp16xx_ashlhi3_libcall;
55 extern struct rtx_def *dsp16xx_lshrhi3_libcall;
57 /* RUN-TIME TARGET SPECIFICATION */
60 /* Name of the AT&T assembler */
62 #define ASM_PROG "as1600"
64 /* Name of the AT&T linker */
66 #define LD_PROG "ld1600"
68 /* Define which switches take word arguments */
69 #define WORD_SWITCH_TAKES_ARG(STR) \
70 (!strcmp (STR, "ifile") ? 1 : \
78 /* Define this as a spec to call the AT&T assembler */
80 #define CROSS_ASM_SPEC "%{!S:as1600 %a %i\n }"
82 /* Define this as a spec to call the AT&T linker */
84 #define CROSS_LINK_SPEC "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \
85 %{r} %{s} %{t} %{u*} %{x}\
86 %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\
87 %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\
88 %{!A:%{!nostdlib:%{!nostartfiles:%E}}}\n }}}}}"
90 /* Nothing complicated here, just link with libc.a under normal
92 #define LIB_SPEC "-lc"
94 /* Specify the startup file to link with. */
95 #define STARTFILE_SPEC "%{mmap1:m1_crt0.o%s} \
96 %{mmap2:m2_crt0.o%s} \
97 %{mmap3:m3_crt0.o%s} \
98 %{mmap4:m4_crt0.o%s} \
99 %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
100 %eA -ifile option requires a -map option}}"
102 /* Specify the end file to link with */
104 #define ENDFILE_SPEC "%{mmap1:m1_crtn.o%s} \
105 %{mmap2:m2_crtn.o%s} \
106 %{mmap3:m3_crtn.o%s} \
107 %{mmap4:m4_crtn.o%s} \
108 %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
109 %eA -ifile option requires a -map option}}"
112 /* Tell gcc where to look for the startfile */
113 #define STANDARD_STARTFILE_PREFIX "/d1600/lib"
115 /* Tell gcc where to look for its executables */
116 #define STANDARD_EXEC_PREFIX "/d1600/bin"
118 /* Command line options to the AT&T assembler */
119 #define ASM_SPEC "%{v:-V} %{g*:-g}"
121 /* Command line options for the AT&T linker */
122 #define LINK_SPEC "%{v:-V} %{minit:-i} \
123 %{!ifile*:%{mmap1:-ifile m1_deflt.if%s} \
124 %{mmap2:-ifile m2_deflt.if%s} \
125 %{mmap3:-ifile m3_deflt.if%s} \
126 %{mmap4:-ifile m4_deflt.if%s} \
127 %{!mmap*:-ifile m4_deflt.if%s}} \
130 /* Names to predefine in the preprocessor for this target machine. */
132 #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -DMSDOS"
134 #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -Ddsp1610 -DDSP1610"
137 /* Run-time compilation parameters selecting different hardware subsets. */
139 extern int target_flags;
141 /* Macros used in the machine description to test the flags. */
143 #define MASK_REGPARM 0x00000001 /* Pass parameters in registers */
144 #define MASK_NEAR_CALL 0x00000002 /* The call is on the same 4k page */
145 #define MASK_NEAR_JUMP 0x00000004 /* The jump is on the same 4k page */
146 #define MASK_BMU 0x00000008 /* Use the 'bmu' shift instructions */
147 #define MASK_OPTIMIZE_MEMORY 0x00000010 /* Optimize to conserve memory */
148 #define MASK_OPTIMIZE_SPEED 0x00000020 /* Optimize for speed */
149 #define MASK_MAP1 0x00000040 /* Link with map1 */
150 #define MASK_MAP2 0x00000080 /* Link with map2 */
151 #define MASK_MAP3 0x00000100 /* Link with map3 */
152 #define MASK_MAP4 0x00000200 /* Link with map4 */
153 #define MASK_YBASE_HIGH 0x00000400 /* The ybase register window starts high */
154 #define MASK_INIT 0x00000800 /* Have the linker generate tables to
155 initialize data at startup */
156 #define MASK_INLINE_MULT 0x00001000 /* Inline 32 bit multiplies */
157 #define MASK_RESERVE_YBASE 0x00002000 /* Reserved the ybase registers */
159 /* Compile passing first two args in regs 0 and 1.
160 This exists only to test compiler features that will
161 be needed for RISC chips. It is not usable
162 and is not intended to be usable on this cpu. */
163 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
165 /* The call is on the same 4k page, so instead of loading
166 the 'pt' register and branching, we can branch directly */
168 #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
170 /* The jump is on the same 4k page, so instead of loading
171 the 'pt' register and branching, we can branch directly */
173 #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
175 /* Generate shift instructions to use the 1610 Bit Manipulation
177 #define TARGET_BMU (target_flags & MASK_BMU)
179 /* Optimize to conserve memory */
180 #define TARGET_OPTIMIZE_MEMORY (target_flags & MASK_OPTIMIZE_MEMORY)
182 /* Optimize for maximum speed */
183 #define TARGET_OPTIMIZE_SPEED (target_flags & MASK_OPTIMIZE_SPEED)
185 #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
187 /* Direct the linker to output extra info for initialized data */
188 #define TARGET_MASK_INIT (target_flags & MASK_INIT)
190 #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
192 /* Reserve the ybase registers *(0) - *(31) */
193 #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
195 /* Macro to define tables used to set the flags.
196 This is a list in braces of pairs in braces,
197 each pair being { "NAME", VALUE }
198 where VALUE is the bits to set or minus the bits to clear.
199 An empty string NAME is used to identify the default VALUE. */
202 #define TARGET_SWITCHES \
204 { "regparm", MASK_REGPARM}, \
205 { "no-regparm", -MASK_REGPARM}, \
206 { "no-near-call", -MASK_NEAR_CALL}, \
207 { "near-jump", MASK_NEAR_JUMP}, \
208 { "no-near-jump", -MASK_NEAR_JUMP}, \
209 { "bmu", MASK_BMU}, \
210 { "no-bmu", -MASK_BMU}, \
211 { "Om", MASK_OPTIMIZE_MEMORY}, \
212 { "Os", MASK_OPTIMIZE_SPEED}, \
213 { "map1", MASK_MAP1}, \
214 { "map2", MASK_MAP2}, \
215 { "map3", MASK_MAP3}, \
216 { "map4", MASK_MAP4}, \
217 { "ybase-high", MASK_YBASE_HIGH}, \
218 { "init", MASK_INIT}, \
219 { "inline-mult", MASK_INLINE_MULT}, \
220 { "reserve-ybase", MASK_RESERVE_YBASE}, \
221 { "", TARGET_DEFAULT} \
224 /* Default target_flags if no switches are specified */
225 #ifndef TARGET_DEFAULT
226 #define TARGET_DEFAULT MASK_OPTIMIZE_MEMORY|MASK_REGPARM|MASK_YBASE_HIGH
229 /* This macro is similar to `TARGET_SWITCHES' but defines names of
230 command options that have values. Its definition is an
231 initializer with a subgrouping for each command option.
233 Each subgrouping contains a string constant, that defines the
234 fixed part of the option name, and the address of a variable.
235 The variable, type `char *', is set to the variable part of the
236 given option if the fixed part matches. The actual option name
237 is made by appending `-m' to the specified name.
239 Here is an example which defines `-mshort-data-NUMBER'. If the
240 given option is `-mshort-data-512', the variable `m88k_short_data'
241 will be set to the string `"512"'.
243 extern char *m88k_short_data;
244 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
246 #define TARGET_OPTIONS \
248 { "text=", &text_seg_name }, \
249 { "data=", &data_seg_name }, \
250 { "bss=", &bss_seg_name }, \
251 { "const=", &const_seg_name }, \
252 { "chip=", &chip_name } \
255 /* Sometimes certain combinations of command options do not make sense
256 on a particular target machine. You can define a macro
257 `OVERRIDE_OPTIONS' to take account of this. This macro, if
258 defined, is executed once just after all the command options have
261 Don't use this macro to turn on various extra optimizations for
262 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
264 #define OVERRIDE_OPTIONS override_options ()
266 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
269 flag_gnu_linker = FALSE; \
273 flag_strength_reduce = FALSE; \
274 flag_inline_functions = FALSE; \
281 /* Define if you don't want extended real, but do want to use the
282 software floating point emulator for REAL_ARITHMETIC and
283 decimal <-> binary conversion. */
284 #define REAL_ARITHMETIC
286 /* Define this if most significant bit is lowest numbered
287 in instructions that operate on numbered bit-fields.
289 #define BITS_BIG_ENDIAN 1
291 /* Define this if most significant byte of a word is the lowest numbered.
292 We define big-endian, but since the 1600 series cannot address bytes
293 it does not matter. */
294 #define BYTES_BIG_ENDIAN 1
296 /* Define this if most significant word of a multiword number is numbered.
297 For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
298 #define WORDS_BIG_ENDIAN 1
300 /* number of bits in an addressable storage unit */
301 #define BITS_PER_UNIT 16
303 /* Width in bits of a "word", which is the contents of a machine register.
304 Note that this is not necessarily the width of data type `int';
305 if using 16-bit ints on a 68000, this would still be 32.
306 But on a machine with 16-bit registers, this would be 16. */
307 #define BITS_PER_WORD 16
309 /* Maximum number of bits in a word. */
310 #define MAX_BITS_PER_WORD 16
312 /* Width of a word, in units (bytes). */
313 #define UNITS_PER_WORD 1
315 /* Width in bits of a pointer.
316 See also the macro `Pmode' defined below. */
317 #define POINTER_SIZE 16
319 /* Allocation boundary (in *bits*) for storing pointers in memory. */
320 #define POINTER_BOUNDARY 16
322 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
323 #define PARM_BOUNDARY 16
325 /* Boundary (in *bits*) on which stack pointer should be aligned. */
326 #define STACK_BOUNDARY 16
328 /* Allocation boundary (in *bits*) for the code of a function. */
329 #define FUNCTION_BOUNDARY 16
331 /* Biggest alignment that any data type can require on this machine, in bits. */
332 #define BIGGEST_ALIGNMENT 16
334 /* Biggest alignment that any structure field can require on this machine, in bits */
335 #define BIGGEST_FIELD_ALIGNMENT 16
337 /* Alignment of field after `int : 0' in a structure. */
338 #define EMPTY_FIELD_BOUNDARY 16
340 /* Number of bits which any structure or union's size must be a multiple of. Each structure
341 or union's size is rounded up to a multiple of this */
342 #define STRUCTURE_SIZE_BOUNDARY 16
344 /* Define this if move instructions will actually fail to work
345 when given unaligned data. */
346 #define STRICT_ALIGNMENT 1
348 /* An integer expression for the size in bits of the largest integer machine mode that
349 should actually be used. All integer machine modes of this size or smaller can be
350 used for structures and unions with the appropriate sizes. */
351 #define MAX_FIXED_MODE_SIZE 32
353 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
355 #define CHAR_TYPE_SIZE 16
356 #define SHORT_TYPE_SIZE 16
357 #define INT_TYPE_SIZE 16
358 #define LONG_TYPE_SIZE 32
359 #define LONG_LONG_TYPE_SIZE 32
360 #define FLOAT_TYPE_SIZE 32
361 #define DOUBLE_TYPE_SIZE 32
362 #define LONG_DOUBLE_TYPE_SIZE 32
364 /* An expression whose value is 1 or 0, according to whether the type char should be
365 signed or unsigned by default. */
367 #define DEFAULT_SIGNED_CHAR 1
369 /* A C expression to determine whether to give an enum type only as many bytes
370 as it takes to represent the range of possible values of that type. A nonzero
371 value means to do that; a zero value means all enum types should be allocated
374 #define DEFAULT_SHORT_ENUMS 0
376 /* A C expression for a string describing the name of the data type to use for
379 #define SIZE_TYPE "long unsigned int"
381 /* A C expression for a string describing the name of the datat type to use for the
382 result of subtracting two pointers */
384 #define PTRDIFF_TYPE "long int"
386 #define TARGET_BELL '\a'
387 #define TARGET_BS '\b'
388 #define TARGET_TAB '\t'
389 #define TARGET_NEWLINE '\n'
390 #define TARGET_VT '\v'
391 #define TARGET_FF '\f'
392 #define TARGET_CR '\r'
395 /* REGISTER USAGE. */
397 #define ALL_16_BIT_REGISTERS 1
399 /* Number of actual hardware registers.
400 The hardware registers are assigned numbers for the compiler
401 from 0 to FIRST_PSEUDO_REGISTER-1 */
403 #define FIRST_PSEUDO_REGISTER (REG_YBASE31 + 1)
405 /* 1 for registers that have pervasive standard uses
406 and are not available for the register allocator.
408 The registers are laid out as follows:
410 {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
411 {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
412 {pt} - X Space Address Arithmetic Unit
413 {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
414 {pr} - Return Address Register
416 We reserve r2 for the Stack Pointer.
417 We specify r3 for the Frame Pointer but allow the compiler
418 to omit it when possible since we have so few pointer registers. */
446 #define REG_YBASE0 26
447 #define REG_YBASE1 27
448 #define REG_YBASE2 28
449 #define REG_YBASE3 29
450 #define REG_YBASE4 30
451 #define REG_YBASE5 31
452 #define REG_YBASE6 32
453 #define REG_YBASE7 33
454 #define REG_YBASE8 34
455 #define REG_YBASE9 35
456 #define REG_YBASE10 36
457 #define REG_YBASE11 37
458 #define REG_YBASE12 38
459 #define REG_YBASE13 39
460 #define REG_YBASE14 40
461 #define REG_YBASE15 41
462 #define REG_YBASE16 42
463 #define REG_YBASE17 43
464 #define REG_YBASE18 44
465 #define REG_YBASE19 45
466 #define REG_YBASE20 46
467 #define REG_YBASE21 47
468 #define REG_YBASE22 48
469 #define REG_YBASE23 49
470 #define REG_YBASE24 50
471 #define REG_YBASE25 51
472 #define REG_YBASE26 52
473 #define REG_YBASE27 53
474 #define REG_YBASE28 54
475 #define REG_YBASE29 55
476 #define REG_YBASE30 56
477 #define REG_YBASE31 57
479 /* Do we have a accumulator register? */
480 #define IS_ACCUM_REG(REGNO) ((REGNO) >= REG_A0 && (REGNO) <= REG_A1L)
481 #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
483 /* Do we have a virtual ybase register */
484 #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
486 #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
488 #define FIXED_REGISTERS \
489 {0, 0, 0, 0, 0, 0, 0, 0, 0, \
490 0, 0, 0, 1, 0, 0, 1, \
495 0, 0, 0, 0, 0, 0, 0, 0, \
496 0, 0, 0, 0, 0, 0, 0, 0, \
497 0, 0, 0, 0, 0, 0, 0, 0, \
498 0, 0, 0, 0, 0, 0, 0, 0}
500 /* 1 for registers not available across function calls.
501 These must include the FIXED_REGISTERS and also any
502 registers that can be used without being saved.
503 The latter must include the registers where values are returned
504 and the register where structure-value addresses are passed.
505 On the 1610 'a0' holds return values from functions. 'r0' holds
506 structure-value addresses.
508 In addition we don't save either j, k, ybase or any of the
509 bit manipulation registers. */
512 #define CALL_USED_REGISTERS \
513 {1, 1, 1, 1, 0, 1, 1, 1, 1, \
514 1, 0, 0, 1, 1, 1, 1, \
519 0, 0, 0, 0, 0, 0, 0, 0, \
520 0, 0, 0, 0, 0, 0, 0, 0, \
521 0, 0, 0, 0, 0, 0, 0, 0, \
522 0, 0, 0, 0, 0, 0, 0, 0}
524 /* List the order in which to allocate registers. Each register must be
525 listed once, even those in FIXED_REGISTERS.
527 We allocate in the following order:
530 #define REG_ALLOC_ORDER \
531 { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
532 REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
533 REG_RB, REG_A0, REG_A1, REG_A0L, \
534 REG_A1L, REG_AR2, REG_AR3, \
535 REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
536 REG_C1, REG_C2, REG_R3, \
537 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
538 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
539 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
540 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
541 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
542 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
543 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
544 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
546 /* Zero or more C statements that may conditionally modify two
547 variables `fixed_regs' and `call_used_regs' (both of type `char
548 []') after they have been initialized from the two preceding
551 This is necessary in case the fixed or call-clobbered registers
552 depend on target flags.
554 You need not define this macro if it has no work to do.
556 If the usage of an entire class of registers depends on the target
557 flags, you may indicate this to GCC by using this macro to modify
558 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
559 the classes which should not be used by GCC. Also define the macro
560 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
561 letter for a class that shouldn't be used.
563 (However, if this class is not included in `GENERAL_REGS' and all
564 of the insn patterns whose constraints permit this class are
565 controlled by target switches, then GCC will automatically avoid
566 using these registers when the target switches are opposed to
567 them.) If the user tells us there is no BMU, we can't use
568 ar0-ar3 for register allocation */
570 #define CONDITIONAL_REGISTER_USAGE \
577 for (regno = REG_AR0; regno <= REG_AR3; regno++) \
578 fixed_regs[regno] = call_used_regs[regno] = 1; \
580 if (TARGET_RESERVE_YBASE) \
584 for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
585 fixed_regs[regno] = call_used_regs[regno] = 1; \
590 /* Determine which register classes are very likely used by spill registers.
591 local-alloc.c won't allocate pseudos that have these classes as their
592 preferred class unless they are "preferred or nothing". */
594 #define CLASS_LIKELY_SPILLED_P(CLASS) \
595 ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
597 /* Return number of consecutive hard regs needed starting at reg REGNO
598 to hold something of mode MODE.
599 This is ordinarily the length in words of a value of mode MODE
600 but can be less for certain modes in special long registers. */
602 #define HARD_REGNO_NREGS(REGNO, MODE) \
603 (GET_MODE_SIZE(MODE))
605 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
607 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
609 /* Value is 1 if it is a good idea to tie two pseudo registers
610 when one has mode MODE1 and one has mode MODE2.
611 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
612 for any hard reg, then this must be 0 for correct output. */
613 #define MODES_TIEABLE_P(MODE1, MODE2) \
614 (((MODE1) == (MODE2)) || \
615 (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
616 == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
618 /* Specify the registers used for certain standard purposes.
619 The values of these macros are register numbers. */
621 /* DSP1600 pc isn't overloaded on a register. */
622 /* #define PC_REGNUM */
624 /* Register to use for pushing function arguments.
625 This is r3 in our case */
626 #define STACK_POINTER_REGNUM REG_R3
628 /* Base register for access to local variables of the function.
629 This is r2 in our case */
630 #define FRAME_POINTER_REGNUM REG_R2
632 /* We can debug without the frame pointer */
633 #define CAN_DEBUG_WITHOUT_FP 1
635 /* The 1610 saves the return address in this register */
636 #define RETURN_ADDRESS_REGNUM REG_PR
638 /* Base register for access to arguments of the function. */
639 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
641 /* Register in which static-chain is passed to a function. */
643 #define STATIC_CHAIN_REGNUM 4
645 /* Register in which address to store a structure value
646 is passed to a function. This is 'r0' in our case */
647 #define STRUCT_VALUE_REGNUM REG_R0
649 /* Define the classes of registers for register constraints in the
650 machine description. Also define ranges of constants.
652 One of the classes must always be named ALL_REGS and include all hard regs.
653 If there is more than one class, another class must be named NO_REGS
654 and contain no registers.
656 The name GENERAL_REGS must be the name of a class (or an alias for
657 another name such as ALL_REGS). This is the class of registers
658 that is allowed by "g" or "r" in a register constraint.
659 Also, registers outside this class are allocated only when
660 instructions express preferences for them.
662 The classes must be numbered in nondecreasing order; that is,
663 a larger-numbered class must never be contained completely
664 in a smaller-numbered class.
666 For any two classes, it is very desirable that there be another
667 class that represents their union. */
686 YH_OR_ACCUM_HIGH_REGS,
689 YL_OR_ACCUM_LOW_REGS,
697 PL_OR_ACCUM_LOW_REGS,
699 YL_OR_PL_OR_ACCUM_LOW_REGS,
703 ACCUM_LOW_OR_YL_OR_P_REGS,
706 NO_FRAME_Y_ADDR_REGS,
708 ACCUM_LOW_OR_Y_ADDR_REGS,
709 ACCUM_OR_Y_ADDR_REGS,
713 NON_HIGH_YBASE_ELIGIBLE_REGS,
716 J_OR_DAU_16_BIT_REGS,
718 NOHIGH_NON_ADDR_REGS,
721 NOHIGH_NON_YBASE_REGS,
722 NO_ACCUM_NON_YBASE_REGS,
725 ACCUM_LOW_OR_YBASE_REGS,
729 ACCUM_LOW_YL_PL_OR_YBASE_REGS,
731 ACCUM_Y_P_OR_YBASE_REGS,
732 Y_ADDR_OR_YBASE_REGS,
733 YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
734 YBASE_OR_YBASE_ELIGIBLE_REGS,
740 /* GENERAL_REGS must be the name of a register class */
741 #define GENERAL_REGS ALL_REGS
743 #define N_REG_CLASSES (int) LIM_REG_CLASSES
745 /* Give names of register classes as strings for dump file. */
747 #define REG_CLASS_NAMES \
760 "X_OR_ACCUM_LOW_REGS", \
763 "YH_OR_ACCUM_HIGH_REGS", \
766 "YL_OR_ACCUM_LOW_REGS", \
774 "PL_OR_ACCUM_LOW_REGS", \
776 "PL_OR_YL_OR_ACCUM_LOW_REGS", \
780 "ACCUM_LOW_OR_YL_OR_P_REGS", \
782 "ACCUM_Y_OR_P_REGS", \
783 "NO_FRAME_Y_ADDR_REGS", \
785 "ACCUM_LOW_OR_Y_ADDR_REGS", \
786 "ACCUM_OR_Y_ADDR_REGS", \
787 "X_OR_Y_ADDR_REGS", \
788 "Y_OR_Y_ADDR_REGS", \
789 "P_OR_Y_ADDR_REGS", \
790 "NON_HIGH_YBASE_ELIGIBLE_REGS", \
791 "YBASE_ELIGIBLE_REGS", \
793 "J_OR_DAU_16_BIT_REGS", \
795 "NOHIGH_NON_ADDR_REGS", \
797 "SLOW_MEM_LOAD_REGS", \
798 "NOHIGH_NON_YBASE_REGS", \
799 "NO_ACCUM_NON_YBASE_REGS", \
802 "ACCUM_LOW_OR_YBASE_REGS", \
803 "ACCUM_OR_YBASE_REGS", \
806 "ACCUM_LOW_YL_PL_OR_YBASE_REGS", \
808 "ACCUM_Y_P_OR_YBASE_REGS", \
809 "Y_ADDR_OR_YBASE_REGS", \
810 "YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS", \
811 "YBASE_OR_YBASE_ELIGIBLE_REGS", \
812 "NO_HIGH_ALL_REGS", \
816 /* Define which registers fit in which classes.
817 This is an initializer for a vector of HARD_REG_SET
818 of length N_REG_CLASSES. */
820 #define REG_CLASS_CONTENTS \
822 {0x00000000, 0x00000000}, /* no reg */ \
823 {0x00000001, 0x00000000}, /* a0h */ \
824 {0x00000002, 0x00000000}, /* a0l */ \
825 {0x00000003, 0x00000000}, /* a0h:a0l */ \
826 {0x00000004, 0x00000000}, /* a1h */ \
827 {0x00000005, 0x00000000}, /* accum high */ \
828 {0x00000008, 0x00000000}, /* a1l */ \
829 {0x0000000A, 0x00000000}, /* accum low */ \
830 {0x0000000c, 0x00000000}, /* a1h:a1l */ \
831 {0x0000000f, 0x00000000}, /* accum regs */ \
832 {0x00000010, 0x00000000}, /* x reg */ \
833 {0x0000001A, 0x00000000}, /* x & accum_low_regs */ \
834 {0x0000001f, 0x00000000}, /* x & accum regs */ \
835 {0x00000020, 0x00000000}, /* y high */ \
836 {0x00000025, 0x00000000}, /* yh, accum high */ \
837 {0x00000030, 0x00000000}, /* x & yh */ \
838 {0x00000040, 0x00000000}, /* y low */ \
839 {0x0000004A, 0x00000000}, /* y low, accum_low */ \
840 {0x00000050, 0x00000000}, /* x & yl */ \
841 {0x00000060, 0x00000000}, /* yl:yh */ \
842 {0x00000070, 0x00000000}, /* x, yh,a nd yl */ \
843 {0x0000006F, 0x00000000}, /* accum, y */ \
844 {0x00000080, 0x00000000}, /* p high */ \
845 {0x00000090, 0x00000000}, /* x & ph */ \
846 {0x00000100, 0x00000000}, /* p low */ \
847 {0x0000010A, 0x00000000}, /* p_low and accum_low */ \
848 {0x00000110, 0x00000000}, /* x & pl */ \
849 {0x0000014A, 0x00000000}, /* pl,yl,a1l,a0l */ \
850 {0x00000180, 0x00000000}, /* pl:ph */ \
851 {0x0000018F, 0x00000000}, /* accum, p */ \
852 {0x000001C0, 0x00000000}, /* pl:ph and yl */ \
853 {0x000001CA, 0x00000000}, /* pl:ph, yl, a0l, a1l */ \
854 {0x000001E0, 0x00000000}, /* y or p */ \
855 {0x000001EF, 0x00000000}, /* accum, y or p */ \
856 {0x00000E00, 0x00000000}, /* r0-r2 */ \
857 {0x00001E00, 0x00000000}, /* r0-r3 */ \
858 {0x00001E0A, 0x00000000}, /* r0-r3, accum_low */ \
859 {0x00001E0F, 0x00000000}, /* accum,r0-r3 */ \
860 {0x00001E10, 0x00000000}, /* x,r0-r3 */ \
861 {0x00001E60, 0x00000000}, /* y,r0-r3 */ \
862 {0x00001F80, 0x00000000}, /* p,r0-r3 */ \
863 {0x00001FDA, 0x00000000}, /* ph:pl, r0-r3, x,a0l,a1l */ \
864 {0x00001fff, 0x00000000}, /* accum,x,y,p,r0-r3 */ \
865 {0x00002000, 0x00000000}, /* j */ \
866 {0x00002025, 0x00000000}, /* j, yh, a1h, a0h */ \
867 {0x001E0000, 0x00000000}, /* ar0-ar3 */ \
868 {0x03FFE1DA, 0x00000000}, /* non_addr except yh,a0h,a1h */ \
869 {0x03FFE1FF, 0x00000000}, /* non_addr regs */ \
870 {0x03FFFF8F, 0x00000000}, /* non ybase except yh, yl, and x */ \
871 {0x03FFFFDA, 0x00000000}, /* non ybase regs except yh,a0h,a1h */ \
872 {0x03FFFFF0, 0x00000000}, /* non ybase except a0,a0l,a1,a1l */ \
873 {0x03FFFFFF, 0x00000000}, /* non ybase regs */ \
874 {0xFC000000, 0x03FFFFFF}, /* virt ybase regs */ \
875 {0xFC00000A, 0x03FFFFFF}, /* accum_low, virt ybase regs */ \
876 {0xFC00000F, 0x03FFFFFF}, /* accum, virt ybase regs */ \
877 {0xFC000010, 0x03FFFFFF}, /* x,virt ybase regs */ \
878 {0xFC000060, 0x03FFFFFF}, /* y,virt ybase regs */ \
879 {0xFC00014A, 0x03FFFFFF}, /* accum_low, yl, pl, ybase */ \
880 {0xFC000180, 0x03FFFFFF}, /* p,virt ybase regs */ \
881 {0xFC0001EF, 0x03FFFFFF}, /* accum,y,p,ybase regs */ \
882 {0xFC001E00, 0x03FFFFFF}, /* r0-r3, ybase regs */ \
883 {0xFC001FDA, 0x03FFFFFF}, /* r0-r3, pl:ph,yl,x,a1l,a0l */ \
884 {0xFC001FFF, 0x03FFFFFF}, /* virt ybase, ybase eligible regs */ \
885 {0xFCFFFFDA, 0x03FFFFFF}, /* all regs except yh,a0h,a1h */ \
886 {0xFFFFFFFF, 0x03FFFFFF} /* all regs */ \
890 /* The same information, inverted:
891 Return the class number of the smallest class containing
892 reg number REGNO. This could be a conditional expression
893 or could index an array. */
895 #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
897 /* The class value for index registers, and the one for base regs. */
899 #define INDEX_REG_CLASS NO_REGS
900 #define BASE_REG_CLASS Y_ADDR_REGS
902 /* Get reg_class from a letter such as appears in the machine description. */
904 #define REG_CLASS_FROM_LETTER(C) \
905 dsp16xx_reg_class_from_letter(C)
907 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
908 secondary_reload_class(CLASS, MODE, X)
910 /* When defined, the compiler allows registers explicitly used in the
911 rtl to be used as spill registers but prevents the compiler from
912 extending the lifetime of these registers. */
914 #define SMALL_REGISTER_CLASSES 1
916 /* Macros to check register numbers against specific register classes. */
918 /* These assume that REGNO is a hard or pseudo reg number.
919 They give nonzero only if REGNO is a hard reg of the suitable class
920 or a pseudo reg currently allocated to a suitable hard reg.
921 Since they use reg_renumber, they are safe only once reg_renumber
922 has been allocated, which happens in local-alloc.c. */
924 /* A C expression which is nonzero if register REGNO is suitable for use
925 as a base register in operand addresses. It may be either a suitable
926 hard register or a pseudo register that has been allocated such a
929 On the 1610 the Y address pointers can be used as a base registers */
930 #define REGNO_OK_FOR_BASE_P(REGNO) \
931 (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
932 && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
934 #define REGNO_OK_FOR_YBASE_P(REGNO) \
935 (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
937 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
939 #ifdef ALL_16_BIT_REGISTERS
940 #define IS_32_BIT_REG(REGNO) 0
942 #define IS_32_BIT_REG(REGNO) \
943 ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
946 /* Given an rtx X being reloaded into a reg required to be
947 in class CLASS, return the class of reg to actually use.
948 In general this is just CLASS; but on some machines
949 in some cases it is preferable to use a more restrictive class.
950 Also, we must ensure that a PLUS is reloaded either
951 into an accumulator or an address register. */
953 #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
955 /* A C expression that places additional restrictions on the register
956 class to use when it is necessary to be able to hold a value of
957 mode MODE in a reload register for which class CLASS would
960 Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
961 there are certain modes that simply can't go in certain reload
964 The value is a register class; perhaps CLASS, or perhaps another,
967 Don't define this macro unless the target machine has limitations
968 which require the macro to do something nontrivial. */
971 #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
974 /* A C expression for the maximum number of consecutive registers of class CLASS
975 needed to hold a value of mode MODE */
976 #define CLASS_MAX_NREGS(CLASS, MODE) \
977 class_max_nregs(CLASS, MODE)
979 /* The letters 'I' through 'P' in a register constraint string
980 can be used to stand for particular ranges of immediate operands.
981 This macro defines what the ranges are.
982 C is the letter, and VALUE is a constant value.
983 Return 1 if VALUE is in the range specified by C.
985 For the 16xx, the following constraints are used:
986 'I' requires a non-negative 16-bit value.
987 'J' requires a non-negative 9-bit value
988 'K' requires a constant 0 operand.
989 'L' requires 16-bit value
990 'M' 32-bit value -- low 16-bits zero
993 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
994 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
995 #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
996 #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
998 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
999 ((C) == 'I' ? (SMALL_INTVAL(VALUE)) \
1000 : (C) == 'J' ? (SHORT_INTVAL(VALUE)) \
1001 : (C) == 'K' ? ((VALUE) == 0) \
1002 : (C) == 'L' ? ! ((VALUE) & ~0x0000ffff) \
1003 : (C) == 'M' ? ! ((VALUE) & ~0xffff0000) \
1004 : (C) == 'N' ? ((VALUE) == -1 || (VALUE) == 1 || \
1005 (VALUE) == -2 || (VALUE) == 2) \
1008 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
1010 /* Optional extra constraints for this machine */
1011 #define EXTRA_CONSTRAINT(OP,C) \
1012 ((C) == 'R' ? symbolic_address_p (OP) \
1015 /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1017 /* Define this if pushing a word on the stack
1018 makes the stack pointer a smaller address. */
1019 /* #define STACK_GROWS_DOWNWARD */
1021 /* Define this if the nominal address of the stack frame
1022 is at the high-address end of the local variables;
1023 that is, each additional local variable allocated
1024 goes at a more negative offset in the frame. */
1025 /* #define FRAME_GROWS_DOWNWARD */
1027 #define ARGS_GROW_DOWNWARD
1029 /* We use post decrement on the 1600 because there isn't
1030 a pre-decrement addressing mode. This means that we
1031 assume the stack pointer always points at the next
1032 FREE location on the stack. */
1033 #define STACK_PUSH_CODE POST_INC
1035 /* Offset within stack frame to start allocating local variables at.
1036 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1037 first local allocated. Otherwise, it is the offset to the BEGINNING
1038 of the first local allocated. */
1039 #define STARTING_FRAME_OFFSET 0
1041 /* Offset from the stack pointer register to the first
1042 location at which outgoing arguments are placed. */
1043 #define STACK_POINTER_OFFSET (0)
1045 struct dsp16xx_frame_info
1047 unsigned long total_size; /* # bytes that the entire frame takes up */
1048 unsigned long var_size; /* # bytes that variables take up */
1049 unsigned long args_size; /* # bytes that outgoing arguments take up */
1050 unsigned long extra_size; /* # bytes of extra gunk */
1051 unsigned int reg_size; /* # bytes needed to store regs */
1052 long fp_save_offset; /* offset from vfp to store registers */
1053 unsigned long sp_save_offset; /* offset from new sp to store registers */
1054 int initialized; /* != 0 if frame size already calculated */
1055 int num_regs; /* number of registers saved */
1056 int function_makes_calls; /* Does the function make calls */
1059 extern struct dsp16xx_frame_info current_frame_info;
1061 /* If we generate an insn to push BYTES bytes,
1062 this says how many the stack pointer really advances by. */
1063 /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1065 /* If defined, the maximum amount of space required for outgoing
1066 arguments will be computed and placed into the variable
1067 'current_function_outgoing_args_size'. No space will be pushed
1068 onto the stack for each call; instead, the function prologue should
1069 increase the stack frame size by this amount.
1071 It is not proper to define both 'PUSH_ROUNDING' and
1072 'ACCUMULATE_OUTGOING_ARGS'. */
1073 #define ACCUMULATE_OUTGOING_ARGS
1075 /* Offset of first parameter from the argument pointer
1078 #define FIRST_PARM_OFFSET(FNDECL) (0)
1080 /* Value is 1 if returning from a function call automatically
1081 pops the arguments described by the number-of-args field in the call.
1082 FUNDECL is the declaration node of the function (as a tree),
1083 FUNTYPE is the data type of the function (as a tree),
1084 or for a library call it is an identifier node for the subroutine name. */
1086 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1088 /* Define how to find the value returned by a function.
1089 VALTYPE is the data type of the value (as a tree).
1090 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1091 otherwise, FUNC is 0. On the 1610 all function return their values
1092 in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1093 entire register is significant. */
1095 #define VALUE_REGNO(MODE) (REG_Y)
1097 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1098 gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1100 /* Define how to find the value returned by a library function
1101 assuming the value has mode MODE. */
1102 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE))
1104 /* 1 if N is a possible register number for a function value. */
1105 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1108 /* Define where to put the arguments to a function.
1109 Value is zero to push the argument on the stack,
1110 or a hard register in which to store the argument.
1112 MODE is the argument's machine mode.
1113 TYPE is the data type of the argument (as a tree).
1114 This is null for libcalls where that information may
1116 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1117 the preceding args and about the function being called.
1118 NAMED is nonzero if this argument is a named parameter
1119 (otherwise it is an extra parameter matching an ellipsis). */
1121 /* On the 1610 all args are pushed, except if -mregparm is specified
1122 then the first two words of arguments are passed in a0, a1. */
1123 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1124 dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1126 /* Define the first register to be used for argument passing */
1127 #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1129 /* Define the profitability of saving registers around calls.
1130 NOTE: For now we turn this off because of a bug in the
1131 caller-saves code and also because i'm not sure it is helpful
1134 #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1136 /* This indicates that an argument is to be passed with an invisible reference
1137 (i.e., a pointer to the object is passed).
1139 On the dsp16xx, we do this if it must be passed on the stack. */
1141 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1142 (MUST_PASS_IN_STACK (MODE, TYPE))
1144 /* For an arg passed partly in registers and partly in memory,
1145 this is the number of registers used.
1146 For args passed entirely in registers or entirely in memory, zero. */
1148 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1150 /* Define a data type for recording info about an argument list
1151 during the scan of that argument list. This data type should
1152 hold all necessary information about the function itself
1153 and about the args processed so far, enough to enable macros
1154 such as FUNCTION_ARG to determine where the next arg should go. */
1155 #define CUMULATIVE_ARGS int
1157 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1158 for a call to a function whose data type is FNTYPE.
1159 For a library call, FNTYPE is 0. */
1160 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
1162 /* Update the data in CUM to advance over an argument
1163 of mode MODE and data type TYPE.
1164 (TYPE is null for libcalls where that information may not be available.) */
1166 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1167 dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1169 /* 1 if N is a possible register number for function argument passing. */
1170 #define FUNCTION_ARG_REGNO_P(N) \
1171 ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1173 /* This macro generates the assembly code for function entry.
1174 FILE is a stdio stream to output the code to.
1175 SIZE is an int: how many units of temporary storage to allocate.
1176 Refer to the array `regs_ever_live' to determine which registers
1177 to save; `regs_ever_live[I]' is nonzero if register number I
1178 is ever used in the function. This macro is responsible for
1179 knowing which registers should not be saved even if used. */
1181 #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1183 /* Output assembler code to FILE to increment profiler label # LABELNO
1184 for profiling a function entry. */
1186 #define FUNCTION_PROFILER(FILE, LABELNO) fatal("Profiling not implemented yet.")
1188 /* Output assembler code to FILE to initialize this source file's
1189 basic block profiling info, if that has not already been done. */
1190 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) fatal("Profiling not implemented yet.")
1192 /* Output assembler code to FILE to increment the entry-count for
1193 the BLOCKNO'th basic block in this source file. */
1194 #define BLOCK_PROFILER(FILE, BLOCKNO) fatal("Profiling not implemented yet.")
1197 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1198 the stack pointer does not matter. The value is tested only in
1199 functions that have frame pointers.
1200 No definition is equivalent to always zero. */
1202 #define EXIT_IGNORE_STACK (0)
1204 #define TRAMPOLINE_TEMPLATE(FILE) fatal ("Trampolines not yet implemented");
1206 /* Length in units of the trampoline for entering a nested function.
1207 This is a dummy value */
1209 #define TRAMPOLINE_SIZE 20
1211 /* Emit RTL insns to initialize the variable parts of a trampoline.
1212 FNADDR is an RTX for the address of the function's pure code.
1213 CXT is an RTX for the static chain value for the function. */
1215 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1216 fatal ("Trampolines not yet implemented");
1218 /* This macro generates the assembly code for function exit,
1219 on machines that need it. If FUNCTION_EPILOGUE is not defined
1220 then individual return instructions are generated for each
1221 return statement. Args are same as for FUNCTION_PROLOGUE.
1223 The function epilogue should not depend on the current stack pointer!
1224 It should use the frame pointer only. This is mandatory because
1225 of alloca; we also take advantage of it to omit stack adjustments
1226 before returning. */
1228 #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1230 /* A C expression which is nonzero if a function must have and use a
1231 frame pointer. If its value is nonzero the functions will have a
1233 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1235 /* A C statement to store in the variable 'DEPTH' the difference
1236 between the frame pointer and the stack pointer values immediately
1237 after the function prologue. */
1238 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1239 { (DEPTH) = initial_frame_pointer_offset(); \
1242 /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1244 #define ADDHF3_LIBCALL "__Emulate_addhf3"
1245 #define SUBHF3_LIBCALL "__Emulate_subhf3"
1246 #define MULHF3_LIBCALL "__Emulate_mulhf3"
1247 #define DIVHF3_LIBCALL "__Emulate_divhf3"
1248 #define CMPHF3_LIBCALL "__Emulate_cmphf3"
1249 #define FIXHFHI2_LIBCALL "__Emulate_fixhfhi2"
1250 #define FLOATHIHF2_LIBCALL "__Emulate_floathihf2"
1251 #define NEGHF2_LIBCALL "__Emulate_neghf2"
1253 #define UMULHI3_LIBCALL "__Emulate_umulhi3"
1254 #define MULHI3_LIBCALL "__Emulate_mulhi3"
1255 #define UDIVQI3_LIBCALL "__Emulate_udivqi3"
1256 #define UDIVHI3_LIBCALL "__Emulate_udivhi3"
1257 #define DIVQI3_LIBCALL "__Emulate_divqi3"
1258 #define DIVHI3_LIBCALL "__Emulate_divhi3"
1259 #define MODQI3_LIBCALL "__Emulate_modqi3"
1260 #define MODHI3_LIBCALL "__Emulate_modhi3"
1261 #define UMODQI3_LIBCALL "__Emulate_umodqi3"
1262 #define UMODHI3_LIBCALL "__Emulate_umodhi3"
1263 #define ASHRHI3_LIBCALL "__Emulate_ashrhi3"
1264 #define LSHRHI3_LIBCALL "__Emulate_lshrhi3"
1265 #define ASHLHI3_LIBCALL "__Emulate_ashlhi3"
1266 #define LSHLHI3_LIBCALL "__Emulate_lshlhi3" /* NOT USED */
1268 /* Define this macro if calls to the ANSI C library functions memcpy and
1269 memset should be generated instead of the BSD function bcopy & bzero. */
1270 #define TARGET_MEM_FUNCTIONS
1273 /* ADDRESSING MODES */
1275 /* The 1610 has post-increment and decrement, but no pre-modify */
1276 #define HAVE_POST_INCREMENT 1
1277 #define HAVE_POST_DECREMENT 1
1279 /* #define HAVE_PRE_DECREMENT 0 */
1280 /* #define HAVE_PRE_INCREMENT 0 */
1282 /* Recognize any constant value that is a valid address. */
1283 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1285 /* Maximum number of registers that can appear in a valid memory address. */
1286 #define MAX_REGS_PER_ADDRESS 1
1288 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1289 and check its validity for a certain class.
1290 We have two alternate definitions for each of them.
1291 The usual definition accepts all pseudo regs; the other rejects
1292 them unless they have been allocated suitable hard regs.
1293 The symbol REG_OK_STRICT causes the latter definition to be used.
1295 Most source files want to accept pseudo regs in the hope that
1296 they will get allocated to the class that the insn wants them to be in.
1297 Source files for reload pass need to be strict.
1298 After reload, it makes no difference, since pseudo regs have
1299 been eliminated by then. */
1301 #ifndef REG_OK_STRICT
1303 /* Nonzero if X is a hard reg that can be used as an index
1304 or if it is a pseudo reg. */
1305 #define REG_OK_FOR_INDEX_P(X) 0
1307 /* Nonzero if X is a hard reg that can be used as a base reg
1308 or if it is a pseudo reg. */
1309 #define REG_OK_FOR_BASE_P(X) \
1310 ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
1311 || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1313 /* Nonzero if X is the 'ybase' register */
1314 #define REG_OK_FOR_YBASE_P(X) \
1315 (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1318 /* Nonzero if X is a hard reg that can be used as an index. */
1319 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1321 /* Nonzero if X is a hard reg that can be used as a base reg. */
1322 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1324 /* Nonzero if X is the 'ybase' register */
1325 #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1329 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1330 that is a valid memory address for an instruction.
1331 The MODE argument is the machine mode for the MEM expression
1332 that wants to use this address.
1334 On the 1610, the actual legitimate addresses must be N (N must fit in
1335 5 bits), *rn (register indirect), *rn++, or *rn-- */
1337 #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
1338 #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
1339 #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
1340 #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1342 #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1343 #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1344 #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
1346 #define INDIRECTABLE_ADDRESS_P(X) \
1347 ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
1348 || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
1349 && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
1350 || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1353 #define INDEXABLE_ADDRESS_P(X,MODE) \
1354 ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
1355 XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
1356 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
1357 (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
1358 XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
1359 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1361 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1363 if (INDIRECTABLE_ADDRESS_P(X)) \
1368 /* Try machine-dependent ways of modifying an illegitimate address
1369 to be legitimate. If we find one, return the new, valid address.
1370 This macro is used in only one place: `memory_address' in explow.c.
1372 OLDX is the address as it was before break_out_memory_refs was called.
1373 In some cases it is useful to look at this to decide what needs to be done.
1375 MODE and WIN are passed so that this macro can use
1376 GO_IF_LEGITIMATE_ADDRESS.
1378 It is always safe for this macro to do nothing. It exists to recognize
1379 opportunities to optimize the output.
1381 For the 1610, we need not do anything. However, if we don't,
1382 `memory_address' will try lots of things to get a valid address, most of
1383 which will result in dead code and extra pseudos. So we make the address
1386 This is easy: The only valid addresses are an offset from a register
1387 and we know the address isn't valid. So just call either `force_operand'
1388 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1390 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1391 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1393 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1394 X = force_operand (X, 0); \
1396 X = force_reg (Pmode, X); \
1400 /* Go to LABEL if ADDR (a legitimate address expression)
1401 has an effect that depends on the machine mode it is used for.
1402 On the 1610, only postdecrement and postincrement address depend thus
1403 (the amount of decrement or increment being the length of the operand). */
1405 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1406 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1408 /* Nonzero if the constant value X is a legitimate general operand.
1409 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1410 #define LEGITIMATE_CONSTANT_P(X) (1)
1413 /* CONDITION CODE INFORMATION */
1415 /* Store in cc_status the expressions
1416 that the condition codes will describe
1417 after execution of an instruction whose pattern is EXP.
1418 Do not alter them if the instruction would not alter the cc's. */
1420 #define NOTICE_UPDATE_CC(EXP, INSN) \
1421 notice_update_cc( (EXP) )
1423 /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1425 /* Compute the cost of computing a constant rtl expression RTX
1426 whose rtx-code is CODE. The body of this macro is a portion
1427 of a switch statement. If the code is computed here,
1428 return it with a return statement. */
1429 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1435 return COSTS_N_INSNS (1); \
1437 case CONST_DOUBLE: \
1438 return COSTS_N_INSNS (2);
1440 /* Like CONST_COSTS but applies to nonconstant RTL expressions.
1441 This can be used, for example to indicate how costly a multiply
1443 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1445 return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \
1446 COSTS_N_INSNS (4); \
1449 return COSTS_N_INSNS (38); \
1451 if (GET_MODE (X) == QImode) \
1452 return COSTS_N_INSNS (2); \
1454 return COSTS_N_INSNS (38); \
1456 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1458 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1460 int number = INTVAL(XEXP (X,1)); \
1462 return COSTS_N_INSNS (1); \
1463 if (INT_FITS_16_BITS(number)) \
1464 return COSTS_N_INSNS (2); \
1466 return COSTS_N_INSNS (4); \
1468 return COSTS_N_INSNS (1); \
1471 return COSTS_N_INSNS (38); \
1473 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1475 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1477 if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1478 return COSTS_N_INSNS (2); \
1480 return COSTS_N_INSNS (4); \
1482 return COSTS_N_INSNS (1); \
1485 return COSTS_N_INSNS (38); \
1486 case AND: case IOR: case XOR: \
1487 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1489 if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1490 return COSTS_N_INSNS (2); \
1492 return COSTS_N_INSNS (4); \
1494 return COSTS_N_INSNS (1); \
1495 case NEG: case NOT: \
1496 return COSTS_N_INSNS (1); \
1500 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1502 int number = INTVAL(XEXP (X,1)); \
1503 if (number == 1 || number == 4 || number == 8 || \
1505 return COSTS_N_INSNS (1); \
1507 return COSTS_N_INSNS (2); \
1509 return COSTS_N_INSNS (1);
1511 /* An expression giving the cost of an addressing mode that contains
1513 #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR)
1515 /* A c expression for the cost of moving data from a register in
1516 class FROM to one in class TO. The classes are expressed using
1517 the enumeration values such as GENERAL_REGS. A value of 2 is
1519 #define REGISTER_MOVE_COST(FROM,TO) dsp16xx_register_move_cost (FROM, TO)
1521 /* A C expression for the cost of moving data of mode MODE between
1522 a register and memory. A value of 2 is the default. */
1523 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1524 (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
1527 /* A C expression for the cost of a branch instruction. A value of
1528 1 is the default; */
1529 #define BRANCH_COST 2
1532 /* Define this because otherwise gcc will try to put the function address
1533 in any old pseudo register. We can only use pt. */
1534 #define NO_FUNCTION_CSE
1536 /* Define this macro as a C expression which is nonzero if accessing less
1537 than a word of memory (i.e a char or short) is no faster than accessing
1538 a word of memory, i.e if such access require more than one instruction
1539 or if ther is no difference in cost between byte and (aligned) word
1541 #define SLOW_BYTE_ACCESS 1
1543 /* Define this macro if zero-extension (of a char or short to an int) can
1544 be done faster if the destination is a register that is know to be zero. */
1545 /* #define SLOW_ZERO_EXTEND */
1547 /* Define this macro if unaligned accesses have a cost many times greater than
1548 aligned accesses, for example if they are emulated in a trap handler */
1549 /* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
1551 /* Define this macro to inhibit strength reduction of memory addresses */
1552 /* #define DONT_REDUCE_ADDR */
1555 /* DIVIDING THE OUTPUT IN SECTIONS */
1556 /* Output before read-only data. */
1558 #define DEFAULT_TEXT_SEG_NAME ".text"
1559 #define TEXT_SECTION_ASM_OP rsect_text
1561 /* Output before constants and strings */
1562 #define DEFAULT_CONST_SEG_NAME ".const"
1563 #define READONLY_SECTION_ASM_OP rsect_const
1564 #define READONLY_DATA_SECTION const_section
1566 /* Output before writable data. */
1567 #define DEFAULT_DATA_SEG_NAME ".data"
1568 #define DATA_SECTION_ASM_OP rsect_data
1570 #define DEFAULT_BSS_SEG_NAME ".bss"
1571 #define BSS_SECTION_ASM_OP rsect_bss
1573 /* We will default to using 1610 if the user doesn't
1575 #define DEFAULT_CHIP_NAME "1610"
1577 /* A list of names for sections other than the standard ones, which are
1578 'in_text' and 'in_data' (and .bss if BSS_SECTION_ASM_OP is defined). */
1579 #define EXTRA_SECTIONS in_const
1581 #define EXTRA_SECTION_FUNCTIONS \
1585 if (in_section != in_const) \
1587 fprintf (asm_out_file, "%s\n", READONLY_SECTION_ASM_OP); \
1588 in_section = in_const; \
1592 /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1594 /* Output at beginning of assembler file. */
1595 #define ASM_FILE_START(FILE) dsp16xx_file_start ()
1597 /* Prevent output of .gcc_compiled */
1598 #define ASM_IDENTIFY_GCC(FILE)
1600 /* A C string constant describing how to begin a comment in the target
1601 assembler language. */
1602 /* define ASM_COMMENT_START */
1604 /* Output to assembler file text saying following lines
1605 may contain character constants, extra white space, comments, etc. */
1606 #define ASM_APP_ON ""
1608 /* Output to assembler file text saying following lines
1609 no longer contain unusual constructs. */
1610 #define ASM_APP_OFF ""
1612 /* OUTPUT OF DATA */
1614 /* This is how to output an assembler line defining a `double' constant. */
1615 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) asm_output_float (FILE,VALUE)
1617 /* This is how to output an assembler line defining a `float' constant. */
1618 #define ASM_OUTPUT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1620 /* This is how to output an assembler line defining a 'float' constant of
1622 #define ASM_OUTPUT_SHORT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1624 /* This is how to output an assembler line defining an `char' constant. */
1625 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1626 ( fprintf (FILE, "\tint "), \
1627 output_addr_const (FILE, (VALUE)), \
1628 fprintf (FILE, "\n"))
1630 /* This is how to output an assembler line defining an `short' constant. */
1631 #define ASM_OUTPUT_SHORT(FILE,EXP) asm_output_long(FILE,INTVAL(EXP))
1633 /* This is how to output an assembler line defining a 'int' constant. */
1634 #define ASM_OUTPUT_INT(FILE, EXP) asm_output_long(FILE,INTVAL(EXP))
1636 /* This is how to output an assembler line for a numeric constant byte. */
1637 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1638 fprintf ((FILE), "\tint %ld\n", (long)(VALUE))
1641 /* This is how we output a 'c' character string. For the 16xx
1642 assembler we have to do it one letter at a time */
1644 #define ASCII_LENGTH 10
1646 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1648 FILE *_hide_asm_out_file = (MYFILE); \
1649 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1650 int _hide_thissize = (MYLENGTH); \
1652 FILE *asm_out_file = _hide_asm_out_file; \
1653 const unsigned char *p = _hide_p; \
1654 int thissize = _hide_thissize; \
1657 for (i = 0; i < thissize; i++) \
1659 register int c = p[i]; \
1661 if (i % ASCII_LENGTH == 0) \
1662 fprintf (asm_out_file, "\tint "); \
1664 if (c >= ' ' && c < 0177 && c != '\'') \
1666 putc ('\'', asm_out_file); \
1667 putc (c, asm_out_file); \
1668 putc ('\'', asm_out_file); \
1672 fprintf (asm_out_file, "%d", c); \
1673 /* After an octal-escape, if a digit follows, \
1674 terminate one string constant and start another. \
1675 The Vax assembler fails to stop reading the escape \
1676 after three digits, so this is the only way we \
1677 can get it to parse the data properly. \
1678 if (i < thissize - 1 \
1679 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1680 fprintf (asm_out_file, "\'\n\tint \'"); \
1684 we are not at the last char (i != thissize -1) \
1685 and (we are not at a line break multiple \
1686 but i == 0) (it will be the very first time) \
1687 then put out a comma to extend. \
1689 if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
1690 fprintf(asm_out_file, ","); \
1691 if (!((i + 1) % ASCII_LENGTH)) \
1692 fprintf (asm_out_file, "\n"); \
1694 fprintf (asm_out_file, "\n"); \
1699 /* Store in OUTPUT a string (made with alloca) containing
1700 an assembler-name for a local static variable or function
1701 named NAME. LABELNO is an integer which is different for
1704 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1706 int len = strlen (NAME); \
1707 char *temp = (char *) alloca (len + 3); \
1709 strcpy (&temp[1], (NAME)); \
1710 temp[len + 1] = '_'; \
1711 temp[len + 2] = 0; \
1712 (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \
1713 ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \
1716 #define ASM_OPEN_PAREN "("
1717 #define ASM_CLOSE_PAREN ")"
1720 /* OUTPUT OF UNINITIALIZED VARIABLES */
1722 /* This says how to output an assembler line
1723 to define a global common symbol. */
1725 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1726 asm_output_common (FILE, NAME, SIZE, ROUNDED);
1728 /* This says how to output an assembler line
1729 to define a local common symbol. */
1731 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1732 asm_output_local (FILE, NAME, SIZE, ROUNDED);
1734 /* OUTPUT AND GENERATION OF LABELS */
1736 /* This is how to output the definition of a user-level label named NAME,
1737 such as the label on a static function or variable NAME. */
1738 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1739 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1741 /* This is how to output a command to make the user-level label named NAME
1742 defined for reference from other files. */
1744 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1745 do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1747 /* A C statement to output to the stdio stream any text necessary
1748 for declaring the name of an external symbol named name which
1749 is referenced in this compilation but not defined. */
1751 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1753 fprintf (FILE, ".extern "); \
1754 assemble_name (FILE, NAME); \
1755 fprintf (FILE, "\n"); \
1757 /* A C statement to output on stream an assembler pseudo-op to
1758 declare a library function named external. */
1760 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1762 fprintf (FILE, ".extern "); \
1763 assemble_name (FILE, XSTR (FUN, 0)); \
1764 fprintf (FILE, "\n"); \
1767 /* The prefix to add to user-visible assembler symbols. */
1769 #define USER_LABEL_PREFIX "_"
1771 /* This is how to output an internal numbered label where
1772 PREFIX is the class of label and NUM is the number within the class. */
1773 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1774 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1776 /* This is how to store into the string LABEL
1777 the symbol_ref name of an internal numbered label where
1778 PREFIX is the class of label and NUM is the number within the class.
1779 This is suitable for output with `assemble_name'. */
1780 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1781 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1784 /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1786 /* How to refer to registers in assembler output.
1787 This sequence is indexed by compiler's hard-register-number (see above). */
1789 #define REGISTER_NAMES \
1790 {"a0", "a0l", "a1", "a1l", "x", "y", "yl", "p", "pl", \
1791 "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
1792 "ar0", "ar1", "ar2", "ar3", \
1793 "c0", "c1", "c2", "pr", "rb", \
1794 "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
1795 "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
1796 "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1797 "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1798 "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1801 #define HIMODE_REGISTER_NAMES \
1802 {"a0", "a0", "a1", "a1", "x", "y", "y", "p", "p", \
1803 "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
1804 "ar0", "ar1", "ar2", "ar3", \
1805 "c0", "c1", "c2", "pr", "rb", \
1806 "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
1807 "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
1808 "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1809 "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1810 "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1813 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1815 /* Print operand X (an rtx) in assembler syntax to file FILE.
1816 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1817 For `%' followed by punctuation, CODE is the punctuation and X is null.
1819 DSP1610 extensions for operand codes:
1821 %H - print lower 16 bits of constant
1822 %U - print upper 16 bits of constant
1823 %w - print low half of register (e.g 'a0l')
1824 %u - print upper half of register (e.g 'a0')
1825 %b - print high half of accumulator for F3 ALU instructions
1826 %h - print constant in decimal */
1828 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1831 /* Print a memory address as an operand to reference that memory location. */
1833 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1835 /* This is how to output an insn to push a register on the stack.
1836 It need not be very fast code since it is used only for profiling */
1837 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) fatal("Profiling not implemented yet.");
1839 /* This is how to output an insn to pop a register from the stack.
1840 It need not be very fast code since it is used only for profiling */
1841 #define ASM_OUTPUT_REG_POP(FILE,REGNO) fatal("Profiling not implemented yet.");
1843 /* OUTPUT OF DISPATCH TABLES */
1845 /* This macro should be provided on machines where the addresses in a dispatch
1846 table are relative to the table's own address. */
1847 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1848 fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL)
1850 /* This macro should be provided on machines where the addresses in a dispatch
1851 table are absolute. */
1852 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1853 fprintf (FILE, "\tint L%d\n", VALUE)
1855 /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1857 /* This is how to output an assembler line that says to advance
1858 the location counter to a multiple of 2**LOG bytes. We should
1859 not have to do any alignment since the 1610 is a word machine. */
1860 #define ASM_OUTPUT_ALIGN(FILE,LOG)
1862 /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1863 because it fails to put zero1 in the bytes that are skipped. */
1864 #define ASM_NO_SKIP_IN_TEXT 1
1866 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1867 fprintf (FILE, "\t%d * int 0\n", (SIZE))
1869 /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1871 /* Define this macro if GCC should produce COFF-style debugging output
1872 for SDB in response to the '-g' option */
1873 #define SDB_DEBUGGING_INFO
1875 /* Support generating stabs for the listing file generator */
1876 #define DBX_DEBUGGING_INFO
1878 /* The default format when -g is given is still COFF debug info */
1879 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1881 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1883 /* MISCELLANEOUS PARAMETERS */
1885 /* Specify the machine mode that this machine uses
1886 for the index in the tablejump instruction. */
1887 #define CASE_VECTOR_MODE QImode
1889 /* Define as C expression which evaluates to nonzero if the tablejump
1890 instruction expects the table to contain offsets from the address of the
1892 Do not define this if the table should contain absolute addresses. */
1893 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1895 /* Specify the tree operation to be used to convert reals to integers. */
1896 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1898 /* This is the kind of divide that is easiest to do in the general case. */
1899 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1901 /* Max number of bytes we can move from memory to memory
1902 in one reasonably fast instruction. */
1905 /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1906 or bitwise 'and' instruction that truncates the count of a shift operation
1907 to a width equal to the number of bits needed to represent the size of the
1908 object being shifted. Do not define this macro unless the truncation applies
1909 to both shift operations and bit-field operations (if any). */
1910 /* #define SHIFT_COUNT_TRUNCATED */
1912 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1913 is done just by pretending it is already truncated. */
1914 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1916 /* When a prototype says `char' or `short', really pass an `int'. */
1917 #define PROMOTE_PROTOTYPES 1
1919 /* An alias for the machine mode used for pointers */
1920 #define Pmode QImode
1922 /* A function address in a call instruction
1923 is a byte address (for indexing purposes)
1924 so give the MEM rtx a byte's mode. */
1925 #define FUNCTION_MODE QImode
1927 #if !defined(__DATE__)
1928 #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
1930 #define TARGET_VERSION fprintf (stderr, " (%s, %s)", VERSION_INFO1, __DATE__)
1933 #define VERSION_INFO1 "AT&T DSP16xx C Cross Compiler, version 1.2.0"
1936 /* Define this as 1 if `char' should by default be signed; else as 0. */
1937 #define DEFAULT_SIGNED_CHAR 1
1939 /* If this macro is defined, GNU CC gathers statistics about the number and
1940 kind of tree node it allocates during each run. The option '-fstats' will
1941 tell the compiler to print these statistics about the sizes of it obstacks. */
1942 #define GATHER_STATISTICS
1944 /* Define this so gcc does not output a call to __main, since we
1945 are not currently supporting c++. */
1946 #define INIT_SECTION_ASM_OP 1
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