1 /* Definitions of target machine for GNU compiler. AT&T DSP1600.
2 Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Michael Collison (collison@isisinc.net).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 extern const char *low_reg_names[];
24 extern const char *text_seg_name;
25 extern const char *rsect_text;
26 extern const char *data_seg_name;
27 extern const char *rsect_data;
28 extern const char *bss_seg_name;
29 extern const char *rsect_bss;
30 extern const char *const_seg_name;
31 extern const char *rsect_const;
32 extern const char *chip_name;
33 extern const char *save_chip_name;
34 extern struct rtx_def *dsp16xx_compare_op0, *dsp16xx_compare_op1;
35 extern struct rtx_def *dsp16xx_addhf3_libcall;
36 extern struct rtx_def *dsp16xx_subhf3_libcall;
37 extern struct rtx_def *dsp16xx_mulhf3_libcall;
38 extern struct rtx_def *dsp16xx_divhf3_libcall;
39 extern struct rtx_def *dsp16xx_cmphf3_libcall;
40 extern struct rtx_def *dsp16xx_fixhfhi2_libcall;
41 extern struct rtx_def *dsp16xx_floathihf2_libcall;
42 extern struct rtx_def *dsp16xx_neghf2_libcall;
43 extern struct rtx_def *dsp16xx_umulhi3_libcall;
44 extern struct rtx_def *dsp16xx_mulhi3_libcall;
45 extern struct rtx_def *dsp16xx_udivqi3_libcall;
46 extern struct rtx_def *dsp16xx_udivhi3_libcall;
47 extern struct rtx_def *dsp16xx_divqi3_libcall;
48 extern struct rtx_def *dsp16xx_divhi3_libcall;
49 extern struct rtx_def *dsp16xx_modqi3_libcall;
50 extern struct rtx_def *dsp16xx_modhi3_libcall;
51 extern struct rtx_def *dsp16xx_umodqi3_libcall;
52 extern struct rtx_def *dsp16xx_umodhi3_libcall;
54 extern struct rtx_def *dsp16xx_ashrhi3_libcall;
55 extern struct rtx_def *dsp16xx_ashlhi3_libcall;
56 extern struct rtx_def *dsp16xx_lshrhi3_libcall;
58 /* RUN-TIME TARGET SPECIFICATION */
61 /* Name of the AT&T assembler */
63 #define ASM_PROG "as1600"
65 /* Name of the AT&T linker */
67 #define LD_PROG "ld1600"
69 /* Define which switches take word arguments */
70 #define WORD_SWITCH_TAKES_ARG(STR) \
71 (!strcmp (STR, "ifile") ? 1 : \
77 #define CC1_SPEC "%{!O*:-O}"
79 #define CPP_SPEC "%{!O*:-D__OPTIMIZE__}"
81 /* Define this as a spec to call the AT&T assembler */
83 #define CROSS_ASM_SPEC "%{!S:as1600 %a %i\n }"
85 /* Define this as a spec to call the AT&T linker */
87 #define CROSS_LINK_SPEC "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \
88 %{r} %{s} %{t} %{u*} %{x}\
89 %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\
90 %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\
91 %{!A:%{!nostdlib:%{!nostartfiles:%E}}}\n }}}}}"
93 /* Nothing complicated here, just link with libc.a under normal
95 #define LIB_SPEC "-lc"
97 /* Specify the startup file to link with. */
98 #define STARTFILE_SPEC "%{mmap1:m1_crt0.o%s} \
99 %{mmap2:m2_crt0.o%s} \
100 %{mmap3:m3_crt0.o%s} \
101 %{mmap4:m4_crt0.o%s} \
102 %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
103 %ea -ifile option requires a -map option}}"
105 /* Specify the end file to link with */
107 #define ENDFILE_SPEC "%{mmap1:m1_crtn.o%s} \
108 %{mmap2:m2_crtn.o%s} \
109 %{mmap3:m3_crtn.o%s} \
110 %{mmap4:m4_crtn.o%s} \
111 %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
112 %ea -ifile option requires a -map option}}"
115 /* Tell gcc where to look for the startfile */
116 /*#define STANDARD_STARTFILE_PREFIX "/d1600/lib"*/
118 /* Tell gcc where to look for it's executables */
119 /*#define STANDARD_EXEC_PREFIX "/d1600/bin"*/
121 /* Command line options to the AT&T assembler */
122 #define ASM_SPEC "%{V} %{v:%{!V:-V}} %{g*:-g}"
124 /* Command line options for the AT&T linker */
126 #define LINK_SPEC "%{V} %{v:%{!V:-V}} %{minit:-i} \
127 %{!ifile*:%{mmap1:m1_deflt.if%s} \
128 %{mmap2:m2_deflt.if%s} \
129 %{mmap3:m3_deflt.if%s} \
130 %{mmap4:m4_deflt.if%s} \
131 %{!mmap*:m4_deflt.if%s}} \
134 /* Include path is determined from the environment variable */
135 #define INCLUDE_DEFAULTS \
140 /* Names to predefine in the preprocessor for this target machine. */
142 #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -DMSDOS"
144 #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -Ddsp1610 -DDSP1610"
147 /* Run-time compilation parameters selecting different hardware subsets. */
149 extern int target_flags;
151 /* Macros used in the machine description to test the flags. */
153 #define MASK_REGPARM 0x00000001 /* Pass parameters in registers */
154 #define MASK_NEAR_CALL 0x00000002 /* The call is on the same 4k page */
155 #define MASK_NEAR_JUMP 0x00000004 /* The jump is on the same 4k page */
156 #define MASK_BMU 0x00000008 /* Use the 'bmu' shift instructions */
157 #define MASK_MAP1 0x00000040 /* Link with map1 */
158 #define MASK_MAP2 0x00000080 /* Link with map2 */
159 #define MASK_MAP3 0x00000100 /* Link with map3 */
160 #define MASK_MAP4 0x00000200 /* Link with map4 */
161 #define MASK_YBASE_HIGH 0x00000400 /* The ybase register window starts high */
162 #define MASK_INIT 0x00000800 /* Have the linker generate tables to
163 initialize data at startup */
164 #define MASK_RESERVE_YBASE 0x00002000 /* Reserved the ybase registers */
165 #define MASK_DEBUG 0x00004000 /* Debugging turned on*/
166 #define MASK_SAVE_TEMPS 0x00008000 /* Save temps. option seen */
168 /* Compile passing first two args in regs 0 and 1.
169 This exists only to test compiler features that will
170 be needed for RISC chips. It is not usable
171 and is not intended to be usable on this cpu. */
172 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
174 /* The call is on the same 4k page, so instead of loading
175 the 'pt' register and branching, we can branch directly */
177 #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
179 /* The jump is on the same 4k page, so instead of loading
180 the 'pt' register and branching, we can branch directly */
182 #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
184 /* Generate shift instructions to use the 1610 Bit Manipulation
186 #define TARGET_BMU (target_flags & MASK_BMU)
188 #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
190 /* Direct the linker to output extra info for initialized data */
191 #define TARGET_MASK_INIT (target_flags & MASK_INIT)
193 #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
195 /* Reserve the ybase registers *(0) - *(31) */
196 #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
198 /* We turn this option on internally after seeing "-g" */
199 #define TARGET_DEBUG (target_flags & MASK_DEBUG)
201 /* We turn this option on internally after seeing "-save-temps */
202 #define TARGET_SAVE_TEMPS (target_flags & MASK_SAVE_TEMPS)
205 /* Macro to define tables used to set the flags.
206 This is a list in braces of pairs in braces,
207 each pair being { "NAME", VALUE }
208 where VALUE is the bits to set or minus the bits to clear.
209 An empty string NAME is used to identify the default VALUE. */
212 #define TARGET_SWITCHES \
214 { "regparm", MASK_REGPARM, \
215 N_("Pass parameters in registers (default)") }, \
216 { "no-regparm", -MASK_REGPARM, \
217 N_("Don't pass parameters in registers") }, \
218 { "near-call", MASK_NEAR_JUMP, \
219 N_("Generate code for near calls") }, \
220 { "no-near-call", -MASK_NEAR_CALL, \
221 N_("Don't generate code for near calls") }, \
222 { "near-jump", MASK_NEAR_JUMP, \
223 N_("Generate code for near jumps") }, \
224 { "no-near-jump", -MASK_NEAR_JUMP, \
225 N_("Don't generate code for near jumps") }, \
227 N_("Generate code for a bit-manipulation unit") }, \
228 { "no-bmu", -MASK_BMU, \
229 N_("Don't generate code for a bit-manipulation unit") }, \
230 { "map1", MASK_MAP1, \
231 N_("Generate code for memory map1") }, \
232 { "map2", MASK_MAP2, \
233 N_("Generate code for memory map2") }, \
234 { "map3", MASK_MAP3, \
235 N_("Generate code for memory map3") }, \
236 { "map4", MASK_MAP4, \
237 N_("Generate code for memory map4") }, \
238 { "init", MASK_INIT, \
239 N_("Ouput extra code for initialized data") }, \
240 { "reserve-ybase", MASK_RESERVE_YBASE, \
241 N_("Don't let reg. allocator use ybase registers") }, \
242 { "debug", MASK_DEBUG, \
243 N_("Output extra debug info in Luxworks environment") }, \
244 { "save-temporaries", MASK_SAVE_TEMPS, \
245 N_("Save temp. files in Luxworks environment") }, \
246 { "", TARGET_DEFAULT, ""} \
249 /* Default target_flags if no switches are specified */
250 #ifndef TARGET_DEFAULT
251 #define TARGET_DEFAULT MASK_REGPARM|MASK_YBASE_HIGH
254 #define TARGET_OPTIONS \
256 { "text=", &text_seg_name, \
257 N_("Specify alternate name for text section") }, \
258 { "data=", &data_seg_name, \
259 N_("Specify alternate name for data section") }, \
260 { "bss=", &bss_seg_name, \
261 N_("Specify alternate name for bss section") }, \
262 { "const=", &const_seg_name, \
263 N_("Specify alternate name for constant section") }, \
264 { "chip=", &chip_name, \
265 N_("Specify alternate name for dsp16xx chip") }, \
268 /* Sometimes certain combinations of command options do not make sense
269 on a particular target machine. You can define a macro
270 `OVERRIDE_OPTIONS' to take account of this. This macro, if
271 defined, is executed once just after all the command options have
274 Don't use this macro to turn on various extra optimizations for
275 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
277 #define OVERRIDE_OPTIONS override_options ()
279 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
281 flag_gnu_linker = FALSE; \
285 /* The dsp16xx family has so few registers \
286 * that running the first instruction \
287 * scheduling is bad for reg. allocation \
288 * since it increases lifetimes of pseudos. \
289 * So turn of first scheduling pass. \
291 flag_schedule_insns = FALSE; \
297 /* Define this if most significant bit is lowest numbered
298 in instructions that operate on numbered bit-fields.
300 #define BITS_BIG_ENDIAN 0
302 /* Define this if most significant byte of a word is the lowest numbered.
303 We define big-endian, but since the 1600 series cannot address bytes
304 it does not matter. */
305 #define BYTES_BIG_ENDIAN 1
307 /* Define this if most significant word of a multiword number is numbered.
308 For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
309 #define WORDS_BIG_ENDIAN 1
311 /* number of bits in an addressable storage unit */
312 #define BITS_PER_UNIT 16
314 /* Maximum number of bits in a word. */
315 #define MAX_BITS_PER_WORD 16
317 /* Width of a word, in units (bytes). */
318 #define UNITS_PER_WORD 1
320 /* Allocation boundary (in *bits*) for storing pointers in memory. */
321 #define POINTER_BOUNDARY 16
323 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
324 #define PARM_BOUNDARY 16
326 /* Boundary (in *bits*) on which stack pointer should be aligned. */
327 #define STACK_BOUNDARY 16
329 /* Allocation boundary (in *bits*) for the code of a function. */
330 #define FUNCTION_BOUNDARY 16
332 /* Biggest alignment that any data type can require on this machine, in bits. */
333 #define BIGGEST_ALIGNMENT 16
335 /* Biggest alignment that any structure field can require on this machine, in bits */
336 #define BIGGEST_FIELD_ALIGNMENT 16
338 /* Alignment of field after `int : 0' in a structure. */
339 #define EMPTY_FIELD_BOUNDARY 16
341 /* Number of bits which any structure or union's size must be a multiple of. Each structure
342 or union's size is rounded up to a multiple of this */
343 #define STRUCTURE_SIZE_BOUNDARY 16
345 /* Define this if move instructions will actually fail to work
346 when given unaligned data. */
347 #define STRICT_ALIGNMENT 1
349 /* An integer expression for the size in bits of the largest integer machine mode that
350 should actually be used. All integer machine modes of this size or smaller can be
351 used for structures and unions with the appropriate sizes. */
352 #define MAX_FIXED_MODE_SIZE 32
354 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
356 #define SHORT_TYPE_SIZE 16
357 #define INT_TYPE_SIZE 16
358 #define LONG_TYPE_SIZE 32
359 #define LONG_LONG_TYPE_SIZE 32
360 #define FLOAT_TYPE_SIZE 32
361 #define DOUBLE_TYPE_SIZE 32
362 #define LONG_DOUBLE_TYPE_SIZE 32
364 /* An expression whose value is 1 or 0, according to whether the type char should be
365 signed or unsigned by default. */
367 #define DEFAULT_SIGNED_CHAR 1
369 /* A C expression to determine whether to give an enum type only as many bytes
370 as it takes to represent the range of possible values of that type. A nonzero
371 value means to do that; a zero value means all enum types should be allocated
374 #define DEFAULT_SHORT_ENUMS 0
376 /* A C expression for a string describing the name of the data type to use for
379 #define SIZE_TYPE "unsigned int"
381 /* A C expression for a string describing the name of the data type to use for the
382 result of subtracting two pointers */
384 #define PTRDIFF_TYPE "int"
387 /* REGISTER USAGE. */
389 #define ALL_16_BIT_REGISTERS 1
391 /* Number of actual hardware registers.
392 The hardware registers are assigned numbers for the compiler
393 from 0 to FIRST_PSEUDO_REGISTER-1 */
395 #define FIRST_PSEUDO_REGISTER (REG_YBASE31 + 1)
397 /* 1 for registers that have pervasive standard uses
398 and are not available for the register allocator.
400 The registers are laid out as follows:
402 {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
403 {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
404 {pt} - X Space Address Arithmetic Unit
405 {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
406 {pr} - Return Address Register
408 We reserve r2 for the Stack Pointer.
409 We specify r3 for the Frame Pointer but allow the compiler
410 to omit it when possible since we have so few pointer registers. */
438 #define REG_YBASE0 26
439 #define REG_YBASE1 27
440 #define REG_YBASE2 28
441 #define REG_YBASE3 29
442 #define REG_YBASE4 30
443 #define REG_YBASE5 31
444 #define REG_YBASE6 32
445 #define REG_YBASE7 33
446 #define REG_YBASE8 34
447 #define REG_YBASE9 35
448 #define REG_YBASE10 36
449 #define REG_YBASE11 37
450 #define REG_YBASE12 38
451 #define REG_YBASE13 39
452 #define REG_YBASE14 40
453 #define REG_YBASE15 41
454 #define REG_YBASE16 42
455 #define REG_YBASE17 43
456 #define REG_YBASE18 44
457 #define REG_YBASE19 45
458 #define REG_YBASE20 46
459 #define REG_YBASE21 47
460 #define REG_YBASE22 48
461 #define REG_YBASE23 49
462 #define REG_YBASE24 50
463 #define REG_YBASE25 51
464 #define REG_YBASE26 52
465 #define REG_YBASE27 53
466 #define REG_YBASE28 54
467 #define REG_YBASE29 55
468 #define REG_YBASE30 56
469 #define REG_YBASE31 57
471 /* Do we have an accumulator register? */
472 #define IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L)
473 #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
475 /* Do we have a virtual ybase register */
476 #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
478 #define IS_YBASE_ELIGIBLE_REG(REGNO) (IS_ACCUM_REG (REGNO) || IS_ADDRESS_REGISTER(REGNO) \
479 || REGNO == REG_X || REGNO == REG_Y || REGNO == REG_YL \
480 || REGNO == REG_PROD || REGNO == REG_PRODL)
482 #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
484 #define FIXED_REGISTERS \
485 {0, 0, 0, 0, 0, 0, 0, 0, 0, \
486 0, 0, 0, 1, 0, 0, 1, \
491 0, 0, 0, 0, 0, 0, 0, 0, \
492 0, 0, 0, 0, 0, 0, 0, 0, \
493 0, 0, 0, 0, 0, 0, 0, 0, \
494 0, 0, 0, 0, 0, 0, 0, 0}
496 /* 1 for registers not available across function calls.
497 These must include the FIXED_REGISTERS and also any
498 registers that can be used without being saved.
499 The latter must include the registers where values are returned
500 and the register where structure-value addresses are passed.
501 On the 1610 'a0' holds return values from functions. 'r0' holds
502 structure-value addresses.
504 In addition we don't save either j, k, ybase or any of the
505 bit manipulation registers. */
508 #define CALL_USED_REGISTERS \
509 {1, 1, 1, 1, 0, 1, 1, 1, 1, /* 0-8 */ \
510 1, 0, 0, 1, 1, 1, 1, /* 9-15 */ \
512 0, 0, 1, 1, /* 17-20 */ \
513 1, 1, 1, /* 21-23 */ \
515 0, 0, 0, 0, 0, 0, 0, 0, /* 26-33 */ \
516 0, 0, 0, 0, 0, 0, 0, 0, /* 34-41 */ \
517 0, 0, 0, 0, 0, 0, 0, 0, /* 42-49 */ \
518 0, 0, 0, 0, 0, 0, 0, 0} /* 50-57 */
520 /* List the order in which to allocate registers. Each register must be
521 listed once, even those in FIXED_REGISTERS.
523 We allocate in the following order:
527 #define REG_ALLOC_ORDER \
528 { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
529 REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
530 REG_RB, REG_A0, REG_A1, REG_A0L, \
531 REG_A1L, REG_AR2, REG_AR3, \
532 REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
533 REG_C1, REG_C2, REG_R3, \
534 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
535 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
536 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
537 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
538 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
539 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
540 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
541 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
543 #define REG_ALLOC_ORDER \
545 REG_A0, REG_A0L, REG_A1, REG_A1L, REG_Y, REG_YL, \
547 REG_PRODL, REG_R0, REG_J, REG_K, REG_AR2, REG_AR3, \
548 REG_X, REG_R1, REG_R2, REG_RB, REG_AR0, REG_AR1, \
549 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
550 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
551 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
552 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
553 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
554 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
555 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
556 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31, \
557 REG_R3, REG_YBASE, REG_PT, REG_C0, REG_C1, REG_C2, \
560 /* Zero or more C statements that may conditionally modify two
561 variables `fixed_regs' and `call_used_regs' (both of type `char
562 []') after they have been initialized from the two preceding
565 This is necessary in case the fixed or call-clobbered registers
566 depend on target flags.
568 You need not define this macro if it has no work to do.
570 If the usage of an entire class of registers depends on the target
571 flags, you may indicate this to GCC by using this macro to modify
572 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
573 the classes which should not be used by GCC. Also define the macro
574 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
575 letter for a class that shouldn't be used.
577 (However, if this class is not included in `GENERAL_REGS' and all
578 of the insn patterns whose constraints permit this class are
579 controlled by target switches, then GCC will automatically avoid
580 using these registers when the target switches are opposed to
581 them.) If the user tells us there is no BMU, we can't use
582 ar0-ar3 for register allocation */
584 #define CONDITIONAL_REGISTER_USAGE \
591 for (regno = REG_AR0; regno <= REG_AR3; regno++) \
592 fixed_regs[regno] = call_used_regs[regno] = 1; \
594 if (TARGET_RESERVE_YBASE) \
598 for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
599 fixed_regs[regno] = call_used_regs[regno] = 1; \
604 /* Determine which register classes are very likely used by spill registers.
605 local-alloc.c won't allocate pseudos that have these classes as their
606 preferred class unless they are "preferred or nothing". */
608 #define CLASS_LIKELY_SPILLED_P(CLASS) \
609 ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
611 /* Return number of consecutive hard regs needed starting at reg REGNO
612 to hold something of mode MODE.
613 This is ordinarily the length in words of a value of mode MODE
614 but can be less for certain modes in special long registers. */
616 #define HARD_REGNO_NREGS(REGNO, MODE) \
617 (GET_MODE_SIZE(MODE))
619 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
621 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
623 /* Value is 1 if it is a good idea to tie two pseudo registers
624 when one has mode MODE1 and one has mode MODE2.
625 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
626 for any hard reg, then this must be 0 for correct output. */
627 #define MODES_TIEABLE_P(MODE1, MODE2) \
628 (((MODE1) == (MODE2)) || \
629 (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
630 == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
632 /* Specify the registers used for certain standard purposes.
633 The values of these macros are register numbers. */
635 /* DSP1600 pc isn't overloaded on a register. */
636 /* #define PC_REGNUM */
638 /* Register to use for pushing function arguments.
639 This is r3 in our case */
640 #define STACK_POINTER_REGNUM REG_R3
642 /* Base register for access to local variables of the function.
643 This is r2 in our case */
644 #define FRAME_POINTER_REGNUM REG_R2
646 /* We can debug without the frame pointer */
647 #define CAN_DEBUG_WITHOUT_FP 1
649 /* The 1610 saves the return address in this register */
650 #define RETURN_ADDRESS_REGNUM REG_PR
652 /* Base register for access to arguments of the function. */
653 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
655 /* Register in which static-chain is passed to a function. */
657 #define STATIC_CHAIN_REGNUM 4
659 /* Register in which address to store a structure value
660 is passed to a function. This is 'r0' in our case */
661 #define STRUCT_VALUE_REGNUM REG_R0
663 /* Define the classes of registers for register constraints in the
664 machine description. Also define ranges of constants.
666 One of the classes must always be named ALL_REGS and include all hard regs.
667 If there is more than one class, another class must be named NO_REGS
668 and contain no registers.
670 The name GENERAL_REGS must be the name of a class (or an alias for
671 another name such as ALL_REGS). This is the class of registers
672 that is allowed by "g" or "r" in a register constraint.
673 Also, registers outside this class are allocated only when
674 instructions express preferences for them.
676 The classes must be numbered in nondecreasing order; that is,
677 a larger-numbered class must never be contained completely
678 in a smaller-numbered class.
680 For any two classes, it is very desirable that there be another
681 class that represents their union. */
700 YH_OR_ACCUM_HIGH_REGS,
703 YL_OR_ACCUM_LOW_REGS,
711 PL_OR_ACCUM_LOW_REGS,
713 YL_OR_PL_OR_ACCUM_LOW_REGS,
717 ACCUM_LOW_OR_YL_OR_P_REGS,
720 NO_FRAME_Y_ADDR_REGS,
722 ACCUM_LOW_OR_Y_ADDR_REGS,
723 ACCUM_OR_Y_ADDR_REGS,
727 NON_HIGH_YBASE_ELIGIBLE_REGS,
730 J_OR_DAU_16_BIT_REGS,
732 NOHIGH_NON_ADDR_REGS,
735 NOHIGH_NON_YBASE_REGS,
736 NO_ACCUM_NON_YBASE_REGS,
739 ACCUM_LOW_OR_YBASE_REGS,
743 ACCUM_LOW_YL_PL_OR_YBASE_REGS,
745 ACCUM_Y_P_OR_YBASE_REGS,
746 Y_ADDR_OR_YBASE_REGS,
747 YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
748 YBASE_OR_YBASE_ELIGIBLE_REGS,
754 /* GENERAL_REGS must be the name of a register class */
755 #define GENERAL_REGS ALL_REGS
757 #define N_REG_CLASSES (int) LIM_REG_CLASSES
759 /* Give names of register classes as strings for dump file. */
761 #define REG_CLASS_NAMES \
774 "X_OR_ACCUM_LOW_REGS", \
777 "YH_OR_ACCUM_HIGH_REGS", \
780 "YL_OR_ACCUM_LOW_REGS", \
788 "PL_OR_ACCUM_LOW_REGS", \
790 "PL_OR_YL_OR_ACCUM_LOW_REGS", \
794 "ACCUM_LOW_OR_YL_OR_P_REGS", \
796 "ACCUM_Y_OR_P_REGS", \
797 "NO_FRAME_Y_ADDR_REGS", \
799 "ACCUM_LOW_OR_Y_ADDR_REGS", \
800 "ACCUM_OR_Y_ADDR_REGS", \
801 "X_OR_Y_ADDR_REGS", \
802 "Y_OR_Y_ADDR_REGS", \
803 "P_OR_Y_ADDR_REGS", \
804 "NON_HIGH_YBASE_ELIGIBLE_REGS", \
805 "YBASE_ELIGIBLE_REGS", \
807 "J_OR_DAU_16_BIT_REGS", \
809 "NOHIGH_NON_ADDR_REGS", \
811 "SLOW_MEM_LOAD_REGS", \
812 "NOHIGH_NON_YBASE_REGS", \
813 "NO_ACCUM_NON_YBASE_REGS", \
816 "ACCUM_LOW_OR_YBASE_REGS", \
817 "ACCUM_OR_YBASE_REGS", \
820 "ACCUM_LOW_YL_PL_OR_YBASE_REGS", \
822 "ACCUM_Y_P_OR_YBASE_REGS", \
823 "Y_ADDR_OR_YBASE_REGS", \
824 "YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS", \
825 "YBASE_OR_YBASE_ELIGIBLE_REGS", \
826 "NO_HIGH_ALL_REGS", \
830 /* Define which registers fit in which classes.
831 This is an initializer for a vector of HARD_REG_SET
832 of length N_REG_CLASSES. */
834 #define REG_CLASS_CONTENTS \
836 {0x00000000, 0x00000000}, /* no reg */ \
837 {0x00000001, 0x00000000}, /* a0h */ \
838 {0x00000002, 0x00000000}, /* a0l */ \
839 {0x00000003, 0x00000000}, /* a0h:a0l */ \
840 {0x00000004, 0x00000000}, /* a1h */ \
841 {0x00000005, 0x00000000}, /* accum high */ \
842 {0x00000008, 0x00000000}, /* a1l */ \
843 {0x0000000A, 0x00000000}, /* accum low */ \
844 {0x0000000c, 0x00000000}, /* a1h:a1l */ \
845 {0x0000000f, 0x00000000}, /* accum regs */ \
846 {0x00000010, 0x00000000}, /* x reg */ \
847 {0x0000001A, 0x00000000}, /* x & accum_low_regs */ \
848 {0x0000001f, 0x00000000}, /* x & accum regs */ \
849 {0x00000020, 0x00000000}, /* y high */ \
850 {0x00000025, 0x00000000}, /* yh, accum high */ \
851 {0x00000030, 0x00000000}, /* x & yh */ \
852 {0x00000040, 0x00000000}, /* y low */ \
853 {0x0000004A, 0x00000000}, /* y low, accum_low */ \
854 {0x00000050, 0x00000000}, /* x & yl */ \
855 {0x00000060, 0x00000000}, /* yl:yh */ \
856 {0x00000070, 0x00000000}, /* x, yh,a nd yl */ \
857 {0x0000006F, 0x00000000}, /* accum, y */ \
858 {0x00000080, 0x00000000}, /* p high */ \
859 {0x00000090, 0x00000000}, /* x & ph */ \
860 {0x00000100, 0x00000000}, /* p low */ \
861 {0x0000010A, 0x00000000}, /* p_low and accum_low */ \
862 {0x00000110, 0x00000000}, /* x & pl */ \
863 {0x0000014A, 0x00000000}, /* pl,yl,a1l,a0l */ \
864 {0x00000180, 0x00000000}, /* pl:ph */ \
865 {0x0000018F, 0x00000000}, /* accum, p */ \
866 {0x000001C0, 0x00000000}, /* pl:ph and yl */ \
867 {0x000001CA, 0x00000000}, /* pl:ph, yl, a0l, a1l */ \
868 {0x000001E0, 0x00000000}, /* y or p */ \
869 {0x000001EF, 0x00000000}, /* accum, y or p */ \
870 {0x00000E00, 0x00000000}, /* r0-r2 */ \
871 {0x00001E00, 0x00000000}, /* r0-r3 */ \
872 {0x00001E0A, 0x00000000}, /* r0-r3, accum_low */ \
873 {0x00001E0F, 0x00000000}, /* accum,r0-r3 */ \
874 {0x00001E10, 0x00000000}, /* x,r0-r3 */ \
875 {0x00001E60, 0x00000000}, /* y,r0-r3 */ \
876 {0x00001F80, 0x00000000}, /* p,r0-r3 */ \
877 {0x00001FDA, 0x00000000}, /* ph:pl, r0-r3, x,a0l,a1l */ \
878 {0x00001fff, 0x00000000}, /* accum,x,y,p,r0-r3 */ \
879 {0x00002000, 0x00000000}, /* j */ \
880 {0x00002025, 0x00000000}, /* j, yh, a1h, a0h */ \
881 {0x001E0000, 0x00000000}, /* ar0-ar3 */ \
882 {0x03FFE1DA, 0x00000000}, /* non_addr except yh,a0h,a1h */ \
883 {0x03FFE1FF, 0x00000000}, /* non_addr regs */ \
884 {0x03FFFF8F, 0x00000000}, /* non ybase except yh, yl, and x */ \
885 {0x03FFFFDA, 0x00000000}, /* non ybase regs except yh,a0h,a1h */ \
886 {0x03FFFFF0, 0x00000000}, /* non ybase except a0,a0l,a1,a1l */ \
887 {0x03FFFFFF, 0x00000000}, /* non ybase regs */ \
888 {0xFC000000, 0x03FFFFFF}, /* virt ybase regs */ \
889 {0xFC00000A, 0x03FFFFFF}, /* accum_low, virt ybase regs */ \
890 {0xFC00000F, 0x03FFFFFF}, /* accum, virt ybase regs */ \
891 {0xFC000010, 0x03FFFFFF}, /* x,virt ybase regs */ \
892 {0xFC000060, 0x03FFFFFF}, /* y,virt ybase regs */ \
893 {0xFC00014A, 0x03FFFFFF}, /* accum_low, yl, pl, ybase */ \
894 {0xFC000180, 0x03FFFFFF}, /* p,virt ybase regs */ \
895 {0xFC0001EF, 0x03FFFFFF}, /* accum,y,p,ybase regs */ \
896 {0xFC001E00, 0x03FFFFFF}, /* r0-r3, ybase regs */ \
897 {0xFC001FDA, 0x03FFFFFF}, /* r0-r3, pl:ph,yl,x,a1l,a0l */ \
898 {0xFC001FFF, 0x03FFFFFF}, /* virt ybase, ybase eligible regs */ \
899 {0xFCFFFFDA, 0x03FFFFFF}, /* all regs except yh,a0h,a1h */ \
900 {0xFFFFFFFF, 0x03FFFFFF} /* all regs */ \
904 /* The same information, inverted:
905 Return the class number of the smallest class containing
906 reg number REGNO. This could be a conditional expression
907 or could index an array. */
909 #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
911 /* The class value for index registers, and the one for base regs. */
913 #define INDEX_REG_CLASS NO_REGS
914 #define BASE_REG_CLASS Y_ADDR_REGS
916 /* Get reg_class from a letter such as appears in the machine description. */
918 #define REG_CLASS_FROM_LETTER(C) \
919 dsp16xx_reg_class_from_letter(C)
921 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
922 secondary_reload_class(CLASS, MODE, X)
924 /* When defined, the compiler allows registers explicitly used in the
925 rtl to be used as spill registers but prevents the compiler from
926 extending the lifetime of these registers. */
928 #define SMALL_REGISTER_CLASSES 1
930 /* Macros to check register numbers against specific register classes. */
932 /* These assume that REGNO is a hard or pseudo reg number.
933 They give nonzero only if REGNO is a hard reg of the suitable class
934 or a pseudo reg currently allocated to a suitable hard reg.
935 Since they use reg_renumber, they are safe only once reg_renumber
936 has been allocated, which happens in local-alloc.c. */
938 /* A C expression which is nonzero if register REGNO is suitable for use
939 as a base register in operand addresses. It may be either a suitable
940 hard register or a pseudo register that has been allocated such a
943 On the 1610 the Y address pointers can be used as a base registers */
944 #define REGNO_OK_FOR_BASE_P(REGNO) \
945 (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
946 && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
948 #define REGNO_OK_FOR_YBASE_P(REGNO) \
949 (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
951 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
953 #ifdef ALL_16_BIT_REGISTERS
954 #define IS_32_BIT_REG(REGNO) 0
956 #define IS_32_BIT_REG(REGNO) \
957 ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
960 /* Given an rtx X being reloaded into a reg required to be
961 in class CLASS, return the class of reg to actually use.
962 In general this is just CLASS; but on some machines
963 in some cases it is preferable to use a more restrictive class.
964 Also, we must ensure that a PLUS is reloaded either
965 into an accumulator or an address register. */
967 #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
969 /* A C expression that places additional restrictions on the register
970 class to use when it is necessary to be able to hold a value of
971 mode MODE in a reload register for which class CLASS would
974 Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
975 there are certain modes that simply can't go in certain reload
978 The value is a register class; perhaps CLASS, or perhaps another,
981 Don't define this macro unless the target machine has limitations
982 which require the macro to do something nontrivial. */
985 #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
988 /* A C expression for the maximum number of consecutive registers of class CLASS
989 needed to hold a value of mode MODE */
990 #define CLASS_MAX_NREGS(CLASS, MODE) \
991 class_max_nregs(CLASS, MODE)
993 /* The letters 'I' through 'P' in a register constraint string
994 can be used to stand for particular ranges of immediate operands.
995 This macro defines what the ranges are.
996 C is the letter, and VALUE is a constant value.
997 Return 1 if VALUE is in the range specified by C.
999 For the 16xx, the following constraints are used:
1000 'I' requires a non-negative 16-bit value.
1001 'J' requires a non-negative 9-bit value
1002 'K' requires a constant 0 operand.
1003 'L' constant for use in add or sub from low 16-bits
1004 'M' 32-bit value -- low 16-bits zero
1005 'N' constant for use incrementing or decrementing an address register
1006 'O' constant for use with and'ing only high 16-bit
1007 'P' constant for use with and'ing only low 16-bit
1010 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
1011 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
1012 #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
1013 #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
1014 #define ADD_LOW_16(I) ((I) >= 0 && (I) <= 32767)
1015 #define ADD_HIGH_16(I) (((I) & 0x0000ffff) == 0)
1016 #define AND_LOW_16(I) ((I) >= 0 && (I) <= 32767)
1017 #define AND_HIGH_16(I) (((I) & 0x0000ffff) == 0)
1019 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1020 ((C) == 'I' ? (SMALL_INTVAL(VALUE)) \
1021 : (C) == 'J' ? (SHORT_INTVAL(VALUE)) \
1022 : (C) == 'K' ? ((VALUE) == 0) \
1023 : (C) == 'L' ? ((VALUE) >= 0 && (VALUE) <= 32767) \
1024 : (C) == 'M' ? (((VALUE) & 0x0000ffff) == 0) \
1025 : (C) == 'N' ? ((VALUE) == -1 || (VALUE) == 1 \
1026 || (VALUE) == -2 || (VALUE) == 2) \
1027 : (C) == 'O' ? (((VALUE) & 0xffff0000) == 0xffff0000) \
1028 : (C) == 'P' ? (((VALUE) & 0x0000ffff) == 0xffff) \
1031 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
1033 /* Optional extra constraints for this machine */
1034 #define EXTRA_CONSTRAINT(OP,C) \
1035 ((C) == 'R' ? symbolic_address_p (OP) \
1038 /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1040 /* Define this if pushing a word on the stack
1041 makes the stack pointer a smaller address. */
1042 /* #define STACK_GROWS_DOWNWARD */
1044 /* Define this if the nominal address of the stack frame
1045 is at the high-address end of the local variables;
1046 that is, each additional local variable allocated
1047 goes at a more negative offset in the frame. */
1048 /* #define FRAME_GROWS_DOWNWARD */
1050 #define ARGS_GROW_DOWNWARD
1052 /* We use post decrement on the 1600 because there isn't
1053 a pre-decrement addressing mode. This means that we
1054 assume the stack pointer always points at the next
1055 FREE location on the stack. */
1056 #define STACK_PUSH_CODE POST_INC
1058 /* Offset within stack frame to start allocating local variables at.
1059 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1060 first local allocated. Otherwise, it is the offset to the BEGINNING
1061 of the first local allocated. */
1062 #define STARTING_FRAME_OFFSET 0
1064 /* Offset from the stack pointer register to the first
1065 location at which outgoing arguments are placed. */
1066 #define STACK_POINTER_OFFSET (0)
1068 struct dsp16xx_frame_info
1070 unsigned long total_size; /* # bytes that the entire frame takes up */
1071 unsigned long var_size; /* # bytes that variables take up */
1072 unsigned long args_size; /* # bytes that outgoing arguments take up */
1073 unsigned long extra_size; /* # bytes of extra gunk */
1074 unsigned int reg_size; /* # bytes needed to store regs */
1075 long fp_save_offset; /* offset from vfp to store registers */
1076 unsigned long sp_save_offset; /* offset from new sp to store registers */
1077 int pr_save_offset; /* offset to saved PR */
1078 int initialized; /* != 0 if frame size already calculated */
1079 int num_regs; /* number of registers saved */
1080 int function_makes_calls; /* Does the function make calls */
1083 extern struct dsp16xx_frame_info current_frame_info;
1085 #define RETURN_ADDR_OFF current_frame_info.pr_save_offset
1087 /* If we generate an insn to push BYTES bytes,
1088 this says how many the stack pointer really advances by. */
1089 /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1091 /* If defined, the maximum amount of space required for outgoing
1092 arguments will be computed and placed into the variable
1093 'current_function_outgoing_args_size'. No space will be pushed
1094 onto the stack for each call; instead, the function prologue should
1095 increase the stack frame size by this amount.
1097 It is not proper to define both 'PUSH_ROUNDING' and
1098 'ACCUMULATE_OUTGOING_ARGS'. */
1099 #define ACCUMULATE_OUTGOING_ARGS 1
1101 /* Offset of first parameter from the argument pointer
1104 #define FIRST_PARM_OFFSET(FNDECL) (0)
1106 /* Value is 1 if returning from a function call automatically
1107 pops the arguments described by the number-of-args field in the call.
1108 FUNDECL is the declaration node of the function (as a tree),
1109 FUNTYPE is the data type of the function (as a tree),
1110 or for a library call it is an identifier node for the subroutine name. */
1112 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1114 /* Define how to find the value returned by a function.
1115 VALTYPE is the data type of the value (as a tree).
1116 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1117 otherwise, FUNC is 0. On the 1610 all function return their values
1118 in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1119 entire register is significant. */
1121 #define VALUE_REGNO(MODE) (REG_Y)
1123 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1124 gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1126 /* Define how to find the value returned by a library function
1127 assuming the value has mode MODE. */
1128 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE))
1130 /* 1 if N is a possible register number for a function value. */
1131 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1134 /* Define where to put the arguments to a function.
1135 Value is zero to push the argument on the stack,
1136 or a hard register in which to store the argument.
1138 MODE is the argument's machine mode.
1139 TYPE is the data type of the argument (as a tree).
1140 This is null for libcalls where that information may
1142 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1143 the preceding args and about the function being called.
1144 NAMED is nonzero if this argument is a named parameter
1145 (otherwise it is an extra parameter matching an ellipsis). */
1147 /* On the 1610 all args are pushed, except if -mregparm is specified
1148 then the first two words of arguments are passed in a0, a1. */
1149 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1150 dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1152 /* Define the first register to be used for argument passing */
1153 #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1155 /* Define the profitability of saving registers around calls.
1156 NOTE: For now we turn this off because of a bug in the
1157 caller-saves code and also because i'm not sure it is helpful
1160 #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1162 /* This indicates that an argument is to be passed with an invisible reference
1163 (i.e., a pointer to the object is passed).
1165 On the dsp16xx, we do this if it must be passed on the stack. */
1167 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1168 (MUST_PASS_IN_STACK (MODE, TYPE))
1170 /* For an arg passed partly in registers and partly in memory,
1171 this is the number of registers used.
1172 For args passed entirely in registers or entirely in memory, zero. */
1174 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1176 /* Define a data type for recording info about an argument list
1177 during the scan of that argument list. This data type should
1178 hold all necessary information about the function itself
1179 and about the args processed so far, enough to enable macros
1180 such as FUNCTION_ARG to determine where the next arg should go. */
1181 #define CUMULATIVE_ARGS int
1183 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1184 for a call to a function whose data type is FNTYPE.
1185 For a library call, FNTYPE is 0. */
1186 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
1188 /* Update the data in CUM to advance over an argument
1189 of mode MODE and data type TYPE.
1190 (TYPE is null for libcalls where that information may not be available.) */
1192 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1193 dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1195 /* 1 if N is a possible register number for function argument passing. */
1196 #define FUNCTION_ARG_REGNO_P(N) \
1197 ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1199 /* Output assembler code to FILE to increment profiler label # LABELNO
1200 for profiling a function entry. */
1202 #define FUNCTION_PROFILER(FILE, LABELNO) \
1203 internal_error ("profiling not implemented yet")
1205 /* Output assembler code to FILE to initialize this source file's
1206 basic block profiling info, if that has not already been done. */
1207 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1208 internal_error ("profiling not implemented yet")
1210 /* Output assembler code to FILE to increment the entry-count for
1211 the BLOCKNO'th basic block in this source file. */
1212 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1213 internal_error ("profiling not implemented yet")
1216 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1217 the stack pointer does not matter. The value is tested only in
1218 functions that have frame pointers.
1219 No definition is equivalent to always zero. */
1221 #define EXIT_IGNORE_STACK (0)
1223 #define TRAMPOLINE_TEMPLATE(FILE) \
1224 internal_error ("trampolines not yet implemented");
1226 /* Length in units of the trampoline for entering a nested function.
1227 This is a dummy value */
1229 #define TRAMPOLINE_SIZE 20
1231 /* Emit RTL insns to initialize the variable parts of a trampoline.
1232 FNADDR is an RTX for the address of the function's pure code.
1233 CXT is an RTX for the static chain value for the function. */
1235 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1236 internal_error ("trampolines not yet implemented");
1238 /* A C expression which is nonzero if a function must have and use a
1239 frame pointer. If its value is nonzero the functions will have a
1241 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1243 /* A C statement to store in the variable 'DEPTH' the difference
1244 between the frame pointer and the stack pointer values immediately
1245 after the function prologue. */
1246 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1247 { (DEPTH) = initial_frame_pointer_offset(); \
1250 /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1252 #define ADDHF3_LIBCALL "__Emulate_addhf3"
1253 #define SUBHF3_LIBCALL "__Emulate_subhf3"
1254 #define MULHF3_LIBCALL "__Emulate_mulhf3"
1255 #define DIVHF3_LIBCALL "__Emulate_divhf3"
1256 #define CMPHF3_LIBCALL "__Emulate_cmphf3"
1257 #define FIXHFHI2_LIBCALL "__Emulate_fixhfhi2"
1258 #define FLOATHIHF2_LIBCALL "__Emulate_floathihf2"
1259 #define NEGHF2_LIBCALL "__Emulate_neghf2"
1261 #define UMULHI3_LIBCALL "__Emulate_umulhi3"
1262 #define MULHI3_LIBCALL "__Emulate_mulhi3"
1263 #define UDIVQI3_LIBCALL "__Emulate_udivqi3"
1264 #define UDIVHI3_LIBCALL "__Emulate_udivhi3"
1265 #define DIVQI3_LIBCALL "__Emulate_divqi3"
1266 #define DIVHI3_LIBCALL "__Emulate_divhi3"
1267 #define MODQI3_LIBCALL "__Emulate_modqi3"
1268 #define MODHI3_LIBCALL "__Emulate_modhi3"
1269 #define UMODQI3_LIBCALL "__Emulate_umodqi3"
1270 #define UMODHI3_LIBCALL "__Emulate_umodhi3"
1271 #define ASHRHI3_LIBCALL "__Emulate_ashrhi3"
1272 #define LSHRHI3_LIBCALL "__Emulate_lshrhi3"
1273 #define ASHLHI3_LIBCALL "__Emulate_ashlhi3"
1274 #define LSHLHI3_LIBCALL "__Emulate_lshlhi3" /* NOT USED */
1276 /* Define this macro if calls to the ANSI C library functions memcpy and
1277 memset should be generated instead of the BSD function bcopy & bzero. */
1278 #define TARGET_MEM_FUNCTIONS
1281 /* ADDRESSING MODES */
1283 /* The 1610 has post-increment and decrement, but no pre-modify */
1284 #define HAVE_POST_INCREMENT 1
1285 #define HAVE_POST_DECREMENT 1
1287 /* #define HAVE_PRE_DECREMENT 0 */
1288 /* #define HAVE_PRE_INCREMENT 0 */
1290 /* Recognize any constant value that is a valid address. */
1291 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1293 /* Maximum number of registers that can appear in a valid memory address. */
1294 #define MAX_REGS_PER_ADDRESS 1
1296 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1297 and check its validity for a certain class.
1298 We have two alternate definitions for each of them.
1299 The usual definition accepts all pseudo regs; the other rejects
1300 them unless they have been allocated suitable hard regs.
1301 The symbol REG_OK_STRICT causes the latter definition to be used.
1303 Most source files want to accept pseudo regs in the hope that
1304 they will get allocated to the class that the insn wants them to be in.
1305 Source files for reload pass need to be strict.
1306 After reload, it makes no difference, since pseudo regs have
1307 been eliminated by then. */
1309 #ifndef REG_OK_STRICT
1311 /* Nonzero if X is a hard reg that can be used as an index
1312 or if it is a pseudo reg. */
1313 #define REG_OK_FOR_INDEX_P(X) 0
1315 /* Nonzero if X is a hard reg that can be used as a base reg
1316 or if it is a pseudo reg. */
1317 #define REG_OK_FOR_BASE_P(X) \
1318 ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
1319 || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1321 /* Nonzero if X is the 'ybase' register */
1322 #define REG_OK_FOR_YBASE_P(X) \
1323 (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1326 /* Nonzero if X is a hard reg that can be used as an index. */
1327 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1329 /* Nonzero if X is a hard reg that can be used as a base reg. */
1330 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1332 /* Nonzero if X is the 'ybase' register */
1333 #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1337 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1338 that is a valid memory address for an instruction.
1339 The MODE argument is the machine mode for the MEM expression
1340 that wants to use this address.
1342 On the 1610, the actual legitimate addresses must be N (N must fit in
1343 5 bits), *rn (register indirect), *rn++, or *rn-- */
1345 #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
1346 #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
1347 #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
1348 #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1350 #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1351 #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1352 #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
1354 #define INDIRECTABLE_ADDRESS_P(X) \
1355 ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
1356 || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
1357 && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
1358 || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1361 #define INDEXABLE_ADDRESS_P(X,MODE) \
1362 ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
1363 XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
1364 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
1365 (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
1366 XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
1367 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1369 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1371 if (INDIRECTABLE_ADDRESS_P(X)) \
1376 /* Try machine-dependent ways of modifying an illegitimate address
1377 to be legitimate. If we find one, return the new, valid address.
1378 This macro is used in only one place: `memory_address' in explow.c.
1380 OLDX is the address as it was before break_out_memory_refs was called.
1381 In some cases it is useful to look at this to decide what needs to be done.
1383 MODE and WIN are passed so that this macro can use
1384 GO_IF_LEGITIMATE_ADDRESS.
1386 It is always safe for this macro to do nothing. It exists to recognize
1387 opportunities to optimize the output.
1389 For the 1610, we need not do anything. However, if we don't,
1390 `memory_address' will try lots of things to get a valid address, most of
1391 which will result in dead code and extra pseudos. So we make the address
1394 This is easy: The only valid addresses are an offset from a register
1395 and we know the address isn't valid. So just call either `force_operand'
1396 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1398 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1399 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1401 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1402 X = force_operand (X, 0); \
1404 X = force_reg (Pmode, X); \
1408 /* Go to LABEL if ADDR (a legitimate address expression)
1409 has an effect that depends on the machine mode it is used for.
1410 On the 1610, only postdecrement and postincrement address depend thus
1411 (the amount of decrement or increment being the length of the operand). */
1413 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1414 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1416 /* Nonzero if the constant value X is a legitimate general operand.
1417 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1418 #define LEGITIMATE_CONSTANT_P(X) (1)
1421 /* CONDITION CODE INFORMATION */
1423 /* Store in cc_status the expressions
1424 that the condition codes will describe
1425 after execution of an instruction whose pattern is EXP.
1426 Do not alter them if the instruction would not alter the cc's. */
1428 #define NOTICE_UPDATE_CC(EXP, INSN) \
1429 notice_update_cc( (EXP) )
1431 /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1433 /* Compute the cost of computing a constant rtl expression RTX
1434 whose rtx-code is CODE. The body of this macro is a portion
1435 of a switch statement. If the code is computed here,
1436 return it with a return statement. */
1437 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1439 return (unsigned) INTVAL (RTX) < 65536 ? 0 : 2; \
1443 return COSTS_N_INSNS (1); \
1445 case CONST_DOUBLE: \
1446 return COSTS_N_INSNS (2);
1448 /* Like CONST_COSTS but applies to nonconstant RTL expressions.
1449 This can be used, for example to indicate how costly a multiply
1451 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1453 return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \
1454 COSTS_N_INSNS (4); \
1457 return COSTS_N_INSNS (38); \
1459 if (GET_MODE (X) == QImode) \
1460 return COSTS_N_INSNS (2); \
1462 return COSTS_N_INSNS (38); \
1465 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1468 rtx_cost (XEXP (X, 0), CODE) + \
1469 rtx_cost (XEXP (X, 1), CODE)); \
1472 return COSTS_N_INSNS (38); \
1474 case AND: case IOR: case XOR: \
1476 rtx_cost (XEXP (X, 0), CODE) + \
1477 rtx_cost (XEXP (X, 1), CODE)); \
1479 case NEG: case NOT: \
1480 return COSTS_N_INSNS (1); \
1484 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1486 int number = INTVAL(XEXP (X,1)); \
1487 if (number == 1 || number == 4 || number == 8 || \
1489 return COSTS_N_INSNS (1); \
1493 return COSTS_N_INSNS (2); \
1495 return COSTS_N_INSNS (num_1600_core_shifts(number)); \
1499 return COSTS_N_INSNS (1); \
1501 return COSTS_N_INSNS (15);
1503 /* An expression giving the cost of an addressing mode that contains
1505 #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR)
1507 /* A c expression for the cost of moving data from a register in
1508 class FROM to one in class TO. The classes are expressed using
1509 the enumeration values such as GENERAL_REGS. A value of 2 is
1511 #define REGISTER_MOVE_COST(MODE,FROM,TO) dsp16xx_register_move_cost (FROM, TO)
1513 /* A C expression for the cost of moving data of mode MODE between
1514 a register and memory. A value of 2 is the default. */
1515 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1516 (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
1519 /* A C expression for the cost of a branch instruction. A value of
1520 1 is the default; */
1521 #define BRANCH_COST 1
1524 /* Define this because otherwise gcc will try to put the function address
1525 in any old pseudo register. We can only use pt. */
1526 #define NO_FUNCTION_CSE
1528 /* Define this macro as a C expression which is nonzero if accessing less
1529 than a word of memory (i.e a char or short) is no faster than accessing
1530 a word of memory, i.e if such access require more than one instruction
1531 or if ther is no difference in cost between byte and (aligned) word
1533 #define SLOW_BYTE_ACCESS 1
1535 /* Define this macro if unaligned accesses have a cost many times greater than
1536 aligned accesses, for example if they are emulated in a trap handler */
1537 /* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
1539 /* Define this macro to inhibit strength reduction of memory addresses */
1540 /* #define DONT_REDUCE_ADDR */
1543 /* DIVIDING THE OUTPUT IN SECTIONS */
1544 /* Output before read-only data. */
1546 #define DEFAULT_TEXT_SEG_NAME ".text"
1547 #define TEXT_SECTION_ASM_OP rsect_text
1549 /* Output before constants and strings */
1550 #define DEFAULT_CONST_SEG_NAME ".const"
1551 #define READONLY_SECTION_ASM_OP rsect_const
1552 #define READONLY_DATA_SECTION const_section
1554 /* Output before writable data. */
1555 #define DEFAULT_DATA_SEG_NAME ".data"
1556 #define DATA_SECTION_ASM_OP rsect_data
1558 #define DEFAULT_BSS_SEG_NAME ".bss"
1559 #define BSS_SECTION_ASM_OP rsect_bss
1561 /* We will default to using 1610 if the user doesn't
1563 #define DEFAULT_CHIP_NAME "1610"
1565 /* A list of names for sections other than the standard ones, which are
1566 'in_text' and 'in_data' (and .bss if BSS_SECTION_ASM_OP is defined). */
1567 #define EXTRA_SECTIONS in_const
1569 #define EXTRA_SECTION_FUNCTIONS \
1570 extern void const_section PARAMS ((void)); \
1574 if (in_section != in_const) \
1576 fprintf (asm_out_file, "%s\n", READONLY_SECTION_ASM_OP); \
1577 in_section = in_const; \
1581 /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1583 /* Output at beginning of assembler file. */
1584 #define ASM_FILE_START(FILE) coff_dsp16xx_file_start (FILE)
1586 /* A C string constant describing how to begin a comment in the target
1587 assembler language. */
1588 #define ASM_COMMENT_START ""
1589 #define ASM_COMMENT_END ""
1591 /* Output to assembler file text saying following lines
1592 may contain character constants, extra white space, comments, etc. */
1593 #define ASM_APP_ON ""
1595 /* Output to assembler file text saying following lines
1596 no longer contain unusual constructs. */
1597 #define ASM_APP_OFF ""
1599 /* OUTPUT OF DATA */
1601 /* This is how we output a 'c' character string. For the 16xx
1602 assembler we have to do it one letter at a time */
1604 #define ASCII_LENGTH 10
1606 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1608 FILE *_hide_asm_out_file = (MYFILE); \
1609 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1610 int _hide_thissize = (MYLENGTH); \
1612 FILE *asm_out_file = _hide_asm_out_file; \
1613 const unsigned char *p = _hide_p; \
1614 int thissize = _hide_thissize; \
1617 for (i = 0; i < thissize; i++) \
1619 register int c = p[i]; \
1621 if (i % ASCII_LENGTH == 0) \
1622 fprintf (asm_out_file, "\tint "); \
1624 if (c >= ' ' && c < 0177 && c != '\'') \
1626 putc ('\'', asm_out_file); \
1627 putc (c, asm_out_file); \
1628 putc ('\'', asm_out_file); \
1632 fprintf (asm_out_file, "%d", c); \
1633 /* After an octal-escape, if a digit follows, \
1634 terminate one string constant and start another. \
1635 The Vax assembler fails to stop reading the escape \
1636 after three digits, so this is the only way we \
1637 can get it to parse the data properly. \
1638 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1639 fprintf (asm_out_file, "\'\n\tint \'"); \
1643 we are not at the last char (i != thissize -1) \
1644 and (we are not at a line break multiple \
1645 but i == 0) (it will be the very first time) \
1646 then put out a comma to extend. \
1648 if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
1649 fprintf(asm_out_file, ","); \
1650 if (!((i + 1) % ASCII_LENGTH)) \
1651 fprintf (asm_out_file, "\n"); \
1653 fprintf (asm_out_file, "\n"); \
1658 /* Store in OUTPUT a string (made with alloca) containing
1659 an assembler-name for a local static variable or function
1660 named NAME. LABELNO is an integer which is different for
1663 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1665 int len = strlen (NAME); \
1666 char *temp = (char *) alloca (len + 3); \
1668 strcpy (&temp[1], (NAME)); \
1669 temp[len + 1] = '_'; \
1670 temp[len + 2] = 0; \
1671 (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \
1672 ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \
1675 /* OUTPUT OF UNINITIALIZED VARIABLES */
1677 /* This says how to output an assembler line
1678 to define a global common symbol. */
1680 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1681 asm_output_common (FILE, NAME, SIZE, ROUNDED);
1683 /* This says how to output an assembler line
1684 to define a local common symbol. */
1686 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1687 asm_output_local (FILE, NAME, SIZE, ROUNDED);
1689 /* OUTPUT AND GENERATION OF LABELS */
1691 /* This is how to output the definition of a user-level label named NAME,
1692 such as the label on a static function or variable NAME. */
1693 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1694 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1696 /* This is how to output a command to make the user-level label named NAME
1697 defined for reference from other files. */
1699 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1700 do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1702 /* A C statement to output to the stdio stream any text necessary
1703 for declaring the name of an external symbol named name which
1704 is referenced in this compilation but not defined. */
1706 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1708 fprintf (FILE, ".extern "); \
1709 assemble_name (FILE, NAME); \
1710 fprintf (FILE, "\n"); \
1712 /* A C statement to output on stream an assembler pseudo-op to
1713 declare a library function named external. */
1715 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1717 fprintf (FILE, ".extern "); \
1718 assemble_name (FILE, XSTR (FUN, 0)); \
1719 fprintf (FILE, "\n"); \
1722 /* The prefix to add to user-visible assembler symbols. */
1724 #define USER_LABEL_PREFIX "_"
1726 /* This is how to output an internal numbered label where
1727 PREFIX is the class of label and NUM is the number within the class. */
1728 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1729 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1731 /* This is how to store into the string LABEL
1732 the symbol_ref name of an internal numbered label where
1733 PREFIX is the class of label and NUM is the number within the class.
1734 This is suitable for output with `assemble_name'. */
1735 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1736 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1739 /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1741 /* How to refer to registers in assembler output.
1742 This sequence is indexed by compiler's hard-register-number (see above). */
1744 #define REGISTER_NAMES \
1745 {"a0", "a0l", "a1", "a1l", "x", "y", "yl", "p", "pl", \
1746 "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
1747 "ar0", "ar1", "ar2", "ar3", \
1748 "c0", "c1", "c2", "pr", "rb", \
1749 "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
1750 "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
1751 "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1752 "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1753 "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1756 #define HIMODE_REGISTER_NAMES \
1757 {"a0", "a0", "a1", "a1", "x", "y", "y", "p", "p", \
1758 "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
1759 "ar0", "ar1", "ar2", "ar3", \
1760 "c0", "c1", "c2", "pr", "rb", \
1761 "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
1762 "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
1763 "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1764 "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1765 "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1768 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1770 /* Print operand X (an rtx) in assembler syntax to file FILE.
1771 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1772 For `%' followed by punctuation, CODE is the punctuation and X is null.
1774 DSP1610 extensions for operand codes:
1776 %H - print lower 16 bits of constant
1777 %U - print upper 16 bits of constant
1778 %w - print low half of register (e.g 'a0l')
1779 %u - print upper half of register (e.g 'a0')
1780 %b - print high half of accumulator for F3 ALU instructions
1781 %h - print constant in decimal */
1783 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1786 /* Print a memory address as an operand to reference that memory location. */
1788 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1790 /* This is how to output an insn to push a register on the stack.
1791 It need not be very fast code since it is used only for profiling */
1792 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1793 internal_error ("profiling not implemented yet");
1795 /* This is how to output an insn to pop a register from the stack.
1796 It need not be very fast code since it is used only for profiling */
1797 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1798 internal_error ("profiling not implemented yet");
1800 /* OUTPUT OF DISPATCH TABLES */
1802 /* This macro should be provided on machines where the addresses in a dispatch
1803 table are relative to the table's own address. */
1804 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1805 fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL)
1807 /* This macro should be provided on machines where the addresses in a dispatch
1808 table are absolute. */
1809 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1810 fprintf (FILE, "\tint L%d\n", VALUE)
1812 /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1814 /* This is how to output an assembler line that says to advance
1815 the location counter to a multiple of 2**LOG bytes. We should
1816 not have to do any alignment since the 1610 is a word machine. */
1817 #define ASM_OUTPUT_ALIGN(FILE,LOG)
1819 /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1820 because it fails to put zero1 in the bytes that are skipped. */
1821 #define ASM_NO_SKIP_IN_TEXT 1
1823 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1824 fprintf (FILE, "\t%d * int 0\n", (SIZE))
1826 /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1828 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
1830 #define ASM_OUTPUT_DEF(asm_out_file, LABEL1, LABEL2) \
1832 fprintf (asm_out_file, ".alias " ); \
1833 ASM_OUTPUT_LABELREF(asm_out_file, LABEL1); \
1834 fprintf (asm_out_file, "=" ); \
1835 ASM_OUTPUT_LABELREF(asm_out_file, LABEL2); \
1836 fprintf (asm_out_file, "\n" ); \
1840 /* MISCELLANEOUS PARAMETERS */
1842 /* Specify the machine mode that this machine uses
1843 for the index in the tablejump instruction. */
1844 #define CASE_VECTOR_MODE QImode
1846 /* Define as C expression which evaluates to nonzero if the tablejump
1847 instruction expects the table to contain offsets from the address of the
1849 Do not define this if the table should contain absolute addresses. */
1850 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1852 /* Max number of bytes we can move from memory to memory
1853 in one reasonably fast instruction. */
1856 /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1857 or bitwise 'and' instruction that truncates the count of a shift operation
1858 to a width equal to the number of bits needed to represent the size of the
1859 object being shifted. Do not define this macro unless the truncation applies
1860 to both shift operations and bit-field operations (if any). */
1861 /* #define SHIFT_COUNT_TRUNCATED */
1863 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1864 is done just by pretending it is already truncated. */
1865 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1867 /* When a prototype says `char' or `short', really pass an `int'. */
1868 #define PROMOTE_PROTOTYPES 1
1870 /* An alias for the machine mode used for pointers */
1871 #define Pmode QImode
1873 /* A function address in a call instruction
1874 is a byte address (for indexing purposes)
1875 so give the MEM rtx a byte's mode. */
1876 #define FUNCTION_MODE QImode
1878 #if !defined(__DATE__)
1879 #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
1881 #define TARGET_VERSION fprintf (stderr, " (%s, %s)", VERSION_INFO1, __DATE__)
1884 #define VERSION_INFO1 "Lucent DSP16xx C Cross Compiler, version 1.3.0b"
1887 /* Define this as 1 if `char' should by default be signed; else as 0. */
1888 #define DEFAULT_SIGNED_CHAR 1
1890 /* Define this so gcc does not output a call to __main, since we
1891 are not currently supporting c++. */
1892 #define INIT_SECTION_ASM_OP 1
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