1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "insn-config.h"
31 #include "conditions.h"
32 #include "insn-attr.h"
44 #include "target-def.h"
47 /* Usable when we have an amount to add or subtract, and want the
48 optimal size of the insn. */
49 #define ADDITIVE_SIZE_MODIFIER(size) \
50 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
52 #define ASSERT_PLT_UNSPEC(x) \
55 if (XEXP (x, 1) != NULL_RTX \
56 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
57 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
61 #define LOSE_AND_RETURN(msgid, x) \
64 cris_operand_lossage (msgid, x); \
68 /* Per-function machine data. */
69 struct machine_function GTY(())
71 int needs_return_address_on_stack;
74 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
76 static char cris_output_insn_is_bound = 0;
78 /* This one suppresses printing out the "rPIC+" in
79 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
80 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
81 just the "sym:GOTOFF" part. */
82 static int cris_pic_sympart_only = 0;
84 /* Fix for reg_overlap_mentioned_p. */
85 static int cris_reg_overlap_mentioned_p (rtx, rtx);
87 static void cris_print_base (rtx, FILE *);
89 static void cris_print_index (rtx, FILE *);
91 static struct machine_function * cris_init_machine_status (void);
93 static int cris_initial_frame_pointer_offset (void);
95 static int saved_regs_mentioned (rtx);
97 static void cris_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
99 static void cris_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
101 static void cris_operand_lossage (const char *, rtx);
103 static void cris_asm_output_mi_thunk
104 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
106 static void cris_file_start (void);
108 static bool cris_rtx_costs (rtx, int, int, int *);
109 static int cris_address_cost (rtx);
111 /* The function cris_target_asm_function_epilogue puts the last insn to
112 output here. It always fits; there won't be a symbol operand. Used in
113 delay_slots_for_epilogue and function_epilogue. */
114 static char save_last[80];
116 /* This is the argument from the "-max-stack-stackframe=" option. */
117 const char *cris_max_stackframe_str;
119 /* This is the argument from the "-march=" option. */
120 const char *cris_cpu_str;
122 /* This is the argument from the "-mtune=" option. */
123 const char *cris_tune_str;
125 /* This is the argument from the "-melinux-stacksize=" option. */
126 const char *cris_elinux_stacksize_str;
128 /* This is the parsed result of the "-max-stack-stackframe=" option. If
129 it (still) is zero, then there was no such option given. */
130 int cris_max_stackframe = 0;
132 /* This is the parsed result of the "-march=" option, if given. */
133 int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
135 #undef TARGET_ASM_ALIGNED_HI_OP
136 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
137 #undef TARGET_ASM_ALIGNED_SI_OP
138 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
139 #undef TARGET_ASM_ALIGNED_DI_OP
140 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
142 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
143 available in ELF. These "normal" pseudos do not have any alignment
144 constraints or side-effects. */
145 #undef TARGET_ASM_UNALIGNED_HI_OP
146 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
148 #undef TARGET_ASM_UNALIGNED_SI_OP
149 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
151 #undef TARGET_ASM_UNALIGNED_DI_OP
152 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
154 #undef TARGET_ASM_FUNCTION_PROLOGUE
155 #define TARGET_ASM_FUNCTION_PROLOGUE cris_target_asm_function_prologue
157 #undef TARGET_ASM_FUNCTION_EPILOGUE
158 #define TARGET_ASM_FUNCTION_EPILOGUE cris_target_asm_function_epilogue
160 #undef TARGET_ASM_OUTPUT_MI_THUNK
161 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
162 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
163 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
165 #undef TARGET_ASM_FILE_START
166 #define TARGET_ASM_FILE_START cris_file_start
168 #undef TARGET_RTX_COSTS
169 #define TARGET_RTX_COSTS cris_rtx_costs
170 #undef TARGET_ADDRESS_COST
171 #define TARGET_ADDRESS_COST cris_address_cost
173 struct gcc_target targetm = TARGET_INITIALIZER;
175 /* Predicate functions. */
177 /* This checks a part of an address, the one that is not a plain register
178 for an addressing mode using BDAP.
179 Allowed operands is either:
181 b) a CONST operand (but not a symbol when generating PIC)
182 c) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
185 cris_bdap_operand (rtx op, enum machine_mode mode)
187 register enum rtx_code code = GET_CODE (op);
189 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
192 /* Just return whether this is a simple register or constant. */
193 if (register_operand (op, mode)
194 || (CONSTANT_P (op) && !(flag_pic && cris_symbol (op))))
197 /* Is it a [r] or possibly a [r+]? */
200 rtx tem = XEXP (op, 0);
203 && (register_operand (tem, SImode)
204 || (GET_CODE (tem) == POST_INC
205 && register_operand (XEXP (tem, 0), SImode))))
211 /* Perhaps a sign-extended mem: [r].(b|w) or [r+].(b|w)? */
212 if (code == SIGN_EXTEND)
214 rtx tem = XEXP (op, 0);
216 if (GET_CODE (tem) != MEM)
221 && (register_operand (tem, SImode)
222 || (GET_CODE (tem) == POST_INC
223 && register_operand (XEXP (tem, 0), SImode))))
232 /* This is similar to cris_bdap_operand:
233 It checks a part of an address, the one that is not a plain register
234 for an addressing mode using BDAP *or* BIAP.
235 Allowed operands is either:
237 b) a CONST operand (but not a symbol when generating PIC)
238 c) a mult of (1, 2 or 4) and a register
239 d) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
242 cris_bdap_biap_operand (rtx op, enum machine_mode mode)
244 register enum rtx_code code = GET_CODE (op);
248 /* Check for bdap operand. */
249 if (cris_bdap_operand (op, mode))
252 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
255 /* Check that we're looking at a BIAP operand. */
259 /* Canonicalize register and multiplicand. */
260 if (GET_CODE (XEXP (op, 0)) == CONST_INT)
271 /* Check that the operands are correct after canonicalization. */
272 if (! register_operand (reg, SImode) || GET_CODE (val) != CONST_INT)
275 /* Check that the multiplicand has a valid value. */
277 && (INTVAL (val) == 1 || INTVAL (val) == 2 || INTVAL (val) == 4)))
283 /* Check if MODE is same as mode for X, and X is PLUS, MINUS, IOR or
287 cris_orthogonal_operator (rtx x, enum machine_mode mode)
289 enum rtx_code code = GET_CODE (x);
291 if (mode == VOIDmode)
294 return (GET_MODE (x) == mode
295 && (code == PLUS || code == MINUS
296 || code == IOR || code == AND || code == UMIN));
299 /* Check if MODE is same as mode for X, and X is PLUS, IOR or AND or
303 cris_commutative_orth_op (rtx x, enum machine_mode mode)
305 enum rtx_code code = GET_CODE (x);
307 if (mode == VOIDmode)
310 return (GET_MODE (x) == mode &&
312 || code == IOR || code == AND || code == UMIN));
315 /* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN. */
318 cris_operand_extend_operator (rtx x, enum machine_mode mode)
320 enum rtx_code code = GET_CODE (x);
322 if (mode == VOIDmode)
325 return (GET_MODE (x) == mode
326 && (code == PLUS || code == MINUS || code == UMIN));
329 /* Check if MODE is same as mode for X, and X is PLUS or MINUS. */
332 cris_additive_operand_extend_operator (rtx x, enum machine_mode mode)
334 enum rtx_code code = GET_CODE (x);
336 if (mode == VOIDmode)
339 return (GET_MODE (x) == mode
340 && (code == PLUS || code == MINUS));
343 /* Check to see if MODE is same as mode for X, and X is SIGN_EXTEND or
347 cris_extend_operator (rtx x, enum machine_mode mode)
349 enum rtx_code code = GET_CODE (x);
351 if (mode == VOIDmode)
355 (GET_MODE (x) == mode && (code == SIGN_EXTEND || code == ZERO_EXTEND));
358 /* Check to see if MODE is same as mode for X, and X is PLUS or BOUND. */
361 cris_plus_or_bound_operator (rtx x, enum machine_mode mode)
363 enum rtx_code code = GET_CODE (x);
365 if (mode == VOIDmode)
369 (GET_MODE (x) == mode && (code == UMIN || code == PLUS));
372 /* Since with -fPIC, not all symbols are valid PIC symbols or indeed
373 general_operands, we have to have a predicate that matches it for the
377 cris_general_operand_or_symbol (rtx op, enum machine_mode mode)
379 return general_operand (op, mode)
380 || (CONSTANT_P (op) && cris_symbol (op));
383 /* Since a PIC symbol without a GOT entry is not a general_operand, we
384 have to have a predicate that matches it. We use this in the expanded
385 "movsi" anonymous pattern for PIC symbols. */
388 cris_general_operand_or_gotless_symbol (rtx op, enum machine_mode mode)
390 return general_operand (op, mode)
391 || (CONSTANT_P (op) && cris_gotless_symbol (op));
394 /* Since a PLT symbol is not a general_operand, we have to have a
395 predicate that matches it when we need it. We use this in the expanded
396 "call" and "call_value" anonymous patterns. */
399 cris_general_operand_or_plt_symbol (rtx op, enum machine_mode mode)
401 return general_operand (op, mode)
402 || (GET_CODE (op) == CONST
403 && GET_CODE (XEXP (op, 0)) == UNSPEC
404 && !TARGET_AVOID_GOTPLT);
407 /* This matches a (MEM (general_operand)) or
408 (MEM (cris_general_operand_or_symbol)). The second one isn't a valid
409 memory_operand, so we need this predicate to recognize call
410 destinations before we change them to a PLT operand (by wrapping in
414 cris_mem_call_operand (rtx op, enum machine_mode mode)
418 if (GET_CODE (op) != MEM)
421 if (memory_operand (op, mode))
426 return cris_general_operand_or_symbol (xmem, GET_MODE (op));
429 /* The CONDITIONAL_REGISTER_USAGE worker. */
432 cris_conditional_register_usage (void)
434 /* FIXME: This isn't nice. We should be able to use that register for
435 something else if the PIC table isn't needed. */
437 fixed_regs[PIC_OFFSET_TABLE_REGNUM]
438 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
441 /* Return current_function_uses_pic_offset_table. For use in cris.md,
442 since some generated files do not include function.h. */
445 cris_cfun_uses_pic_table (void)
447 return current_function_uses_pic_offset_table;
450 /* Given an rtx, return the text string corresponding to the CODE of X.
451 Intended for use in the assembly language output section of a
457 cris_output_insn_is_bound = 0;
458 switch (GET_CODE (x))
505 /* Used to control the sign/zero-extend character for the 'e' modifier.
507 cris_output_insn_is_bound = 1;
512 return "Unknown operator";
517 /* Emit an error message when we're in an asm, and a fatal error for
518 "normal" insns. Formatted output isn't easily implemented, since we
519 use output_operand_lossage to output the actual message and handle the
520 categorization of the error. */
523 cris_operand_lossage (const char *msgid, rtx op)
526 output_operand_lossage ("%s", msgid);
529 /* Print an index part of an address to file. */
532 cris_print_index (rtx index, FILE *file)
534 rtx inner = XEXP (index, 0);
536 /* Make the index "additive" unless we'll output a negative number, in
537 which case the sign character is free (as in free beer). */
538 if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0)
542 fprintf (file, "$%s.b", reg_names[REGNO (index)]);
543 else if (CONSTANT_P (index))
544 cris_output_addr_const (file, index);
545 else if (GET_CODE (index) == MULT)
547 fprintf (file, "$%s.",
548 reg_names[REGNO (XEXP (index, 0))]);
550 putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
552 else if (GET_CODE (index) == SIGN_EXTEND &&
553 GET_CODE (inner) == MEM)
555 rtx inner_inner = XEXP (inner, 0);
557 if (GET_CODE (inner_inner) == POST_INC)
559 fprintf (file, "[$%s+].",
560 reg_names[REGNO (XEXP (inner_inner, 0))]);
561 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
565 fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
567 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
570 else if (GET_CODE (index) == MEM)
572 if (GET_CODE (inner) == POST_INC)
573 fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
575 fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
578 cris_operand_lossage ("unexpected index-type in cris_print_index",
582 /* Print a base rtx of an address to file. */
585 cris_print_base (rtx base, FILE *file)
588 fprintf (file, "$%s", reg_names[REGNO (base)]);
589 else if (GET_CODE (base) == POST_INC)
590 fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
592 cris_operand_lossage ("unexpected base-type in cris_print_base",
596 /* Usable as a guard in expressions. */
599 cris_fatal (char *arg)
601 internal_error (arg);
603 /* We'll never get here; this is just to appease compilers. */
607 /* Textual function prologue. */
610 cris_target_asm_function_prologue (FILE *file, HOST_WIDE_INT size)
614 /* Shorten the used name for readability. */
615 int cfoa_size = current_function_outgoing_args_size;
616 int last_movem_reg = -1;
617 int doing_dwarf = dwarf2out_do_frame ();
619 int faked_args_size = 0;
620 int cfa_write_offset = 0;
621 char *cfa_label = NULL;
622 int return_address_on_stack
623 = regs_ever_live[CRIS_SRP_REGNUM]
624 || cfun->machine->needs_return_address_on_stack != 0;
626 /* Don't do anything if no prologues or epilogues are wanted. */
627 if (!TARGET_PROLOGUE_EPILOGUE)
633 /* Align the size to what's best for the CPU model. */
634 if (TARGET_STACK_ALIGN)
635 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
637 if (current_function_pretend_args_size)
639 int pretend = current_function_pretend_args_size;
640 for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
642 regno--, pretend -= 4)
644 fprintf (file, "\tpush $%s\n", reg_names[regno]);
645 faked_args_size += 4;
649 framesize = faked_args_size;
653 /* FIXME: Slightly redundant calculation, as we do the same in
654 pieces below. This offset must be the total adjustment of the
655 stack-pointer. We can then def_cfa call at the end of this
656 function with the current implementation of execute_cfa_insn, but
657 that wouldn't really be clean. */
661 + (return_address_on_stack ? 4 : 0)
662 + (frame_pointer_needed ? 4 : 0);
666 if (frame_pointer_needed)
667 cfa_reg = FRAME_POINTER_REGNUM;
670 cfa_reg = STACK_POINTER_REGNUM;
671 cfa_offset += cris_initial_frame_pointer_offset ();
674 cfa_label = dwarf2out_cfi_label ();
675 dwarf2out_def_cfa (cfa_label, cfa_reg, cfa_offset);
677 cfa_write_offset = - faked_args_size - 4;
680 /* Save SRP if not a leaf function. */
681 if (return_address_on_stack)
683 fprintf (file, "\tPush $srp\n");
688 dwarf2out_return_save (cfa_label, cfa_write_offset);
689 cfa_write_offset -= 4;
693 /* Set up frame pointer if needed. */
694 if (frame_pointer_needed)
696 fprintf (file, "\tpush $%s\n\tmove.d $sp,$%s\n",
697 reg_names[FRAME_POINTER_REGNUM],
698 reg_names[FRAME_POINTER_REGNUM]);
703 dwarf2out_reg_save (cfa_label, FRAME_POINTER_REGNUM,
705 cfa_write_offset -= 4;
709 /* Local vars are located above saved regs. */
710 cfa_write_offset -= size;
712 /* Get a contiguous sequence of registers, starting with r0, that need
714 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
716 if ((((regs_ever_live[regno]
717 && !call_used_regs[regno])
718 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
719 && (current_function_uses_pic_offset_table
720 /* It is saved anyway, if there would be a gap. */
722 && regs_ever_live[regno + 1]
723 && !call_used_regs[regno + 1]))))
724 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
725 && regno != CRIS_SRP_REGNUM)
726 || (current_function_calls_eh_return
727 && (regno == EH_RETURN_DATA_REGNO (0)
728 || regno == EH_RETURN_DATA_REGNO (1)
729 || regno == EH_RETURN_DATA_REGNO (2)
730 || regno == EH_RETURN_DATA_REGNO (3))))
732 /* Check if movem may be used for registers so far. */
733 if (regno == last_movem_reg + 1)
734 /* Yes, update next expected register. */
738 /* We cannot use movem for all registers. We have to flush
739 any movem:ed registers we got so far. */
740 if (last_movem_reg != -1)
742 /* It is a win to use a side-effect assignment for
743 64 <= size <= 128. But side-effect on movem was
744 not usable for CRIS v0..3. Also only do it if
745 side-effects insns are allowed. */
746 if ((last_movem_reg + 1) * 4 + size >= 64
747 && (last_movem_reg + 1) * 4 + size <= 128
748 && cris_cpu_version >= CRIS_CPU_SVINTO
749 && TARGET_SIDE_EFFECT_PREFIXES)
750 fprintf (file, "\tmovem $%s,[$sp=$sp-"HOST_WIDE_INT_PRINT_DEC"]\n",
751 reg_names[last_movem_reg],
752 (last_movem_reg + 1) * 4 + size);
755 /* Avoid printing multiple subsequent sub:s for sp. */
756 fprintf (file, "\tsub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
757 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1)
759 (last_movem_reg + 1) * 4 + size);
761 fprintf (file, "\tmovem $%s,[$sp]\n",
762 reg_names[last_movem_reg]);
765 framesize += (last_movem_reg + 1) * 4 + size;
768 fprintf (file, "; frame "HOST_WIDE_INT_PRINT_DEC
769 ", #regs %d, bytes %d args %d\n",
772 (last_movem_reg + 1) * 4,
773 current_function_args_size);
780 /* Local vars on stack, but there are no movem:s.
781 Just allocate space. */
782 fprintf (file, "\tSub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
783 ADDITIVE_SIZE_MODIFIER (size),
789 fprintf (file, "\tPush $%s\n", reg_names[regno]);
795 /* Registers are stored lowest numbered at highest address,
796 which matches the loop order; we just need to update the
798 dwarf2out_reg_save (cfa_label, regno, cfa_write_offset);
799 cfa_write_offset -= 4;
804 /* Check after, if we can movem all registers. This is the normal
806 if (last_movem_reg != -1)
808 /* Side-effect assignment on movem was not supported for CRIS v0..3,
809 and don't do it if we're asked not to.
811 The movem is already accounted for, for unwind. */
813 if ((last_movem_reg + 1) * 4 + size >= 64
814 && (last_movem_reg + 1) * 4 + size <= 128
815 && cris_cpu_version >= CRIS_CPU_SVINTO
816 && TARGET_SIDE_EFFECT_PREFIXES)
817 fprintf (file, "\tmovem $%s,[$sp=$sp-"HOST_WIDE_INT_PRINT_DEC"]\n",
818 reg_names[last_movem_reg],
819 (last_movem_reg+1) * 4 + size);
822 /* Avoid printing multiple subsequent sub:s for sp. FIXME:
823 Clean up the conditional expression. */
824 fprintf (file, "\tsub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
825 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1) * 4 + size),
826 (last_movem_reg + 1) * 4 + size);
827 /* To be compatible with v0..v3 means we do not use an assignment
828 addressing mode with movem. We normally don't need that
829 anyway. It would only be slightly more efficient for 64..128
831 fprintf (file, "\tmovem $%s,[$sp]\n", reg_names[last_movem_reg]);
834 framesize += (last_movem_reg + 1) * 4 + size;
837 fprintf (file, "; frame "HOST_WIDE_INT_PRINT_DEC
838 ", #regs %d, bytes %d args %d\n",
841 (last_movem_reg + 1) * 4,
842 current_function_args_size);
844 /* We have to put outgoing argument space after regs. */
847 /* This does not need to be accounted for, for unwind. */
849 fprintf (file, "\tSub%s %d,$sp\n",
850 ADDITIVE_SIZE_MODIFIER (cfoa_size),
852 framesize += cfoa_size;
855 else if ((size + cfoa_size) > 0)
857 /* This does not need to be accounted for, for unwind. */
859 /* Local vars on stack, and we could not use movem. Add a sub here. */
860 fprintf (file, "\tSub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
861 ADDITIVE_SIZE_MODIFIER (size + cfoa_size),
863 framesize += size + cfoa_size;
866 /* Set up the PIC register. */
867 if (current_function_uses_pic_offset_table)
868 fprintf (file, "\tmove.d $pc,$%s\n\tsub.d .:GOTOFF,$%s\n",
869 reg_names[PIC_OFFSET_TABLE_REGNUM],
870 reg_names[PIC_OFFSET_TABLE_REGNUM]);
874 "; parm #%d @ %d; frame " HOST_WIDE_INT_PRINT_DEC
875 ", FP-SP is %d; leaf: %s%s; fp %s, outg: %d arg %d\n",
876 CRIS_MAX_ARGS_IN_REGS + 1, FIRST_PARM_OFFSET (0),
878 cris_initial_frame_pointer_offset (),
879 leaf_function_p () ? "yes" : "no",
880 return_address_on_stack ? "no" :"yes",
881 frame_pointer_needed ? "yes" : "no",
882 cfoa_size, current_function_args_size);
884 if (cris_max_stackframe && framesize > cris_max_stackframe)
885 warning ("stackframe too big: %d bytes", framesize);
888 /* Return nonzero if there are regs mentioned in the insn that are not all
889 in the call_used regs. This is part of the decision whether an insn
890 can be put in the epilogue. */
893 saved_regs_mentioned (rtx x)
899 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
907 return !call_used_regs[i];
910 /* If this is a SUBREG of a hard reg, we can see exactly which
911 registers are being modified. Otherwise, handle normally. */
912 i = REGNO (SUBREG_REG (x));
913 return !call_used_regs[i];
919 fmt = GET_RTX_FORMAT (code);
920 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
924 if (saved_regs_mentioned (XEXP (x, i)))
927 else if (fmt[i] == 'E')
930 for (j = XVECLEN (x, i) - 1; j >=0; j--)
931 if (saved_regs_mentioned (XEXP (x, i)))
939 /* Figure out if the insn may be put in the epilogue. */
942 cris_eligible_for_epilogue_delay (rtx insn)
944 /* First of all, it must be as slottable as for a delayed branch insn. */
945 if (get_attr_slottable (insn) != SLOTTABLE_YES)
948 /* It must not refer to the stack pointer (may be valid for some cases
949 that I can't think of). */
950 if (reg_mentioned_p (stack_pointer_rtx, PATTERN (insn)))
953 /* The frame pointer will be restored in the epilogue, before the
954 "ret", so it can't be referred to. */
955 if (frame_pointer_needed
956 && reg_mentioned_p (frame_pointer_rtx, PATTERN (insn)))
959 /* All saved regs are restored before the delayed insn.
960 This means that we cannot have any instructions that mention the
961 registers that are restored by the epilogue. */
962 if (saved_regs_mentioned (PATTERN (insn)))
965 /* It seems to be ok. */
969 /* Return the number of delay-slots in the epilogue: return 1 if it
970 contains "ret", else 0. */
973 cris_delay_slots_for_epilogue (void)
975 /* Check if we use a return insn, which we only do for leaf functions.
976 Else there is no slot to fill. */
977 if (regs_ever_live[CRIS_SRP_REGNUM]
978 || cfun->machine->needs_return_address_on_stack != 0)
981 /* By calling function_epilogue with the same parameters as from gcc
982 we can get info about if the epilogue can fill the delay-slot by itself.
983 If it is filled from the epilogue, then the corresponding string
985 This depends on that the "size" argument to function_epilogue
986 always is get_frame_size.
987 FIXME: Kludgy. At least make it a separate function that is not
988 misnamed or abuses the stream parameter. */
989 cris_target_asm_function_epilogue (NULL, get_frame_size ());
996 /* Textual function epilogue. When file is NULL, it serves doubly as
997 a test for whether the epilogue can fill any "ret" delay-slots by
998 itself by storing the delay insn in save_last. */
1001 cris_target_asm_function_epilogue (FILE *file, HOST_WIDE_INT size)
1004 int last_movem_reg = -1;
1005 rtx insn = get_last_insn ();
1006 int argspace_offset = current_function_outgoing_args_size;
1007 int pretend = current_function_pretend_args_size;
1008 int return_address_on_stack
1009 = regs_ever_live[CRIS_SRP_REGNUM]
1010 || cfun->machine->needs_return_address_on_stack != 0;
1014 if (file && !TARGET_PROLOGUE_EPILOGUE)
1017 if (TARGET_PDEBUG && file)
1018 fprintf (file, ";;\n");
1020 /* Align byte count of stack frame. */
1021 if (TARGET_STACK_ALIGN)
1022 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
1024 /* If the last insn was a BARRIER, we don't have to write any code,
1025 then all returns were covered by "return" insns. */
1026 if (GET_CODE (insn) == NOTE)
1027 insn = prev_nonnote_insn (insn);
1029 && (GET_CODE (insn) == BARRIER
1030 /* We must make sure that the insn really is a "return" and
1031 not a conditional branch. Try to match the return exactly,
1032 and if it doesn't match, assume it is a conditional branch
1033 (and output an epilogue). */
1034 || (GET_CODE (insn) == JUMP_INSN
1035 && GET_CODE (PATTERN (insn)) == RETURN)))
1037 if (TARGET_PDEBUG && file)
1038 fprintf (file, ";;;;;\n");
1042 /* Check how many saved regs we can movem. They start at r0 and must
1045 regno < FIRST_PSEUDO_REGISTER;
1047 if ((((regs_ever_live[regno]
1048 && !call_used_regs[regno])
1049 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1050 && (current_function_uses_pic_offset_table
1051 /* It is saved anyway, if there would be a gap. */
1053 && regs_ever_live[regno + 1]
1054 && !call_used_regs[regno + 1]))))
1055 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1056 && regno != CRIS_SRP_REGNUM)
1057 || (current_function_calls_eh_return
1058 && (regno == EH_RETURN_DATA_REGNO (0)
1059 || regno == EH_RETURN_DATA_REGNO (1)
1060 || regno == EH_RETURN_DATA_REGNO (2)
1061 || regno == EH_RETURN_DATA_REGNO (3))))
1064 if (regno == last_movem_reg + 1)
1070 for (regno = FIRST_PSEUDO_REGISTER - 1;
1071 regno > last_movem_reg;
1073 if ((((regs_ever_live[regno]
1074 && !call_used_regs[regno])
1075 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1076 && (current_function_uses_pic_offset_table
1077 /* It is saved anyway, if there would be a gap. */
1079 && regs_ever_live[regno + 1]
1080 && !call_used_regs[regno + 1]))))
1081 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1082 && regno != CRIS_SRP_REGNUM)
1083 || (current_function_calls_eh_return
1084 && (regno == EH_RETURN_DATA_REGNO (0)
1085 || regno == EH_RETURN_DATA_REGNO (1)
1086 || regno == EH_RETURN_DATA_REGNO (2)
1087 || regno == EH_RETURN_DATA_REGNO (3))))
1089 if (argspace_offset)
1091 /* There is an area for outgoing parameters located before
1092 the saved registers. We have to adjust for that. */
1094 fprintf (file, "\tAdd%s %d,$sp\n",
1095 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1098 /* Make sure we only do this once. */
1099 argspace_offset = 0;
1102 /* Flush previous non-movem:ed registers. */
1103 if (*save_last && file)
1104 fprintf (file, save_last);
1105 sprintf (save_last, "\tPop $%s\n", reg_names[regno]);
1108 if (last_movem_reg != -1)
1110 if (argspace_offset)
1112 /* Adjust for the outgoing parameters area, if that's not
1114 if (*save_last && file)
1116 fprintf (file, save_last);
1121 fprintf (file, "\tAdd%s %d,$sp\n",
1122 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1124 argspace_offset = 0;
1126 /* Flush previous non-movem:ed registers. */
1127 else if (*save_last && file)
1128 fprintf (file, save_last);
1129 sprintf (save_last, "\tmovem [$sp+],$%s\n", reg_names[last_movem_reg]);
1132 /* Restore frame pointer if necessary. */
1133 if (frame_pointer_needed)
1135 if (*save_last && file)
1136 fprintf (file, save_last);
1139 fprintf (file, "\tmove.d $%s,$sp\n",
1140 reg_names[FRAME_POINTER_REGNUM]);
1141 sprintf (save_last, "\tPop $%s\n",
1142 reg_names[FRAME_POINTER_REGNUM]);
1146 /* If there was no frame-pointer to restore sp from, we must
1147 explicitly deallocate local variables. */
1149 /* Handle space for outgoing parameters that hasn't been handled
1151 size += argspace_offset;
1155 if (*save_last && file)
1156 fprintf (file, save_last);
1158 sprintf (save_last, "\tadd%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
1159 ADDITIVE_SIZE_MODIFIER (size), size);
1162 /* If the size was not in the range for a "quick", we must flush
1167 fprintf (file, save_last);
1172 /* If this function has no pushed register parameters
1173 (stdargs/varargs), and if it is not a leaf function, then we can
1174 just jump-return here. */
1175 if (return_address_on_stack && pretend == 0)
1177 if (*save_last && file)
1178 fprintf (file, save_last);
1183 if (current_function_calls_eh_return)
1185 /* The installed EH-return address is in *this* frame, so we
1186 need to pop it before we return. */
1187 fprintf (file, "\tpop $srp\n");
1188 fprintf (file, "\tret\n");
1189 fprintf (file, "\tadd.d $%s,$sp\n", reg_names[CRIS_STACKADJ_REG]);
1192 fprintf (file, "\tJump [$sp+]\n");
1194 /* Do a sanity check to avoid generating invalid code. */
1195 if (current_function_epilogue_delay_list)
1196 internal_error ("allocated but unused delay list in epilogue");
1201 /* Rather than add current_function_calls_eh_return conditions
1202 everywhere in the following code (and not be able to test it
1203 thoroughly), assert the assumption that all usage of
1204 __builtin_eh_return are handled above. */
1205 if (current_function_calls_eh_return)
1206 internal_error ("unexpected function type needing stack adjustment for\
1207 __builtin_eh_return");
1209 /* If we pushed some register parameters, then adjust the stack for
1213 /* Since srp is stored on the way, we need to restore it first. */
1214 if (return_address_on_stack)
1216 if (*save_last && file)
1217 fprintf (file, save_last);
1221 fprintf (file, "\tpop $srp\n");
1224 if (*save_last && file)
1225 fprintf (file, save_last);
1227 sprintf (save_last, "\tadd%s %d,$sp\n",
1228 ADDITIVE_SIZE_MODIFIER (pretend), pretend);
1231 /* Here's where we have a delay-slot we need to fill. */
1232 if (file && current_function_epilogue_delay_list)
1234 /* If gcc has allocated an insn for the epilogue delay slot, but
1235 things were arranged so we now thought we could do it
1236 ourselves, don't forget to flush that insn. */
1238 fprintf (file, save_last);
1240 fprintf (file, "\tRet\n");
1242 /* Output the delay-slot-insn the mandated way. */
1243 final_scan_insn (XEXP (current_function_epilogue_delay_list, 0),
1248 fprintf (file, "\tRet\n");
1250 /* If the GCC did not do it, we have to use whatever insn we have,
1253 fprintf (file, save_last);
1255 fprintf (file, "\tnOp\n");
1259 /* The PRINT_OPERAND worker. */
1262 cris_print_operand (FILE *file, rtx x, int code)
1266 /* Size-strings corresponding to MULT expressions. */
1267 static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
1269 /* New code entries should just be added to the switch below. If
1270 handling is finished, just return. If handling was just a
1271 modification of the operand, the modified operand should be put in
1272 "operand", and then do a break to let default handling
1273 (zero-modifier) output the operand. */
1278 /* Print the unsigned supplied integer as if it was signed
1279 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
1280 if (GET_CODE (x) != CONST_INT
1281 || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
1282 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
1283 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
1284 INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
1288 /* Print assembler code for operator. */
1289 fprintf (file, "%s", cris_op_str (operand));
1293 /* Print the operand without the PIC register. */
1294 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1295 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x);
1296 cris_pic_sympart_only++;
1297 cris_output_addr_const (file, x);
1298 cris_pic_sympart_only--;
1302 /* Print the PIC register. Applied to a GOT-less PIC symbol for
1304 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1305 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x);
1306 fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
1310 /* Adjust a power of two to its log2. */
1311 if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 )
1312 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
1313 fprintf (file, "%d", exact_log2 (INTVAL (x)));
1317 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
1318 respectively. This modifier also terminates the inhibiting
1319 effects of the 'x' modifier. */
1320 cris_output_insn_is_bound = 0;
1321 if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT)
1323 if (INTVAL (x) >= 0)
1325 if (INTVAL (x) <= 255)
1327 else if (INTVAL (x) <= 65535)
1337 /* For a non-integer, print the size of the operand. */
1338 putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
1339 ? 'd' : GET_MODE (x) == HImode ? 'w'
1340 : GET_MODE (x) == QImode ? 'b'
1341 /* If none of the above, emit an erroneous size letter. */
1347 /* Const_int: print b for -127 <= x <= 255,
1348 w for -32768 <= x <= 65535, else abort. */
1349 if (GET_CODE (x) != CONST_INT
1350 || INTVAL (x) < -32768 || INTVAL (x) > 65535)
1351 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
1352 putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
1356 /* Output a 'nop' if there's nothing for the delay slot.
1357 This method stolen from the sparc files. */
1358 if (dbr_sequence_length () == 0)
1359 fputs ("\n\tnop", file);
1363 /* Print high (most significant) part of something. */
1364 switch (GET_CODE (operand))
1367 if (HOST_BITS_PER_WIDE_INT == 32)
1368 /* Sign-extension from a normal int to a long long. */
1369 fprintf (file, INTVAL (operand) < 0 ? "-1" : "0");
1371 fprintf (file, "0x%x", (unsigned int)(INTVAL (x) >> 31 >> 1));
1375 /* High part of a long long constant. */
1376 if (GET_MODE (operand) == VOIDmode)
1378 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
1382 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1385 /* Print reg + 1. Check that there's not an attempt to print
1386 high-parts of registers like stack-pointer or higher. */
1387 if (REGNO (operand) > STACK_POINTER_REGNUM - 2)
1388 LOSE_AND_RETURN ("bad register", operand);
1389 fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
1393 /* Adjust memory address to high part. */
1395 rtx adj_mem = operand;
1397 = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
1399 /* Adjust so we can use two SImode in DImode.
1400 Calling adj_offsettable_operand will make sure it is an
1401 offsettable address. Don't do this for a postincrement
1402 though; it should remain as it was. */
1403 if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
1405 = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
1407 output_address (XEXP (adj_mem, 0));
1412 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1416 /* Strip the MEM expression. */
1417 operand = XEXP (operand, 0);
1421 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
1422 cris_output_insn_is_bound is nonzero. */
1423 if (GET_CODE (operand) != SIGN_EXTEND
1424 && GET_CODE (operand) != ZERO_EXTEND
1425 && GET_CODE (operand) != CONST_INT)
1426 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
1428 if (cris_output_insn_is_bound)
1430 cris_output_insn_is_bound = 0;
1434 putc (GET_CODE (operand) == SIGN_EXTEND
1435 || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0)
1440 /* Print the size letter of the inner element. We can do it by
1441 calling ourselves with the 's' modifier. */
1442 if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
1443 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
1444 cris_print_operand (file, XEXP (operand, 0), 's');
1448 /* Print the least significant part of operand. */
1449 if (GET_CODE (operand) == CONST_DOUBLE)
1451 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
1454 else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT)
1456 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
1457 INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
1460 /* Otherwise the least significant part equals the normal part,
1461 so handle it normally. */
1465 /* When emitting an add for the high part of a DImode constant, we
1466 want to use addq for 0 and adds.w for -1. */
1467 if (GET_CODE (operand) != CONST_INT)
1468 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
1469 fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
1473 /* When emitting an sub for the high part of a DImode constant, we
1474 want to use subq for 0 and subs.w for -1. */
1475 if (GET_CODE (operand) != CONST_INT)
1476 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
1477 fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
1481 /* Print the operand as the index-part of an address.
1482 Easiest way out is to use cris_print_index. */
1483 cris_print_index (operand, file);
1487 /* Print the size letter for an operand to a MULT, which must be a
1488 const_int with a suitable value. */
1489 if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4)
1490 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
1491 fprintf (file, "%s", mults[INTVAL (operand)]);
1495 /* No code, print as usual. */
1499 LOSE_AND_RETURN ("invalid operand modifier letter", x);
1502 /* Print an operand as without a modifier letter. */
1503 switch (GET_CODE (operand))
1506 if (REGNO (operand) > 15)
1507 internal_error ("internal error: bad register: %d", REGNO (operand));
1508 fprintf (file, "$%s", reg_names[REGNO (operand)]);
1512 output_address (XEXP (operand, 0));
1516 if (GET_MODE (operand) == VOIDmode)
1517 /* A long long constant. */
1518 output_addr_const (file, operand);
1521 /* Only single precision is allowed as plain operands the
1522 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1527 /* FIXME: Perhaps check overflow of the "single". */
1528 REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
1529 REAL_VALUE_TO_TARGET_SINGLE (r, l);
1531 fprintf (file, "0x%lx", l);
1536 ASSERT_PLT_UNSPEC (operand);
1540 cris_output_addr_const (file, operand);
1546 /* For a (MULT (reg X) const_int) we output "rX.S". */
1547 int i = GET_CODE (XEXP (operand, 1)) == CONST_INT
1548 ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
1549 rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT
1550 ? XEXP (operand, 0) : XEXP (operand, 1);
1552 if (GET_CODE (reg) != REG
1553 || (GET_CODE (XEXP (operand, 0)) != CONST_INT
1554 && GET_CODE (XEXP (operand, 1)) != CONST_INT))
1555 LOSE_AND_RETURN ("unexpected multiplicative operand", x);
1557 cris_print_base (reg, file);
1558 fprintf (file, ".%c",
1559 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
1561 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
1567 /* No need to handle all strange variants, let output_addr_const
1569 if (CONSTANT_P (operand))
1571 cris_output_addr_const (file, operand);
1575 LOSE_AND_RETURN ("unexpected operand", x);
1579 /* The PRINT_OPERAND_ADDRESS worker. */
1582 cris_print_operand_address (FILE *file, rtx x)
1584 /* All these were inside MEM:s so output indirection characters. */
1587 if (CONSTANT_ADDRESS_P (x))
1588 cris_output_addr_const (file, x);
1589 else if (BASE_OR_AUTOINCR_P (x))
1590 cris_print_base (x, file);
1591 else if (GET_CODE (x) == PLUS)
1599 cris_print_base (x1, file);
1600 cris_print_index (x2, file);
1602 else if (BASE_P (x2))
1604 cris_print_base (x2, file);
1605 cris_print_index (x1, file);
1608 LOSE_AND_RETURN ("unrecognized address", x);
1610 else if (GET_CODE (x) == MEM)
1612 /* A DIP. Output more indirection characters. */
1614 cris_print_base (XEXP (x, 0), file);
1618 LOSE_AND_RETURN ("unrecognized address", x);
1623 /* The RETURN_ADDR_RTX worker.
1624 We mark that the return address is used, either by EH or
1625 __builtin_return_address, for use by the function prologue and
1626 epilogue. FIXME: This isn't optimal; we just use the mark in the
1627 prologue and epilogue to say that the return address is to be stored
1628 in the stack frame. We could return SRP for leaf-functions and use the
1629 initial-value machinery. */
1632 cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
1634 cfun->machine->needs_return_address_on_stack = 1;
1636 /* The return-address is stored just above the saved frame-pointer (if
1637 present). Apparently we can't eliminate from the frame-pointer in
1638 that direction, so use the incoming args (maybe pretended) pointer. */
1640 ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
1644 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1645 handles FP -> SP elimination offset. */
1648 cris_initial_frame_pointer_offset (void)
1652 /* Initial offset is 0 if we don't have a frame pointer. */
1655 /* And 4 for each register pushed. */
1656 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1657 if ((((regs_ever_live[regno]
1658 && !call_used_regs[regno])
1659 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1660 && (current_function_uses_pic_offset_table
1661 /* It is saved anyway, if there would be a gap. */
1663 && regs_ever_live[regno + 1]
1664 && !call_used_regs[regno + 1]))))
1665 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1666 && regno != CRIS_SRP_REGNUM)
1667 || (current_function_calls_eh_return
1668 && (regno == EH_RETURN_DATA_REGNO (0)
1669 || regno == EH_RETURN_DATA_REGNO (1)
1670 || regno == EH_RETURN_DATA_REGNO (2)
1671 || regno == EH_RETURN_DATA_REGNO (3))))
1674 /* And then, last, we add the locals allocated. */
1675 offs += get_frame_size ();
1677 /* And more; the accumulated args size. */
1678 offs += current_function_outgoing_args_size;
1680 /* Then round it off, in case we use aligned stack. */
1681 if (TARGET_STACK_ALIGN)
1682 offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
1687 /* The INITIAL_ELIMINATION_OFFSET worker.
1688 Calculate the difference between imaginary registers such as frame
1689 pointer and the stack pointer. Used to eliminate the frame pointer
1690 and imaginary arg pointer. */
1693 cris_initial_elimination_offset (int fromreg, int toreg)
1696 = cris_initial_frame_pointer_offset ();
1698 /* We should be able to use regs_ever_live and related prologue
1699 information here, or alpha should not as well. */
1700 int return_address_on_stack
1701 = regs_ever_live[CRIS_SRP_REGNUM]
1702 || cfun->machine->needs_return_address_on_stack != 0;
1704 /* Here we act as if the frame-pointer is needed. */
1705 int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
1707 if (fromreg == ARG_POINTER_REGNUM
1708 && toreg == FRAME_POINTER_REGNUM)
1709 return ap_fp_offset;
1711 /* Between the frame pointer and the stack are only "normal" stack
1712 variables and saved registers. */
1713 if (fromreg == FRAME_POINTER_REGNUM
1714 && toreg == STACK_POINTER_REGNUM)
1715 return fp_sp_offset;
1717 /* We need to balance out the frame pointer here. */
1718 if (fromreg == ARG_POINTER_REGNUM
1719 && toreg == STACK_POINTER_REGNUM)
1720 return ap_fp_offset + fp_sp_offset - 4;
1725 /* This function looks into the pattern to see how this insn affects
1728 Used when to eliminate test insns before a condition-code user,
1729 such as a "scc" insn or a conditional branch. This includes
1730 checking if the entities that cc was updated by, are changed by the
1733 Currently a jumble of the old peek-inside-the-insn and the newer
1734 check-cc-attribute methods. */
1737 cris_notice_update_cc (rtx exp, rtx insn)
1739 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1740 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1741 Several testcases will otherwise fail, for example
1742 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1749 /* Slowly, we're converting to using attributes to control the setting
1750 of condition-code status. */
1751 switch (get_attr_cc (insn))
1754 /* Even if it is "none", a setting may clobber a previous
1755 cc-value, so check. */
1756 if (GET_CODE (exp) == SET)
1758 if (cc_status.value1
1759 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1761 cc_status.value1 = 0;
1763 if (cc_status.value2
1764 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1766 cc_status.value2 = 0;
1775 /* Which means, for:
1780 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1781 CC_NO_OVERFLOW unless (...) is reg or mem.
1790 (set (reg1) (mem (bdap/biap)))
1791 (set (reg2) (bdap/biap))):
1792 CC is (reg1) and (mem (reg2))
1795 (set (mem (bdap/biap)) (reg1)) [or 0]
1796 (set (reg2) (bdap/biap))):
1799 (where reg and mem includes strict_low_parts variants thereof)
1801 For all others, assume CC is clobbered.
1802 Note that we do not have to care about setting CC_NO_OVERFLOW,
1803 since the overflow flag is set to 0 (i.e. right) for
1804 instructions where it does not have any sane sense, but where
1805 other flags have meanings. (This includes shifts; the carry is
1808 Note that there are other parallel constructs we could match,
1809 but we don't do that yet. */
1811 if (GET_CODE (exp) == SET)
1813 /* FIXME: Check when this happens. It looks like we should
1814 actually do a CC_STATUS_INIT here to be safe. */
1815 if (SET_DEST (exp) == pc_rtx)
1818 /* Record CC0 changes, so we do not have to output multiple
1820 if (SET_DEST (exp) == cc0_rtx)
1822 cc_status.value1 = SET_SRC (exp);
1823 cc_status.value2 = 0;
1825 /* Handle flags for the special btstq on one bit. */
1826 if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT
1827 && XEXP (SET_SRC (exp), 1) == const1_rtx)
1829 if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT)
1831 cc_status.flags = CC_INVERTED;
1833 /* A one-bit btstq. */
1834 cc_status.flags = CC_Z_IN_NOT_N;
1837 cc_status.flags = 0;
1839 if (GET_CODE (SET_SRC (exp)) == COMPARE)
1841 if (!REG_P (XEXP (SET_SRC (exp), 0))
1842 && XEXP (SET_SRC (exp), 1) != const0_rtx)
1843 /* For some reason gcc will not canonicalize compare
1844 operations, reversing the sign by itself if
1845 operands are in wrong order. */
1846 /* (But NOT inverted; eq is still eq.) */
1847 cc_status.flags = CC_REVERSED;
1849 /* This seems to be overlooked by gcc. FIXME: Check again.
1850 FIXME: Is it really safe? */
1852 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
1853 XEXP (SET_SRC (exp), 0),
1854 XEXP (SET_SRC (exp), 1));
1858 else if (REG_P (SET_DEST (exp))
1859 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1860 && REG_P (XEXP (SET_DEST (exp), 0))))
1862 /* A register is set; normally CC is set to show that no
1863 test insn is needed. Catch the exceptions. */
1865 /* If not to cc0, then no "set"s in non-natural mode give
1867 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
1868 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
1870 /* ... except add:s and sub:s in DImode. */
1871 if (GET_MODE (SET_DEST (exp)) == DImode
1872 && (GET_CODE (SET_SRC (exp)) == PLUS
1873 || GET_CODE (SET_SRC (exp)) == MINUS))
1875 cc_status.flags = 0;
1876 cc_status.value1 = SET_DEST (exp);
1877 cc_status.value2 = SET_SRC (exp);
1879 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1881 cc_status.value2 = 0;
1883 /* Add and sub may set V, which gets us
1884 unoptimizable results in "gt" and "le" condition
1886 cc_status.flags |= CC_NO_OVERFLOW;
1891 else if (SET_SRC (exp) == const0_rtx)
1893 /* There's no CC0 change when clearing a register or
1894 memory. Just check for overlap. */
1895 if ((cc_status.value1
1896 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1898 cc_status.value1 = 0;
1900 if ((cc_status.value2
1901 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1903 cc_status.value2 = 0;
1909 cc_status.flags = 0;
1910 cc_status.value1 = SET_DEST (exp);
1911 cc_status.value2 = SET_SRC (exp);
1913 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1915 cc_status.value2 = 0;
1917 /* Some operations may set V, which gets us
1918 unoptimizable results in "gt" and "le" condition
1920 if (GET_CODE (SET_SRC (exp)) == PLUS
1921 || GET_CODE (SET_SRC (exp)) == MINUS
1922 || GET_CODE (SET_SRC (exp)) == NEG)
1923 cc_status.flags |= CC_NO_OVERFLOW;
1928 else if (GET_CODE (SET_DEST (exp)) == MEM
1929 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1930 && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM))
1932 /* When SET to MEM, then CC is not changed (except for
1934 if ((cc_status.value1
1935 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1937 cc_status.value1 = 0;
1939 if ((cc_status.value2
1940 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1942 cc_status.value2 = 0;
1947 else if (GET_CODE (exp) == PARALLEL)
1949 if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
1950 && GET_CODE (XVECEXP (exp, 0, 1)) == SET
1951 && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
1953 if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
1954 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM)
1956 /* For "move.S [rx=ry+o],rz", say CC reflects
1957 value1=rz and value2=[rx] */
1958 cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
1960 = gen_rtx_MEM (GET_MODE (XEXP (XVECEXP (exp, 0, 0), 0)),
1961 XEXP (XVECEXP (exp, 0, 1), 0));
1962 cc_status.flags = 0;
1964 /* Huh? A side-effect cannot change the destination
1966 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1968 internal_error ("internal error: sideeffect-insn affecting main effect");
1971 else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
1972 || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
1973 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM)
1975 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
1976 say flags are not changed, except for overlap. */
1977 if (cc_status.value1
1978 && cris_reg_overlap_mentioned_p (XEXP
1982 cc_status.value1 = 0;
1984 if (cc_status.value1
1985 && cris_reg_overlap_mentioned_p (XEXP
1989 cc_status.value1 = 0;
1991 if (cc_status.value2
1992 && cris_reg_overlap_mentioned_p (XEXP
1996 cc_status.value2 = 0;
1998 if (cc_status.value2
1999 && cris_reg_overlap_mentioned_p (XEXP
2003 cc_status.value2 = 0;
2012 /* Unknown cc_attr value. */
2019 /* Return != 0 if the return sequence for the current function is short,
2020 like "ret" or "jump [sp+]". Prior to reloading, we can't tell how
2021 many registers must be saved, so return 0 then. */
2024 cris_simple_epilogue (void)
2027 int reglimit = STACK_POINTER_REGNUM;
2030 if (! reload_completed
2031 || frame_pointer_needed
2032 || get_frame_size () != 0
2033 || current_function_pretend_args_size
2034 || current_function_args_size
2035 || current_function_outgoing_args_size
2036 || current_function_calls_eh_return
2038 /* If we're not supposed to emit prologue and epilogue, we must
2039 not emit return-type instructions. */
2040 || !TARGET_PROLOGUE_EPILOGUE)
2043 /* We allow a "movem [sp+],rN" to sit in front if the "jump [sp+]" or
2044 in the delay-slot of the "ret". */
2045 for (regno = 0; regno < reglimit; regno++)
2046 if ((regs_ever_live[regno] && ! call_used_regs[regno])
2047 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
2048 && (current_function_uses_pic_offset_table
2049 /* It is saved anyway, if there would be a gap. */
2051 && regs_ever_live[regno + 1]
2052 && !call_used_regs[regno + 1]))))
2054 if (lastreg != regno - 1)
2062 /* Compute a (partial) cost for rtx X. Return true if the complete
2063 cost has been computed, and false if subexpressions should be
2064 scanned. In either case, *TOTAL contains the cost result. */
2067 cris_rtx_costs (rtx x, int code, int outer_code, int *total)
2073 HOST_WIDE_INT val = INTVAL (x);
2076 else if (val < 32 && val >= -32)
2078 /* Eight or 16 bits are a word and cycle more expensive. */
2079 else if (val <= 32767 && val >= -32768)
2081 /* A 32 bit constant (or very seldom, unsigned 16 bits) costs
2082 another word. FIXME: This isn't linear to 16 bits. */
2094 /* For PIC, we need a prefix (if it isn't already there),
2095 and the PIC register. For a global PIC symbol, we also
2096 need a read of the GOT. */
2099 if (cris_got_symbol (x))
2109 if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
2112 /* Make 0.0 cheap, else test-insns will not be used. */
2117 /* Identify values that are no powers of two. Powers of 2 are
2118 taken care of already and those values should not be changed. */
2119 if (GET_CODE (XEXP (x, 1)) != CONST_INT
2120 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
2122 /* If we have a multiply insn, then the cost is between
2123 1 and 2 "fast" instructions. */
2124 if (TARGET_HAS_MUL_INSNS)
2126 *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
2130 /* Estimate as 4 + 4 * #ofbits. */
2131 *total = COSTS_N_INSNS (132);
2140 if (GET_CODE (XEXP (x, 1)) != CONST_INT
2141 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
2143 /* Estimate this as 4 + 8 * #of bits. */
2144 *total = COSTS_N_INSNS (260);
2150 if (GET_CODE (XEXP (x, 1)) == CONST_INT
2151 /* Two constants may actually happen before optimization. */
2152 && GET_CODE (XEXP (x, 0)) != CONST_INT
2153 && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
2155 *total = (rtx_cost (XEXP (x, 0), outer_code) + 2
2156 + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
2161 case ZERO_EXTEND: case SIGN_EXTEND:
2162 *total = rtx_cost (XEXP (x, 0), outer_code);
2170 /* The ADDRESS_COST worker. */
2173 cris_address_cost (rtx x)
2175 /* The metric to use for the cost-macros is unclear.
2176 The metric used here is (the number of cycles needed) / 2,
2177 where we consider equal a cycle for a word of code and a cycle to
2180 /* The cheapest addressing modes get 0, since nothing extra is needed. */
2181 if (BASE_OR_AUTOINCR_P (x))
2184 /* An indirect mem must be a DIP. This means two bytes extra for code,
2185 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
2186 if (GET_CODE (x) == MEM)
2189 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
2190 an extra DIP prefix and 4 bytes of constant in most cases.
2191 For PIC and a symbol with a GOT entry, we double the cost since we
2192 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
2193 equivalent to the DIP prefix for non-PIC, hence the same cost. */
2195 return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
2197 /* Handle BIAP and BDAP prefixes. */
2198 if (GET_CODE (x) == PLUS)
2200 rtx tem1 = XEXP (x, 0);
2201 rtx tem2 = XEXP (x, 1);
2203 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
2204 recognize the typical MULT which is always in tem1 because of
2205 insn canonicalization. */
2206 if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
2210 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
2211 PLUS is always found in tem2. */
2212 if (GET_CODE (tem2) == CONST_INT
2213 && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
2216 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
2218 if (GET_CODE (tem2) == CONST_INT
2219 && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
2222 /* A BDAP with some other constant is 2 bytes extra. */
2223 if (CONSTANT_P (tem2))
2224 return (2 + 2 + 2) / 2;
2226 /* BDAP with something indirect should have a higher cost than
2227 BIAP with register. FIXME: Should it cost like a MEM or more? */
2228 /* Don't need to check it, it's the only one left.
2229 FIXME: There was a REG test missing, perhaps there are others.
2231 return (2 + 2 + 2) / 2;
2234 /* What else? Return a high cost. It matters only for valid
2235 addressing modes. */
2239 /* Check various objections to the side-effect. Used in the test-part
2240 of an anonymous insn describing an insn with a possible side-effect.
2241 Returns nonzero if the implied side-effect is ok.
2244 ops : An array of rtx:es. lreg, rreg, rval,
2245 The variables multop and other_op are indexes into this,
2246 or -1 if they are not applicable.
2247 lreg : The register that gets assigned in the side-effect.
2248 rreg : One register in the side-effect expression
2249 rval : The other register, or an int.
2250 multop : An integer to multiply rval with.
2251 other_op : One of the entities of the main effect,
2252 whose mode we must consider. */
2255 cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
2256 int lreg, int rreg, int rval,
2257 int multop, int other_op)
2259 /* Find what value to multiply with, for rx =ry + rz * n. */
2260 int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
2262 rtx reg_rtx = ops[rreg];
2263 rtx val_rtx = ops[rval];
2265 /* The operands may be swapped. Canonicalize them in reg_rtx and
2266 val_rtx, where reg_rtx always is a reg (for this constraint to
2268 if (! BASE_P (reg_rtx))
2269 reg_rtx = val_rtx, val_rtx = ops[rreg];
2271 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
2272 we have no business. */
2273 if (! BASE_P (reg_rtx))
2276 /* Don't do this when -mno-split. */
2277 if (!TARGET_SIDE_EFFECT_PREFIXES)
2280 /* The mult expression may be hidden in lreg. FIXME: Add more
2281 commentary about that. */
2282 if (GET_CODE (val_rtx) == MULT)
2284 mult = INTVAL (XEXP (val_rtx, 1));
2285 val_rtx = XEXP (val_rtx, 0);
2289 /* First check the "other operand". */
2292 if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
2295 /* Check if the lvalue register is the same as the "other
2296 operand". If so, the result is undefined and we shouldn't do
2297 this. FIXME: Check again. */
2298 if ((BASE_P (ops[lreg])
2299 && BASE_P (ops[other_op])
2300 && REGNO (ops[lreg]) == REGNO (ops[other_op]))
2301 || rtx_equal_p (ops[other_op], ops[lreg]))
2305 /* Do not accept frame_pointer_rtx as any operand. */
2306 if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
2307 || ops[rval] == frame_pointer_rtx
2308 || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
2312 && ! BASE_P (val_rtx))
2315 /* Do not allow rx = rx + n if a normal add or sub with same size
2317 if (rtx_equal_p (ops[lreg], reg_rtx)
2318 && GET_CODE (val_rtx) == CONST_INT
2319 && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
2322 /* Check allowed cases, like [r(+)?].[bwd] and const.
2323 A symbol is not allowed with PIC. */
2324 if (CONSTANT_P (val_rtx))
2325 return flag_pic == 0 || cris_symbol (val_rtx) == 0;
2327 if (GET_CODE (val_rtx) == MEM
2328 && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
2331 if (GET_CODE (val_rtx) == SIGN_EXTEND
2332 && GET_CODE (XEXP (val_rtx, 0)) == MEM
2333 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
2336 /* If we got here, it's not a valid addressing mode. */
2339 else if (code == MULT
2340 || (code == PLUS && BASE_P (val_rtx)))
2342 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
2343 if (rtx_equal_p (ops[lreg], reg_rtx)
2344 || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
2347 /* Do not allow bad multiply-values. */
2348 if (mult != 1 && mult != 2 && mult != 4)
2351 /* Only allow r + ... */
2352 if (! BASE_P (reg_rtx))
2355 /* If we got here, all seems ok.
2356 (All checks need to be done above). */
2360 /* If we get here, the caller got its initial tests wrong. */
2361 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
2364 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
2365 does not handle the case where the IN operand is strict_low_part; it
2366 does handle it for X. Test-case in Axis-20010516. This function takes
2367 care of that for THIS port. FIXME: strict_low_part is going away
2371 cris_reg_overlap_mentioned_p (rtx x, rtx in)
2373 /* The function reg_overlap_mentioned now handles when X is
2374 strict_low_part, but not when IN is a STRICT_LOW_PART. */
2375 if (GET_CODE (in) == STRICT_LOW_PART)
2378 return reg_overlap_mentioned_p (x, in);
2381 /* The TARGET_ASM_NAMED_SECTION worker.
2382 We just dispatch to the functions for ELF and a.out. */
2385 cris_target_asm_named_section (const char *name, unsigned int flags)
2388 default_no_named_section (name, flags);
2390 default_elf_asm_named_section (name, flags);
2393 /* The LEGITIMATE_PIC_OPERAND_P worker. */
2396 cris_legitimate_pic_operand (rtx x)
2398 /* The PIC representation of a symbol with a GOT entry will be (for
2399 example; relocations differ):
2400 sym => [rPIC+sym:GOT]
2401 and for a GOT-less symbol it will be (for example, relocation differ):
2402 sym => rPIC+sym:GOTOFF
2403 so only a symbol with a GOT is by itself a valid operand, and it
2404 can't be a sum of a symbol and an offset. */
2405 return ! cris_symbol (x) || cris_got_symbol (x);
2408 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2414 switch (GET_CODE (x))
2421 /* A PLT reference. */
2422 ASSERT_PLT_UNSPEC (x);
2426 return cris_symbol (XEXP (x, 0));
2430 return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1));
2434 case CONSTANT_P_RTX:
2438 fatal_insn ("unrecognized supposed constant", x);
2444 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2445 CONSTANT_P, and the symbol does not need a GOT entry. Also set
2446 current_function_uses_pic_offset_table if we're generating PIC and ever
2447 see something that would need one. */
2450 cris_gotless_symbol (rtx x)
2452 #ifdef ENABLE_CHECKING
2457 switch (GET_CODE (x))
2460 ASSERT_PLT_UNSPEC (x);
2465 current_function_uses_pic_offset_table = 1;
2466 return SYMBOL_REF_LOCAL_P (x);
2469 /* We don't set current_function_uses_pic_offset_table for
2470 LABEL_REF:s in here, since they are almost always originating
2471 from some branch. The only time it does not come from a label is
2472 when GCC does something like __builtin_setjmp. Then we get the
2473 LABEL_REF from the movsi expander, so we mark it there as a
2478 return cris_gotless_symbol (XEXP (x, 0));
2483 int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0;
2484 int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0;
2486 /* One and only one of them must be a local symbol. Neither must
2487 be some other, more general kind of symbol. */
2490 && ! (x0 == 0 && cris_symbol (XEXP (x, 0)))
2491 && ! (x1 == 0 && cris_symbol (XEXP (x, 1)));
2496 case CONSTANT_P_RTX:
2500 fatal_insn ("unrecognized supposed constant", x);
2506 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2507 CONSTANT_P, and the symbol needs a GOT entry. */
2510 cris_got_symbol (rtx x)
2512 #ifdef ENABLE_CHECKING
2517 switch (GET_CODE (x))
2520 ASSERT_PLT_UNSPEC (x);
2525 current_function_uses_pic_offset_table = 1;
2526 return ! SYMBOL_REF_LOCAL_P (x);
2529 return cris_got_symbol (XEXP (x, 0));
2532 /* A LABEL_REF is never visible as a symbol outside the local
2536 /* Nope, can't access the GOT for "symbol + offset". */
2541 case CONSTANT_P_RTX:
2545 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2552 /* The OVERRIDE_OPTIONS worker.
2553 As is the norm, this also parses -mfoo=bar type parameters. */
2556 cris_override_options (void)
2558 if (cris_max_stackframe_str)
2560 cris_max_stackframe = atoi (cris_max_stackframe_str);
2562 /* Do some sanity checking. */
2563 if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
2564 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2565 cris_max_stackframe, 0x20000000);
2568 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2569 if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
2570 cris_cpu_version = CRIS_CPU_SVINTO;
2571 else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
2572 cris_cpu_version = CRIS_CPU_ETRAX4;
2574 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2578 = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
2580 if (strcmp ("etrax4", cris_cpu_str) == 0)
2581 cris_cpu_version = 3;
2583 if (strcmp ("svinto", cris_cpu_str) == 0
2584 || strcmp ("etrax100", cris_cpu_str) == 0)
2585 cris_cpu_version = 8;
2587 if (strcmp ("ng", cris_cpu_str) == 0
2588 || strcmp ("etrax100lx", cris_cpu_str) == 0)
2589 cris_cpu_version = 10;
2591 if (cris_cpu_version < 0 || cris_cpu_version > 10)
2592 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2595 /* Set the target flags. */
2596 if (cris_cpu_version >= CRIS_CPU_ETRAX4)
2597 target_flags |= TARGET_MASK_ETRAX4_ADD;
2599 /* If this is Svinto or higher, align for 32 bit accesses. */
2600 if (cris_cpu_version >= CRIS_CPU_SVINTO)
2602 |= (TARGET_MASK_SVINTO | TARGET_MASK_ALIGN_BY_32
2603 | TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2604 | TARGET_MASK_DATA_ALIGN);
2606 /* Note that we do not add new flags when it can be completely
2607 described with a macro that uses -mcpu=X. So
2608 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2614 = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
2616 if (strcmp ("etrax4", cris_tune_str) == 0)
2619 if (strcmp ("svinto", cris_tune_str) == 0
2620 || strcmp ("etrax100", cris_tune_str) == 0)
2623 if (strcmp ("ng", cris_tune_str) == 0
2624 || strcmp ("etrax100lx", cris_tune_str) == 0)
2627 if (cris_tune < 0 || cris_tune > 10)
2628 error ("unknown CRIS cpu version specification in -mtune= : %s",
2631 if (cris_tune >= CRIS_CPU_SVINTO)
2632 /* We have currently nothing more to tune than alignment for
2635 |= (TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2636 | TARGET_MASK_DATA_ALIGN | TARGET_MASK_ALIGN_BY_32);
2641 /* Use error rather than warning, so invalid use is easily
2642 detectable. Still change to the values we expect, to avoid
2646 error ("-fPIC and -fpic are not supported in this configuration");
2650 /* Turn off function CSE. We need to have the addresses reach the
2651 call expanders to get PLT-marked, as they could otherwise be
2652 compared against zero directly or indirectly. After visiting the
2653 call expanders they will then be cse:ed, as the call expanders
2654 force_reg the addresses, effectively forcing flag_no_function_cse
2656 flag_no_function_cse = 1;
2659 if ((write_symbols == DWARF_DEBUG
2660 || write_symbols == DWARF2_DEBUG) && ! TARGET_ELF)
2662 warning ("that particular -g option is invalid with -maout and -melinux");
2663 write_symbols = DBX_DEBUG;
2666 /* Set the per-function-data initializer. */
2667 init_machine_status = cris_init_machine_status;
2670 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2673 cris_asm_output_mi_thunk (FILE *stream,
2674 tree thunkdecl ATTRIBUTE_UNUSED,
2675 HOST_WIDE_INT delta,
2676 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
2680 fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2681 ADDITIVE_SIZE_MODIFIER (delta), delta,
2682 reg_names[CRIS_FIRST_ARG_REG]);
2684 fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2685 ADDITIVE_SIZE_MODIFIER (-delta), -delta,
2686 reg_names[CRIS_FIRST_ARG_REG]);
2690 const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
2692 name = (* targetm.strip_name_encoding) (name);
2693 fprintf (stream, "add.d ");
2694 assemble_name (stream, name);
2695 fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
2699 fprintf (stream, "jump ");
2700 assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
2701 fprintf (stream, "\n");
2705 /* Boilerplate emitted at start of file.
2707 NO_APP *only at file start* means faster assembly. It also means
2708 comments are not allowed. In some cases comments will be output
2709 for debugging purposes. Make sure they are allowed then.
2711 We want a .file directive only if TARGET_ELF. */
2713 cris_file_start (void)
2715 /* These expressions can vary at run time, so we cannot put
2716 them into TARGET_INITIALIZER. */
2717 targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
2718 targetm.file_start_file_directive = TARGET_ELF;
2720 default_file_start ();
2723 /* The EXPAND_BUILTIN_VA_ARG worker. This is modified from the
2724 "standard" implementation of va_arg: read the value from the current
2725 address and increment by the size of one or two registers. The
2726 important difference for CRIS is that if the type is
2727 pass-by-reference, then perform an indirection. */
2730 cris_expand_builtin_va_arg (tree valist, tree type)
2734 tree passed_size = size_zero_node;
2735 tree type_size = NULL;
2736 tree size3 = size_int (3);
2737 tree size4 = size_int (4);
2738 tree size8 = size_int (8);
2744 if (type == error_mark_node
2745 || (type_size = TYPE_SIZE_UNIT (TYPE_MAIN_VARIANT (type))) == NULL
2746 || TREE_OVERFLOW (type_size))
2747 /* Presumably an error; the size isn't computable. A message has
2748 supposedly been emitted elsewhere. */
2749 rounded_size = size_zero_node;
2752 = fold (build (MULT_EXPR, sizetype,
2753 fold (build (TRUNC_DIV_EXPR, sizetype,
2754 fold (build (PLUS_EXPR, sizetype,
2759 if (!integer_zerop (rounded_size))
2761 /* Check if the type is passed by value or by reference. Values up
2762 to 8 bytes are passed by-value, padded to register-size (4
2763 bytes). Larger values and varying-size types are passed
2766 = (!really_constant_p (type_size)
2768 : fold (build (COND_EXPR, sizetype,
2769 fold (build (GT_EXPR, sizetype,
2776 = (!really_constant_p (type_size)
2777 ? build1 (INDIRECT_REF, build_pointer_type (type), addr_tree)
2778 : fold (build (COND_EXPR, TREE_TYPE (addr_tree),
2779 fold (build (GT_EXPR, sizetype,
2782 build1 (INDIRECT_REF, build_pointer_type (type),
2787 addr = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL);
2788 addr = copy_to_reg (addr);
2790 if (!integer_zerop (rounded_size))
2792 /* Compute new value for AP. */
2793 t = build (MODIFY_EXPR, TREE_TYPE (valist), valist,
2794 build (PLUS_EXPR, TREE_TYPE (valist), valist,
2796 TREE_SIDE_EFFECTS (t) = 1;
2797 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2803 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2807 cris_init_expanders (void)
2809 /* Nothing here at the moment. */
2812 /* Zero initialization is OK for all current fields. */
2814 static struct machine_function *
2815 cris_init_machine_status (void)
2817 return ggc_alloc_cleared (sizeof (struct machine_function));
2820 /* Split a 2 word move (DI or presumably DF) into component parts.
2821 Originally a copy of gen_split_move_double in m32r.c. */
2824 cris_split_movdx (rtx *operands)
2826 enum machine_mode mode = GET_MODE (operands[0]);
2827 rtx dest = operands[0];
2828 rtx src = operands[1];
2831 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2832 longer happen; after reload there are no SUBREGs any more, and we're
2833 only called after reload. */
2834 if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG)
2838 if (GET_CODE (dest) == REG)
2840 int dregno = REGNO (dest);
2842 /* Reg-to-reg copy. */
2843 if (GET_CODE (src) == REG)
2845 int sregno = REGNO (src);
2847 int reverse = (dregno == sregno + 1);
2849 /* We normally copy the low-numbered register first. However, if
2850 the first register operand 0 is the same as the second register of
2851 operand 1, we must copy in the opposite order. */
2852 emit_insn (gen_rtx_SET (VOIDmode,
2853 operand_subword (dest, reverse, TRUE, mode),
2854 operand_subword (src, reverse, TRUE, mode)));
2856 emit_insn (gen_rtx_SET (VOIDmode,
2857 operand_subword (dest, !reverse, TRUE, mode),
2858 operand_subword (src, !reverse, TRUE, mode)));
2860 /* Constant-to-reg copy. */
2861 else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
2864 split_double (src, &words[0], &words[1]);
2865 emit_insn (gen_rtx_SET (VOIDmode,
2866 operand_subword (dest, 0, TRUE, mode),
2869 emit_insn (gen_rtx_SET (VOIDmode,
2870 operand_subword (dest, 1, TRUE, mode),
2873 /* Mem-to-reg copy. */
2874 else if (GET_CODE (src) == MEM)
2876 /* If the high-address word is used in the address, we must load it
2877 last. Otherwise, load it first. */
2878 rtx addr = XEXP (src, 0);
2880 = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
2882 /* The original code imples that we can't do
2883 move.x [rN+],rM move.x [rN],rM+1
2884 when rN is dead, because of REG_NOTES damage. That is
2885 consistent with what I've seen, so don't try it.
2887 We have two different cases here; if the addr is POST_INC,
2888 just pass it through, otherwise add constants. */
2890 if (GET_CODE (addr) == POST_INC)
2892 emit_insn (gen_rtx_SET (VOIDmode,
2893 operand_subword (dest, 0, TRUE, mode),
2894 change_address (src, SImode, addr)));
2895 emit_insn (gen_rtx_SET (VOIDmode,
2896 operand_subword (dest, 1, TRUE, mode),
2897 change_address (src, SImode, addr)));
2901 /* Make sure we don't get any other addresses with
2902 embedded postincrements. They should be stopped in
2903 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2905 if (side_effects_p (addr))
2906 fatal_insn ("unexpected side-effects in address", addr);
2908 emit_insn (gen_rtx_SET
2910 operand_subword (dest, reverse, TRUE, mode),
2913 plus_constant (addr,
2914 reverse * UNITS_PER_WORD))));
2915 emit_insn (gen_rtx_SET
2917 operand_subword (dest, ! reverse, TRUE, mode),
2920 plus_constant (addr,
2928 /* Reg-to-mem copy or clear mem. */
2929 else if (GET_CODE (dest) == MEM
2930 && (GET_CODE (src) == REG
2931 || src == const0_rtx
2932 || src == CONST0_RTX (DFmode)))
2934 rtx addr = XEXP (dest, 0);
2936 if (GET_CODE (addr) == POST_INC)
2938 emit_insn (gen_rtx_SET (VOIDmode,
2939 change_address (dest, SImode, addr),
2940 operand_subword (src, 0, TRUE, mode)));
2941 emit_insn (gen_rtx_SET (VOIDmode,
2942 change_address (dest, SImode, addr),
2943 operand_subword (src, 1, TRUE, mode)));
2947 /* Make sure we don't get any other addresses with embedded
2948 postincrements. They should be stopped in
2949 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
2950 if (side_effects_p (addr))
2951 fatal_insn ("unexpected side-effects in address", addr);
2953 emit_insn (gen_rtx_SET
2955 change_address (dest, SImode, addr),
2956 operand_subword (src, 0, TRUE, mode)));
2958 emit_insn (gen_rtx_SET
2960 change_address (dest, SImode,
2961 plus_constant (addr,
2963 operand_subword (src, 1, TRUE, mode)));
2975 /* This is in essence a copy of output_addr_const altered to output
2976 symbolic operands as PIC.
2978 FIXME: Add hooks similar to ASM_OUTPUT_SYMBOL_REF to get this effect in
2979 the "real" output_addr_const. All we need is one for LABEL_REF (and
2980 one for CODE_LABEL?). */
2983 cris_output_addr_const (FILE *file, rtx x)
2988 switch (GET_CODE (x))
2991 ASSERT_PLT_UNSPEC (x);
2992 x = XVECEXP (x, 0, 0);
2999 const char *origstr = XSTR (x, 0);
3002 str = (* targetm.strip_name_encoding) (origstr);
3006 if (cris_pic_sympart_only)
3008 assemble_name (file, str);
3009 fprintf (file, ":PLTG");
3013 if (TARGET_AVOID_GOTPLT)
3014 /* We shouldn't get here. */
3017 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3018 assemble_name (file, XSTR (x, 0));
3021 fprintf (file, ":GOTPLT16]");
3023 fprintf (file, ":GOTPLT]");
3026 else if (cris_gotless_symbol (x))
3028 if (! cris_pic_sympart_only)
3029 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3030 assemble_name (file, str);
3031 fprintf (file, ":GOTOFF");
3033 else if (cris_got_symbol (x))
3035 if (cris_pic_sympart_only)
3037 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3038 assemble_name (file, XSTR (x, 0));
3041 fprintf (file, ":GOT16]");
3043 fprintf (file, ":GOT]");
3046 LOSE_AND_RETURN ("unexpected PIC symbol", x);
3049 if (! current_function_uses_pic_offset_table)
3050 output_operand_lossage ("PIC register isn't set up");
3053 assemble_name (file, XSTR (x, 0));
3057 /* If we get one of those here, it should be dressed as PIC. Branch
3058 labels are normally output with the 'l' specifier, which means it
3059 will go directly to output_asm_label and not end up here. */
3060 if (GET_CODE (XEXP (x, 0)) != CODE_LABEL
3061 && (GET_CODE (XEXP (x, 0)) != NOTE
3062 || NOTE_LINE_NUMBER (XEXP (x, 0)) != NOTE_INSN_DELETED_LABEL))
3063 fatal_insn ("unexpected address expression", x);
3067 if (cris_gotless_symbol (x))
3069 if (! cris_pic_sympart_only)
3070 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3071 cris_output_addr_const (file, XEXP (x, 0));
3073 fprintf (file, ":GOTOFF");
3076 /* Labels are never marked as global symbols. */
3077 fatal_insn ("unexpected PIC symbol", x);
3080 if (! current_function_uses_pic_offset_table)
3081 internal_error ("emitting PIC operand, but PIC register isn't set up");
3085 output_addr_const (file, x);
3089 if (NOTE_LINE_NUMBER (x) != NOTE_INSN_DELETED_LABEL)
3090 fatal_insn ("unexpected NOTE as addr_const:", x);
3096 output_addr_const (file, x);
3100 /* This used to output parentheses around the expression,
3101 but that does not work on the 386 (either ATT or BSD assembler). */
3102 cris_output_addr_const (file, XEXP (x, 0));
3106 /* Some assemblers need integer constants to appear last (eg masm). */
3107 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3109 cris_output_addr_const (file, XEXP (x, 1));
3110 if (INTVAL (XEXP (x, 0)) >= 0)
3111 fprintf (file, "+");
3112 output_addr_const (file, XEXP (x, 0));
3116 cris_output_addr_const (file, XEXP (x, 0));
3117 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3118 || INTVAL (XEXP (x, 1)) >= 0)
3119 fprintf (file, "+");
3120 cris_output_addr_const (file, XEXP (x, 1));
3125 /* Avoid outputting things like x-x or x+5-x,
3126 since some assemblers can't handle that. */
3127 x = simplify_subtraction (x);
3128 if (GET_CODE (x) != MINUS)
3131 cris_output_addr_const (file, XEXP (x, 0));
3132 fprintf (file, "-");
3133 if ((GET_CODE (XEXP (x, 1)) == CONST_INT
3134 && INTVAL (XEXP (x, 1)) < 0)
3135 || GET_CODE (XEXP (x, 1)) != CONST_INT)
3137 fprintf (file, "%s", targetm.asm_out.open_paren);
3138 cris_output_addr_const (file, XEXP (x, 1));
3139 fprintf (file, "%s", targetm.asm_out.close_paren);
3142 output_addr_const (file, XEXP (x, 1));
3146 LOSE_AND_RETURN ("unexpected address expression", x);
3151 /* Various small functions to replace macros. Only called from a
3152 debugger. They might collide with gcc functions or system functions,
3153 so only emit them when '#if 1' above. */
3155 enum rtx_code Get_code (rtx);
3160 return GET_CODE (x);
3163 const char *Get_mode (rtx);
3168 return GET_MODE_NAME (GET_MODE (x));
3171 rtx Xexp (rtx, int);
3179 rtx Xvecexp (rtx, int, int);
3182 Xvecexp (rtx x, int n, int m)
3184 return XVECEXP (x, n, m);
3187 int Get_rtx_len (rtx);
3192 return GET_RTX_LENGTH (GET_CODE (x));
3195 /* Use upper-case to distinguish from local variables that are sometimes
3196 called next_insn and prev_insn. */
3198 rtx Next_insn (rtx);
3201 Next_insn (rtx insn)
3203 return NEXT_INSN (insn);
3206 rtx Prev_insn (rtx);
3209 Prev_insn (rtx insn)
3211 return PREV_INSN (insn);
3215 #include "gt-cris.h"
3219 * eval: (c-set-style "gnu")
3220 * indent-tabs-mode: t