OSDN Git Service

d431790a647fb150b7f86cda788c6bb2bda0500d
[pf3gnuchains/gcc-fork.git] / gcc / config / avr / avr.h
1 /* Definitions of target machine for GNU compiler,
2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 
4    2008, 2009 Free Software Foundation, Inc.
5    Contributed by Denis Chertykov (denisc@overta.ru)
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3.  If not see
21 <http://www.gnu.org/licenses/>.  */
22
23 /* Names to predefine in the preprocessor for this target machine.  */
24
25 struct base_arch_s {
26   /* Assembler only.  */
27   int asm_only;
28
29   /* Core have 'MUL*' instructions.  */
30   int have_mul;
31
32   /* Core have 'CALL' and 'JMP' instructions.  */
33   int have_jmp_call;
34
35   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
36   int have_movw_lpmx;
37
38   /* Core have 'ELPM' instructions.  */
39   int have_elpm;
40
41   /* Core have 'ELPM Rx,Z' instructions.  */
42   int have_elpmx;
43
44   /* Core have 'EICALL' and 'EIJMP' instructions.  */
45   int have_eijmp_eicall;
46
47   /* Reserved. */
48   int reserved;
49   
50   const char *const macro;
51 };
52
53 extern const struct base_arch_s *avr_current_arch;
54
55 #define TARGET_CPU_CPP_BUILTINS()               \
56   do                                            \
57     {                                           \
58       builtin_define_std ("AVR");               \
59       if (avr_current_arch->macro)              \
60         builtin_define (avr_current_arch->macro);       \
61       if (avr_extra_arch_macro)                 \
62         builtin_define (avr_extra_arch_macro);  \
63       if (avr_current_arch->have_elpm)          \
64         builtin_define ("__AVR_HAVE_RAMPZ__");  \
65       if (avr_current_arch->have_elpm)          \
66         builtin_define ("__AVR_HAVE_ELPM__");   \
67       if (avr_current_arch->have_elpmx)         \
68         builtin_define ("__AVR_HAVE_ELPMX__");  \
69       if (avr_current_arch->have_movw_lpmx)     \
70         {                                       \
71           builtin_define ("__AVR_HAVE_MOVW__"); \
72           builtin_define ("__AVR_HAVE_LPMX__"); \
73         }                                       \
74       if (avr_current_arch->asm_only)           \
75         builtin_define ("__AVR_ASM_ONLY__");    \
76       if (avr_current_arch->have_mul)           \
77         {                                       \
78           builtin_define ("__AVR_ENHANCED__");  \
79           builtin_define ("__AVR_HAVE_MUL__");  \
80         }                                       \
81       if (avr_current_arch->have_jmp_call)      \
82         {                                       \
83           builtin_define ("__AVR_MEGA__");      \
84           builtin_define ("__AVR_HAVE_JMP_CALL__");     \
85         }                                       \
86       if (avr_current_arch->have_eijmp_eicall)  \
87         {                                       \
88           builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
89           builtin_define ("__AVR_3_BYTE_PC__"); \
90         }                                       \
91       else                                      \
92         {                                       \
93           builtin_define ("__AVR_2_BYTE_PC__"); \
94         }                                       \
95       if (TARGET_NO_INTERRUPTS)                 \
96         builtin_define ("__NO_INTERRUPTS__");   \
97     }                                           \
98   while (0)
99
100 extern const char *avr_extra_arch_macro;
101
102 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
103 extern GTY(()) section *progmem_section;
104 #endif
105
106 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
107 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
108 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
109 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
110 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
111 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
112
113 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
114 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
115
116 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
117
118 #define OVERRIDE_OPTIONS avr_override_options ()
119
120 #define CAN_DEBUG_WITHOUT_FP
121
122 #define BITS_BIG_ENDIAN 0
123 #define BYTES_BIG_ENDIAN 0
124 #define WORDS_BIG_ENDIAN 0
125
126 #ifdef IN_LIBGCC2
127 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
128 #define UNITS_PER_WORD 4
129 #else
130 /* Width of a word, in units (bytes).  */
131 #define UNITS_PER_WORD 1
132 #endif
133
134 #define POINTER_SIZE 16
135
136
137 /* Maximum sized of reasonable data type
138    DImode or Dfmode ...  */
139 #define MAX_FIXED_MODE_SIZE 32
140
141 #define PARM_BOUNDARY 8
142
143 #define FUNCTION_BOUNDARY 8
144
145 #define EMPTY_FIELD_BOUNDARY 8
146
147 /* No data type wants to be aligned rounder than this.  */
148 #define BIGGEST_ALIGNMENT 8
149
150 #define MAX_OFILE_ALIGNMENT (32768 * 8)
151
152 #define TARGET_VTABLE_ENTRY_ALIGN 8
153
154 #define STRICT_ALIGNMENT 0
155
156 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
157 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
158 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
159 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
160 #define FLOAT_TYPE_SIZE 32
161 #define DOUBLE_TYPE_SIZE 32
162 #define LONG_DOUBLE_TYPE_SIZE 32
163
164 #define DEFAULT_SIGNED_CHAR 1
165
166 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
167 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
168
169 #define WCHAR_TYPE_SIZE 16
170
171 #define FIRST_PSEUDO_REGISTER 36
172
173 #define FIXED_REGISTERS {\
174   1,1,/* r0 r1 */\
175   0,0,/* r2 r3 */\
176   0,0,/* r4 r5 */\
177   0,0,/* r6 r7 */\
178   0,0,/* r8 r9 */\
179   0,0,/* r10 r11 */\
180   0,0,/* r12 r13 */\
181   0,0,/* r14 r15 */\
182   0,0,/* r16 r17 */\
183   0,0,/* r18 r19 */\
184   0,0,/* r20 r21 */\
185   0,0,/* r22 r23 */\
186   0,0,/* r24 r25 */\
187   0,0,/* r26 r27 */\
188   0,0,/* r28 r29 */\
189   0,0,/* r30 r31 */\
190   1,1,/*  STACK */\
191   1,1 /* arg pointer */  }
192
193 #define CALL_USED_REGISTERS {                   \
194   1,1,/* r0 r1 */                               \
195     0,0,/* r2 r3 */                             \
196     0,0,/* r4 r5 */                             \
197     0,0,/* r6 r7 */                             \
198     0,0,/* r8 r9 */                             \
199     0,0,/* r10 r11 */                           \
200     0,0,/* r12 r13 */                           \
201     0,0,/* r14 r15 */                           \
202     0,0,/* r16 r17 */                           \
203     1,1,/* r18 r19 */                           \
204     1,1,/* r20 r21 */                           \
205     1,1,/* r22 r23 */                           \
206     1,1,/* r24 r25 */                           \
207     1,1,/* r26 r27 */                           \
208     0,0,/* r28 r29 */                           \
209     1,1,/* r30 r31 */                           \
210     1,1,/*  STACK */                            \
211     1,1 /* arg pointer */  }
212
213 #define REG_ALLOC_ORDER {                       \
214     24,25,                                      \
215     18,19,                                      \
216     20,21,                                      \
217     22,23,                                      \
218     30,31,                                      \
219     26,27,                                      \
220     28,29,                                      \
221     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
222     0,1,                                        \
223     32,33,34,35                                 \
224     }
225
226 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
227
228
229 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
230
231 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
232
233 #define MODES_TIEABLE_P(MODE1, MODE2) 1
234
235 enum reg_class {
236   NO_REGS,
237   R0_REG,                       /* r0 */
238   POINTER_X_REGS,               /* r26 - r27 */
239   POINTER_Y_REGS,               /* r28 - r29 */
240   POINTER_Z_REGS,               /* r30 - r31 */
241   STACK_REG,                    /* STACK */
242   BASE_POINTER_REGS,            /* r28 - r31 */
243   POINTER_REGS,                 /* r26 - r31 */
244   ADDW_REGS,                    /* r24 - r31 */
245   SIMPLE_LD_REGS,               /* r16 - r23 */
246   LD_REGS,                      /* r16 - r31 */
247   NO_LD_REGS,                   /* r0 - r15 */
248   GENERAL_REGS,                 /* r0 - r31 */
249   ALL_REGS, LIM_REG_CLASSES
250 };
251
252
253 #define N_REG_CLASSES (int)LIM_REG_CLASSES
254
255 #define REG_CLASS_NAMES {                                       \
256                  "NO_REGS",                                     \
257                    "R0_REG",    /* r0 */                        \
258                    "POINTER_X_REGS", /* r26 - r27 */            \
259                    "POINTER_Y_REGS", /* r28 - r29 */            \
260                    "POINTER_Z_REGS", /* r30 - r31 */            \
261                    "STACK_REG", /* STACK */                     \
262                    "BASE_POINTER_REGS", /* r28 - r31 */         \
263                    "POINTER_REGS", /* r26 - r31 */              \
264                    "ADDW_REGS", /* r24 - r31 */                 \
265                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
266                    "LD_REGS",   /* r16 - r31 */                 \
267                    "NO_LD_REGS", /* r0 - r15 */                 \
268                    "GENERAL_REGS", /* r0 - r31 */               \
269                    "ALL_REGS" }
270
271 #define REG_CLASS_CONTENTS {                                            \
272   {0x00000000,0x00000000},      /* NO_REGS */                           \
273   {0x00000001,0x00000000},      /* R0_REG */                            \
274   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
275   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
276   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
277   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
278   {(3 << REG_Y) | (3 << REG_Z),                                         \
279      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
280   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
281      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
282   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
283      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
284   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
285   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
286      0x00000000},       /* LD_REGS, r16 - r31 */                        \
287   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
288   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
289   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
290 }
291
292 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
293
294 /* The following macro defines cover classes for Integrated Register
295    Allocator.  Cover classes is a set of non-intersected register
296    classes covering all hard registers used for register allocation
297    purpose.  Any move between two registers of a cover class should be
298    cheaper than load or store of the registers.  The macro value is
299    array of register classes with LIM_REG_CLASSES used as the end
300    marker.  */
301
302 #define IRA_COVER_CLASSES               \
303 {                                       \
304   GENERAL_REGS, LIM_REG_CLASSES         \
305 }
306
307 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
308
309 #define INDEX_REG_CLASS NO_REGS
310
311 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER            \
312                                  && ((r) == REG_X                       \
313                                      || (r) == REG_Y                    \
314                                      || (r) == REG_Z                    \
315                                      || (r) == ARG_POINTER_REGNUM))     \
316                                 || (reg_renumber                        \
317                                     && (reg_renumber[r] == REG_X        \
318                                         || reg_renumber[r] == REG_Y     \
319                                         || reg_renumber[r] == REG_Z     \
320                                         || (reg_renumber[r]             \
321                                             == ARG_POINTER_REGNUM))))
322
323 #define REGNO_OK_FOR_INDEX_P(NUM) 0
324
325 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
326
327 #define SMALL_REGISTER_CLASSES 1
328
329 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
330
331 #define CLASS_MAX_NREGS(CLASS, MODE)   class_max_nregs (CLASS, MODE)
332
333 #define STACK_PUSH_CODE POST_DEC
334
335 #define STACK_GROWS_DOWNWARD
336
337 #define STARTING_FRAME_OFFSET 1
338
339 #define STACK_POINTER_OFFSET 1
340
341 #define FIRST_PARM_OFFSET(FUNDECL) 0
342
343 #define STACK_BOUNDARY 8
344
345 #define STACK_POINTER_REGNUM 32
346
347 #define FRAME_POINTER_REGNUM REG_Y
348
349 #define ARG_POINTER_REGNUM 34
350
351 #define STATIC_CHAIN_REGNUM 2
352
353 #define FRAME_POINTER_REQUIRED avr_frame_pointer_required_p()
354
355 /* Offset from the frame pointer register value to the top of the stack.  */
356 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
357
358 #define ELIMINABLE_REGS {                                       \
359       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
360         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
361        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
362
363 #define CAN_ELIMINATE(FROM, TO) avr_can_eliminate (FROM, TO)
364
365 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
366   OFFSET = avr_initial_elimination_offset (FROM, TO)
367
368 #define RETURN_ADDR_RTX(count, x) \
369   gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
370
371 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken 
372    for POST_DEC targets (PR27386).  */
373 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
374
375 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
376
377 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
378
379 typedef struct avr_args {
380   int nregs;                    /* # registers available for passing */
381   int regno;                    /* next available register number */
382 } CUMULATIVE_ARGS;
383
384 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
385   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
386
387 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)    \
388   (function_arg_advance (&CUM, MODE, TYPE, NAMED))
389
390 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
391
392 extern int avr_reg_order[];
393
394 #define RET_REGISTER avr_ret_register ()
395
396 #define LIBCALL_VALUE(MODE)  avr_libcall_value (MODE)
397
398 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
399
400 #define DEFAULT_PCC_STRUCT_RETURN 0
401
402 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
403
404 #define HAVE_POST_INCREMENT 1
405 #define HAVE_PRE_DECREMENT 1
406
407 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
408
409 #define MAX_REGS_PER_ADDRESS 1
410
411 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
412   (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
413
414 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
415
416 #ifdef REG_OK_STRICT
417 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
418 #else
419 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
420 #endif
421
422 #define REG_OK_FOR_INDEX_P(X) 0
423
424 #define XEXP_(X,Y) (X)
425
426 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
427    is no worse than normal base pointers R28/29 and R30/31. For example:
428    If base offset is greater than 63 bytes or for R++ or --R addressing.  */
429    
430 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)    \
431 do {                                                                        \
432   if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC))     \
433     {                                                                       \
434       push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0),        \
435                    POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0,          \
436                    OPNUM, RELOAD_OTHER);                                    \
437       goto WIN;                                                             \
438     }                                                                       \
439   if (GET_CODE (X) == PLUS                                                  \
440       && REG_P (XEXP (X, 0))                                                \
441       && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0                       \
442       && GET_CODE (XEXP (X, 1)) == CONST_INT                                \
443       && INTVAL (XEXP (X, 1)) >= 1)                                         \
444     {                                                                       \
445       int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE));        \
446       if (fit)                                                              \
447         {                                                                   \
448           if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0)                  \
449             {                                                               \
450               int regno = REGNO (XEXP (X, 0));                              \
451               rtx mem = make_memloc (X, regno);                             \
452               push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL,         \
453                            POINTER_REGS, Pmode, VOIDmode, 0, 0,             \
454                            1, ADDR_TYPE (TYPE));                            \
455               push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL,               \
456                            BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
457                            OPNUM, TYPE);                                    \
458               goto WIN;                                                     \
459             }                                                               \
460         }                                                                   \
461       else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
462         {                                                                   \
463           push_reload (X, NULL_RTX, &X, NULL,                               \
464                        POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0,          \
465                        OPNUM, TYPE);                                        \
466           goto WIN;                                                         \
467         }                                                                   \
468     }                                                                       \
469 } while(0)
470
471 #define LEGITIMATE_CONSTANT_P(X) 1
472
473 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
474                                             : (TO) == STACK_REG ? 12 \
475                                             : 2)
476
477 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 :   \
478                                          (MODE)==HImode ? 4 :   \
479                                          (MODE)==SImode ? 8 :   \
480                                          (MODE)==SFmode ? 8 : 16)
481
482 #define BRANCH_COST(speed_p, predictable_p) 0
483
484 #define SLOW_BYTE_ACCESS 0
485
486 #define NO_FUNCTION_CSE
487
488 #define TEXT_SECTION_ASM_OP "\t.text"
489
490 #define DATA_SECTION_ASM_OP "\t.data"
491
492 #define BSS_SECTION_ASM_OP "\t.section .bss"
493
494 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
495    There are no shared libraries on this target, and these sections are
496    placed in the read-only program memory, so they are not writable.  */
497
498 #undef CTORS_SECTION_ASM_OP
499 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
500
501 #undef DTORS_SECTION_ASM_OP
502 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
503
504 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
505
506 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
507
508 #define SUPPORTS_INIT_PRIORITY 0
509
510 #define JUMP_TABLES_IN_TEXT_SECTION 0
511
512 #define ASM_COMMENT_START " ; "
513
514 #define ASM_APP_ON "/* #APP */\n"
515
516 #define ASM_APP_OFF "/* #NOAPP */\n"
517
518 /* Switch into a generic section.  */
519 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
520 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
521
522 #define ASM_OUTPUT_ASCII(FILE, P, SIZE)  gas_output_ascii (FILE,P,SIZE)
523
524 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
525
526 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)                     \
527 do {                                                                       \
528      fputs ("\t.comm ", (STREAM));                                         \
529      assemble_name ((STREAM), (NAME));                                     \
530      fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE));                \
531 } while (0)
532
533 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED)                 \
534   asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
535
536 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)                   \
537 do {                                                                    \
538      fputs ("\t.lcomm ", (STREAM));                                     \
539      assemble_name ((STREAM), (NAME));                                  \
540      fprintf ((STREAM), ",%d\n", (int)(SIZE));                          \
541 } while (0)
542
543 #undef TYPE_ASM_OP
544 #undef SIZE_ASM_OP
545 #undef WEAK_ASM_OP
546 #define TYPE_ASM_OP     "\t.type\t"
547 #define SIZE_ASM_OP     "\t.size\t"
548 #define WEAK_ASM_OP     "\t.weak\t"
549 /* Define the strings used for the special svr4 .type and .size directives.
550    These strings generally do not vary from one system running svr4 to
551    another, but if a given system (e.g. m88k running svr) needs to use
552    different pseudo-op names for these, they may be overridden in the
553    file which includes this one.  */
554
555
556 #undef TYPE_OPERAND_FMT
557 #define TYPE_OPERAND_FMT        "@%s"
558 /* The following macro defines the format used to output the second
559    operand of the .type assembler directive.  Different svr4 assemblers
560    expect various different forms for this operand.  The one given here
561    is just a default.  You may need to override it in your machine-
562    specific tm.h file (depending upon the particulars of your assembler).  */
563
564 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)             \
565 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
566
567 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)                    \
568   do {                                                                  \
569     if (!flag_inhibit_size_directive)                                   \
570       ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME);                           \
571   } while (0)
572
573 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)                       \
574 do {                                                                    \
575   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
576   size_directive_output = 0;                                            \
577   if (!flag_inhibit_size_directive && DECL_SIZE (DECL))                 \
578     {                                                                   \
579       size_directive_output = 1;                                        \
580       ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME,                            \
581                                  int_size_in_bytes (TREE_TYPE (DECL))); \
582     }                                                                   \
583   ASM_OUTPUT_LABEL(FILE, NAME);                                         \
584 } while (0)
585
586 #undef ASM_FINISH_DECLARE_OBJECT
587 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)         \
588 do {                                                                     \
589      const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);             \
590      HOST_WIDE_INT size;                                                 \
591      if (!flag_inhibit_size_directive && DECL_SIZE (DECL)                \
592          && ! AT_END && TOP_LEVEL                                        \
593          && DECL_INITIAL (DECL) == error_mark_node                       \
594          && !size_directive_output)                                      \
595        {                                                                 \
596          size_directive_output = 1;                                      \
597          size = int_size_in_bytes (TREE_TYPE (DECL));                    \
598          ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size);                   \
599        }                                                                 \
600    } while (0)
601
602
603 #define ESCAPES \
604 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
605 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
606 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
607 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
608 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
609 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
610 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
611 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
612 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
613    ASM_OUTPUT_LIMITED_STRING macros.  Each byte in the table
614    corresponds to a particular byte value [0..255].  For any
615    given byte value, if the value in the corresponding table
616    position is zero, the given character can be output directly.
617    If the table value is 1, the byte must be output as a \ooo
618    octal escape.  If the tables value is anything else, then the
619    byte value should be output as a \ followed by the value
620    in the table.  Note that we can use standard UN*X escape
621    sequences for many control characters, but we don't use
622    \a to represent BEL because some svr4 assemblers (e.g. on
623    the i386) don't know about that.  Also, we don't use \v
624    since some versions of gas, such as 2.2 did not accept it.  */
625
626 #define STRING_LIMIT    ((unsigned) 64)
627 #define STRING_ASM_OP   "\t.string\t"
628 /* Some svr4 assemblers have a limit on the number of characters which
629    can appear in the operand of a .string directive.  If your assembler
630    has such a limitation, you should define STRING_LIMIT to reflect that
631    limit.  Note that at least some svr4 assemblers have a limit on the
632    actual number of bytes in the double-quoted string, and that they
633    count each character in an escape sequence as one byte.  Thus, an
634    escape sequence like \377 would count as four bytes.
635
636    If your target assembler doesn't support the .string directive, you
637    should define this to zero.  */
638
639 /* Globalizing directive for a label.  */
640 #define GLOBAL_ASM_OP ".global\t"
641
642 #define SET_ASM_OP      "\t.set\t"
643
644 #define ASM_WEAKEN_LABEL(FILE, NAME)    \
645   do                                    \
646     {                                   \
647       fputs ("\t.weak\t", (FILE));      \
648       assemble_name ((FILE), (NAME));   \
649       fputc ('\n', (FILE));             \
650     }                                   \
651   while (0)
652
653 #define SUPPORTS_WEAK 1
654
655 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)        \
656 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
657
658 #define HAS_INIT_SECTION 1
659
660 #define REGISTER_NAMES {                                \
661   "r0","r1","r2","r3","r4","r5","r6","r7",              \
662     "r8","r9","r10","r11","r12","r13","r14","r15",      \
663     "r16","r17","r18","r19","r20","r21","r22","r23",    \
664     "r24","r25","r26","r27","r28","r29","r30","r31",    \
665     "__SP_L__","__SP_H__","argL","argH"}
666
667 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
668
669 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
670
671 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
672
673 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
674
675 #define USER_LABEL_PREFIX ""
676
677 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
678
679 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
680 {                                               \
681   gcc_assert (REGNO < 32);                      \
682   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
683 }
684
685 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
686 {                                               \
687   gcc_assert (REGNO < 32);                      \
688   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
689 }
690
691 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
692   avr_output_addr_vec_elt(STREAM, VALUE)
693
694 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
695   (switch_to_section (progmem_section), \
696    (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
697
698 #define ASM_OUTPUT_SKIP(STREAM, N)              \
699 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
700
701 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
702   do {                                                  \
703       if ((POWER) > 1)                                  \
704           fprintf (STREAM, "\t.p2align\t%d\n", POWER);  \
705   } while (0)
706
707 #define CASE_VECTOR_MODE HImode
708
709 #undef WORD_REGISTER_OPERATIONS
710
711 #define MOVE_MAX 4
712
713 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
714
715 #define Pmode HImode
716
717 #define FUNCTION_MODE HImode
718
719 #define DOLLARS_IN_IDENTIFIERS 0
720
721 #define NO_DOLLAR_IN_LABEL 1
722
723 #define TRAMPOLINE_TEMPLATE(FILE) \
724   internal_error ("trampolines not supported")
725
726 #define TRAMPOLINE_SIZE 4
727
728 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                             \
729 {                                                                             \
730   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT);    \
731   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
732 }
733 /* Store in cc_status the expressions
734    that the condition codes will describe
735    after execution of an instruction whose pattern is EXP.
736    Do not alter them if the instruction would not alter the cc's.  */
737
738 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
739
740 /* The add insns don't set overflow in a usable way.  */
741 #define CC_OVERFLOW_UNUSABLE 01000
742 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
743    Z bit is all we need when doing unsigned comparisons on the result of
744    these insns (since they're always with 0).  However, conditions.h has
745    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
746    understandable.  */
747 #define CC_NO_CARRY CC_NO_OVERFLOW
748
749
750 /* Output assembler code to FILE to increment profiler label # LABELNO
751    for profiling a function entry.  */
752
753 #define FUNCTION_PROFILER(FILE, LABELNO)  \
754   fprintf (FILE, "/* profiler %d */", (LABELNO))
755
756 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
757                                           adjust_insn_length (INSN, LENGTH))
758
759 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
760
761 #define CC1_SPEC "%{profile:-p}"
762
763 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
764     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
765     %{!fexceptions:-fno-exceptions}"
766 /* A C string constant that tells the GCC driver program options to
767    pass to `cc1plus'.  */
768
769 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
770 mmcu=*:-mmcu=%*}"
771
772 #define LINK_SPEC "\
773 %{mrelax:--relax\
774          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
775                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
776                              %{mmcu=atmega32*|\
777                                mmcu=at90can32*:--pmem-wrap-around=32k}\
778                              %{mmcu=atmega64*|\
779                                mmcu=at90can64*|\
780                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
781 %{!mmcu*: -m avr2}\
782 %{mmcu=at90s1200|\
783   mmcu=attiny11|\
784   mmcu=attiny12|\
785   mmcu=attiny15|\
786   mmcu=attiny28: -m avr1}\
787 %{mmcu=attiny22|\
788   mmcu=attiny26|\
789   mmcu=at90s2*|\
790   mmcu=at90s4*|\
791   mmcu=at90s8*|\
792   mmcu=at90c8*|\
793   mmcu=at86rf401|\
794   mmcu=ata6289|\
795   mmcu=attiny13*|\
796   mmcu=attiny2313|\
797   mmcu=attiny24|\
798   mmcu=attiny25|\
799   mmcu=attiny261|\
800   mmcu=attiny4*|\
801   mmcu=attiny8*: -m avr2}\
802 %{mmcu=atmega103|\
803   mmcu=at43*|\
804   mmcu=at76*|\
805   mmcu=at90usb82|\
806   mmcu=at90usb162|\
807   mmcu=attiny16*|\
808   mmcu=attiny32*: -m avr3}\
809 %{mmcu=atmega8*|\
810   mmcu=atmega4*|\
811   mmcu=at90pwm1|\
812   mmcu=at90pwm2|\
813   mmcu=at90pwm2b|\
814   mmcu=at90pwm3|\
815   mmcu=at90pwm3b|\
816   mmcu=at90pwm81: -m avr4}\
817 %{mmcu=atmega16*|\
818   mmcu=atmega32*|\
819   mmcu=atmega406|\
820   mmcu=atmega64*|\
821   mmcu=atmega128*|\
822   mmcu=at90can*|\
823   mmcu=at90pwm216|\
824   mmcu=at90pwm316|\
825   mmcu=at90scr100|\
826   mmcu=at90usb64*|\
827   mmcu=at90usb128*|\
828   mmcu=at94k|\
829   mmcu=m3000*|\
830   mmcu=m3001*: -m avr5}\
831 %{mmcu=atmega256*:-m avr6}\
832 %{mmcu=atmega324*|\
833   mmcu=atmega325*|\
834   mmcu=atmega328p|\
835   mmcu=atmega329*|\
836   mmcu=atmega406|\
837   mmcu=atmega48*|\
838   mmcu=atmega88*|\
839   mmcu=atmega64|\
840   mmcu=atmega644*|\
841   mmcu=atmega645*|\
842   mmcu=atmega649*|\
843   mmcu=atmega128|\
844   mmcu=atmega1284p|\
845   mmcu=atmega162|\
846   mmcu=atmega164*|\
847   mmcu=atmega165*|\
848   mmcu=atmega168*|\
849   mmcu=atmega169*|\
850   mmcu=atmega4hv*|\
851   mmcu=atmega8hv*|\
852   mmcu=atmega16hv*|\
853   mmcu=atmega32hv*|\
854   mmcu=attiny48|\
855   mmcu=attiny88|\
856   mmcu=attiny87|\
857   mmcu=attiny167|\
858   mmcu=attiny327|\
859   mmcu=at90can*|\
860   mmcu=at90pwm*|\
861   mmcu=atmega8c1|\
862   mmcu=atmega16c1|\
863   mmcu=atmega32c1|\
864   mmcu=atmega64c1|\
865   mmcu=atmega8m1|\
866   mmcu=atmega16m1|\
867   mmcu=atmega32m1|\
868   mmcu=atmega64m1|\
869   mmcu=atmega16u4|\
870   mmcu=atmega32u*|\
871   mmcu=at90scr100|\
872   mmcu=ata6289|\
873   mmcu=at90usb*: -Tdata 0x800100}\
874 %{mmcu=atmega640|\
875   mmcu=atmega1280|\
876   mmcu=atmega1281|\
877   mmcu=atmega256*|\
878   mmcu=atmega128rfa1: -Tdata 0x800200}\
879 %{mmcu=m3000*|\
880   mmcu=m3001*: -Tdata 0x801000}"
881
882 #define LIB_SPEC \
883   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
884
885 #define LIBSTDCXX "-lgcc"
886 /* No libstdc++ for now.  Empty string doesn't work.  */
887
888 #define LIBGCC_SPEC \
889   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
890
891 #define STARTFILE_SPEC "%(crt_binutils)"
892
893 #define ENDFILE_SPEC ""
894
895 #define CRT_BINUTILS_SPECS "\
896 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
897 %{mmcu=attiny11:crttn11.o%s} \
898 %{mmcu=attiny12:crttn12.o%s} \
899 %{mmcu=attiny15:crttn15.o%s} \
900 %{mmcu=attiny28:crttn28.o%s} \
901 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
902 %{mmcu=at90s2313:crts2313.o%s} \
903 %{mmcu=at90s2323:crts2323.o%s} \
904 %{mmcu=at90s2333:crts2333.o%s} \
905 %{mmcu=at90s2343:crts2343.o%s} \
906 %{mmcu=attiny22:crttn22.o%s} \
907 %{mmcu=attiny26:crttn26.o%s} \
908 %{mmcu=at90s4433:crts4433.o%s} \
909 %{mmcu=at90s4414:crts4414.o%s} \
910 %{mmcu=at90s4434:crts4434.o%s} \
911 %{mmcu=at90c8534:crtc8534.o%s} \
912 %{mmcu=at90s8535:crts8535.o%s} \
913 %{mmcu=at86rf401:crt86401.o%s} \
914 %{mmcu=attiny13:crttn13.o%s} \
915 %{mmcu=attiny13a:crttn13a.o%s} \
916 %{mmcu=attiny2313|mmcu=avr25:crttn2313.o%s} \
917 %{mmcu=attiny24:crttn24.o%s} \
918 %{mmcu=attiny44:crttn44.o%s} \
919 %{mmcu=attiny84:crttn84.o%s} \
920 %{mmcu=attiny25:crttn25.o%s} \
921 %{mmcu=attiny45:crttn45.o%s} \
922 %{mmcu=attiny85:crttn85.o%s} \
923 %{mmcu=attiny261:crttn261.o%s} \
924 %{mmcu=attiny461:crttn461.o%s} \
925 %{mmcu=attiny861:crttn861.o%s} \
926 %{mmcu=attiny43u:crttn43u.o%s} \
927 %{mmcu=attiny87:crttn87.o%s} \
928 %{mmcu=attiny48:crttn48.o%s} \
929 %{mmcu=attiny88:crttn88.o%s} \
930 %{mmcu=ata6289:crta6289.o%s} \
931 %{mmcu=at43usb355|mmcu=avr3:crt43355.o%s} \
932 %{mmcu=at76c711:crt76711.o%s} \
933 %{mmcu=atmega103|mmcu=avr31:crtm103.o%s} \
934 %{mmcu=at43usb320:crt43320.o%s} \
935 %{mmcu=at90usb162|mmcu=avr35:crtusb162.o%s} \
936 %{mmcu=at90usb82:crtusb82.o%s} \
937 %{mmcu=attiny167:crttn167.o%s} \
938 %{mmcu=attiny327:crttn327.o%s} \
939 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
940 %{mmcu=atmega48:crtm48.o%s} \
941 %{mmcu=atmega48p:crtm48p.o%s} \
942 %{mmcu=atmega88:crtm88.o%s} \
943 %{mmcu=atmega88p:crtm88p.o%s} \
944 %{mmcu=atmega8515:crtm8515.o%s} \
945 %{mmcu=atmega8535:crtm8535.o%s} \
946 %{mmcu=atmega8c1:crtm8c1.o%s} \
947 %{mmcu=atmega8m1:crtm8m1.o%s} \
948 %{mmcu=at90pwm1:crt90pwm1.o%s} \
949 %{mmcu=at90pwm2:crt90pwm2.o%s} \
950 %{mmcu=at90pwm2b:crt90pwm2b.o%s} \
951 %{mmcu=at90pwm3:crt90pwm3.o%s} \
952 %{mmcu=at90pwm3b:crt90pwm3b.o%s} \
953 %{mmcu=at90pwm81:crt90pwm81.o%s} \
954 %{mmcu=atmega16:crtm16.o%s} \
955 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
956 %{mmcu=atmega162:crtm162.o%s} \
957 %{mmcu=atmega163:crtm163.o%s} \
958 %{mmcu=atmega164p:crtm164p.o%s} \
959 %{mmcu=atmega165:crtm165.o%s} \
960 %{mmcu=atmega165p:crtm165p.o%s} \
961 %{mmcu=atmega168:crtm168.o%s} \
962 %{mmcu=atmega168p:crtm168p.o%s} \
963 %{mmcu=atmega169:crtm169.o%s} \
964 %{mmcu=atmega169p:crtm169p.o%s} \
965 %{mmcu=atmega32:crtm32.o%s} \
966 %{mmcu=atmega323:crtm323.o%s} \
967 %{mmcu=atmega324p:crtm324p.o%s} \
968 %{mmcu=atmega325:crtm325.o%s} \
969 %{mmcu=atmega325p:crtm325p.o%s} \
970 %{mmcu=atmega3250:crtm3250.o%s} \
971 %{mmcu=atmega3250p:crtm3250p.o%s} \
972 %{mmcu=atmega328p:crtm328p.o%s} \
973 %{mmcu=atmega329:crtm329.o%s} \
974 %{mmcu=atmega329p:crtm329p.o%s} \
975 %{mmcu=atmega3290:crtm3290.o%s} \
976 %{mmcu=atmega3290p:crtm3290p.o%s} \
977 %{mmcu=atmega406:crtm406.o%s} \
978 %{mmcu=atmega64:crtm64.o%s} \
979 %{mmcu=atmega640:crtm640.o%s} \
980 %{mmcu=atmega644:crtm644.o%s} \
981 %{mmcu=atmega644p:crtm644p.o%s} \
982 %{mmcu=atmega645:crtm645.o%s} \
983 %{mmcu=atmega6450:crtm6450.o%s} \
984 %{mmcu=atmega649:crtm649.o%s} \
985 %{mmcu=atmega6490:crtm6490.o%s} \
986 %{mmcu=atmega8hva:crtm8hva.o%s} \
987 %{mmcu=atmega16hva:crtm16hva.o%s} \
988 %{mmcu=atmega16hvb:crtm16hvb.o%s} \
989 %{mmcu=atmega32hvb:crtm32hvb.o%s} \
990 %{mmcu=atmega4hvd:crtm4hvd.o%s} \
991 %{mmcu=atmega8hvd:crtm8hvd.o%s} \
992 %{mmcu=at90can32:crtcan32.o%s} \
993 %{mmcu=at90can64:crtcan64.o%s} \
994 %{mmcu=at90pwm216:crt90pwm216.o%s} \
995 %{mmcu=at90pwm316:crt90pwm316.o%s} \
996 %{mmcu=atmega16c1:crtm16c1.o%s} \
997 %{mmcu=atmega32c1:crtm32c1.o%s} \
998 %{mmcu=atmega64c1:crtm64c1.o%s} \
999 %{mmcu=atmega16m1:crtm16m1.o%s} \
1000 %{mmcu=atmega32m1:crtm32m1.o%s} \
1001 %{mmcu=atmega64m1:crtm64m1.o%s} \
1002 %{mmcu=atmega16u4:crtm16u4.o%s} \
1003 %{mmcu=atmega32u4:crtm32u4.o%s} \
1004 %{mmcu=atmega32u6:crtm32u6.o%s} \
1005 %{mmcu=at90scr100:crt90scr100.o%s} \
1006 %{mmcu=at90usb646:crtusb646.o%s} \
1007 %{mmcu=at90usb647:crtusb647.o%s} \
1008 %{mmcu=at94k:crtat94k.o%s} \
1009 %{mmcu=atmega128|mmcu=avr51:crtm128.o%s} \
1010 %{mmcu=atmega1280:crtm1280.o%s} \
1011 %{mmcu=atmega1281:crtm1281.o%s} \
1012 %{mmcu=atmega1284p:crtm1284p.o%s} \
1013 %{mmcu=at90can128:crtcan128.o%s} \
1014 %{mmcu=atmega128rfa1:crtm128rfa1.o%s} \
1015 %{mmcu=at90usb1286:crtusb1286.o%s} \
1016 %{mmcu=at90usb1287:crtusb1287.o%s} \
1017 %{mmcu=m3000f:crtm3000f.o%s} \
1018 %{mmcu=m3000s:crtm3000s.o%s} \
1019 %{mmcu=m3001b:crtm3001b.o%s} \
1020 %{mmcu=atmega2560|mmcu=avr6:crtm2560.o%s} \
1021 %{mmcu=atmega2561:crtm2561.o%s}"
1022
1023 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
1024
1025 /* This is the default without any -mmcu=* option (AT90S*).  */
1026 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
1027
1028 /* This is undefined macro for collect2 disabling */
1029 #define LINKER_NAME "ld"
1030
1031 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
1032   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
1033
1034 /* Note that the other files fail to use these
1035    in some of the places where they should.  */
1036
1037 #if defined(__STDC__) || defined(ALMOST_STDC)
1038 #define AS2(a,b,c) #a " " #b "," #c
1039 #define AS2C(b,c) " " #b "," #c
1040 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
1041 #define AS1(a,b) #a " " #b
1042 #else
1043 #define AS1(a,b) "a     b"
1044 #define AS2(a,b,c) "a   b,c"
1045 #define AS2C(b,c) " b,c"
1046 #define AS3(a,b,c,d) "a b,c,d"
1047 #endif
1048 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
1049 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
1050 #define CR_TAB "\n\t"
1051
1052 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1053
1054 #define DWARF2_DEBUGGING_INFO 1
1055
1056 #define DWARF2_ADDR_SIZE 4
1057
1058 #define OBJECT_FORMAT_ELF
1059
1060 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
1061   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
1062
1063 /* A C structure for machine-specific, per-function data.
1064    This is added to the cfun structure.  */
1065 struct GTY(()) machine_function
1066 {
1067   /* 'true' - if the current function is a leaf function.  */
1068   int is_leaf;
1069
1070   /* 'true' - if current function is a naked function.  */
1071   int is_naked;
1072
1073   /* 'true' - if current function is an interrupt function 
1074      as specified by the "interrupt" attribute.  */
1075   int is_interrupt;
1076
1077   /* 'true' - if current function is a signal function 
1078      as specified by the "signal" attribute.  */
1079   int is_signal;
1080   
1081   /* 'true' - if current function is a 'task' function 
1082      as specified by the "OS_task" attribute.  */
1083   int is_OS_task;
1084
1085   /* 'true' - if current function is a 'main' function 
1086      as specified by the "OS_main" attribute.  */
1087   int is_OS_main;
1088 };