1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
4 2008, 2009 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (chertykov@gmail.com)
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 /* Names to predefine in the preprocessor for this target machine. */
29 /* Core have 'MUL*' instructions. */
32 /* Core have 'CALL' and 'JMP' instructions. */
35 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
38 /* Core have 'ELPM' instructions. */
41 /* Core have 'ELPM Rx,Z' instructions. */
44 /* Core have 'EICALL' and 'EIJMP' instructions. */
45 int have_eijmp_eicall;
47 /* Reserved for xmega architecture. */
50 /* Reserved for xmega architecture. */
53 /* Default start of data section address for architecture. */
54 int default_data_section_start;
56 const char *const macro;
58 /* Architecture name. */
59 const char *const arch_name;
62 /* These names are used as the index into the avr_arch_types[] table
82 const char *const name;
84 /* Index in avr_arch_types[]. */
87 /* Must lie outside user's namespace. NULL == no macro. */
88 const char *const macro;
90 /* Stack pointer have 8 bits width. */
93 /* Start of data section. */
94 int data_section_start;
96 /* Name of device library. */
97 const char *const library_name;
100 extern const struct base_arch_s *avr_current_arch;
101 extern const struct mcu_type_s *avr_current_device;
102 extern const struct mcu_type_s avr_mcu_types[];
103 extern const struct base_arch_s avr_arch_types[];
105 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
107 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
108 extern GTY(()) section *progmem_section;
111 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
112 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
113 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
114 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
115 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
116 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
117 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
119 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
120 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
122 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
124 #define OVERRIDE_OPTIONS avr_override_options ()
126 #define CAN_DEBUG_WITHOUT_FP
128 #define BITS_BIG_ENDIAN 0
129 #define BYTES_BIG_ENDIAN 0
130 #define WORDS_BIG_ENDIAN 0
133 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
134 #define UNITS_PER_WORD 4
136 /* Width of a word, in units (bytes). */
137 #define UNITS_PER_WORD 1
140 #define POINTER_SIZE 16
143 /* Maximum sized of reasonable data type
144 DImode or Dfmode ... */
145 #define MAX_FIXED_MODE_SIZE 32
147 #define PARM_BOUNDARY 8
149 #define FUNCTION_BOUNDARY 8
151 #define EMPTY_FIELD_BOUNDARY 8
153 /* No data type wants to be aligned rounder than this. */
154 #define BIGGEST_ALIGNMENT 8
156 #define MAX_OFILE_ALIGNMENT (32768 * 8)
158 #define TARGET_VTABLE_ENTRY_ALIGN 8
160 #define STRICT_ALIGNMENT 0
162 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
163 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
164 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
165 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
166 #define FLOAT_TYPE_SIZE 32
167 #define DOUBLE_TYPE_SIZE 32
168 #define LONG_DOUBLE_TYPE_SIZE 32
170 #define DEFAULT_SIGNED_CHAR 1
172 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
173 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
175 #define WCHAR_TYPE_SIZE 16
177 #define FIRST_PSEUDO_REGISTER 36
179 #define FIXED_REGISTERS {\
197 1,1 /* arg pointer */ }
199 #define CALL_USED_REGISTERS { \
217 1,1 /* arg pointer */ }
219 #define REG_ALLOC_ORDER { \
227 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
232 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
235 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
237 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
239 #define MODES_TIEABLE_P(MODE1, MODE2) 1
244 POINTER_X_REGS, /* r26 - r27 */
245 POINTER_Y_REGS, /* r28 - r29 */
246 POINTER_Z_REGS, /* r30 - r31 */
247 STACK_REG, /* STACK */
248 BASE_POINTER_REGS, /* r28 - r31 */
249 POINTER_REGS, /* r26 - r31 */
250 ADDW_REGS, /* r24 - r31 */
251 SIMPLE_LD_REGS, /* r16 - r23 */
252 LD_REGS, /* r16 - r31 */
253 NO_LD_REGS, /* r0 - r15 */
254 GENERAL_REGS, /* r0 - r31 */
255 ALL_REGS, LIM_REG_CLASSES
259 #define N_REG_CLASSES (int)LIM_REG_CLASSES
261 #define REG_CLASS_NAMES { \
264 "POINTER_X_REGS", /* r26 - r27 */ \
265 "POINTER_Y_REGS", /* r28 - r29 */ \
266 "POINTER_Z_REGS", /* r30 - r31 */ \
267 "STACK_REG", /* STACK */ \
268 "BASE_POINTER_REGS", /* r28 - r31 */ \
269 "POINTER_REGS", /* r26 - r31 */ \
270 "ADDW_REGS", /* r24 - r31 */ \
271 "SIMPLE_LD_REGS", /* r16 - r23 */ \
272 "LD_REGS", /* r16 - r31 */ \
273 "NO_LD_REGS", /* r0 - r15 */ \
274 "GENERAL_REGS", /* r0 - r31 */ \
277 #define REG_CLASS_CONTENTS { \
278 {0x00000000,0x00000000}, /* NO_REGS */ \
279 {0x00000001,0x00000000}, /* R0_REG */ \
280 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
281 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
282 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
283 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
284 {(3 << REG_Y) | (3 << REG_Z), \
285 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
286 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
287 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
288 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
289 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
290 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
291 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
292 0x00000000}, /* LD_REGS, r16 - r31 */ \
293 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
294 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
295 {0xffffffff,0x00000003} /* ALL_REGS */ \
298 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
300 /* The following macro defines cover classes for Integrated Register
301 Allocator. Cover classes is a set of non-intersected register
302 classes covering all hard registers used for register allocation
303 purpose. Any move between two registers of a cover class should be
304 cheaper than load or store of the registers. The macro value is
305 array of register classes with LIM_REG_CLASSES used as the end
308 #define IRA_COVER_CLASSES \
310 GENERAL_REGS, LIM_REG_CLASSES \
313 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
315 #define INDEX_REG_CLASS NO_REGS
317 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
321 || (r) == ARG_POINTER_REGNUM)) \
323 && (reg_renumber[r] == REG_X \
324 || reg_renumber[r] == REG_Y \
325 || reg_renumber[r] == REG_Z \
326 || (reg_renumber[r] \
327 == ARG_POINTER_REGNUM))))
329 #define REGNO_OK_FOR_INDEX_P(NUM) 0
331 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
333 #define SMALL_REGISTER_CLASSES 1
335 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
337 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
339 #define STACK_PUSH_CODE POST_DEC
341 #define STACK_GROWS_DOWNWARD
343 #define STARTING_FRAME_OFFSET 1
345 #define STACK_POINTER_OFFSET 1
347 #define FIRST_PARM_OFFSET(FUNDECL) 0
349 #define STACK_BOUNDARY 8
351 #define STACK_POINTER_REGNUM 32
353 #define FRAME_POINTER_REGNUM REG_Y
355 #define ARG_POINTER_REGNUM 34
357 #define STATIC_CHAIN_REGNUM 2
359 /* Offset from the frame pointer register value to the top of the stack. */
360 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
362 #define ELIMINABLE_REGS { \
363 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
364 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
365 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
367 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
368 OFFSET = avr_initial_elimination_offset (FROM, TO)
370 #define RETURN_ADDR_RTX(count, x) \
371 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
373 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
374 for POST_DEC targets (PR27386). */
375 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
377 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
379 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
381 typedef struct avr_args {
382 int nregs; /* # registers available for passing */
383 int regno; /* next available register number */
386 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
387 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
389 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
390 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
392 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
394 extern int avr_reg_order[];
396 #define RET_REGISTER avr_ret_register ()
398 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
400 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
402 #define DEFAULT_PCC_STRUCT_RETURN 0
404 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
406 #define HAVE_POST_INCREMENT 1
407 #define HAVE_PRE_DECREMENT 1
409 #define MAX_REGS_PER_ADDRESS 1
411 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
412 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
414 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
417 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
419 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
422 #define REG_OK_FOR_INDEX_P(X) 0
424 #define XEXP_(X,Y) (X)
426 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
427 is no worse than normal base pointers R28/29 and R30/31. For example:
428 If base offset is greater than 63 bytes or for R++ or --R addressing. */
430 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
432 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
434 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
435 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
436 OPNUM, RELOAD_OTHER); \
439 if (GET_CODE (X) == PLUS \
440 && REG_P (XEXP (X, 0)) \
441 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
442 && GET_CODE (XEXP (X, 1)) == CONST_INT \
443 && INTVAL (XEXP (X, 1)) >= 1) \
445 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
448 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
450 int regno = REGNO (XEXP (X, 0)); \
451 rtx mem = make_memloc (X, regno); \
452 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
453 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
454 1, ADDR_TYPE (TYPE)); \
455 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
456 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
461 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
463 push_reload (X, NULL_RTX, &X, NULL, \
464 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
471 #define LEGITIMATE_CONSTANT_P(X) 1
473 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
474 : (TO) == STACK_REG ? 12 \
477 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
478 (MODE)==HImode ? 4 : \
479 (MODE)==SImode ? 8 : \
480 (MODE)==SFmode ? 8 : 16)
482 #define BRANCH_COST(speed_p, predictable_p) 0
484 #define SLOW_BYTE_ACCESS 0
486 #define NO_FUNCTION_CSE
488 #define TEXT_SECTION_ASM_OP "\t.text"
490 #define DATA_SECTION_ASM_OP "\t.data"
492 #define BSS_SECTION_ASM_OP "\t.section .bss"
494 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
495 There are no shared libraries on this target, and these sections are
496 placed in the read-only program memory, so they are not writable. */
498 #undef CTORS_SECTION_ASM_OP
499 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
501 #undef DTORS_SECTION_ASM_OP
502 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
504 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
506 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
508 #define SUPPORTS_INIT_PRIORITY 0
510 #define JUMP_TABLES_IN_TEXT_SECTION 0
512 #define ASM_COMMENT_START " ; "
514 #define ASM_APP_ON "/* #APP */\n"
516 #define ASM_APP_OFF "/* #NOAPP */\n"
518 /* Switch into a generic section. */
519 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
520 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
522 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
524 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
526 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
528 fputs ("\t.comm ", (STREAM)); \
529 assemble_name ((STREAM), (NAME)); \
530 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
533 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
534 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
536 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
538 fputs ("\t.lcomm ", (STREAM)); \
539 assemble_name ((STREAM), (NAME)); \
540 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
546 #define TYPE_ASM_OP "\t.type\t"
547 #define SIZE_ASM_OP "\t.size\t"
548 #define WEAK_ASM_OP "\t.weak\t"
549 /* Define the strings used for the special svr4 .type and .size directives.
550 These strings generally do not vary from one system running svr4 to
551 another, but if a given system (e.g. m88k running svr) needs to use
552 different pseudo-op names for these, they may be overridden in the
553 file which includes this one. */
556 #undef TYPE_OPERAND_FMT
557 #define TYPE_OPERAND_FMT "@%s"
558 /* The following macro defines the format used to output the second
559 operand of the .type assembler directive. Different svr4 assemblers
560 expect various different forms for this operand. The one given here
561 is just a default. You may need to override it in your machine-
562 specific tm.h file (depending upon the particulars of your assembler). */
564 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
565 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
567 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
569 if (!flag_inhibit_size_directive) \
570 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
573 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
575 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
576 size_directive_output = 0; \
577 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
579 size_directive_output = 1; \
580 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
581 int_size_in_bytes (TREE_TYPE (DECL))); \
583 ASM_OUTPUT_LABEL(FILE, NAME); \
586 #undef ASM_FINISH_DECLARE_OBJECT
587 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
589 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
590 HOST_WIDE_INT size; \
591 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
592 && ! AT_END && TOP_LEVEL \
593 && DECL_INITIAL (DECL) == error_mark_node \
594 && !size_directive_output) \
596 size_directive_output = 1; \
597 size = int_size_in_bytes (TREE_TYPE (DECL)); \
598 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
604 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
605 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
606 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
607 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
608 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
609 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
610 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
611 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
612 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
613 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
614 corresponds to a particular byte value [0..255]. For any
615 given byte value, if the value in the corresponding table
616 position is zero, the given character can be output directly.
617 If the table value is 1, the byte must be output as a \ooo
618 octal escape. If the tables value is anything else, then the
619 byte value should be output as a \ followed by the value
620 in the table. Note that we can use standard UN*X escape
621 sequences for many control characters, but we don't use
622 \a to represent BEL because some svr4 assemblers (e.g. on
623 the i386) don't know about that. Also, we don't use \v
624 since some versions of gas, such as 2.2 did not accept it. */
626 #define STRING_LIMIT ((unsigned) 64)
627 #define STRING_ASM_OP "\t.string\t"
628 /* Some svr4 assemblers have a limit on the number of characters which
629 can appear in the operand of a .string directive. If your assembler
630 has such a limitation, you should define STRING_LIMIT to reflect that
631 limit. Note that at least some svr4 assemblers have a limit on the
632 actual number of bytes in the double-quoted string, and that they
633 count each character in an escape sequence as one byte. Thus, an
634 escape sequence like \377 would count as four bytes.
636 If your target assembler doesn't support the .string directive, you
637 should define this to zero. */
639 /* Globalizing directive for a label. */
640 #define GLOBAL_ASM_OP ".global\t"
642 #define SET_ASM_OP "\t.set\t"
644 #define ASM_WEAKEN_LABEL(FILE, NAME) \
647 fputs ("\t.weak\t", (FILE)); \
648 assemble_name ((FILE), (NAME)); \
649 fputc ('\n', (FILE)); \
653 #define SUPPORTS_WEAK 1
655 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
656 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
658 #define HAS_INIT_SECTION 1
660 #define REGISTER_NAMES { \
661 "r0","r1","r2","r3","r4","r5","r6","r7", \
662 "r8","r9","r10","r11","r12","r13","r14","r15", \
663 "r16","r17","r18","r19","r20","r21","r22","r23", \
664 "r24","r25","r26","r27","r28","r29","r30","r31", \
665 "__SP_L__","__SP_H__","argL","argH"}
667 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
669 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
671 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
673 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
675 #define USER_LABEL_PREFIX ""
677 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
679 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
681 gcc_assert (REGNO < 32); \
682 fprintf (STREAM, "\tpush\tr%d", REGNO); \
685 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
687 gcc_assert (REGNO < 32); \
688 fprintf (STREAM, "\tpop\tr%d", REGNO); \
691 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
692 avr_output_addr_vec_elt(STREAM, VALUE)
694 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
695 (switch_to_section (progmem_section), \
696 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
698 #define ASM_OUTPUT_SKIP(STREAM, N) \
699 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
701 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
704 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
707 #define CASE_VECTOR_MODE HImode
709 #undef WORD_REGISTER_OPERATIONS
713 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
717 #define FUNCTION_MODE HImode
719 #define DOLLARS_IN_IDENTIFIERS 0
721 #define NO_DOLLAR_IN_LABEL 1
723 #define TRAMPOLINE_SIZE 4
725 /* Store in cc_status the expressions
726 that the condition codes will describe
727 after execution of an instruction whose pattern is EXP.
728 Do not alter them if the instruction would not alter the cc's. */
730 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
732 /* The add insns don't set overflow in a usable way. */
733 #define CC_OVERFLOW_UNUSABLE 01000
734 /* The mov,and,or,xor insns don't set carry. That's ok though as the
735 Z bit is all we need when doing unsigned comparisons on the result of
736 these insns (since they're always with 0). However, conditions.h has
737 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
739 #define CC_NO_CARRY CC_NO_OVERFLOW
742 /* Output assembler code to FILE to increment profiler label # LABELNO
743 for profiling a function entry. */
745 #define FUNCTION_PROFILER(FILE, LABELNO) \
746 fprintf (FILE, "/* profiler %d */", (LABELNO))
748 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
749 adjust_insn_length (INSN, LENGTH))
751 extern const char *avr_device_to_arch (int argc, const char **argv);
752 extern const char *avr_device_to_data_start (int argc, const char **argv);
753 extern const char *avr_device_to_startfiles (int argc, const char **argv);
754 extern const char *avr_device_to_devicelib (int argc, const char **argv);
756 #define EXTRA_SPEC_FUNCTIONS \
757 { "device_to_arch", avr_device_to_arch }, \
758 { "device_to_data_start", avr_device_to_data_start }, \
759 { "device_to_startfile", avr_device_to_startfiles }, \
760 { "device_to_devicelib", avr_device_to_devicelib },
762 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
764 #define CC1_SPEC "%{profile:-p}"
766 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
767 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
768 %{!fexceptions:-fno-exceptions}"
769 /* A C string constant that tells the GCC driver program options to
770 pass to `cc1plus'. */
772 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
777 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
778 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
780 mmcu=at90can32*:--pmem-wrap-around=32k}\
783 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
784 %:device_to_arch(%{mmcu=*:%*})\
785 %:device_to_data_start(%{mmcu=*:%*})"
788 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
790 #define LIBSTDCXX "-lgcc"
791 /* No libstdc++ for now. Empty string doesn't work. */
793 #define LIBGCC_SPEC \
794 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
796 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
798 #define ENDFILE_SPEC ""
800 /* This is the default without any -mmcu=* option (AT90S*). */
801 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
803 /* This is undefined macro for collect2 disabling */
804 #define LINKER_NAME "ld"
806 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
807 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
809 /* Note that the other files fail to use these
810 in some of the places where they should. */
812 #if defined(__STDC__) || defined(ALMOST_STDC)
813 #define AS2(a,b,c) #a " " #b "," #c
814 #define AS2C(b,c) " " #b "," #c
815 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
816 #define AS1(a,b) #a " " #b
818 #define AS1(a,b) "a b"
819 #define AS2(a,b,c) "a b,c"
820 #define AS2C(b,c) " b,c"
821 #define AS3(a,b,c,d) "a b,c,d"
823 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
824 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
825 #define CR_TAB "\n\t"
827 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
829 #define DWARF2_DEBUGGING_INFO 1
831 #define DWARF2_ADDR_SIZE 4
833 #define OBJECT_FORMAT_ELF
835 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
836 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
838 /* A C structure for machine-specific, per-function data.
839 This is added to the cfun structure. */
840 struct GTY(()) machine_function
842 /* 'true' - if current function is a naked function. */
845 /* 'true' - if current function is an interrupt function
846 as specified by the "interrupt" attribute. */
849 /* 'true' - if current function is a signal function
850 as specified by the "signal" attribute. */
853 /* 'true' - if current function is a 'task' function
854 as specified by the "OS_task" attribute. */
857 /* 'true' - if current function is a 'main' function
858 as specified by the "OS_main" attribute. */