1 ;; Machine Description for shared bits common to IWMMXT and Neon.
2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
3 ;; Written by CodeSourcery.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published by
9 ;; the Free Software Foundation; either version 3, or (at your option)
12 ;; GCC is distributed in the hope that it will be useful, but
13 ;; WITHOUT ANY WARRANTY; without even the implied warranty of
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 ;; General Public License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
23 ;; All integer and float modes supported by Neon and IWMMXT.
24 (define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
26 ;; All integer and float modes supported by Neon and IWMMXT, except V2DI.
27 (define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
29 ;; All integer modes supported by Neon and IWMMXT
30 (define_mode_iterator VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI])
32 ;; All integer modes supported by Neon and IWMMXT, except V2DI
33 (define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI])
35 (define_expand "mov<mode>"
36 [(set (match_operand:VALL 0 "nonimmediate_operand" "")
37 (match_operand:VALL 1 "general_operand" ""))]
39 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
41 if (can_create_pseudo_p ())
43 if (GET_CODE (operands[0]) != REG)
44 operands[1] = force_reg (<MODE>mode, operands[1]);
45 else if (TARGET_NEON && CONSTANT_P (operands[1]))
47 operands[1] = neon_make_constant (operands[1]);
48 gcc_assert (operands[1] != NULL_RTX);
53 ;; Vector arithmetic. Expanders are blank, then unnamed insns implement
54 ;; patterns separately for IWMMXT and Neon.
56 (define_expand "add<mode>3"
57 [(set (match_operand:VALL 0 "s_register_operand" "")
58 (plus:VALL (match_operand:VALL 1 "s_register_operand" "")
59 (match_operand:VALL 2 "s_register_operand" "")))]
60 "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
61 || flag_unsafe_math_optimizations))
62 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
66 (define_expand "sub<mode>3"
67 [(set (match_operand:VALL 0 "s_register_operand" "")
68 (minus:VALL (match_operand:VALL 1 "s_register_operand" "")
69 (match_operand:VALL 2 "s_register_operand" "")))]
70 "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
71 || flag_unsafe_math_optimizations))
72 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
76 (define_expand "mul<mode>3"
77 [(set (match_operand:VALLW 0 "s_register_operand" "")
78 (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "")
79 (match_operand:VALLW 2 "s_register_operand" "")))]
80 "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
81 || flag_unsafe_math_optimizations))
82 || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)"
86 (define_expand "smin<mode>3"
87 [(set (match_operand:VALLW 0 "s_register_operand" "")
88 (smin:VALLW (match_operand:VALLW 1 "s_register_operand" "")
89 (match_operand:VALLW 2 "s_register_operand" "")))]
90 "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
91 || flag_unsafe_math_optimizations))
92 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
96 (define_expand "umin<mode>3"
97 [(set (match_operand:VINTW 0 "s_register_operand" "")
98 (umin:VINTW (match_operand:VINTW 1 "s_register_operand" "")
99 (match_operand:VINTW 2 "s_register_operand" "")))]
101 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
105 (define_expand "smax<mode>3"
106 [(set (match_operand:VALLW 0 "s_register_operand" "")
107 (smax:VALLW (match_operand:VALLW 1 "s_register_operand" "")
108 (match_operand:VALLW 2 "s_register_operand" "")))]
109 "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
110 || flag_unsafe_math_optimizations))
111 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
115 (define_expand "umax<mode>3"
116 [(set (match_operand:VINTW 0 "s_register_operand" "")
117 (umax:VINTW (match_operand:VINTW 1 "s_register_operand" "")
118 (match_operand:VINTW 2 "s_register_operand" "")))]
120 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"