1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
56 else if (TARGET_CPU_EV5) \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
61 else /* Presumably ev4. */ \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
67 builtin_define ("_IEEE_FP"); \
68 if (TARGET_IEEE_WITH_INEXACT) \
69 builtin_define ("_IEEE_FP_INEXACT"); \
71 /* Macros dependent on the C dialect. */ \
72 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
75 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
76 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
79 if (preprocessing_asm_p ()) \
80 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
81 else if (c_dialect_cxx ()) \
83 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
84 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
87 builtin_define_std ("LANGUAGE_C"); \
88 if (c_dialect_objc ()) \
90 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
91 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
97 #define CPP_SPEC "%(cpp_subtarget)"
99 #ifndef CPP_SUBTARGET_SPEC
100 #define CPP_SUBTARGET_SPEC ""
103 #define WORD_SWITCH_TAKES_ARG(STR) \
104 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
106 /* Print subsidiary information on the compiler version in use. */
107 #define TARGET_VERSION
109 /* Run-time compilation parameters selecting different hardware subsets. */
111 /* Which processor to schedule for. The cpu attribute defines a list that
112 mirrors this list, so changes to alpha.md must be made at the same time. */
116 PROCESSOR_EV4, /* 2106[46]{a,} */
117 PROCESSOR_EV5, /* 21164{a,pc,} */
118 PROCESSOR_EV6, /* 21264 */
122 extern enum processor_type alpha_cpu;
124 enum alpha_trap_precision
126 ALPHA_TP_PROG, /* No precision (default). */
127 ALPHA_TP_FUNC, /* Trap contained within originating function. */
128 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
131 enum alpha_fp_rounding_mode
133 ALPHA_FPRM_NORM, /* Normal rounding mode. */
134 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
135 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
136 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
139 enum alpha_fp_trap_mode
141 ALPHA_FPTM_N, /* Normal trap mode. */
142 ALPHA_FPTM_U, /* Underflow traps enabled. */
143 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
144 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
147 extern int target_flags;
149 extern enum alpha_trap_precision alpha_tp;
150 extern enum alpha_fp_rounding_mode alpha_fprm;
151 extern enum alpha_fp_trap_mode alpha_fptm;
152 extern int alpha_tls_size;
154 /* This means that floating-point support exists in the target implementation
155 of the Alpha architecture. This is usually the default. */
156 #define MASK_FP (1 << 0)
157 #define TARGET_FP (target_flags & MASK_FP)
159 /* This means that floating-point registers are allowed to be used. Note
160 that Alpha implementations without FP operations are required to
161 provide the FP registers. */
163 #define MASK_FPREGS (1 << 1)
164 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
166 /* This means that gas is used to process the assembler file. */
168 #define MASK_GAS (1 << 2)
169 #define TARGET_GAS (target_flags & MASK_GAS)
171 /* This means that we should mark procedures as IEEE conformant. */
173 #define MASK_IEEE_CONFORMANT (1 << 3)
174 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
176 /* This means we should be IEEE-compliant except for inexact. */
178 #define MASK_IEEE (1 << 4)
179 #define TARGET_IEEE (target_flags & MASK_IEEE)
181 /* This means we should be fully IEEE-compliant. */
183 #define MASK_IEEE_WITH_INEXACT (1 << 5)
184 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
186 /* This means we must construct all constants rather than emitting
187 them as literal data. */
189 #define MASK_BUILD_CONSTANTS (1 << 6)
190 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
192 /* This means we handle floating points in VAX F- (float)
193 or G- (double) Format. */
195 #define MASK_FLOAT_VAX (1 << 7)
196 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
198 /* This means that the processor has byte and half word loads and stores
199 (the BWX extension). */
201 #define MASK_BWX (1 << 8)
202 #define TARGET_BWX (target_flags & MASK_BWX)
204 /* This means that the processor has the MAX extension. */
205 #define MASK_MAX (1 << 9)
206 #define TARGET_MAX (target_flags & MASK_MAX)
208 /* This means that the processor has the FIX extension. */
209 #define MASK_FIX (1 << 10)
210 #define TARGET_FIX (target_flags & MASK_FIX)
212 /* This means that the processor has the CIX extension. */
213 #define MASK_CIX (1 << 11)
214 #define TARGET_CIX (target_flags & MASK_CIX)
216 /* This means use !literal style explicit relocations. */
217 #define MASK_EXPLICIT_RELOCS (1 << 12)
218 #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
220 /* This means use 16-bit relocations to .sdata/.sbss. */
221 #define MASK_SMALL_DATA (1 << 13)
222 #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA)
224 /* This means emit thread pointer loads for kernel not user. */
225 #define MASK_TLS_KERNEL (1 << 14)
226 #define TARGET_TLS_KERNEL (target_flags & MASK_TLS_KERNEL)
228 /* This means use direct branches to local functions. */
229 #define MASK_SMALL_TEXT (1 << 15)
230 #define TARGET_SMALL_TEXT (target_flags & MASK_SMALL_TEXT)
232 /* This means that the processor is an EV5, EV56, or PCA56.
233 Unlike alpha_cpu this is not affected by -mtune= setting. */
234 #define MASK_CPU_EV5 (1 << 28)
235 #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5)
237 /* Likewise for EV6. */
238 #define MASK_CPU_EV6 (1 << 29)
239 #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6)
241 /* This means we support the .arch directive in the assembler. Only
242 defined in TARGET_CPU_DEFAULT. */
243 #define MASK_SUPPORT_ARCH (1 << 30)
244 #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
246 /* These are for target os support and cannot be changed at runtime. */
247 #define TARGET_ABI_WINDOWS_NT 0
248 #define TARGET_ABI_OPEN_VMS 0
249 #define TARGET_ABI_UNICOSMK 0
250 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
251 && !TARGET_ABI_OPEN_VMS \
252 && !TARGET_ABI_UNICOSMK)
254 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
255 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
257 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
258 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
260 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
261 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
263 #ifndef TARGET_HAS_XFLOATING_LIBS
264 #define TARGET_HAS_XFLOATING_LIBS 0
266 #ifndef TARGET_PROFILING_NEEDS_GP
267 #define TARGET_PROFILING_NEEDS_GP 0
269 #ifndef TARGET_LD_BUGGY_LDGP
270 #define TARGET_LD_BUGGY_LDGP 0
272 #ifndef TARGET_FIXUP_EV5_PREFETCH
273 #define TARGET_FIXUP_EV5_PREFETCH 0
276 #define HAVE_AS_TLS 0
279 /* Macro to define tables used to set the flags.
280 This is a list in braces of pairs in braces,
281 each pair being { "NAME", VALUE }
282 where VALUE is the bits to set or minus the bits to clear.
283 An empty string NAME is used to identify the default VALUE. */
285 #define TARGET_SWITCHES \
286 { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \
287 {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \
288 {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \
289 {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \
290 N_("Do not use fp registers")}, \
291 {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \
292 {"gas", MASK_GAS, N_("Assume GAS")}, \
293 {"ieee-conformant", MASK_IEEE_CONFORMANT, \
294 N_("Request IEEE-conformant math library routines (OSF/1)")}, \
295 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \
296 N_("Emit IEEE-conformant code, without inexact exceptions")}, \
297 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \
298 N_("Emit IEEE-conformant code, with inexact exceptions")}, \
299 {"build-constants", MASK_BUILD_CONSTANTS, \
300 N_("Do not emit complex integer constants to read-only memory")}, \
301 {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \
302 {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \
303 {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \
304 {"no-bwx", -MASK_BWX, ""}, \
306 N_("Emit code for the motion video ISA extension")}, \
307 {"no-max", -MASK_MAX, ""}, \
309 N_("Emit code for the fp move and sqrt ISA extension")}, \
310 {"no-fix", -MASK_FIX, ""}, \
311 {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
312 {"no-cix", -MASK_CIX, ""}, \
313 {"explicit-relocs", MASK_EXPLICIT_RELOCS, \
314 N_("Emit code using explicit relocation directives")}, \
315 {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
316 {"small-data", MASK_SMALL_DATA, \
317 N_("Emit 16-bit relocations to the small data areas")}, \
318 {"large-data", -MASK_SMALL_DATA, \
319 N_("Emit 32-bit relocations to the small data areas")}, \
320 {"small-text", MASK_SMALL_TEXT, \
321 N_("Emit direct branches to local functions")}, \
322 {"large-text", -MASK_SMALL_TEXT, ""}, \
323 {"tls-kernel", MASK_TLS_KERNEL, \
324 N_("Emit rdval instead of rduniq for thread pointer")}, \
325 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \
326 | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} }
328 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
330 #ifndef TARGET_CPU_DEFAULT
331 #define TARGET_CPU_DEFAULT 0
334 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
335 #ifdef HAVE_AS_EXPLICIT_RELOCS
336 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
338 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
342 extern const char *alpha_cpu_string; /* For -mcpu= */
343 extern const char *alpha_tune_string; /* For -mtune= */
344 extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
345 extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
346 extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
347 extern const char *alpha_mlat_string; /* For -mmemory-latency= */
348 extern const char *alpha_tls_size_string; /* For -mtls-size= */
350 #define TARGET_OPTIONS \
352 {"cpu=", &alpha_cpu_string, \
353 N_("Use features of and schedule given CPU"), 0}, \
354 {"tune=", &alpha_tune_string, \
355 N_("Schedule given CPU"), 0}, \
356 {"fp-rounding-mode=", &alpha_fprm_string, \
357 N_("Control the generated fp rounding mode"), 0}, \
358 {"fp-trap-mode=", &alpha_fptm_string, \
359 N_("Control the IEEE trap mode"), 0}, \
360 {"trap-precision=", &alpha_tp_string, \
361 N_("Control the precision given to fp exceptions"), 0}, \
362 {"memory-latency=", &alpha_mlat_string, \
363 N_("Tune expected memory latency"), 0}, \
364 {"tls-size=", &alpha_tls_size_string, \
365 N_("Specify bit size of immediate TLS offsets"), 0}, \
368 /* Support for a compile-time default CPU, et cetera. The rules are:
369 --with-cpu is ignored if -mcpu is specified.
370 --with-tune is ignored if -mtune is specified. */
371 #define OPTION_DEFAULT_SPECS \
372 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
373 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
375 /* This macro defines names of additional specifications to put in the
376 specs that can be used in various specifications like CC1_SPEC. Its
377 definition is an initializer with a subgrouping for each command option.
379 Each subgrouping contains a string constant, that defines the
380 specification name, and a string constant that used by the GCC driver
383 Do not define this macro if it does not need to do anything. */
385 #ifndef SUBTARGET_EXTRA_SPECS
386 #define SUBTARGET_EXTRA_SPECS
389 #define EXTRA_SPECS \
390 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \
391 SUBTARGET_EXTRA_SPECS
394 /* Sometimes certain combinations of command options do not make sense
395 on a particular target machine. You can define a macro
396 `OVERRIDE_OPTIONS' to take account of this. This macro, if
397 defined, is executed once just after all the command options have
400 On the Alpha, it is used to translate target-option strings into
403 #define OVERRIDE_OPTIONS override_options ()
406 /* Define this macro to change register usage conditional on target flags.
408 On the Alpha, we use this to disable the floating-point registers when
411 #define CONDITIONAL_REGISTER_USAGE \
414 if (! TARGET_FPREGS) \
415 for (i = 32; i < 63; i++) \
416 fixed_regs[i] = call_used_regs[i] = 1; \
420 /* Show we can debug even without a frame pointer. */
421 #define CAN_DEBUG_WITHOUT_FP
423 /* target machine storage layout */
425 /* Define the size of `int'. The default is the same as the word size. */
426 #define INT_TYPE_SIZE 32
428 /* Define the size of `long long'. The default is the twice the word size. */
429 #define LONG_LONG_TYPE_SIZE 64
431 /* We're IEEE unless someone says to use VAX. */
432 #define TARGET_FLOAT_FORMAT \
433 (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)
435 /* The two floating-point formats we support are S-floating, which is
436 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
437 and `long double' are T. */
439 #define FLOAT_TYPE_SIZE 32
440 #define DOUBLE_TYPE_SIZE 64
441 #define LONG_DOUBLE_TYPE_SIZE 64
443 #define WCHAR_TYPE "unsigned int"
444 #define WCHAR_TYPE_SIZE 32
446 /* Define this macro if it is advisable to hold scalars in registers
447 in a wider mode than that declared by the program. In such cases,
448 the value is constrained to be within the bounds of the declared
449 type, but kept valid in the wider mode. The signedness of the
450 extension may differ from that of the type.
452 For Alpha, we always store objects in a full register. 32-bit objects
453 are always sign-extended, but smaller objects retain their signedness. */
455 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
456 if (GET_MODE_CLASS (MODE) == MODE_INT \
457 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
459 if ((MODE) == SImode) \
464 /* Define this if most significant bit is lowest numbered
465 in instructions that operate on numbered bit-fields.
467 There are no such instructions on the Alpha, but the documentation
469 #define BITS_BIG_ENDIAN 0
471 /* Define this if most significant byte of a word is the lowest numbered.
472 This is false on the Alpha. */
473 #define BYTES_BIG_ENDIAN 0
475 /* Define this if most significant word of a multiword number is lowest
478 For Alpha we can decide arbitrarily since there are no machine instructions
479 for them. Might as well be consistent with bytes. */
480 #define WORDS_BIG_ENDIAN 0
482 /* Width of a word, in units (bytes). */
483 #define UNITS_PER_WORD 8
485 /* Width in bits of a pointer.
486 See also the macro `Pmode' defined below. */
487 #define POINTER_SIZE 64
489 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
490 #define PARM_BOUNDARY 64
492 /* Boundary (in *bits*) on which stack pointer should be aligned. */
493 #define STACK_BOUNDARY 64
495 /* Allocation boundary (in *bits*) for the code of a function. */
496 #define FUNCTION_BOUNDARY 32
498 /* Alignment of field after `int : 0' in a structure. */
499 #define EMPTY_FIELD_BOUNDARY 64
501 /* Every structure's size must be a multiple of this. */
502 #define STRUCTURE_SIZE_BOUNDARY 8
504 /* A bit-field declared as `int' forces `int' alignment for the struct. */
505 #define PCC_BITFIELD_TYPE_MATTERS 1
507 /* No data type wants to be aligned rounder than this. */
508 #define BIGGEST_ALIGNMENT 128
510 /* For atomic access to objects, must have at least 32-bit alignment
511 unless the machine has byte operations. */
512 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
514 /* Align all constants and variables to at least a word boundary so
515 we can pick up pieces of them faster. */
516 /* ??? Only if block-move stuff knows about different source/destination
519 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
520 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
523 /* Set this nonzero if move instructions will actually fail to work
524 when given unaligned data.
526 Since we get an error message when we do one, call them invalid. */
528 #define STRICT_ALIGNMENT 1
530 /* Set this nonzero if unaligned move instructions are extremely slow.
532 On the Alpha, they trap. */
534 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
536 /* Standard register usage. */
538 /* Number of actual hardware registers.
539 The hardware registers are assigned numbers for the compiler
540 from 0 to just below FIRST_PSEUDO_REGISTER.
541 All registers that the compiler knows about must be given numbers,
542 even those that are not normally considered general registers.
544 We define all 32 integer registers, even though $31 is always zero,
545 and all 32 floating-point registers, even though $f31 is also
546 always zero. We do not bother defining the FP status register and
547 there are no other registers.
549 Since $31 is always zero, we will use register number 31 as the
550 argument pointer. It will never appear in the generated code
551 because we will always be eliminating it in favor of the stack
552 pointer or hardware frame pointer.
554 Likewise, we use $f31 for the frame pointer, which will always
555 be eliminated in favor of the hardware frame pointer or the
558 #define FIRST_PSEUDO_REGISTER 64
560 /* 1 for registers that have pervasive standard uses
561 and are not available for the register allocator. */
563 #define FIXED_REGISTERS \
564 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
565 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
566 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
567 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
569 /* 1 for registers not available across function calls.
570 These must include the FIXED_REGISTERS and also any
571 registers that can be used without being saved.
572 The latter must include the registers where values are returned
573 and the register where structure-value addresses are passed.
574 Aside from that, you can include as many other registers as you like. */
575 #define CALL_USED_REGISTERS \
576 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
577 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
578 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
579 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
581 /* List the order in which to allocate registers. Each register must be
582 listed once, even those in FIXED_REGISTERS.
584 We allocate in the following order:
585 $f10-$f15 (nonsaved floating-point register)
587 $f21-$f16 (likewise, but input args)
588 $f0 (nonsaved, but return value)
589 $f1 (nonsaved, but immediate before saved)
590 $f2-$f9 (saved floating-point registers)
591 $1-$8 (nonsaved integer registers)
594 $0 (likewise, but return value)
595 $21-$16 (likewise, but input args)
596 $27 (procedure value in OSF, nonsaved in NT)
597 $9-$14 (saved integer registers)
601 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
603 #define REG_ALLOC_ORDER \
604 {42, 43, 44, 45, 46, 47, \
605 54, 55, 56, 57, 58, 59, 60, 61, 62, \
606 53, 52, 51, 50, 49, 48, \
608 34, 35, 36, 37, 38, 39, 40, 41, \
609 1, 2, 3, 4, 5, 6, 7, 8, \
613 21, 20, 19, 18, 17, 16, \
615 9, 10, 11, 12, 13, 14, \
621 /* Return number of consecutive hard regs needed starting at reg REGNO
622 to hold something of mode MODE.
623 This is ordinarily the length in words of a value of mode MODE
624 but can be less for certain modes in special long registers. */
626 #define HARD_REGNO_NREGS(REGNO, MODE) \
627 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
629 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
630 On Alpha, the integer registers can hold any mode. The floating-point
631 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
634 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
635 ((REGNO) >= 32 && (REGNO) <= 62 \
636 ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \
639 /* Value is 1 if MODE is a supported vector mode. */
641 #define VECTOR_MODE_SUPPORTED_P(MODE) \
643 && ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode))
645 /* A C expression that is nonzero if a value of mode
646 MODE1 is accessible in mode MODE2 without copying.
648 This asymmetric test is true when MODE1 could be put
649 in an FP register but MODE2 could not. */
651 #define MODES_TIEABLE_P(MODE1, MODE2) \
652 (HARD_REGNO_MODE_OK (32, (MODE1)) \
653 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
656 /* Specify the registers used for certain standard purposes.
657 The values of these macros are register numbers. */
659 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
660 /* #define PC_REGNUM */
662 /* Register to use for pushing function arguments. */
663 #define STACK_POINTER_REGNUM 30
665 /* Base register for access to local variables of the function. */
666 #define HARD_FRAME_POINTER_REGNUM 15
668 /* Value should be nonzero if functions must have frame pointers.
669 Zero means the frame pointer need not be set up (and parms
670 may be accessed via the stack pointer) in functions that seem suitable.
671 This is computed in `reload', in reload1.c. */
672 #define FRAME_POINTER_REQUIRED 0
674 /* Base register for access to arguments of the function. */
675 #define ARG_POINTER_REGNUM 31
677 /* Base register for access to local variables of function. */
678 #define FRAME_POINTER_REGNUM 63
680 /* Register in which static-chain is passed to a function.
682 For the Alpha, this is based on an example; the calling sequence
683 doesn't seem to specify this. */
684 #define STATIC_CHAIN_REGNUM 1
686 /* The register number of the register used to address a table of
687 static data addresses in memory. */
688 #define PIC_OFFSET_TABLE_REGNUM 29
690 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
691 is clobbered by calls. */
692 /* ??? It is and it isn't. It's required to be valid for a given
693 function when the function returns. It isn't clobbered by
694 current_file functions. Moreover, we do not expose the ldgp
695 until after reload, so we're probably safe. */
696 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
698 /* Register in which address to store a structure value
699 arrives in the function. On the Alpha, the address is passed
700 as a hidden argument. */
701 #define STRUCT_VALUE 0
703 /* Define the classes of registers for register constraints in the
704 machine description. Also define ranges of constants.
706 One of the classes must always be named ALL_REGS and include all hard regs.
707 If there is more than one class, another class must be named NO_REGS
708 and contain no registers.
710 The name GENERAL_REGS must be the name of a class (or an alias for
711 another name such as ALL_REGS). This is the class of registers
712 that is allowed by "g" or "r" in a register constraint.
713 Also, registers outside this class are allocated only when
714 instructions express preferences for them.
716 The classes must be numbered in nondecreasing order; that is,
717 a larger-numbered class must never be contained completely
718 in a smaller-numbered class.
720 For any two classes, it is very desirable that there be another
721 class that represents their union. */
724 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
725 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
729 #define N_REG_CLASSES (int) LIM_REG_CLASSES
731 /* Give names of register classes as strings for dump file. */
733 #define REG_CLASS_NAMES \
734 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
735 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
737 /* Define which registers fit in which classes.
738 This is an initializer for a vector of HARD_REG_SET
739 of length N_REG_CLASSES. */
741 #define REG_CLASS_CONTENTS \
742 { {0x00000000, 0x00000000}, /* NO_REGS */ \
743 {0x00000001, 0x00000000}, /* R0_REG */ \
744 {0x01000000, 0x00000000}, /* R24_REG */ \
745 {0x02000000, 0x00000000}, /* R25_REG */ \
746 {0x08000000, 0x00000000}, /* R27_REG */ \
747 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
748 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
749 {0xffffffff, 0xffffffff} }
751 /* The same information, inverted:
752 Return the class number of the smallest class containing
753 reg number REGNO. This could be a conditional expression
754 or could index an array. */
756 #define REGNO_REG_CLASS(REGNO) \
757 ((REGNO) == 0 ? R0_REG \
758 : (REGNO) == 24 ? R24_REG \
759 : (REGNO) == 25 ? R25_REG \
760 : (REGNO) == 27 ? R27_REG \
761 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
764 /* The class value for index registers, and the one for base regs. */
765 #define INDEX_REG_CLASS NO_REGS
766 #define BASE_REG_CLASS GENERAL_REGS
768 /* Get reg_class from a letter such as appears in the machine description. */
770 #define REG_CLASS_FROM_LETTER(C) \
771 ((C) == 'a' ? R24_REG \
772 : (C) == 'b' ? R25_REG \
773 : (C) == 'c' ? R27_REG \
774 : (C) == 'f' ? FLOAT_REGS \
775 : (C) == 'v' ? R0_REG \
778 /* Define this macro to change register usage conditional on target flags. */
779 /* #define CONDITIONAL_REGISTER_USAGE */
781 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
782 can be used to stand for particular ranges of immediate operands.
783 This macro defines what the ranges are.
784 C is the letter, and VALUE is a constant value.
785 Return 1 if VALUE is in the range specified by C.
788 `I' is used for the range of constants most insns can contain.
789 `J' is the constant zero.
790 `K' is used for the constant in an LDA insn.
791 `L' is used for the constant in a LDAH insn.
792 `M' is used for the constants that can be AND'ed with using a ZAP insn.
793 `N' is used for complemented 8-bit constants.
794 `O' is used for negated 8-bit constants.
795 `P' is used for the constants 1, 2 and 3. */
797 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
799 /* Similar, but for floating or large integer constants, and defining letters
800 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
802 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
803 that is the operand of a ZAP insn. */
805 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
807 /* Optional extra constraints for this machine.
809 For the Alpha, `Q' means that this is a memory operand but not a
810 reference to an unaligned location.
812 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
815 'S' is a 6-bit constant (valid for a shift insn).
819 'U' is a symbolic operand.
821 'W' is a vector zero. */
823 #define EXTRA_CONSTRAINT alpha_extra_constraint
825 /* Given an rtx X being reloaded into a reg required to be
826 in class CLASS, return the class of reg to actually use.
827 In general this is just CLASS; but on some machines
828 in some cases it is preferable to use a more restrictive class. */
830 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
832 /* Loading and storing HImode or QImode values to and from memory
833 usually requires a scratch register. The exceptions are loading
834 QImode and HImode from an aligned address to a general register
835 unless byte instructions are permitted.
836 We also cannot load an unaligned address or a paradoxical SUBREG into an
839 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
840 secondary_reload_class((CLASS), (MODE), (IN), 1)
842 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
843 secondary_reload_class((CLASS), (MODE), (OUT), 0)
845 /* If we are copying between general and FP registers, we need a memory
846 location unless the FIX extension is available. */
848 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
849 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
850 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
852 /* Specify the mode to be used for memory when a secondary memory
853 location is needed. If MODE is floating-point, use it. Otherwise,
854 widen to a word like the default. This is needed because we always
855 store integers in FP registers in quadword format. This whole
856 area is very tricky! */
857 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
858 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
859 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
860 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
862 /* Return the maximum number of consecutive registers
863 needed to represent mode MODE in a register of class CLASS. */
865 #define CLASS_MAX_NREGS(CLASS, MODE) \
866 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
868 /* Return the class of registers that cannot change mode from FROM to TO. */
870 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
871 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
872 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
874 /* Define the cost of moving between registers of various classes. Moving
875 between FLOAT_REGS and anything else except float regs is expensive.
876 In fact, we make it quite expensive because we really don't want to
877 do these moves unless it is clearly worth it. Optimizations may
878 reduce the impact of not being able to allocate a pseudo to a
881 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
882 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
884 : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
886 /* A C expressions returning the cost of moving data of MODE from a register to
889 On the Alpha, bump this up a bit. */
891 extern int alpha_memory_latency;
892 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
894 /* Provide the cost of a branch. Exact meaning under development. */
895 #define BRANCH_COST 5
897 /* Stack layout; function entry, exit and calling. */
899 /* Define this if pushing a word on the stack
900 makes the stack pointer a smaller address. */
901 #define STACK_GROWS_DOWNWARD
903 /* Define this if the nominal address of the stack frame
904 is at the high-address end of the local variables;
905 that is, each additional local variable allocated
906 goes at a more negative offset in the frame. */
907 /* #define FRAME_GROWS_DOWNWARD */
909 /* Offset within stack frame to start allocating local variables at.
910 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
911 first local allocated. Otherwise, it is the offset to the BEGINNING
912 of the first local allocated. */
914 #define STARTING_FRAME_OFFSET 0
916 /* If we generate an insn to push BYTES bytes,
917 this says how many the stack pointer really advances by.
918 On Alpha, don't define this because there are no push insns. */
919 /* #define PUSH_ROUNDING(BYTES) */
921 /* Define this to be nonzero if stack checking is built into the ABI. */
922 #define STACK_CHECK_BUILTIN 1
924 /* Define this if the maximum size of all the outgoing args is to be
925 accumulated and pushed during the prologue. The amount can be
926 found in the variable current_function_outgoing_args_size. */
927 #define ACCUMULATE_OUTGOING_ARGS 1
929 /* Offset of first parameter from the argument pointer register value. */
931 #define FIRST_PARM_OFFSET(FNDECL) 0
933 /* Definitions for register eliminations.
935 We have two registers that can be eliminated on the Alpha. First, the
936 frame pointer register can often be eliminated in favor of the stack
937 pointer register. Secondly, the argument pointer register can always be
938 eliminated; it is replaced with either the stack or frame pointer. */
940 /* This is an array of structures. Each structure initializes one pair
941 of eliminable registers. The "from" register number is given first,
942 followed by "to". Eliminations of the same "from" register are listed
943 in order of preference. */
945 #define ELIMINABLE_REGS \
946 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
947 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
948 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
949 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
951 /* Given FROM and TO register numbers, say whether this elimination is allowed.
952 Frame pointer elimination is automatically handled.
954 All eliminations are valid since the cases where FP can't be
955 eliminated are already handled. */
957 #define CAN_ELIMINATE(FROM, TO) 1
959 /* Round up to a multiple of 16 bytes. */
960 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
962 /* Define the offset between two registers, one to be eliminated, and the other
963 its replacement, at the start of a routine. */
964 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
965 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
967 /* Define this if stack space is still allocated for a parameter passed
969 /* #define REG_PARM_STACK_SPACE */
971 /* Value is the number of bytes of arguments automatically
972 popped when returning from a subroutine call.
973 FUNDECL is the declaration node of the function (as a tree),
974 FUNTYPE is the data type of the function (as a tree),
975 or for a library call it is an identifier node for the subroutine name.
976 SIZE is the number of bytes of arguments passed on the stack. */
978 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
980 /* Define how to find the value returned by a function.
981 VALTYPE is the data type of the value (as a tree).
982 If the precise function being called is known, FUNC is its FUNCTION_DECL;
983 otherwise, FUNC is 0.
985 On Alpha the value is found in $0 for integer functions and
986 $f0 for floating-point functions. */
988 #define FUNCTION_VALUE(VALTYPE, FUNC) \
989 function_value (VALTYPE, FUNC, VOIDmode)
991 /* Define how to find the value returned by a library function
992 assuming the value has mode MODE. */
994 #define LIBCALL_VALUE(MODE) \
995 function_value (NULL, NULL, MODE)
997 /* 1 if N is a possible register number for a function value
998 as seen by the caller. */
1000 #define FUNCTION_VALUE_REGNO_P(N) \
1001 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
1003 /* 1 if N is a possible register number for function argument passing.
1004 On Alpha, these are $16-$21 and $f16-$f21. */
1006 #define FUNCTION_ARG_REGNO_P(N) \
1007 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
1009 /* Define a data type for recording info about an argument list
1010 during the scan of that argument list. This data type should
1011 hold all necessary information about the function itself
1012 and about the args processed so far, enough to enable macros
1013 such as FUNCTION_ARG to determine where the next arg should go.
1015 On Alpha, this is a single integer, which is a number of words
1016 of arguments scanned so far.
1017 Thus 6 or more means all following args should go on the stack. */
1019 #define CUMULATIVE_ARGS int
1021 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1022 for a call to a function whose data type is FNTYPE.
1023 For a library call, FNTYPE is 0. */
1025 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0
1027 /* Define intermediate macro to compute the size (in registers) of an argument
1030 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
1031 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
1032 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1033 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1035 /* Update the data in CUM to advance over an argument
1036 of mode MODE and data type TYPE.
1037 (TYPE is null for libcalls where that information may not be available.) */
1039 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1040 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
1043 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
1045 /* Determine where to put an argument to a function.
1046 Value is zero to push the argument on the stack,
1047 or a hard register in which to store the argument.
1049 MODE is the argument's machine mode.
1050 TYPE is the data type of the argument (as a tree).
1051 This is null for libcalls where that information may
1053 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1054 the preceding args and about the function being called.
1055 NAMED is nonzero if this argument is a named parameter
1056 (otherwise it is an extra parameter matching an ellipsis).
1058 On Alpha the first 6 words of args are normally in registers
1059 and the rest are pushed. */
1061 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1062 function_arg((CUM), (MODE), (TYPE), (NAMED))
1064 /* A C expression that indicates when an argument must be passed by
1065 reference. If nonzero for an argument, a copy of that argument is
1066 made in memory and a pointer to the argument is passed instead of
1067 the argument itself. The pointer is passed in whatever way is
1068 appropriate for passing a pointer to that type. */
1070 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1071 ((MODE) == TFmode || (MODE) == TCmode)
1073 /* For an arg passed partly in registers and partly in memory,
1074 this is the number of registers used.
1075 For args passed entirely in registers or entirely in memory, zero. */
1077 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1078 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
1081 /* Try to output insns to set TARGET equal to the constant C if it can be
1082 done in less than N insns. Do all computations in MODE. Returns the place
1083 where the output has been placed if it can be done and the insns have been
1084 emitted. If it would take more than N insns, zero is returned and no
1085 insns and emitted. */
1087 /* Define the information needed to generate branch and scc insns. This is
1088 stored from the compare operation. Note that we can't use "rtx" here
1089 since it hasn't been defined! */
1091 struct alpha_compare
1093 struct rtx_def *op0, *op1;
1097 extern struct alpha_compare alpha_compare;
1099 /* Make (or fake) .linkage entry for function call.
1100 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1102 /* This macro defines the start of an assembly comment. */
1104 #define ASM_COMMENT_START " #"
1106 /* This macro produces the initial definition of a function. */
1108 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1109 alpha_start_function(FILE,NAME,DECL);
1111 /* This macro closes up a function definition for the assembler. */
1113 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
1114 alpha_end_function(FILE,NAME,DECL)
1116 /* Output any profiling code before the prologue. */
1118 #define PROFILE_BEFORE_PROLOGUE 1
1120 /* Never use profile counters. */
1122 #define NO_PROFILE_COUNTERS 1
1124 /* Output assembler code to FILE to increment profiler label # LABELNO
1125 for profiling a function entry. Under OSF/1, profiling is enabled
1126 by simply passing -pg to the assembler and linker. */
1128 #define FUNCTION_PROFILER(FILE, LABELNO)
1130 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1131 the stack pointer does not matter. The value is tested only in
1132 functions that have frame pointers.
1133 No definition is equivalent to always zero. */
1135 #define EXIT_IGNORE_STACK 1
1137 /* Define registers used by the epilogue and return instruction. */
1139 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
1141 /* Output assembler code for a block containing the constant parts
1142 of a trampoline, leaving space for the variable parts.
1144 The trampoline should set the static chain pointer to value placed
1145 into the trampoline and should branch to the specified routine.
1146 Note that $27 has been set to the address of the trampoline, so we can
1147 use it for addressability of the two data items. */
1149 #define TRAMPOLINE_TEMPLATE(FILE) \
1151 fprintf (FILE, "\tldq $1,24($27)\n"); \
1152 fprintf (FILE, "\tldq $27,16($27)\n"); \
1153 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1154 fprintf (FILE, "\tnop\n"); \
1155 fprintf (FILE, "\t.quad 0,0\n"); \
1158 /* Section in which to place the trampoline. On Alpha, instructions
1159 may only be placed in a text segment. */
1161 #define TRAMPOLINE_SECTION text_section
1163 /* Length in units of the trampoline for entering a nested function. */
1165 #define TRAMPOLINE_SIZE 32
1167 /* The alignment of a trampoline, in bits. */
1169 #define TRAMPOLINE_ALIGNMENT 64
1171 /* Emit RTL insns to initialize the variable parts of a trampoline.
1172 FNADDR is an RTX for the address of the function's pure code.
1173 CXT is an RTX for the static chain value for the function. */
1175 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1176 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
1178 /* A C expression whose value is RTL representing the value of the return
1179 address for the frame COUNT steps up from the current frame.
1180 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1181 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
1183 #define RETURN_ADDR_RTX alpha_return_addr
1185 /* Before the prologue, RA lives in $26. */
1186 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
1187 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
1188 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
1190 /* Describe how we implement __builtin_eh_return. */
1191 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
1192 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
1193 #define EH_RETURN_HANDLER_RTX \
1194 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
1195 current_function_outgoing_args_size))
1197 /* Addressing modes, and classification of registers for them. */
1199 /* Macros to check register numbers against specific register classes. */
1201 /* These assume that REGNO is a hard or pseudo reg number.
1202 They give nonzero only if REGNO is a hard reg of the suitable class
1203 or a pseudo reg currently allocated to a suitable hard reg.
1204 Since they use reg_renumber, they are safe only once reg_renumber
1205 has been allocated, which happens in local-alloc.c. */
1207 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1208 #define REGNO_OK_FOR_BASE_P(REGNO) \
1209 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1210 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1212 /* Maximum number of registers that can appear in a valid memory address. */
1213 #define MAX_REGS_PER_ADDRESS 1
1215 /* Recognize any constant value that is a valid address. For the Alpha,
1216 there are only constants none since we want to use LDA to load any
1217 symbolic addresses into registers. */
1219 #define CONSTANT_ADDRESS_P(X) \
1220 (GET_CODE (X) == CONST_INT \
1221 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1223 /* Include all constant integers and constant doubles, but not
1224 floating-point, except for floating-point zero. */
1226 #define LEGITIMATE_CONSTANT_P(X) \
1227 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1228 || (X) == CONST0_RTX (GET_MODE (X)))
1230 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1231 and check its validity for a certain class.
1232 We have two alternate definitions for each of them.
1233 The usual definition accepts all pseudo regs; the other rejects
1234 them unless they have been allocated suitable hard regs.
1235 The symbol REG_OK_STRICT causes the latter definition to be used.
1237 Most source files want to accept pseudo regs in the hope that
1238 they will get allocated to the class that the insn wants them to be in.
1239 Source files for reload pass need to be strict.
1240 After reload, it makes no difference, since pseudo regs have
1241 been eliminated by then. */
1243 /* Nonzero if X is a hard reg that can be used as an index
1244 or if it is a pseudo reg. */
1245 #define REG_OK_FOR_INDEX_P(X) 0
1247 /* Nonzero if X is a hard reg that can be used as a base reg
1248 or if it is a pseudo reg. */
1249 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
1250 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1252 /* ??? Nonzero if X is the frame pointer, or some virtual register
1253 that may eliminate to the frame pointer. These will be allowed to
1254 have offsets greater than 32K. This is done because register
1255 elimination offsets will change the hi/lo split, and if we split
1256 before reload, we will require additional instructions. */
1257 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
1258 (REGNO (X) == 31 || REGNO (X) == 63 \
1259 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
1260 && REGNO (X) < LAST_VIRTUAL_REGISTER))
1262 /* Nonzero if X is a hard reg that can be used as a base reg. */
1263 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1265 #ifdef REG_OK_STRICT
1266 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
1268 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
1271 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1272 valid memory address for an instruction. */
1274 #ifdef REG_OK_STRICT
1275 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1277 if (alpha_legitimate_address_p (MODE, X, 1)) \
1281 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1283 if (alpha_legitimate_address_p (MODE, X, 0)) \
1288 /* Try machine-dependent ways of modifying an illegitimate address
1289 to be legitimate. If we find one, return the new, valid address.
1290 This macro is used in only one place: `memory_address' in explow.c. */
1292 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1294 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1302 /* Try a machine-dependent way of reloading an illegitimate address
1303 operand. If we find one, push the reload and jump to WIN. This
1304 macro is used in only one place: `find_reloads_address' in reload.c. */
1306 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1308 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1316 /* Go to LABEL if ADDR (a legitimate address expression)
1317 has an effect that depends on the machine mode it is used for.
1318 On the Alpha this is true only for the unaligned modes. We can
1319 simplify this test since we know that the address must be valid. */
1321 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1322 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1324 /* Specify the machine mode that this machine uses
1325 for the index in the tablejump instruction. */
1326 #define CASE_VECTOR_MODE SImode
1328 /* Define as C expression which evaluates to nonzero if the tablejump
1329 instruction expects the table to contain offsets from the address of the
1332 Do not define this if the table should contain absolute addresses.
1333 On the Alpha, the table is really GP-relative, not relative to the PC
1334 of the table, but we pretend that it is PC-relative; this should be OK,
1335 but we should try to find some better way sometime. */
1336 #define CASE_VECTOR_PC_RELATIVE 1
1338 /* Define this as 1 if `char' should by default be signed; else as 0. */
1339 #define DEFAULT_SIGNED_CHAR 1
1341 /* This flag, if defined, says the same insns that convert to a signed fixnum
1342 also convert validly to an unsigned one.
1344 We actually lie a bit here as overflow conditions are different. But
1345 they aren't being checked anyway. */
1347 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1349 /* Max number of bytes we can move to or from memory
1350 in one reasonably fast instruction. */
1354 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1355 move-instruction pairs, we will do a movstr or libcall instead.
1357 Without byte/word accesses, we want no more than four instructions;
1358 with, several single byte accesses are better. */
1360 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1362 /* Largest number of bytes of an object that can be placed in a register.
1363 On the Alpha we have plenty of registers, so use TImode. */
1364 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1366 /* Nonzero if access to memory by bytes is no faster than for words.
1367 Also nonzero if doing byte operations (specifically shifts) in registers
1370 On the Alpha, we want to not use the byte operation and instead use
1371 masking operations to access fields; these will save instructions. */
1373 #define SLOW_BYTE_ACCESS 1
1375 /* Define if operations between registers always perform the operation
1376 on the full register even if a narrower mode is specified. */
1377 #define WORD_REGISTER_OPERATIONS
1379 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1380 will either zero-extend or sign-extend. The value of this macro should
1381 be the code that says which one of the two operations is implicitly
1382 done, NIL if none. */
1383 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1385 /* Define if loading short immediate values into registers sign extends. */
1386 #define SHORT_IMMEDIATES_SIGN_EXTEND
1388 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1389 is done just by pretending it is already truncated. */
1390 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1392 /* The CIX ctlz and cttz instructions return 64 for zero. */
1393 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1394 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1396 /* Define the value returned by a floating-point comparison instruction. */
1398 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1399 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1401 /* Canonicalize a comparison from one we don't have to one we do have. */
1403 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1405 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1406 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1411 (CODE) = swap_condition (CODE); \
1413 if (((CODE) == LT || (CODE) == LTU) \
1414 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1416 (CODE) = (CODE) == LT ? LE : LEU; \
1417 (OP1) = GEN_INT (255); \
1421 /* Specify the machine mode that pointers have.
1422 After generation of rtl, the compiler makes no further distinction
1423 between pointers and any other objects of this machine mode. */
1424 #define Pmode DImode
1426 /* Mode of a function address in a call instruction (for indexing purposes). */
1428 #define FUNCTION_MODE Pmode
1430 /* Define this if addresses of constant functions
1431 shouldn't be put through pseudo regs where they can be cse'd.
1432 Desirable on machines where ordinary constants are expensive
1433 but a CALL with constant address is cheap.
1435 We define this on the Alpha so that gen_call and gen_call_value
1436 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1437 then copy it into a register, thus actually letting the address be
1440 #define NO_FUNCTION_CSE
1442 /* Define this to be nonzero if shift instructions ignore all but the low-order
1444 #define SHIFT_COUNT_TRUNCATED 1
1446 /* Control the assembler format that we output. */
1448 /* Output to assembler file text saying following lines
1449 may contain character constants, extra white space, comments, etc. */
1450 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1452 /* Output to assembler file text saying following lines
1453 no longer contain unusual constructs. */
1454 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1456 #define TEXT_SECTION_ASM_OP "\t.text"
1458 /* Output before read-only data. */
1460 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1462 /* Output before writable data. */
1464 #define DATA_SECTION_ASM_OP "\t.data"
1466 /* How to refer to registers in assembler output.
1467 This sequence is indexed by compiler's hard-register-number (see above). */
1469 #define REGISTER_NAMES \
1470 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1471 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1472 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1473 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1474 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1475 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1476 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1477 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1479 /* Strip name encoding when emitting labels. */
1481 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1483 const char *name_ = NAME; \
1484 if (*name_ == '@' || *name_ == '%') \
1486 if (*name_ == '*') \
1489 fputs (user_label_prefix, STREAM); \
1490 fputs (name_, STREAM); \
1493 /* Globalizing directive for a label. */
1494 #define GLOBAL_ASM_OP "\t.globl "
1496 /* The prefix to add to user-visible assembler symbols. */
1498 #define USER_LABEL_PREFIX ""
1500 /* This is how to output a label for a jump table. Arguments are the same as
1501 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1504 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1505 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1507 /* This is how to store into the string LABEL
1508 the symbol_ref name of an internal numbered label where
1509 PREFIX is the class of label and NUM is the number within the class.
1510 This is suitable for output with `assemble_name'. */
1512 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1513 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1515 /* We use the default ASCII-output routine, except that we don't write more
1516 than 50 characters since the assembler doesn't support very long lines. */
1518 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1520 FILE *_hide_asm_out_file = (MYFILE); \
1521 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1522 int _hide_thissize = (MYLENGTH); \
1523 int _size_so_far = 0; \
1525 FILE *asm_out_file = _hide_asm_out_file; \
1526 const unsigned char *p = _hide_p; \
1527 int thissize = _hide_thissize; \
1529 fprintf (asm_out_file, "\t.ascii \""); \
1531 for (i = 0; i < thissize; i++) \
1533 register int c = p[i]; \
1535 if (_size_so_far ++ > 50 && i < thissize - 4) \
1536 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1538 if (c == '\"' || c == '\\') \
1539 putc ('\\', asm_out_file); \
1540 if (c >= ' ' && c < 0177) \
1541 putc (c, asm_out_file); \
1544 fprintf (asm_out_file, "\\%o", c); \
1545 /* After an octal-escape, if a digit follows, \
1546 terminate one string constant and start another. \
1547 The VAX assembler fails to stop reading the escape \
1548 after three digits, so this is the only way we \
1549 can get it to parse the data properly. */ \
1550 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1551 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1554 fprintf (asm_out_file, "\"\n"); \
1559 /* This is how to output an element of a case-vector that is absolute.
1560 (Alpha does not use such vectors, but we must define this macro anyway.) */
1562 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1564 /* This is how to output an element of a case-vector that is relative. */
1566 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1567 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1570 /* This is how to output an assembler line
1571 that says to advance the location counter
1572 to a multiple of 2**LOG bytes. */
1574 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1576 fprintf (FILE, "\t.align %d\n", LOG);
1578 /* This is how to advance the location counter by SIZE bytes. */
1580 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1581 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1583 /* This says how to output an assembler line
1584 to define a global common symbol. */
1586 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1587 ( fputs ("\t.comm ", (FILE)), \
1588 assemble_name ((FILE), (NAME)), \
1589 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1591 /* This says how to output an assembler line
1592 to define a local common symbol. */
1594 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1595 ( fputs ("\t.lcomm ", (FILE)), \
1596 assemble_name ((FILE), (NAME)), \
1597 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1600 /* Print operand X (an rtx) in assembler syntax to file FILE.
1601 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1602 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1604 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1606 /* Determine which codes are valid without a following integer. These must
1609 ~ Generates the name of the current function.
1611 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1612 attributes are examined to determine what is appropriate.
1614 , Generates single precision suffix for floating point
1615 instructions (s for IEEE, f for VAX)
1617 - Generates double precision suffix for floating point
1618 instructions (t for IEEE, g for VAX)
1620 + Generates a nop instruction after a noreturn call at the very end
1624 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1625 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1626 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+')
1628 /* Print a memory address as an operand to reference that memory location. */
1630 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1631 print_operand_address((FILE), (ADDR))
1633 /* Define the codes that are matched by predicates in alpha.c. */
1635 #define PREDICATE_CODES \
1636 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, \
1638 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1639 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1640 {"reg_or_const_int_operand", {SUBREG, REG, CONST_INT}}, \
1641 {"cint8_operand", {CONST_INT}}, \
1642 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1643 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1644 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1645 {"const48_operand", {CONST_INT}}, \
1646 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1647 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1648 {"mode_mask_operand", {CONST_INT}}, \
1649 {"mul8_operand", {CONST_INT}}, \
1650 {"mode_width_operand", {CONST_INT}}, \
1651 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1652 {"alpha_zero_comparison_operator", {EQ, NE, LE, LT, LEU, LTU}}, \
1653 {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \
1654 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1655 {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \
1656 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1657 {"const0_operand", {CONST_INT, CONST_DOUBLE, CONST_VECTOR}}, \
1658 {"samegp_function_operand", {SYMBOL_REF}}, \
1659 {"direct_call_operand", {SYMBOL_REF}}, \
1660 {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
1661 {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \
1662 {"global_symbolic_operand", {SYMBOL_REF, CONST}}, \
1663 {"dtp16_symbolic_operand", {CONST}}, \
1664 {"dtp32_symbolic_operand", {CONST}}, \
1665 {"gotdtp_symbolic_operand", {CONST}}, \
1666 {"tp16_symbolic_operand", {CONST}}, \
1667 {"tp32_symbolic_operand", {CONST}}, \
1668 {"gottp_symbolic_operand", {CONST}}, \
1669 {"call_operand", {REG, SYMBOL_REF}}, \
1670 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1671 CONST_VECTOR, SYMBOL_REF, CONST, LABEL_REF, HIGH}},\
1672 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1673 CONST_VECTOR, SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
1674 {"some_ni_operand", {SUBREG, REG, MEM}}, \
1675 {"aligned_memory_operand", {MEM}}, \
1676 {"unaligned_memory_operand", {MEM}}, \
1677 {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
1678 {"any_memory_operand", {MEM}}, \
1679 {"hard_fp_register_operand", {SUBREG, REG}}, \
1680 {"hard_int_register_operand", {SUBREG, REG}}, \
1681 {"reg_not_elim_operand", {SUBREG, REG}}, \
1682 {"reg_no_subreg_operand", {REG}}, \
1683 {"addition_operation", {PLUS}}, \
1684 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1685 {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC, \
1688 /* Define the `__builtin_va_list' type for the ABI. */
1689 #define BUILD_VA_LIST_TYPE(VALIST) \
1690 (VALIST) = alpha_build_va_list ()
1692 /* Implement `va_start' for varargs and stdarg. */
1693 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1694 alpha_va_start (valist, nextarg)
1696 /* Implement `va_arg'. */
1697 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1698 alpha_va_arg (valist, type)
1700 /* Tell collect that the object format is ECOFF. */
1701 #define OBJECT_FORMAT_COFF
1702 #define EXTENDED_COFF
1704 /* If we use NM, pass -g to it so it only lists globals. */
1705 #define NM_FLAGS "-pg"
1707 /* Definitions for debugging. */
1709 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1710 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1711 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1713 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1714 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1718 /* Correct the offset of automatic variables and arguments. Note that
1719 the Alpha debug format wants all automatic variables and arguments
1720 to be in terms of two different offsets from the virtual frame pointer,
1721 which is the stack pointer before any adjustment in the function.
1722 The offset for the argument pointer is fixed for the native compiler,
1723 it is either zero (for the no arguments case) or large enough to hold
1724 all argument registers.
1725 The offset for the auto pointer is the fourth argument to the .frame
1726 directive (local_offset).
1727 To stay compatible with the native tools we use the same offsets
1728 from the virtual frame pointer and adjust the debugger arg/auto offsets
1729 accordingly. These debugger offsets are set up in output_prolog. */
1731 extern long alpha_arg_offset;
1732 extern long alpha_auto_offset;
1733 #define DEBUGGER_AUTO_OFFSET(X) \
1734 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1735 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1738 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) \
1739 alpha_output_lineno (STREAM, LINE)
1741 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1742 alpha_output_filename (STREAM, NAME)
1744 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1745 number, because the real length runs past this up to the next
1746 continuation point. This is really a dbxout.c bug. */
1747 #define DBX_CONTIN_LENGTH 3000
1749 /* By default, turn on GDB extensions. */
1750 #define DEFAULT_GDB_EXTENSIONS 1
1752 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1753 #define NO_DBX_FUNCTION_END 1
1755 /* If we are smuggling stabs through the ALPHA ECOFF object
1756 format, put a comment in front of the .stab<x> operation so
1757 that the ALPHA assembler does not choke. The mips-tfile program
1758 will correctly put the stab into the object file. */
1760 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1761 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1762 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1764 /* Forward references to tags are allowed. */
1765 #define SDB_ALLOW_FORWARD_REFERENCES
1767 /* Unknown tags are also allowed. */
1768 #define SDB_ALLOW_UNKNOWN_REFERENCES
1770 #define PUT_SDB_DEF(a) \
1772 fprintf (asm_out_file, "\t%s.def\t", \
1773 (TARGET_GAS) ? "" : "#"); \
1774 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1775 fputc (';', asm_out_file); \
1778 #define PUT_SDB_PLAIN_DEF(a) \
1780 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1781 (TARGET_GAS) ? "" : "#", (a)); \
1784 #define PUT_SDB_TYPE(a) \
1786 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1789 /* For block start and end, we create labels, so that
1790 later we can figure out where the correct offset is.
1791 The normal .ent/.end serve well enough for functions,
1792 so those are just commented out. */
1794 extern int sdb_label_count; /* block start/end next label # */
1796 #define PUT_SDB_BLOCK_START(LINE) \
1798 fprintf (asm_out_file, \
1799 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1801 (TARGET_GAS) ? "" : "#", \
1804 sdb_label_count++; \
1807 #define PUT_SDB_BLOCK_END(LINE) \
1809 fprintf (asm_out_file, \
1810 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1812 (TARGET_GAS) ? "" : "#", \
1815 sdb_label_count++; \
1818 #define PUT_SDB_FUNCTION_START(LINE)
1820 #define PUT_SDB_FUNCTION_END(LINE)
1822 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1824 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1825 mips-tdump.c to print them out.
1827 These must match the corresponding definitions in gdb/mipsread.c.
1828 Unfortunately, gcc and gdb do not currently share any directories. */
1830 #define CODE_MASK 0x8F300
1831 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1832 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1833 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1835 /* Override some mips-tfile definitions. */
1837 #define SHASH_SIZE 511
1838 #define THASH_SIZE 55
1840 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1842 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1844 /* The system headers under Alpha systems are generally C++-aware. */
1845 #define NO_IMPLICIT_EXTERN_C
1847 /* Generate calls to memcpy, etc., not bcopy, etc. */
1848 #define TARGET_MEM_FUNCTIONS 1
1850 /* Pass complex arguments independently. */
1851 #define SPLIT_COMPLEX_ARGS 1