1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2004, 2005, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
51 if (alpha_cpu == PROCESSOR_EV6) \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
56 else if (alpha_cpu == PROCESSOR_EV5) \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
61 else /* Presumably ev4. */ \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
67 builtin_define ("_IEEE_FP"); \
68 if (TARGET_IEEE_WITH_INEXACT) \
69 builtin_define ("_IEEE_FP_INEXACT"); \
70 if (TARGET_LONG_DOUBLE_128) \
71 builtin_define ("__LONG_DOUBLE_128__"); \
73 /* Macros dependent on the C dialect. */ \
74 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
77 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
78 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
81 if (preprocessing_asm_p ()) \
82 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
83 else if (c_dialect_cxx ()) \
85 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
86 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
89 builtin_define_std ("LANGUAGE_C"); \
90 if (c_dialect_objc ()) \
92 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
93 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
99 #define SWITCH_TAKES_ARG(CHAR) \
100 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
102 #define WORD_SWITCH_TAKES_ARG(STR) \
103 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
105 /* Print subsidiary information on the compiler version in use. */
106 #define TARGET_VERSION
108 /* Run-time compilation parameters selecting different hardware subsets. */
110 /* Which processor to schedule for. The cpu attribute defines a list that
111 mirrors this list, so changes to alpha.md must be made at the same time. */
115 PROCESSOR_EV4, /* 2106[46]{a,} */
116 PROCESSOR_EV5, /* 21164{a,pc,} */
117 PROCESSOR_EV6, /* 21264 */
121 extern enum processor_type alpha_cpu;
122 extern enum processor_type alpha_tune;
124 enum alpha_trap_precision
126 ALPHA_TP_PROG, /* No precision (default). */
127 ALPHA_TP_FUNC, /* Trap contained within originating function. */
128 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
131 enum alpha_fp_rounding_mode
133 ALPHA_FPRM_NORM, /* Normal rounding mode. */
134 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
135 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
136 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
139 enum alpha_fp_trap_mode
141 ALPHA_FPTM_N, /* Normal trap mode. */
142 ALPHA_FPTM_U, /* Underflow traps enabled. */
143 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
144 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
147 extern enum alpha_trap_precision alpha_tp;
148 extern enum alpha_fp_rounding_mode alpha_fprm;
149 extern enum alpha_fp_trap_mode alpha_fptm;
151 /* Invert the easy way to make options work. */
152 #define TARGET_FP (!TARGET_SOFT_FP)
154 /* These are for target os support and cannot be changed at runtime. */
155 #define TARGET_ABI_WINDOWS_NT 0
156 #define TARGET_ABI_OPEN_VMS 0
157 #define TARGET_ABI_UNICOSMK 0
158 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
159 && !TARGET_ABI_OPEN_VMS \
160 && !TARGET_ABI_UNICOSMK)
162 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
163 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
165 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
166 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
168 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
169 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
171 #ifndef TARGET_HAS_XFLOATING_LIBS
172 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128
174 #ifndef TARGET_PROFILING_NEEDS_GP
175 #define TARGET_PROFILING_NEEDS_GP 0
177 #ifndef TARGET_LD_BUGGY_LDGP
178 #define TARGET_LD_BUGGY_LDGP 0
180 #ifndef TARGET_FIXUP_EV5_PREFETCH
181 #define TARGET_FIXUP_EV5_PREFETCH 0
184 #define HAVE_AS_TLS 0
187 #define TARGET_DEFAULT MASK_FPREGS
189 #ifndef TARGET_CPU_DEFAULT
190 #define TARGET_CPU_DEFAULT 0
193 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
194 #ifdef HAVE_AS_EXPLICIT_RELOCS
195 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
196 #define TARGET_SUPPORT_ARCH 1
198 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
202 #ifndef TARGET_SUPPORT_ARCH
203 #define TARGET_SUPPORT_ARCH 0
206 /* Support for a compile-time default CPU, et cetera. The rules are:
207 --with-cpu is ignored if -mcpu is specified.
208 --with-tune is ignored if -mtune is specified. */
209 #define OPTION_DEFAULT_SPECS \
210 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
211 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
214 /* Define this macro to change register usage conditional on target flags.
216 On the Alpha, we use this to disable the floating-point registers when
219 #define CONDITIONAL_REGISTER_USAGE \
222 if (! TARGET_FPREGS) \
223 for (i = 32; i < 63; i++) \
224 fixed_regs[i] = call_used_regs[i] = 1; \
227 /* target machine storage layout */
229 /* Define the size of `int'. The default is the same as the word size. */
230 #define INT_TYPE_SIZE 32
232 /* Define the size of `long long'. The default is the twice the word size. */
233 #define LONG_LONG_TYPE_SIZE 64
235 /* The two floating-point formats we support are S-floating, which is
236 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
237 and `long double' are T. */
239 #define FLOAT_TYPE_SIZE 32
240 #define DOUBLE_TYPE_SIZE 64
241 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
243 /* Define this to set long double type size to use in libgcc2.c, which can
244 not depend on target_flags. */
245 #ifdef __LONG_DOUBLE_128__
246 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
248 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
251 /* Work around target_flags dependency in ada/targtyps.c. */
252 #define WIDEST_HARDWARE_FP_SIZE 64
254 #define WCHAR_TYPE "unsigned int"
255 #define WCHAR_TYPE_SIZE 32
257 /* Define this macro if it is advisable to hold scalars in registers
258 in a wider mode than that declared by the program. In such cases,
259 the value is constrained to be within the bounds of the declared
260 type, but kept valid in the wider mode. The signedness of the
261 extension may differ from that of the type.
263 For Alpha, we always store objects in a full register. 32-bit integers
264 are always sign-extended, but smaller objects retain their signedness.
266 Note that small vector types can get mapped onto integer modes at the
267 whim of not appearing in alpha-modes.def. We never promoted these
268 values before; don't do so now that we've trimmed the set of modes to
269 those actually implemented in the backend. */
271 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
272 if (GET_MODE_CLASS (MODE) == MODE_INT \
273 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \
274 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
276 if ((MODE) == SImode) \
281 /* Define this if most significant bit is lowest numbered
282 in instructions that operate on numbered bit-fields.
284 There are no such instructions on the Alpha, but the documentation
286 #define BITS_BIG_ENDIAN 0
288 /* Define this if most significant byte of a word is the lowest numbered.
289 This is false on the Alpha. */
290 #define BYTES_BIG_ENDIAN 0
292 /* Define this if most significant word of a multiword number is lowest
295 For Alpha we can decide arbitrarily since there are no machine instructions
296 for them. Might as well be consistent with bytes. */
297 #define WORDS_BIG_ENDIAN 0
299 /* Width of a word, in units (bytes). */
300 #define UNITS_PER_WORD 8
302 /* Width in bits of a pointer.
303 See also the macro `Pmode' defined below. */
304 #define POINTER_SIZE 64
306 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
307 #define PARM_BOUNDARY 64
309 /* Boundary (in *bits*) on which stack pointer should be aligned. */
310 #define STACK_BOUNDARY 128
312 /* Allocation boundary (in *bits*) for the code of a function. */
313 #define FUNCTION_BOUNDARY 32
315 /* Alignment of field after `int : 0' in a structure. */
316 #define EMPTY_FIELD_BOUNDARY 64
318 /* Every structure's size must be a multiple of this. */
319 #define STRUCTURE_SIZE_BOUNDARY 8
321 /* A bit-field declared as `int' forces `int' alignment for the struct. */
322 #define PCC_BITFIELD_TYPE_MATTERS 1
324 /* No data type wants to be aligned rounder than this. */
325 #define BIGGEST_ALIGNMENT 128
327 /* For atomic access to objects, must have at least 32-bit alignment
328 unless the machine has byte operations. */
329 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
331 /* Align all constants and variables to at least a word boundary so
332 we can pick up pieces of them faster. */
333 /* ??? Only if block-move stuff knows about different source/destination
336 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
337 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
340 /* Set this nonzero if move instructions will actually fail to work
341 when given unaligned data.
343 Since we get an error message when we do one, call them invalid. */
345 #define STRICT_ALIGNMENT 1
347 /* Set this nonzero if unaligned move instructions are extremely slow.
349 On the Alpha, they trap. */
351 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
353 /* Standard register usage. */
355 /* Number of actual hardware registers.
356 The hardware registers are assigned numbers for the compiler
357 from 0 to just below FIRST_PSEUDO_REGISTER.
358 All registers that the compiler knows about must be given numbers,
359 even those that are not normally considered general registers.
361 We define all 32 integer registers, even though $31 is always zero,
362 and all 32 floating-point registers, even though $f31 is also
363 always zero. We do not bother defining the FP status register and
364 there are no other registers.
366 Since $31 is always zero, we will use register number 31 as the
367 argument pointer. It will never appear in the generated code
368 because we will always be eliminating it in favor of the stack
369 pointer or hardware frame pointer.
371 Likewise, we use $f31 for the frame pointer, which will always
372 be eliminated in favor of the hardware frame pointer or the
375 #define FIRST_PSEUDO_REGISTER 64
377 /* 1 for registers that have pervasive standard uses
378 and are not available for the register allocator. */
380 #define FIXED_REGISTERS \
381 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
382 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
383 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
384 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
386 /* 1 for registers not available across function calls.
387 These must include the FIXED_REGISTERS and also any
388 registers that can be used without being saved.
389 The latter must include the registers where values are returned
390 and the register where structure-value addresses are passed.
391 Aside from that, you can include as many other registers as you like. */
392 #define CALL_USED_REGISTERS \
393 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
394 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
395 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
396 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
398 /* List the order in which to allocate registers. Each register must be
399 listed once, even those in FIXED_REGISTERS. */
401 #define REG_ALLOC_ORDER { \
402 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \
403 22, 23, 24, 25, 28, /* likewise */ \
404 0, /* likewise, but return value */ \
405 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \
406 27, /* likewise, but OSF procedure value */ \
408 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \
409 54, 55, 56, 57, 58, 59, /* likewise */ \
410 60, 61, 62, /* likewise */ \
411 32, 33, /* likewise, but return values */ \
412 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \
414 9, 10, 11, 12, 13, 14, /* saved integer registers */ \
415 26, /* return address */ \
416 15, /* hard frame pointer */ \
418 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \
419 40, 41, /* likewise */ \
421 29, 30, 31, 63 /* gp, sp, ap, sfp */ \
424 /* Return number of consecutive hard regs needed starting at reg REGNO
425 to hold something of mode MODE.
426 This is ordinarily the length in words of a value of mode MODE
427 but can be less for certain modes in special long registers. */
429 #define HARD_REGNO_NREGS(REGNO, MODE) \
430 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
432 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
433 On Alpha, the integer registers can hold any mode. The floating-point
434 registers can hold 64-bit integers as well, but not smaller values. */
436 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
437 (IN_RANGE ((REGNO), 32, 62) \
438 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
439 || (MODE) == SCmode || (MODE) == DCmode \
442 /* A C expression that is nonzero if a value of mode
443 MODE1 is accessible in mode MODE2 without copying.
445 This asymmetric test is true when MODE1 could be put
446 in an FP register but MODE2 could not. */
448 #define MODES_TIEABLE_P(MODE1, MODE2) \
449 (HARD_REGNO_MODE_OK (32, (MODE1)) \
450 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
453 /* Specify the registers used for certain standard purposes.
454 The values of these macros are register numbers. */
456 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
457 /* #define PC_REGNUM */
459 /* Register to use for pushing function arguments. */
460 #define STACK_POINTER_REGNUM 30
462 /* Base register for access to local variables of the function. */
463 #define HARD_FRAME_POINTER_REGNUM 15
465 /* Base register for access to arguments of the function. */
466 #define ARG_POINTER_REGNUM 31
468 /* Base register for access to local variables of function. */
469 #define FRAME_POINTER_REGNUM 63
471 /* Register in which static-chain is passed to a function.
473 For the Alpha, this is based on an example; the calling sequence
474 doesn't seem to specify this. */
475 #define STATIC_CHAIN_REGNUM 1
477 /* The register number of the register used to address a table of
478 static data addresses in memory. */
479 #define PIC_OFFSET_TABLE_REGNUM 29
481 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
482 is clobbered by calls. */
483 /* ??? It is and it isn't. It's required to be valid for a given
484 function when the function returns. It isn't clobbered by
485 current_file functions. Moreover, we do not expose the ldgp
486 until after reload, so we're probably safe. */
487 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
489 /* Define the classes of registers for register constraints in the
490 machine description. Also define ranges of constants.
492 One of the classes must always be named ALL_REGS and include all hard regs.
493 If there is more than one class, another class must be named NO_REGS
494 and contain no registers.
496 The name GENERAL_REGS must be the name of a class (or an alias for
497 another name such as ALL_REGS). This is the class of registers
498 that is allowed by "g" or "r" in a register constraint.
499 Also, registers outside this class are allocated only when
500 instructions express preferences for them.
502 The classes must be numbered in nondecreasing order; that is,
503 a larger-numbered class must never be contained completely
504 in a smaller-numbered class.
506 For any two classes, it is very desirable that there be another
507 class that represents their union. */
510 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
511 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
515 #define N_REG_CLASSES (int) LIM_REG_CLASSES
517 /* Give names of register classes as strings for dump file. */
519 #define REG_CLASS_NAMES \
520 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
521 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
523 /* Define which registers fit in which classes.
524 This is an initializer for a vector of HARD_REG_SET
525 of length N_REG_CLASSES. */
527 #define REG_CLASS_CONTENTS \
528 { {0x00000000, 0x00000000}, /* NO_REGS */ \
529 {0x00000001, 0x00000000}, /* R0_REG */ \
530 {0x01000000, 0x00000000}, /* R24_REG */ \
531 {0x02000000, 0x00000000}, /* R25_REG */ \
532 {0x08000000, 0x00000000}, /* R27_REG */ \
533 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
534 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
535 {0xffffffff, 0xffffffff} }
537 /* The following macro defines cover classes for Integrated Register
538 Allocator. Cover classes is a set of non-intersected register
539 classes covering all hard registers used for register allocation
540 purpose. Any move between two registers of a cover class should be
541 cheaper than load or store of the registers. The macro value is
542 array of register classes with LIM_REG_CLASSES used as the end
545 #define IRA_COVER_CLASSES \
547 GENERAL_REGS, FLOAT_REGS, LIM_REG_CLASSES \
550 /* The same information, inverted:
551 Return the class number of the smallest class containing
552 reg number REGNO. This could be a conditional expression
553 or could index an array. */
555 #define REGNO_REG_CLASS(REGNO) \
556 ((REGNO) == 0 ? R0_REG \
557 : (REGNO) == 24 ? R24_REG \
558 : (REGNO) == 25 ? R25_REG \
559 : (REGNO) == 27 ? R27_REG \
560 : IN_RANGE ((REGNO), 32, 62) ? FLOAT_REGS \
563 /* The class value for index registers, and the one for base regs. */
564 #define INDEX_REG_CLASS NO_REGS
565 #define BASE_REG_CLASS GENERAL_REGS
567 /* Given an rtx X being reloaded into a reg required to be
568 in class CLASS, return the class of reg to actually use.
569 In general this is just CLASS; but on some machines
570 in some cases it is preferable to use a more restrictive class. */
572 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
574 /* If we are copying between general and FP registers, we need a memory
575 location unless the FIX extension is available. */
577 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
578 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
579 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
581 /* Specify the mode to be used for memory when a secondary memory
582 location is needed. If MODE is floating-point, use it. Otherwise,
583 widen to a word like the default. This is needed because we always
584 store integers in FP registers in quadword format. This whole
585 area is very tricky! */
586 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
587 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
588 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
589 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
591 /* Return the maximum number of consecutive registers
592 needed to represent mode MODE in a register of class CLASS. */
594 #define CLASS_MAX_NREGS(CLASS, MODE) \
595 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
597 /* Return the class of registers that cannot change mode from FROM to TO. */
599 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
600 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
601 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
603 /* Define the cost of moving between registers of various classes. Moving
604 between FLOAT_REGS and anything else except float regs is expensive.
605 In fact, we make it quite expensive because we really don't want to
606 do these moves unless it is clearly worth it. Optimizations may
607 reduce the impact of not being able to allocate a pseudo to a
610 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
611 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \
612 : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8) \
613 : 4+2*alpha_memory_latency)
615 /* A C expressions returning the cost of moving data of MODE from a register to
618 On the Alpha, bump this up a bit. */
620 extern int alpha_memory_latency;
621 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
623 /* Provide the cost of a branch. Exact meaning under development. */
624 #define BRANCH_COST(speed_p, predictable_p) 5
626 /* Stack layout; function entry, exit and calling. */
628 /* Define this if pushing a word on the stack
629 makes the stack pointer a smaller address. */
630 #define STACK_GROWS_DOWNWARD
632 /* Define this to nonzero if the nominal address of the stack frame
633 is at the high-address end of the local variables;
634 that is, each additional local variable allocated
635 goes at a more negative offset in the frame. */
636 /* #define FRAME_GROWS_DOWNWARD 0 */
638 /* Offset within stack frame to start allocating local variables at.
639 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
640 first local allocated. Otherwise, it is the offset to the BEGINNING
641 of the first local allocated. */
643 #define STARTING_FRAME_OFFSET 0
645 /* If we generate an insn to push BYTES bytes,
646 this says how many the stack pointer really advances by.
647 On Alpha, don't define this because there are no push insns. */
648 /* #define PUSH_ROUNDING(BYTES) */
650 /* Define this to be nonzero if stack checking is built into the ABI. */
651 #define STACK_CHECK_BUILTIN 1
653 /* Define this if the maximum size of all the outgoing args is to be
654 accumulated and pushed during the prologue. The amount can be
655 found in the variable crtl->outgoing_args_size. */
656 #define ACCUMULATE_OUTGOING_ARGS 1
658 /* Offset of first parameter from the argument pointer register value. */
660 #define FIRST_PARM_OFFSET(FNDECL) 0
662 /* Definitions for register eliminations.
664 We have two registers that can be eliminated on the Alpha. First, the
665 frame pointer register can often be eliminated in favor of the stack
666 pointer register. Secondly, the argument pointer register can always be
667 eliminated; it is replaced with either the stack or frame pointer. */
669 /* This is an array of structures. Each structure initializes one pair
670 of eliminable registers. The "from" register number is given first,
671 followed by "to". Eliminations of the same "from" register are listed
672 in order of preference. */
674 #define ELIMINABLE_REGS \
675 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
676 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
677 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
678 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
680 /* Round up to a multiple of 16 bytes. */
681 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
683 /* Define the offset between two registers, one to be eliminated, and the other
684 its replacement, at the start of a routine. */
685 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
686 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
688 /* Define this if stack space is still allocated for a parameter passed
690 /* #define REG_PARM_STACK_SPACE */
692 /* Define how to find the value returned by a function.
693 VALTYPE is the data type of the value (as a tree).
694 If the precise function being called is known, FUNC is its FUNCTION_DECL;
695 otherwise, FUNC is 0.
697 On Alpha the value is found in $0 for integer functions and
698 $f0 for floating-point functions. */
700 #define FUNCTION_VALUE(VALTYPE, FUNC) \
701 function_value (VALTYPE, FUNC, VOIDmode)
703 /* Define how to find the value returned by a library function
704 assuming the value has mode MODE. */
706 #define LIBCALL_VALUE(MODE) \
707 function_value (NULL, NULL, MODE)
709 /* 1 if N is a possible register number for a function value
710 as seen by the caller. */
712 #define FUNCTION_VALUE_REGNO_P(N) \
713 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
715 /* 1 if N is a possible register number for function argument passing.
716 On Alpha, these are $16-$21 and $f16-$f21. */
718 #define FUNCTION_ARG_REGNO_P(N) \
719 (IN_RANGE ((N), 16, 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
721 /* Define a data type for recording info about an argument list
722 during the scan of that argument list. This data type should
723 hold all necessary information about the function itself
724 and about the args processed so far, enough to enable macros
725 such as FUNCTION_ARG to determine where the next arg should go.
727 On Alpha, this is a single integer, which is a number of words
728 of arguments scanned so far.
729 Thus 6 or more means all following args should go on the stack. */
731 #define CUMULATIVE_ARGS int
733 /* Initialize a variable CUM of type CUMULATIVE_ARGS
734 for a call to a function whose data type is FNTYPE.
735 For a library call, FNTYPE is 0. */
737 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
740 /* Define intermediate macro to compute the size (in registers) of an argument
743 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
744 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
745 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
746 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
748 /* Make (or fake) .linkage entry for function call.
749 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
751 /* This macro defines the start of an assembly comment. */
753 #define ASM_COMMENT_START " #"
755 /* This macro produces the initial definition of a function. */
757 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
758 alpha_start_function(FILE,NAME,DECL);
760 /* This macro closes up a function definition for the assembler. */
762 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
763 alpha_end_function(FILE,NAME,DECL)
765 /* Output any profiling code before the prologue. */
767 #define PROFILE_BEFORE_PROLOGUE 1
769 /* Never use profile counters. */
771 #define NO_PROFILE_COUNTERS 1
773 /* Output assembler code to FILE to increment profiler label # LABELNO
774 for profiling a function entry. Under OSF/1, profiling is enabled
775 by simply passing -pg to the assembler and linker. */
777 #define FUNCTION_PROFILER(FILE, LABELNO)
779 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
780 the stack pointer does not matter. The value is tested only in
781 functions that have frame pointers.
782 No definition is equivalent to always zero. */
784 #define EXIT_IGNORE_STACK 1
786 /* Define registers used by the epilogue and return instruction. */
788 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
790 /* Length in units of the trampoline for entering a nested function. */
792 #define TRAMPOLINE_SIZE 32
794 /* The alignment of a trampoline, in bits. */
796 #define TRAMPOLINE_ALIGNMENT 64
798 /* A C expression whose value is RTL representing the value of the return
799 address for the frame COUNT steps up from the current frame.
800 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
801 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
803 #define RETURN_ADDR_RTX alpha_return_addr
805 /* Provide a definition of DWARF_FRAME_REGNUM here so that fallback unwinders
806 can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same
807 as the default definition in dwarf2out.c. */
808 #undef DWARF_FRAME_REGNUM
809 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
811 /* Before the prologue, RA lives in $26. */
812 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
813 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
814 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
815 #define DWARF_ZERO_REG 31
817 /* Describe how we implement __builtin_eh_return. */
818 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
819 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
820 #define EH_RETURN_HANDLER_RTX \
821 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
822 crtl->outgoing_args_size))
824 /* Addressing modes, and classification of registers for them. */
826 /* Macros to check register numbers against specific register classes. */
828 /* These assume that REGNO is a hard or pseudo reg number.
829 They give nonzero only if REGNO is a hard reg of the suitable class
830 or a pseudo reg currently allocated to a suitable hard reg.
831 Since they use reg_renumber, they are safe only once reg_renumber
832 has been allocated, which happens in local-alloc.c. */
834 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
835 #define REGNO_OK_FOR_BASE_P(REGNO) \
836 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
837 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
839 /* Maximum number of registers that can appear in a valid memory address. */
840 #define MAX_REGS_PER_ADDRESS 1
842 /* Recognize any constant value that is a valid address. For the Alpha,
843 there are only constants none since we want to use LDA to load any
844 symbolic addresses into registers. */
846 #define CONSTANT_ADDRESS_P(X) \
848 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
850 /* Include all constant integers and constant doubles, but not
851 floating-point, except for floating-point zero. */
853 #define LEGITIMATE_CONSTANT_P alpha_legitimate_constant_p
855 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
856 and check its validity for a certain class.
857 We have two alternate definitions for each of them.
858 The usual definition accepts all pseudo regs; the other rejects
859 them unless they have been allocated suitable hard regs.
860 The symbol REG_OK_STRICT causes the latter definition to be used.
862 Most source files want to accept pseudo regs in the hope that
863 they will get allocated to the class that the insn wants them to be in.
864 Source files for reload pass need to be strict.
865 After reload, it makes no difference, since pseudo regs have
866 been eliminated by then. */
868 /* Nonzero if X is a hard reg that can be used as an index
869 or if it is a pseudo reg. */
870 #define REG_OK_FOR_INDEX_P(X) 0
872 /* Nonzero if X is a hard reg that can be used as a base reg
873 or if it is a pseudo reg. */
874 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
875 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
877 /* ??? Nonzero if X is the frame pointer, or some virtual register
878 that may eliminate to the frame pointer. These will be allowed to
879 have offsets greater than 32K. This is done because register
880 elimination offsets will change the hi/lo split, and if we split
881 before reload, we will require additional instructions. */
882 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
883 (REGNO (X) == 31 || REGNO (X) == 63 \
884 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
885 && REGNO (X) < LAST_VIRTUAL_POINTER_REGISTER))
887 /* Nonzero if X is a hard reg that can be used as a base reg. */
888 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
891 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
893 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
896 /* Try a machine-dependent way of reloading an illegitimate address
897 operand. If we find one, push the reload and jump to WIN. This
898 macro is used in only one place: `find_reloads_address' in reload.c. */
900 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
902 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
910 /* Go to LABEL if ADDR (a legitimate address expression)
911 has an effect that depends on the machine mode it is used for.
912 On the Alpha this is true only for the unaligned modes. We can
913 simplify this test since we know that the address must be valid. */
915 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
916 { if (GET_CODE (ADDR) == AND) goto LABEL; }
918 /* Specify the machine mode that this machine uses
919 for the index in the tablejump instruction. */
920 #define CASE_VECTOR_MODE SImode
922 /* Define as C expression which evaluates to nonzero if the tablejump
923 instruction expects the table to contain offsets from the address of the
926 Do not define this if the table should contain absolute addresses.
927 On the Alpha, the table is really GP-relative, not relative to the PC
928 of the table, but we pretend that it is PC-relative; this should be OK,
929 but we should try to find some better way sometime. */
930 #define CASE_VECTOR_PC_RELATIVE 1
932 /* Define this as 1 if `char' should by default be signed; else as 0. */
933 #define DEFAULT_SIGNED_CHAR 1
935 /* Max number of bytes we can move to or from memory
936 in one reasonably fast instruction. */
940 /* If a memory-to-memory move would take MOVE_RATIO or more simple
941 move-instruction pairs, we will do a movmem or libcall instead.
943 Without byte/word accesses, we want no more than four instructions;
944 with, several single byte accesses are better. */
946 #define MOVE_RATIO(speed) (TARGET_BWX ? 7 : 2)
948 /* Largest number of bytes of an object that can be placed in a register.
949 On the Alpha we have plenty of registers, so use TImode. */
950 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
952 /* Nonzero if access to memory by bytes is no faster than for words.
953 Also nonzero if doing byte operations (specifically shifts) in registers
956 On the Alpha, we want to not use the byte operation and instead use
957 masking operations to access fields; these will save instructions. */
959 #define SLOW_BYTE_ACCESS 1
961 /* Define if operations between registers always perform the operation
962 on the full register even if a narrower mode is specified. */
963 #define WORD_REGISTER_OPERATIONS
965 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
966 will either zero-extend or sign-extend. The value of this macro should
967 be the code that says which one of the two operations is implicitly
968 done, UNKNOWN if none. */
969 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
971 /* Define if loading short immediate values into registers sign extends. */
972 #define SHORT_IMMEDIATES_SIGN_EXTEND
974 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
975 is done just by pretending it is already truncated. */
976 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
978 /* The CIX ctlz and cttz instructions return 64 for zero. */
979 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
980 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
982 /* Define the value returned by a floating-point comparison instruction. */
984 #define FLOAT_STORE_FLAG_VALUE(MODE) \
985 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
987 /* Canonicalize a comparison from one we don't have to one we do have. */
989 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
991 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
992 && (REG_P (OP1) || (OP1) == const0_rtx)) \
997 (CODE) = swap_condition (CODE); \
999 if (((CODE) == LT || (CODE) == LTU) \
1000 && CONST_INT_P (OP1) && INTVAL (OP1) == 256) \
1002 (CODE) = (CODE) == LT ? LE : LEU; \
1003 (OP1) = GEN_INT (255); \
1007 /* Specify the machine mode that pointers have.
1008 After generation of rtl, the compiler makes no further distinction
1009 between pointers and any other objects of this machine mode. */
1010 #define Pmode DImode
1012 /* Mode of a function address in a call instruction (for indexing purposes). */
1014 #define FUNCTION_MODE Pmode
1016 /* Define this if addresses of constant functions
1017 shouldn't be put through pseudo regs where they can be cse'd.
1018 Desirable on machines where ordinary constants are expensive
1019 but a CALL with constant address is cheap.
1021 We define this on the Alpha so that gen_call and gen_call_value
1022 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1023 then copy it into a register, thus actually letting the address be
1026 #define NO_FUNCTION_CSE
1028 /* Define this to be nonzero if shift instructions ignore all but the low-order
1030 #define SHIFT_COUNT_TRUNCATED 1
1032 /* Control the assembler format that we output. */
1034 /* Output to assembler file text saying following lines
1035 may contain character constants, extra white space, comments, etc. */
1036 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1038 /* Output to assembler file text saying following lines
1039 no longer contain unusual constructs. */
1040 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1042 #define TEXT_SECTION_ASM_OP "\t.text"
1044 /* Output before read-only data. */
1046 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1048 /* Output before writable data. */
1050 #define DATA_SECTION_ASM_OP "\t.data"
1052 /* How to refer to registers in assembler output.
1053 This sequence is indexed by compiler's hard-register-number (see above). */
1055 #define REGISTER_NAMES \
1056 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1057 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1058 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1059 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1060 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1061 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1062 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1063 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1065 /* Strip name encoding when emitting labels. */
1067 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1069 const char *name_ = NAME; \
1070 if (*name_ == '@' || *name_ == '%') \
1072 if (*name_ == '*') \
1075 fputs (user_label_prefix, STREAM); \
1076 fputs (name_, STREAM); \
1079 /* Globalizing directive for a label. */
1080 #define GLOBAL_ASM_OP "\t.globl "
1082 /* The prefix to add to user-visible assembler symbols. */
1084 #define USER_LABEL_PREFIX ""
1086 /* This is how to output a label for a jump table. Arguments are the same as
1087 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1090 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1091 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1093 /* This is how to store into the string LABEL
1094 the symbol_ref name of an internal numbered label where
1095 PREFIX is the class of label and NUM is the number within the class.
1096 This is suitable for output with `assemble_name'. */
1098 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1099 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1101 /* We use the default ASCII-output routine, except that we don't write more
1102 than 50 characters since the assembler doesn't support very long lines. */
1104 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1106 FILE *_hide_asm_out_file = (MYFILE); \
1107 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1108 int _hide_thissize = (MYLENGTH); \
1109 int _size_so_far = 0; \
1111 FILE *asm_out_file = _hide_asm_out_file; \
1112 const unsigned char *p = _hide_p; \
1113 int thissize = _hide_thissize; \
1115 fprintf (asm_out_file, "\t.ascii \""); \
1117 for (i = 0; i < thissize; i++) \
1119 register int c = p[i]; \
1121 if (_size_so_far ++ > 50 && i < thissize - 4) \
1122 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1124 if (c == '\"' || c == '\\') \
1125 putc ('\\', asm_out_file); \
1126 if (c >= ' ' && c < 0177) \
1127 putc (c, asm_out_file); \
1130 fprintf (asm_out_file, "\\%o", c); \
1131 /* After an octal-escape, if a digit follows, \
1132 terminate one string constant and start another. \
1133 The VAX assembler fails to stop reading the escape \
1134 after three digits, so this is the only way we \
1135 can get it to parse the data properly. */ \
1136 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1137 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1140 fprintf (asm_out_file, "\"\n"); \
1145 /* This is how to output an element of a case-vector that is relative. */
1147 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1148 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1151 /* This is how to output an assembler line
1152 that says to advance the location counter
1153 to a multiple of 2**LOG bytes. */
1155 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1157 fprintf (FILE, "\t.align %d\n", LOG);
1159 /* This is how to advance the location counter by SIZE bytes. */
1161 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1162 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1164 /* This says how to output an assembler line
1165 to define a global common symbol. */
1167 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1168 ( fputs ("\t.comm ", (FILE)), \
1169 assemble_name ((FILE), (NAME)), \
1170 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1172 /* This says how to output an assembler line
1173 to define a local common symbol. */
1175 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1176 ( fputs ("\t.lcomm ", (FILE)), \
1177 assemble_name ((FILE), (NAME)), \
1178 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1181 /* Print operand X (an rtx) in assembler syntax to file FILE.
1182 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1183 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1185 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1187 /* Determine which codes are valid without a following integer. These must
1190 ~ Generates the name of the current function.
1192 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1193 attributes are examined to determine what is appropriate.
1195 , Generates single precision suffix for floating point
1196 instructions (s for IEEE, f for VAX)
1198 - Generates double precision suffix for floating point
1199 instructions (t for IEEE, g for VAX)
1202 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1203 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1204 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&')
1206 /* Print a memory address as an operand to reference that memory location. */
1208 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1209 print_operand_address((FILE), (ADDR))
1211 /* Tell collect that the object format is ECOFF. */
1212 #define OBJECT_FORMAT_COFF
1213 #define EXTENDED_COFF
1215 /* If we use NM, pass -g to it so it only lists globals. */
1216 #define NM_FLAGS "-pg"
1218 /* Definitions for debugging. */
1220 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1221 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1222 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1224 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1225 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1229 /* Correct the offset of automatic variables and arguments. Note that
1230 the Alpha debug format wants all automatic variables and arguments
1231 to be in terms of two different offsets from the virtual frame pointer,
1232 which is the stack pointer before any adjustment in the function.
1233 The offset for the argument pointer is fixed for the native compiler,
1234 it is either zero (for the no arguments case) or large enough to hold
1235 all argument registers.
1236 The offset for the auto pointer is the fourth argument to the .frame
1237 directive (local_offset).
1238 To stay compatible with the native tools we use the same offsets
1239 from the virtual frame pointer and adjust the debugger arg/auto offsets
1240 accordingly. These debugger offsets are set up in output_prolog. */
1242 extern long alpha_arg_offset;
1243 extern long alpha_auto_offset;
1244 #define DEBUGGER_AUTO_OFFSET(X) \
1245 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1246 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1248 /* mips-tfile doesn't understand .stabd directives. */
1249 #define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) do { \
1250 dbxout_begin_stabn_sline (LINE); \
1251 dbxout_stab_value_internal_label ("LM", &COUNTER); \
1254 /* We want to use MIPS-style .loc directives for SDB line numbers. */
1255 extern int num_source_filenames;
1256 #define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1257 fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE)
1259 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1260 alpha_output_filename (STREAM, NAME)
1262 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1263 number, because the real length runs past this up to the next
1264 continuation point. This is really a dbxout.c bug. */
1265 #define DBX_CONTIN_LENGTH 3000
1267 /* By default, turn on GDB extensions. */
1268 #define DEFAULT_GDB_EXTENSIONS 1
1270 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1271 #define NO_DBX_FUNCTION_END 1
1273 /* If we are smuggling stabs through the ALPHA ECOFF object
1274 format, put a comment in front of the .stab<x> operation so
1275 that the ALPHA assembler does not choke. The mips-tfile program
1276 will correctly put the stab into the object file. */
1278 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1279 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1280 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1282 /* Forward references to tags are allowed. */
1283 #define SDB_ALLOW_FORWARD_REFERENCES
1285 /* Unknown tags are also allowed. */
1286 #define SDB_ALLOW_UNKNOWN_REFERENCES
1288 #define PUT_SDB_DEF(a) \
1290 fprintf (asm_out_file, "\t%s.def\t", \
1291 (TARGET_GAS) ? "" : "#"); \
1292 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1293 fputc (';', asm_out_file); \
1296 #define PUT_SDB_PLAIN_DEF(a) \
1298 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1299 (TARGET_GAS) ? "" : "#", (a)); \
1302 #define PUT_SDB_TYPE(a) \
1304 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1307 /* For block start and end, we create labels, so that
1308 later we can figure out where the correct offset is.
1309 The normal .ent/.end serve well enough for functions,
1310 so those are just commented out. */
1312 extern int sdb_label_count; /* block start/end next label # */
1314 #define PUT_SDB_BLOCK_START(LINE) \
1316 fprintf (asm_out_file, \
1317 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1319 (TARGET_GAS) ? "" : "#", \
1322 sdb_label_count++; \
1325 #define PUT_SDB_BLOCK_END(LINE) \
1327 fprintf (asm_out_file, \
1328 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1330 (TARGET_GAS) ? "" : "#", \
1333 sdb_label_count++; \
1336 #define PUT_SDB_FUNCTION_START(LINE)
1338 #define PUT_SDB_FUNCTION_END(LINE)
1340 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1342 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1343 mips-tdump.c to print them out.
1345 These must match the corresponding definitions in gdb/mipsread.c.
1346 Unfortunately, gcc and gdb do not currently share any directories. */
1348 #define CODE_MASK 0x8F300
1349 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1350 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1351 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1353 /* Override some mips-tfile definitions. */
1355 #define SHASH_SIZE 511
1356 #define THASH_SIZE 55
1358 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1360 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1362 /* The system headers under Alpha systems are generally C++-aware. */
1363 #define NO_IMPLICIT_EXTERN_C