1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2004, 2005 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
51 if (alpha_cpu == PROCESSOR_EV6) \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
56 else if (alpha_cpu == PROCESSOR_EV5) \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
61 else /* Presumably ev4. */ \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
67 builtin_define ("_IEEE_FP"); \
68 if (TARGET_IEEE_WITH_INEXACT) \
69 builtin_define ("_IEEE_FP_INEXACT"); \
70 if (TARGET_LONG_DOUBLE_128) \
71 builtin_define ("__LONG_DOUBLE_128__"); \
73 /* Macros dependent on the C dialect. */ \
74 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
77 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
78 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
81 if (preprocessing_asm_p ()) \
82 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
83 else if (c_dialect_cxx ()) \
85 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
86 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
89 builtin_define_std ("LANGUAGE_C"); \
90 if (c_dialect_objc ()) \
92 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
93 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
99 #define WORD_SWITCH_TAKES_ARG(STR) \
100 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
102 /* Print subsidiary information on the compiler version in use. */
103 #define TARGET_VERSION
105 /* Run-time compilation parameters selecting different hardware subsets. */
107 /* Which processor to schedule for. The cpu attribute defines a list that
108 mirrors this list, so changes to alpha.md must be made at the same time. */
112 PROCESSOR_EV4, /* 2106[46]{a,} */
113 PROCESSOR_EV5, /* 21164{a,pc,} */
114 PROCESSOR_EV6, /* 21264 */
118 extern enum processor_type alpha_cpu;
119 extern enum processor_type alpha_tune;
121 enum alpha_trap_precision
123 ALPHA_TP_PROG, /* No precision (default). */
124 ALPHA_TP_FUNC, /* Trap contained within originating function. */
125 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
128 enum alpha_fp_rounding_mode
130 ALPHA_FPRM_NORM, /* Normal rounding mode. */
131 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
132 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
133 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
136 enum alpha_fp_trap_mode
138 ALPHA_FPTM_N, /* Normal trap mode. */
139 ALPHA_FPTM_U, /* Underflow traps enabled. */
140 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
141 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
144 extern int target_flags;
146 extern enum alpha_trap_precision alpha_tp;
147 extern enum alpha_fp_rounding_mode alpha_fprm;
148 extern enum alpha_fp_trap_mode alpha_fptm;
150 /* Invert the easy way to make options work. */
151 #define TARGET_FP (!TARGET_SOFT_FP)
153 /* These are for target os support and cannot be changed at runtime. */
154 #define TARGET_ABI_WINDOWS_NT 0
155 #define TARGET_ABI_OPEN_VMS 0
156 #define TARGET_ABI_UNICOSMK 0
157 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
158 && !TARGET_ABI_OPEN_VMS \
159 && !TARGET_ABI_UNICOSMK)
161 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
162 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
164 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
165 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
167 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
168 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
170 #ifndef TARGET_HAS_XFLOATING_LIBS
171 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128
173 #ifndef TARGET_PROFILING_NEEDS_GP
174 #define TARGET_PROFILING_NEEDS_GP 0
176 #ifndef TARGET_LD_BUGGY_LDGP
177 #define TARGET_LD_BUGGY_LDGP 0
179 #ifndef TARGET_FIXUP_EV5_PREFETCH
180 #define TARGET_FIXUP_EV5_PREFETCH 0
183 #define HAVE_AS_TLS 0
186 #define TARGET_DEFAULT MASK_FPREGS
188 #ifndef TARGET_CPU_DEFAULT
189 #define TARGET_CPU_DEFAULT 0
192 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
193 #ifdef HAVE_AS_EXPLICIT_RELOCS
194 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
195 #define TARGET_SUPPORT_ARCH 1
197 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
201 #ifndef TARGET_SUPPORT_ARCH
202 #define TARGET_SUPPORT_ARCH 0
205 /* Support for a compile-time default CPU, et cetera. The rules are:
206 --with-cpu is ignored if -mcpu is specified.
207 --with-tune is ignored if -mtune is specified. */
208 #define OPTION_DEFAULT_SPECS \
209 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
210 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
212 /* Sometimes certain combinations of command options do not make sense
213 on a particular target machine. You can define a macro
214 `OVERRIDE_OPTIONS' to take account of this. This macro, if
215 defined, is executed once just after all the command options have
218 On the Alpha, it is used to translate target-option strings into
221 #define OVERRIDE_OPTIONS override_options ()
224 /* Define this macro to change register usage conditional on target flags.
226 On the Alpha, we use this to disable the floating-point registers when
229 #define CONDITIONAL_REGISTER_USAGE \
232 if (! TARGET_FPREGS) \
233 for (i = 32; i < 63; i++) \
234 fixed_regs[i] = call_used_regs[i] = 1; \
238 /* Show we can debug even without a frame pointer. */
239 #define CAN_DEBUG_WITHOUT_FP
241 /* target machine storage layout */
243 /* Define the size of `int'. The default is the same as the word size. */
244 #define INT_TYPE_SIZE 32
246 /* Define the size of `long long'. The default is the twice the word size. */
247 #define LONG_LONG_TYPE_SIZE 64
249 /* We're IEEE unless someone says to use VAX. */
250 #define TARGET_FLOAT_FORMAT \
251 (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)
253 /* The two floating-point formats we support are S-floating, which is
254 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
255 and `long double' are T. */
257 #define FLOAT_TYPE_SIZE 32
258 #define DOUBLE_TYPE_SIZE 64
259 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
261 /* Define this to set long double type size to use in libgcc2.c, which can
262 not depend on target_flags. */
263 #ifdef __LONG_DOUBLE_128__
264 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
266 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
269 /* Work around target_flags dependency in ada/targtyps.c. */
270 #define WIDEST_HARDWARE_FP_SIZE 64
272 #define WCHAR_TYPE "unsigned int"
273 #define WCHAR_TYPE_SIZE 32
275 /* Define this macro if it is advisable to hold scalars in registers
276 in a wider mode than that declared by the program. In such cases,
277 the value is constrained to be within the bounds of the declared
278 type, but kept valid in the wider mode. The signedness of the
279 extension may differ from that of the type.
281 For Alpha, we always store objects in a full register. 32-bit integers
282 are always sign-extended, but smaller objects retain their signedness.
284 Note that small vector types can get mapped onto integer modes at the
285 whim of not appearing in alpha-modes.def. We never promoted these
286 values before; don't do so now that we've trimmed the set of modes to
287 those actually implemented in the backend. */
289 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
290 if (GET_MODE_CLASS (MODE) == MODE_INT \
291 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \
292 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
294 if ((MODE) == SImode) \
299 /* Define this if most significant bit is lowest numbered
300 in instructions that operate on numbered bit-fields.
302 There are no such instructions on the Alpha, but the documentation
304 #define BITS_BIG_ENDIAN 0
306 /* Define this if most significant byte of a word is the lowest numbered.
307 This is false on the Alpha. */
308 #define BYTES_BIG_ENDIAN 0
310 /* Define this if most significant word of a multiword number is lowest
313 For Alpha we can decide arbitrarily since there are no machine instructions
314 for them. Might as well be consistent with bytes. */
315 #define WORDS_BIG_ENDIAN 0
317 /* Width of a word, in units (bytes). */
318 #define UNITS_PER_WORD 8
320 /* Width in bits of a pointer.
321 See also the macro `Pmode' defined below. */
322 #define POINTER_SIZE 64
324 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
325 #define PARM_BOUNDARY 64
327 /* Boundary (in *bits*) on which stack pointer should be aligned. */
328 #define STACK_BOUNDARY 128
330 /* Allocation boundary (in *bits*) for the code of a function. */
331 #define FUNCTION_BOUNDARY 32
333 /* Alignment of field after `int : 0' in a structure. */
334 #define EMPTY_FIELD_BOUNDARY 64
336 /* Every structure's size must be a multiple of this. */
337 #define STRUCTURE_SIZE_BOUNDARY 8
339 /* A bit-field declared as `int' forces `int' alignment for the struct. */
340 #define PCC_BITFIELD_TYPE_MATTERS 1
342 /* No data type wants to be aligned rounder than this. */
343 #define BIGGEST_ALIGNMENT 128
345 /* For atomic access to objects, must have at least 32-bit alignment
346 unless the machine has byte operations. */
347 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
349 /* Align all constants and variables to at least a word boundary so
350 we can pick up pieces of them faster. */
351 /* ??? Only if block-move stuff knows about different source/destination
354 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
355 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
358 /* Set this nonzero if move instructions will actually fail to work
359 when given unaligned data.
361 Since we get an error message when we do one, call them invalid. */
363 #define STRICT_ALIGNMENT 1
365 /* Set this nonzero if unaligned move instructions are extremely slow.
367 On the Alpha, they trap. */
369 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
371 /* Standard register usage. */
373 /* Number of actual hardware registers.
374 The hardware registers are assigned numbers for the compiler
375 from 0 to just below FIRST_PSEUDO_REGISTER.
376 All registers that the compiler knows about must be given numbers,
377 even those that are not normally considered general registers.
379 We define all 32 integer registers, even though $31 is always zero,
380 and all 32 floating-point registers, even though $f31 is also
381 always zero. We do not bother defining the FP status register and
382 there are no other registers.
384 Since $31 is always zero, we will use register number 31 as the
385 argument pointer. It will never appear in the generated code
386 because we will always be eliminating it in favor of the stack
387 pointer or hardware frame pointer.
389 Likewise, we use $f31 for the frame pointer, which will always
390 be eliminated in favor of the hardware frame pointer or the
393 #define FIRST_PSEUDO_REGISTER 64
395 /* 1 for registers that have pervasive standard uses
396 and are not available for the register allocator. */
398 #define FIXED_REGISTERS \
399 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
400 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
401 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
402 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
404 /* 1 for registers not available across function calls.
405 These must include the FIXED_REGISTERS and also any
406 registers that can be used without being saved.
407 The latter must include the registers where values are returned
408 and the register where structure-value addresses are passed.
409 Aside from that, you can include as many other registers as you like. */
410 #define CALL_USED_REGISTERS \
411 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
412 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
413 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
414 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
416 /* List the order in which to allocate registers. Each register must be
417 listed once, even those in FIXED_REGISTERS. */
419 #define REG_ALLOC_ORDER { \
420 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \
421 22, 23, 24, 25, 28, /* likewise */ \
422 0, /* likewise, but return value */ \
423 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \
424 27, /* likewise, but OSF procedure value */ \
426 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \
427 54, 55, 56, 57, 58, 59, /* likewise */ \
428 60, 61, 62, /* likewise */ \
429 32, 33, /* likewise, but return values */ \
430 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \
432 9, 10, 11, 12, 13, 14, /* saved integer registers */ \
433 26, /* return address */ \
434 15, /* hard frame pointer */ \
436 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \
437 40, 41, /* likewise */ \
439 29, 30, 31, 63 /* gp, sp, ap, sfp */ \
442 /* Return number of consecutive hard regs needed starting at reg REGNO
443 to hold something of mode MODE.
444 This is ordinarily the length in words of a value of mode MODE
445 but can be less for certain modes in special long registers. */
447 #define HARD_REGNO_NREGS(REGNO, MODE) \
448 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
450 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
451 On Alpha, the integer registers can hold any mode. The floating-point
452 registers can hold 64-bit integers as well, but not smaller values. */
454 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
455 ((REGNO) >= 32 && (REGNO) <= 62 \
456 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
457 || (MODE) == SCmode || (MODE) == DCmode \
460 /* A C expression that is nonzero if a value of mode
461 MODE1 is accessible in mode MODE2 without copying.
463 This asymmetric test is true when MODE1 could be put
464 in an FP register but MODE2 could not. */
466 #define MODES_TIEABLE_P(MODE1, MODE2) \
467 (HARD_REGNO_MODE_OK (32, (MODE1)) \
468 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
471 /* Specify the registers used for certain standard purposes.
472 The values of these macros are register numbers. */
474 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
475 /* #define PC_REGNUM */
477 /* Register to use for pushing function arguments. */
478 #define STACK_POINTER_REGNUM 30
480 /* Base register for access to local variables of the function. */
481 #define HARD_FRAME_POINTER_REGNUM 15
483 /* Value should be nonzero if functions must have frame pointers.
484 Zero means the frame pointer need not be set up (and parms
485 may be accessed via the stack pointer) in functions that seem suitable.
486 This is computed in `reload', in reload1.c. */
487 #define FRAME_POINTER_REQUIRED 0
489 /* Base register for access to arguments of the function. */
490 #define ARG_POINTER_REGNUM 31
492 /* Base register for access to local variables of function. */
493 #define FRAME_POINTER_REGNUM 63
495 /* Register in which static-chain is passed to a function.
497 For the Alpha, this is based on an example; the calling sequence
498 doesn't seem to specify this. */
499 #define STATIC_CHAIN_REGNUM 1
501 /* The register number of the register used to address a table of
502 static data addresses in memory. */
503 #define PIC_OFFSET_TABLE_REGNUM 29
505 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
506 is clobbered by calls. */
507 /* ??? It is and it isn't. It's required to be valid for a given
508 function when the function returns. It isn't clobbered by
509 current_file functions. Moreover, we do not expose the ldgp
510 until after reload, so we're probably safe. */
511 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
513 /* Define the classes of registers for register constraints in the
514 machine description. Also define ranges of constants.
516 One of the classes must always be named ALL_REGS and include all hard regs.
517 If there is more than one class, another class must be named NO_REGS
518 and contain no registers.
520 The name GENERAL_REGS must be the name of a class (or an alias for
521 another name such as ALL_REGS). This is the class of registers
522 that is allowed by "g" or "r" in a register constraint.
523 Also, registers outside this class are allocated only when
524 instructions express preferences for them.
526 The classes must be numbered in nondecreasing order; that is,
527 a larger-numbered class must never be contained completely
528 in a smaller-numbered class.
530 For any two classes, it is very desirable that there be another
531 class that represents their union. */
534 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
535 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
539 #define N_REG_CLASSES (int) LIM_REG_CLASSES
541 /* Give names of register classes as strings for dump file. */
543 #define REG_CLASS_NAMES \
544 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
545 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
547 /* Define which registers fit in which classes.
548 This is an initializer for a vector of HARD_REG_SET
549 of length N_REG_CLASSES. */
551 #define REG_CLASS_CONTENTS \
552 { {0x00000000, 0x00000000}, /* NO_REGS */ \
553 {0x00000001, 0x00000000}, /* R0_REG */ \
554 {0x01000000, 0x00000000}, /* R24_REG */ \
555 {0x02000000, 0x00000000}, /* R25_REG */ \
556 {0x08000000, 0x00000000}, /* R27_REG */ \
557 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
558 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
559 {0xffffffff, 0xffffffff} }
561 /* The same information, inverted:
562 Return the class number of the smallest class containing
563 reg number REGNO. This could be a conditional expression
564 or could index an array. */
566 #define REGNO_REG_CLASS(REGNO) \
567 ((REGNO) == 0 ? R0_REG \
568 : (REGNO) == 24 ? R24_REG \
569 : (REGNO) == 25 ? R25_REG \
570 : (REGNO) == 27 ? R27_REG \
571 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
574 /* The class value for index registers, and the one for base regs. */
575 #define INDEX_REG_CLASS NO_REGS
576 #define BASE_REG_CLASS GENERAL_REGS
578 /* Given an rtx X being reloaded into a reg required to be
579 in class CLASS, return the class of reg to actually use.
580 In general this is just CLASS; but on some machines
581 in some cases it is preferable to use a more restrictive class. */
583 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
585 /* If we are copying between general and FP registers, we need a memory
586 location unless the FIX extension is available. */
588 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
589 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
590 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
592 /* Specify the mode to be used for memory when a secondary memory
593 location is needed. If MODE is floating-point, use it. Otherwise,
594 widen to a word like the default. This is needed because we always
595 store integers in FP registers in quadword format. This whole
596 area is very tricky! */
597 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
598 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
599 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
600 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
602 /* Return the maximum number of consecutive registers
603 needed to represent mode MODE in a register of class CLASS. */
605 #define CLASS_MAX_NREGS(CLASS, MODE) \
606 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
608 /* Return the class of registers that cannot change mode from FROM to TO. */
610 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
611 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
612 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
614 /* Define the cost of moving between registers of various classes. Moving
615 between FLOAT_REGS and anything else except float regs is expensive.
616 In fact, we make it quite expensive because we really don't want to
617 do these moves unless it is clearly worth it. Optimizations may
618 reduce the impact of not being able to allocate a pseudo to a
621 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
622 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \
623 : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8) \
624 : 4+2*alpha_memory_latency)
626 /* A C expressions returning the cost of moving data of MODE from a register to
629 On the Alpha, bump this up a bit. */
631 extern int alpha_memory_latency;
632 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
634 /* Provide the cost of a branch. Exact meaning under development. */
635 #define BRANCH_COST 5
637 /* Stack layout; function entry, exit and calling. */
639 /* Define this if pushing a word on the stack
640 makes the stack pointer a smaller address. */
641 #define STACK_GROWS_DOWNWARD
643 /* Define this to nonzero if the nominal address of the stack frame
644 is at the high-address end of the local variables;
645 that is, each additional local variable allocated
646 goes at a more negative offset in the frame. */
647 /* #define FRAME_GROWS_DOWNWARD 0 */
649 /* Offset within stack frame to start allocating local variables at.
650 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
651 first local allocated. Otherwise, it is the offset to the BEGINNING
652 of the first local allocated. */
654 #define STARTING_FRAME_OFFSET 0
656 /* If we generate an insn to push BYTES bytes,
657 this says how many the stack pointer really advances by.
658 On Alpha, don't define this because there are no push insns. */
659 /* #define PUSH_ROUNDING(BYTES) */
661 /* Define this to be nonzero if stack checking is built into the ABI. */
662 #define STACK_CHECK_BUILTIN 1
664 /* Define this if the maximum size of all the outgoing args is to be
665 accumulated and pushed during the prologue. The amount can be
666 found in the variable current_function_outgoing_args_size. */
667 #define ACCUMULATE_OUTGOING_ARGS 1
669 /* Offset of first parameter from the argument pointer register value. */
671 #define FIRST_PARM_OFFSET(FNDECL) 0
673 /* Definitions for register eliminations.
675 We have two registers that can be eliminated on the Alpha. First, the
676 frame pointer register can often be eliminated in favor of the stack
677 pointer register. Secondly, the argument pointer register can always be
678 eliminated; it is replaced with either the stack or frame pointer. */
680 /* This is an array of structures. Each structure initializes one pair
681 of eliminable registers. The "from" register number is given first,
682 followed by "to". Eliminations of the same "from" register are listed
683 in order of preference. */
685 #define ELIMINABLE_REGS \
686 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
687 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
688 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
689 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
691 /* Given FROM and TO register numbers, say whether this elimination is allowed.
692 Frame pointer elimination is automatically handled.
694 All eliminations are valid since the cases where FP can't be
695 eliminated are already handled. */
697 #define CAN_ELIMINATE(FROM, TO) 1
699 /* Round up to a multiple of 16 bytes. */
700 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
702 /* Define the offset between two registers, one to be eliminated, and the other
703 its replacement, at the start of a routine. */
704 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
705 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
707 /* Define this if stack space is still allocated for a parameter passed
709 /* #define REG_PARM_STACK_SPACE */
711 /* Value is the number of bytes of arguments automatically
712 popped when returning from a subroutine call.
713 FUNDECL is the declaration node of the function (as a tree),
714 FUNTYPE is the data type of the function (as a tree),
715 or for a library call it is an identifier node for the subroutine name.
716 SIZE is the number of bytes of arguments passed on the stack. */
718 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
720 /* Define how to find the value returned by a function.
721 VALTYPE is the data type of the value (as a tree).
722 If the precise function being called is known, FUNC is its FUNCTION_DECL;
723 otherwise, FUNC is 0.
725 On Alpha the value is found in $0 for integer functions and
726 $f0 for floating-point functions. */
728 #define FUNCTION_VALUE(VALTYPE, FUNC) \
729 function_value (VALTYPE, FUNC, VOIDmode)
731 /* Define how to find the value returned by a library function
732 assuming the value has mode MODE. */
734 #define LIBCALL_VALUE(MODE) \
735 function_value (NULL, NULL, MODE)
737 /* 1 if N is a possible register number for a function value
738 as seen by the caller. */
740 #define FUNCTION_VALUE_REGNO_P(N) \
741 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
743 /* 1 if N is a possible register number for function argument passing.
744 On Alpha, these are $16-$21 and $f16-$f21. */
746 #define FUNCTION_ARG_REGNO_P(N) \
747 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
749 /* Define a data type for recording info about an argument list
750 during the scan of that argument list. This data type should
751 hold all necessary information about the function itself
752 and about the args processed so far, enough to enable macros
753 such as FUNCTION_ARG to determine where the next arg should go.
755 On Alpha, this is a single integer, which is a number of words
756 of arguments scanned so far.
757 Thus 6 or more means all following args should go on the stack. */
759 #define CUMULATIVE_ARGS int
761 /* Initialize a variable CUM of type CUMULATIVE_ARGS
762 for a call to a function whose data type is FNTYPE.
763 For a library call, FNTYPE is 0. */
765 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
768 /* Define intermediate macro to compute the size (in registers) of an argument
771 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
772 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
773 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
774 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
776 /* Update the data in CUM to advance over an argument
777 of mode MODE and data type TYPE.
778 (TYPE is null for libcalls where that information may not be available.) */
780 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
782 (targetm.calls.must_pass_in_stack (MODE, TYPE)) \
783 ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))
785 /* Determine where to put an argument to a function.
786 Value is zero to push the argument on the stack,
787 or a hard register in which to store the argument.
789 MODE is the argument's machine mode.
790 TYPE is the data type of the argument (as a tree).
791 This is null for libcalls where that information may
793 CUM is a variable of type CUMULATIVE_ARGS which gives info about
794 the preceding args and about the function being called.
795 NAMED is nonzero if this argument is a named parameter
796 (otherwise it is an extra parameter matching an ellipsis).
798 On Alpha the first 6 words of args are normally in registers
799 and the rest are pushed. */
801 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
802 function_arg((CUM), (MODE), (TYPE), (NAMED))
804 /* Try to output insns to set TARGET equal to the constant C if it can be
805 done in less than N insns. Do all computations in MODE. Returns the place
806 where the output has been placed if it can be done and the insns have been
807 emitted. If it would take more than N insns, zero is returned and no
808 insns and emitted. */
810 /* Define the information needed to generate branch and scc insns. This is
811 stored from the compare operation. Note that we can't use "rtx" here
812 since it hasn't been defined! */
816 struct rtx_def *op0, *op1;
820 extern struct alpha_compare alpha_compare;
822 /* Make (or fake) .linkage entry for function call.
823 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
825 /* This macro defines the start of an assembly comment. */
827 #define ASM_COMMENT_START " #"
829 /* This macro produces the initial definition of a function. */
831 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
832 alpha_start_function(FILE,NAME,DECL);
834 /* This macro closes up a function definition for the assembler. */
836 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
837 alpha_end_function(FILE,NAME,DECL)
839 /* Output any profiling code before the prologue. */
841 #define PROFILE_BEFORE_PROLOGUE 1
843 /* Never use profile counters. */
845 #define NO_PROFILE_COUNTERS 1
847 /* Output assembler code to FILE to increment profiler label # LABELNO
848 for profiling a function entry. Under OSF/1, profiling is enabled
849 by simply passing -pg to the assembler and linker. */
851 #define FUNCTION_PROFILER(FILE, LABELNO)
853 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
854 the stack pointer does not matter. The value is tested only in
855 functions that have frame pointers.
856 No definition is equivalent to always zero. */
858 #define EXIT_IGNORE_STACK 1
860 /* Define registers used by the epilogue and return instruction. */
862 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
864 /* Output assembler code for a block containing the constant parts
865 of a trampoline, leaving space for the variable parts.
867 The trampoline should set the static chain pointer to value placed
868 into the trampoline and should branch to the specified routine.
869 Note that $27 has been set to the address of the trampoline, so we can
870 use it for addressability of the two data items. */
872 #define TRAMPOLINE_TEMPLATE(FILE) \
874 fprintf (FILE, "\tldq $1,24($27)\n"); \
875 fprintf (FILE, "\tldq $27,16($27)\n"); \
876 fprintf (FILE, "\tjmp $31,($27),0\n"); \
877 fprintf (FILE, "\tnop\n"); \
878 fprintf (FILE, "\t.quad 0,0\n"); \
881 /* Section in which to place the trampoline. On Alpha, instructions
882 may only be placed in a text segment. */
884 #define TRAMPOLINE_SECTION text_section
886 /* Length in units of the trampoline for entering a nested function. */
888 #define TRAMPOLINE_SIZE 32
890 /* The alignment of a trampoline, in bits. */
892 #define TRAMPOLINE_ALIGNMENT 64
894 /* Emit RTL insns to initialize the variable parts of a trampoline.
895 FNADDR is an RTX for the address of the function's pure code.
896 CXT is an RTX for the static chain value for the function. */
898 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
899 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
901 /* A C expression whose value is RTL representing the value of the return
902 address for the frame COUNT steps up from the current frame.
903 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
904 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
906 #define RETURN_ADDR_RTX alpha_return_addr
908 /* Before the prologue, RA lives in $26. */
909 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
910 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
911 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
912 #define DWARF_ZERO_REG 31
914 /* Describe how we implement __builtin_eh_return. */
915 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
916 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
917 #define EH_RETURN_HANDLER_RTX \
918 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
919 current_function_outgoing_args_size))
921 /* Addressing modes, and classification of registers for them. */
923 /* Macros to check register numbers against specific register classes. */
925 /* These assume that REGNO is a hard or pseudo reg number.
926 They give nonzero only if REGNO is a hard reg of the suitable class
927 or a pseudo reg currently allocated to a suitable hard reg.
928 Since they use reg_renumber, they are safe only once reg_renumber
929 has been allocated, which happens in local-alloc.c. */
931 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
932 #define REGNO_OK_FOR_BASE_P(REGNO) \
933 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
934 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
936 /* Maximum number of registers that can appear in a valid memory address. */
937 #define MAX_REGS_PER_ADDRESS 1
939 /* Recognize any constant value that is a valid address. For the Alpha,
940 there are only constants none since we want to use LDA to load any
941 symbolic addresses into registers. */
943 #define CONSTANT_ADDRESS_P(X) \
944 (GET_CODE (X) == CONST_INT \
945 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
947 /* Include all constant integers and constant doubles, but not
948 floating-point, except for floating-point zero. */
950 #define LEGITIMATE_CONSTANT_P alpha_legitimate_constant_p
952 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
953 and check its validity for a certain class.
954 We have two alternate definitions for each of them.
955 The usual definition accepts all pseudo regs; the other rejects
956 them unless they have been allocated suitable hard regs.
957 The symbol REG_OK_STRICT causes the latter definition to be used.
959 Most source files want to accept pseudo regs in the hope that
960 they will get allocated to the class that the insn wants them to be in.
961 Source files for reload pass need to be strict.
962 After reload, it makes no difference, since pseudo regs have
963 been eliminated by then. */
965 /* Nonzero if X is a hard reg that can be used as an index
966 or if it is a pseudo reg. */
967 #define REG_OK_FOR_INDEX_P(X) 0
969 /* Nonzero if X is a hard reg that can be used as a base reg
970 or if it is a pseudo reg. */
971 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
972 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
974 /* ??? Nonzero if X is the frame pointer, or some virtual register
975 that may eliminate to the frame pointer. These will be allowed to
976 have offsets greater than 32K. This is done because register
977 elimination offsets will change the hi/lo split, and if we split
978 before reload, we will require additional instructions. */
979 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
980 (REGNO (X) == 31 || REGNO (X) == 63 \
981 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
982 && REGNO (X) < LAST_VIRTUAL_REGISTER))
984 /* Nonzero if X is a hard reg that can be used as a base reg. */
985 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
988 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
990 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
993 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
994 valid memory address for an instruction. */
997 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
999 if (alpha_legitimate_address_p (MODE, X, 1)) \
1003 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1005 if (alpha_legitimate_address_p (MODE, X, 0)) \
1010 /* Try machine-dependent ways of modifying an illegitimate address
1011 to be legitimate. If we find one, return the new, valid address.
1012 This macro is used in only one place: `memory_address' in explow.c. */
1014 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1016 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1024 /* Try a machine-dependent way of reloading an illegitimate address
1025 operand. If we find one, push the reload and jump to WIN. This
1026 macro is used in only one place: `find_reloads_address' in reload.c. */
1028 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1030 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1038 /* Go to LABEL if ADDR (a legitimate address expression)
1039 has an effect that depends on the machine mode it is used for.
1040 On the Alpha this is true only for the unaligned modes. We can
1041 simplify this test since we know that the address must be valid. */
1043 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1044 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1046 /* Specify the machine mode that this machine uses
1047 for the index in the tablejump instruction. */
1048 #define CASE_VECTOR_MODE SImode
1050 /* Define as C expression which evaluates to nonzero if the tablejump
1051 instruction expects the table to contain offsets from the address of the
1054 Do not define this if the table should contain absolute addresses.
1055 On the Alpha, the table is really GP-relative, not relative to the PC
1056 of the table, but we pretend that it is PC-relative; this should be OK,
1057 but we should try to find some better way sometime. */
1058 #define CASE_VECTOR_PC_RELATIVE 1
1060 /* Define this as 1 if `char' should by default be signed; else as 0. */
1061 #define DEFAULT_SIGNED_CHAR 1
1063 /* Max number of bytes we can move to or from memory
1064 in one reasonably fast instruction. */
1068 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1069 move-instruction pairs, we will do a movmem or libcall instead.
1071 Without byte/word accesses, we want no more than four instructions;
1072 with, several single byte accesses are better. */
1074 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1076 /* Largest number of bytes of an object that can be placed in a register.
1077 On the Alpha we have plenty of registers, so use TImode. */
1078 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1080 /* Nonzero if access to memory by bytes is no faster than for words.
1081 Also nonzero if doing byte operations (specifically shifts) in registers
1084 On the Alpha, we want to not use the byte operation and instead use
1085 masking operations to access fields; these will save instructions. */
1087 #define SLOW_BYTE_ACCESS 1
1089 /* Define if operations between registers always perform the operation
1090 on the full register even if a narrower mode is specified. */
1091 #define WORD_REGISTER_OPERATIONS
1093 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1094 will either zero-extend or sign-extend. The value of this macro should
1095 be the code that says which one of the two operations is implicitly
1096 done, UNKNOWN if none. */
1097 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1099 /* Define if loading short immediate values into registers sign extends. */
1100 #define SHORT_IMMEDIATES_SIGN_EXTEND
1102 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1103 is done just by pretending it is already truncated. */
1104 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1106 /* The CIX ctlz and cttz instructions return 64 for zero. */
1107 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1108 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1110 /* Define the value returned by a floating-point comparison instruction. */
1112 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1113 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1115 /* Canonicalize a comparison from one we don't have to one we do have. */
1117 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1119 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1120 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1125 (CODE) = swap_condition (CODE); \
1127 if (((CODE) == LT || (CODE) == LTU) \
1128 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1130 (CODE) = (CODE) == LT ? LE : LEU; \
1131 (OP1) = GEN_INT (255); \
1135 /* Specify the machine mode that pointers have.
1136 After generation of rtl, the compiler makes no further distinction
1137 between pointers and any other objects of this machine mode. */
1138 #define Pmode DImode
1140 /* Mode of a function address in a call instruction (for indexing purposes). */
1142 #define FUNCTION_MODE Pmode
1144 /* Define this if addresses of constant functions
1145 shouldn't be put through pseudo regs where they can be cse'd.
1146 Desirable on machines where ordinary constants are expensive
1147 but a CALL with constant address is cheap.
1149 We define this on the Alpha so that gen_call and gen_call_value
1150 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1151 then copy it into a register, thus actually letting the address be
1154 #define NO_FUNCTION_CSE
1156 /* Define this to be nonzero if shift instructions ignore all but the low-order
1158 #define SHIFT_COUNT_TRUNCATED 1
1160 /* Control the assembler format that we output. */
1162 /* Output to assembler file text saying following lines
1163 may contain character constants, extra white space, comments, etc. */
1164 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1166 /* Output to assembler file text saying following lines
1167 no longer contain unusual constructs. */
1168 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1170 #define TEXT_SECTION_ASM_OP "\t.text"
1172 /* Output before read-only data. */
1174 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1176 /* Output before writable data. */
1178 #define DATA_SECTION_ASM_OP "\t.data"
1180 /* How to refer to registers in assembler output.
1181 This sequence is indexed by compiler's hard-register-number (see above). */
1183 #define REGISTER_NAMES \
1184 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1185 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1186 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1187 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1188 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1189 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1190 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1191 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1193 /* Strip name encoding when emitting labels. */
1195 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1197 const char *name_ = NAME; \
1198 if (*name_ == '@' || *name_ == '%') \
1200 if (*name_ == '*') \
1203 fputs (user_label_prefix, STREAM); \
1204 fputs (name_, STREAM); \
1207 /* Globalizing directive for a label. */
1208 #define GLOBAL_ASM_OP "\t.globl "
1210 /* The prefix to add to user-visible assembler symbols. */
1212 #define USER_LABEL_PREFIX ""
1214 /* This is how to output a label for a jump table. Arguments are the same as
1215 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1218 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1219 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1221 /* This is how to store into the string LABEL
1222 the symbol_ref name of an internal numbered label where
1223 PREFIX is the class of label and NUM is the number within the class.
1224 This is suitable for output with `assemble_name'. */
1226 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1227 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1229 /* We use the default ASCII-output routine, except that we don't write more
1230 than 50 characters since the assembler doesn't support very long lines. */
1232 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1234 FILE *_hide_asm_out_file = (MYFILE); \
1235 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1236 int _hide_thissize = (MYLENGTH); \
1237 int _size_so_far = 0; \
1239 FILE *asm_out_file = _hide_asm_out_file; \
1240 const unsigned char *p = _hide_p; \
1241 int thissize = _hide_thissize; \
1243 fprintf (asm_out_file, "\t.ascii \""); \
1245 for (i = 0; i < thissize; i++) \
1247 register int c = p[i]; \
1249 if (_size_so_far ++ > 50 && i < thissize - 4) \
1250 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1252 if (c == '\"' || c == '\\') \
1253 putc ('\\', asm_out_file); \
1254 if (c >= ' ' && c < 0177) \
1255 putc (c, asm_out_file); \
1258 fprintf (asm_out_file, "\\%o", c); \
1259 /* After an octal-escape, if a digit follows, \
1260 terminate one string constant and start another. \
1261 The VAX assembler fails to stop reading the escape \
1262 after three digits, so this is the only way we \
1263 can get it to parse the data properly. */ \
1264 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1265 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1268 fprintf (asm_out_file, "\"\n"); \
1273 /* This is how to output an element of a case-vector that is relative. */
1275 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1276 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1279 /* This is how to output an assembler line
1280 that says to advance the location counter
1281 to a multiple of 2**LOG bytes. */
1283 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1285 fprintf (FILE, "\t.align %d\n", LOG);
1287 /* This is how to advance the location counter by SIZE bytes. */
1289 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1290 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1292 /* This says how to output an assembler line
1293 to define a global common symbol. */
1295 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1296 ( fputs ("\t.comm ", (FILE)), \
1297 assemble_name ((FILE), (NAME)), \
1298 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1300 /* This says how to output an assembler line
1301 to define a local common symbol. */
1303 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1304 ( fputs ("\t.lcomm ", (FILE)), \
1305 assemble_name ((FILE), (NAME)), \
1306 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1309 /* Print operand X (an rtx) in assembler syntax to file FILE.
1310 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1311 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1313 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1315 /* Determine which codes are valid without a following integer. These must
1318 ~ Generates the name of the current function.
1320 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1321 attributes are examined to determine what is appropriate.
1323 , Generates single precision suffix for floating point
1324 instructions (s for IEEE, f for VAX)
1326 - Generates double precision suffix for floating point
1327 instructions (t for IEEE, g for VAX)
1330 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1331 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1332 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&')
1334 /* Print a memory address as an operand to reference that memory location. */
1336 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1337 print_operand_address((FILE), (ADDR))
1339 /* Implement `va_start' for varargs and stdarg. */
1340 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1341 alpha_va_start (valist, nextarg)
1343 /* Tell collect that the object format is ECOFF. */
1344 #define OBJECT_FORMAT_COFF
1345 #define EXTENDED_COFF
1347 /* If we use NM, pass -g to it so it only lists globals. */
1348 #define NM_FLAGS "-pg"
1350 /* Definitions for debugging. */
1352 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1353 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1354 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1356 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1357 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1361 /* Correct the offset of automatic variables and arguments. Note that
1362 the Alpha debug format wants all automatic variables and arguments
1363 to be in terms of two different offsets from the virtual frame pointer,
1364 which is the stack pointer before any adjustment in the function.
1365 The offset for the argument pointer is fixed for the native compiler,
1366 it is either zero (for the no arguments case) or large enough to hold
1367 all argument registers.
1368 The offset for the auto pointer is the fourth argument to the .frame
1369 directive (local_offset).
1370 To stay compatible with the native tools we use the same offsets
1371 from the virtual frame pointer and adjust the debugger arg/auto offsets
1372 accordingly. These debugger offsets are set up in output_prolog. */
1374 extern long alpha_arg_offset;
1375 extern long alpha_auto_offset;
1376 #define DEBUGGER_AUTO_OFFSET(X) \
1377 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1378 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1380 /* mips-tfile doesn't understand .stabd directives. */
1381 #define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) do { \
1382 dbxout_begin_stabn_sline (LINE); \
1383 dbxout_stab_value_internal_label ("LM", &COUNTER); \
1386 /* We want to use MIPS-style .loc directives for SDB line numbers. */
1387 extern int num_source_filenames;
1388 #define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1389 fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE)
1391 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1392 alpha_output_filename (STREAM, NAME)
1394 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1395 number, because the real length runs past this up to the next
1396 continuation point. This is really a dbxout.c bug. */
1397 #define DBX_CONTIN_LENGTH 3000
1399 /* By default, turn on GDB extensions. */
1400 #define DEFAULT_GDB_EXTENSIONS 1
1402 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1403 #define NO_DBX_FUNCTION_END 1
1405 /* If we are smuggling stabs through the ALPHA ECOFF object
1406 format, put a comment in front of the .stab<x> operation so
1407 that the ALPHA assembler does not choke. The mips-tfile program
1408 will correctly put the stab into the object file. */
1410 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1411 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1412 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1414 /* Forward references to tags are allowed. */
1415 #define SDB_ALLOW_FORWARD_REFERENCES
1417 /* Unknown tags are also allowed. */
1418 #define SDB_ALLOW_UNKNOWN_REFERENCES
1420 #define PUT_SDB_DEF(a) \
1422 fprintf (asm_out_file, "\t%s.def\t", \
1423 (TARGET_GAS) ? "" : "#"); \
1424 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1425 fputc (';', asm_out_file); \
1428 #define PUT_SDB_PLAIN_DEF(a) \
1430 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1431 (TARGET_GAS) ? "" : "#", (a)); \
1434 #define PUT_SDB_TYPE(a) \
1436 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1439 /* For block start and end, we create labels, so that
1440 later we can figure out where the correct offset is.
1441 The normal .ent/.end serve well enough for functions,
1442 so those are just commented out. */
1444 extern int sdb_label_count; /* block start/end next label # */
1446 #define PUT_SDB_BLOCK_START(LINE) \
1448 fprintf (asm_out_file, \
1449 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1451 (TARGET_GAS) ? "" : "#", \
1454 sdb_label_count++; \
1457 #define PUT_SDB_BLOCK_END(LINE) \
1459 fprintf (asm_out_file, \
1460 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1462 (TARGET_GAS) ? "" : "#", \
1465 sdb_label_count++; \
1468 #define PUT_SDB_FUNCTION_START(LINE)
1470 #define PUT_SDB_FUNCTION_END(LINE)
1472 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1474 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1475 mips-tdump.c to print them out.
1477 These must match the corresponding definitions in gdb/mipsread.c.
1478 Unfortunately, gcc and gdb do not currently share any directories. */
1480 #define CODE_MASK 0x8F300
1481 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1482 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1483 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1485 /* Override some mips-tfile definitions. */
1487 #define SHASH_SIZE 511
1488 #define THASH_SIZE 55
1490 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1492 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1494 /* The system headers under Alpha systems are generally C++-aware. */
1495 #define NO_IMPLICIT_EXTERN_C