1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
41 /* Specify which cpu to schedule for. */
42 enum processor_type alpha_cpu;
44 /* Specify how accurate floating-point traps need to be. */
46 enum alpha_trap_precision alpha_tp;
48 /* Specify the floating-point rounding mode. */
50 enum alpha_fp_rounding_mode alpha_fprm;
52 /* Specify which things cause traps. */
54 enum alpha_fp_trap_mode alpha_fptm;
56 /* Strings decoded into the above options. */
57 char *alpha_cpu_string; /* -mcpu=ev[4|5] */
58 char *alpha_tp_string; /* -mtrap-precision=[p|s|i] */
59 char *alpha_fprm_string; /* -mfp-rounding-mode=[n|m|c|d] */
60 char *alpha_fptm_string; /* -mfp-trap-mode=[n|u|su|sui] */
62 /* Save information from a "cmpxx" operation until the branch or scc is
65 rtx alpha_compare_op0, alpha_compare_op1;
66 int alpha_compare_fp_p;
68 /* Save the name of the current function as used by the assembler. This
69 is used by the epilogue. */
71 char *alpha_function_name;
73 /* Non-zero if inside of a function, because the Alpha asm can't
74 handle .files inside of functions. */
76 static int inside_function = FALSE;
78 /* Non-zero if an instruction that may cause a trap is pending. */
80 static int trap_pending = 0;
82 /* Nonzero if the current function needs gp. */
84 int alpha_function_needs_gp;
86 extern char *version_string;
87 extern int rtx_equal_function_value_matters;
89 /* Declarations of static functions. */
90 static void alpha_set_memflags_1 PROTO((rtx, int, int, int));
91 static rtx alpha_emit_set_const_1 PROTO((rtx, enum machine_mode,
93 static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int));
95 /* Compute the size of the save area in the stack. */
96 static void alpha_sa_mask PROTO((unsigned long *imaskP,
97 unsigned long *fmaskP));
98 /* Strip type information. */
99 #define CURRENT_FUNCTION_ARGS_INFO \
100 (TARGET_OPEN_VMS ? current_function_args_info & 0xff \
101 : current_function_args_info)
103 /* Parse target option strings. */
109 = TARGET_CPU_DEFAULT & MASK_CPU_EV5 ? PROCESSOR_EV5 : PROCESSOR_EV4;
111 if (alpha_cpu_string)
113 if (! strcmp (alpha_cpu_string, "ev4")
114 || ! strcmp (alpha_cpu_string, "21064"))
115 alpha_cpu = PROCESSOR_EV4;
116 else if (! strcmp (alpha_cpu_string, "ev5")
117 || ! strcmp (alpha_cpu_string, "21164"))
118 alpha_cpu = PROCESSOR_EV5;
119 else if (! strcmp (alpha_cpu_string, "ev56")
120 || ! strcmp (alpha_cpu_string, "21164a"))
122 alpha_cpu = PROCESSOR_EV5;
123 target_flags |= MASK_BYTE_OPS;
126 error ("bad value `%s' for -mcpu switch", alpha_cpu_string);
129 alpha_tp = ALPHA_TP_PROG;
130 alpha_fprm = ALPHA_FPRM_NORM;
131 alpha_fptm = ALPHA_FPTM_N;
135 alpha_tp = ALPHA_TP_INSN;
136 alpha_fptm = ALPHA_FPTM_SU;
139 if (TARGET_IEEE_WITH_INEXACT)
141 alpha_tp = ALPHA_TP_INSN;
142 alpha_fptm = ALPHA_FPTM_SUI;
147 if (! strcmp (alpha_tp_string, "p"))
148 alpha_tp = ALPHA_TP_PROG;
149 else if (! strcmp (alpha_tp_string, "f"))
150 alpha_tp = ALPHA_TP_FUNC;
151 else if (! strcmp (alpha_tp_string, "i"))
152 alpha_tp = ALPHA_TP_INSN;
154 error ("bad value `%s' for -mtrap-precision switch", alpha_tp_string);
157 if (alpha_fprm_string)
159 if (! strcmp (alpha_fprm_string, "n"))
160 alpha_fprm = ALPHA_FPRM_NORM;
161 else if (! strcmp (alpha_fprm_string, "m"))
162 alpha_fprm = ALPHA_FPRM_MINF;
163 else if (! strcmp (alpha_fprm_string, "c"))
164 alpha_fprm = ALPHA_FPRM_CHOP;
165 else if (! strcmp (alpha_fprm_string,"d"))
166 alpha_fprm = ALPHA_FPRM_DYN;
168 error ("bad value `%s' for -mfp-rounding-mode switch",
172 if (alpha_fptm_string)
174 if (strcmp (alpha_fptm_string, "n") == 0)
175 alpha_fptm = ALPHA_FPTM_N;
176 else if (strcmp (alpha_fptm_string, "u") == 0)
177 alpha_fptm = ALPHA_FPTM_U;
178 else if (strcmp (alpha_fptm_string, "su") == 0)
179 alpha_fptm = ALPHA_FPTM_SU;
180 else if (strcmp (alpha_fptm_string, "sui") == 0)
181 alpha_fptm = ALPHA_FPTM_SUI;
183 error ("bad value `%s' for -mfp-trap-mode switch", alpha_fptm_string);
186 /* Do some sanity checks on the above option. */
188 if ((alpha_fptm == ALPHA_FPTM_SU || alpha_fptm == ALPHA_FPTM_SUI)
189 && alpha_tp != ALPHA_TP_INSN)
191 warning ("fp software completion requires -mtrap-precision=i");
192 alpha_tp = ALPHA_TP_INSN;
195 if (TARGET_FLOAT_VAX)
197 if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN)
199 warning ("rounding mode not supported for VAX floats");
200 alpha_fprm = ALPHA_FPRM_NORM;
202 if (alpha_fptm == ALPHA_FPTM_SUI)
204 warning ("trap mode not supported for VAX floats");
205 alpha_fptm = ALPHA_FPTM_SU;
210 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
218 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
220 if ((value & 0xff) != 0 && (value & 0xff) != 0xff)
226 /* Returns 1 if OP is either the constant zero or a register. If a
227 register, it must be in the proper mode unless MODE is VOIDmode. */
230 reg_or_0_operand (op, mode)
232 enum machine_mode mode;
234 return op == const0_rtx || register_operand (op, mode);
237 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
241 reg_or_6bit_operand (op, mode)
243 enum machine_mode mode;
245 return ((GET_CODE (op) == CONST_INT
246 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64)
247 || register_operand (op, mode));
251 /* Return 1 if OP is an 8-bit constant or any register. */
254 reg_or_8bit_operand (op, mode)
256 enum machine_mode mode;
258 return ((GET_CODE (op) == CONST_INT
259 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)
260 || register_operand (op, mode));
263 /* Return 1 if OP is an 8-bit constant. */
266 cint8_operand (op, mode)
268 enum machine_mode mode;
270 return (GET_CODE (op) == CONST_INT
271 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100);
274 /* Return 1 if the operand is a valid second operand to an add insn. */
277 add_operand (op, mode)
279 enum machine_mode mode;
281 if (GET_CODE (op) == CONST_INT)
282 return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
283 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')
284 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
286 return register_operand (op, mode);
289 /* Return 1 if the operand is a valid second operand to a sign-extending
293 sext_add_operand (op, mode)
295 enum machine_mode mode;
297 if (GET_CODE (op) == CONST_INT)
298 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255
299 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255);
301 return register_operand (op, mode);
304 /* Return 1 if OP is the constant 4 or 8. */
307 const48_operand (op, mode)
309 enum machine_mode mode;
311 return (GET_CODE (op) == CONST_INT
312 && (INTVAL (op) == 4 || INTVAL (op) == 8));
315 /* Return 1 if OP is a valid first operand to an AND insn. */
318 and_operand (op, mode)
320 enum machine_mode mode;
322 if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
323 return (zap_mask (CONST_DOUBLE_LOW (op))
324 && zap_mask (CONST_DOUBLE_HIGH (op)));
326 if (GET_CODE (op) == CONST_INT)
327 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
328 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100
329 || zap_mask (INTVAL (op)));
331 return register_operand (op, mode);
334 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
337 or_operand (op, mode)
339 enum machine_mode mode;
341 if (GET_CODE (op) == CONST_INT)
342 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
343 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100);
345 return register_operand (op, mode);
348 /* Return 1 if OP is a constant that is the width, in bits, of an integral
349 mode smaller than DImode. */
352 mode_width_operand (op, mode)
354 enum machine_mode mode;
356 return (GET_CODE (op) == CONST_INT
357 && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32));
360 /* Return 1 if OP is a constant that is the width of an integral machine mode
361 smaller than an integer. */
364 mode_mask_operand (op, mode)
366 enum machine_mode mode;
368 #if HOST_BITS_PER_WIDE_INT == 32
369 if (GET_CODE (op) == CONST_DOUBLE)
370 return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1;
373 return (GET_CODE (op) == CONST_INT
374 && (INTVAL (op) == 0xff
375 || INTVAL (op) == 0xffff
376 #if HOST_BITS_PER_WIDE_INT == 64
377 || INTVAL (op) == 0xffffffff
382 /* Return 1 if OP is a multiple of 8 less than 64. */
385 mul8_operand (op, mode)
387 enum machine_mode mode;
389 return (GET_CODE (op) == CONST_INT
390 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64
391 && (INTVAL (op) & 7) == 0);
394 /* Return 1 if OP is the constant zero in floating-point. */
397 fp0_operand (op, mode)
399 enum machine_mode mode;
401 return (GET_MODE (op) == mode
402 && GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode));
405 /* Return 1 if OP is the floating-point constant zero or a register. */
408 reg_or_fp0_operand (op, mode)
410 enum machine_mode mode;
412 return fp0_operand (op, mode) || register_operand (op, mode);
415 /* Return 1 if OP is a register or a constant integer. */
419 reg_or_cint_operand (op, mode)
421 enum machine_mode mode;
423 return GET_CODE (op) == CONST_INT || register_operand (op, mode);
426 /* Return 1 if OP is something that can be reloaded into a register;
427 if it is a MEM, it need not be valid. */
430 some_operand (op, mode)
432 enum machine_mode mode;
434 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
437 switch (GET_CODE (op))
439 case REG: case MEM: case CONST_DOUBLE:
440 case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST:
444 return some_operand (SUBREG_REG (op), VOIDmode);
450 /* Return 1 if OP is a valid operand for the source of a move insn. */
453 input_operand (op, mode)
455 enum machine_mode mode;
457 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
460 if (GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE (op) != mode)
463 switch (GET_CODE (op))
468 /* This handles both the Windows/NT and OSF cases. */
469 return mode == ptr_mode || mode == DImode;
475 if (register_operand (op, mode))
477 /* ... fall through ... */
479 return ((TARGET_BYTE_OPS || (mode != HImode && mode != QImode))
480 && general_operand (op, mode));
483 return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode);
486 return mode == QImode || mode == HImode || add_operand (op, mode);
492 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
496 current_file_function_operand (op, mode)
498 enum machine_mode mode;
500 return (GET_CODE (op) == SYMBOL_REF
501 && ! profile_flag && ! profile_block_flag
502 && (SYMBOL_REF_FLAG (op)
503 || op == XEXP (DECL_RTL (current_function_decl), 0)));
506 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
509 call_operand (op, mode)
511 enum machine_mode mode;
516 return (GET_CODE (op) == SYMBOL_REF
517 || (GET_CODE (op) == REG && (TARGET_OPEN_VMS || REGNO (op) == 27)));
520 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
521 comparisons are valid in which insn. */
524 alpha_comparison_operator (op, mode)
526 enum machine_mode mode;
528 enum rtx_code code = GET_CODE (op);
530 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
533 return (code == EQ || code == LE || code == LT
534 || (mode == DImode && (code == LEU || code == LTU)));
537 /* Return 1 if OP is a valid Alpha swapped comparison operator. */
540 alpha_swapped_comparison_operator (op, mode)
542 enum machine_mode mode;
544 enum rtx_code code = GET_CODE (op);
546 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
549 code = swap_condition (code);
550 return (code == EQ || code == LE || code == LT
551 || (mode == DImode && (code == LEU || code == LTU)));
554 /* Return 1 if OP is a signed comparison operation. */
557 signed_comparison_operator (op, mode)
559 enum machine_mode mode;
561 switch (GET_CODE (op))
563 case EQ: case NE: case LE: case LT: case GE: case GT:
570 /* Return 1 if this is a divide or modulus operator. */
573 divmod_operator (op, mode)
575 enum machine_mode mode;
577 switch (GET_CODE (op))
579 case DIV: case MOD: case UDIV: case UMOD:
586 /* Return 1 if this memory address is a known aligned register plus
587 a constant. It must be a valid address. This means that we can do
588 this as an aligned reference plus some offset.
590 Take into account what reload will do.
592 We could say that out-of-range stack slots are alignable, but that would
593 complicate get_aligned_mem and it isn't worth the trouble since few
594 functions have large stack space. */
597 aligned_memory_operand (op, mode)
599 enum machine_mode mode;
601 if (GET_CODE (op) == SUBREG)
603 if (GET_MODE (op) != mode)
605 op = SUBREG_REG (op);
606 mode = GET_MODE (op);
609 if (reload_in_progress && GET_CODE (op) == REG
610 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
611 op = reg_equiv_mem[REGNO (op)];
613 if (GET_CODE (op) != MEM || GET_MODE (op) != mode
614 || ! memory_address_p (mode, XEXP (op, 0)))
619 if (GET_CODE (op) == PLUS)
622 return (GET_CODE (op) == REG
623 && REGNO_POINTER_ALIGN (REGNO (op)) >= 4);
626 /* Similar, but return 1 if OP is a MEM which is not alignable. */
629 unaligned_memory_operand (op, mode)
631 enum machine_mode mode;
633 if (GET_CODE (op) == SUBREG)
635 if (GET_MODE (op) != mode)
637 op = SUBREG_REG (op);
638 mode = GET_MODE (op);
641 if (reload_in_progress && GET_CODE (op) == REG
642 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
643 op = reg_equiv_mem[REGNO (op)];
645 if (GET_CODE (op) != MEM || GET_MODE (op) != mode)
650 if (! memory_address_p (mode, op))
653 if (GET_CODE (op) == PLUS)
656 return (GET_CODE (op) != REG
657 || REGNO_POINTER_ALIGN (REGNO (op)) < 4);
660 /* Return 1 if OP is either a register or an unaligned memory location. */
663 reg_or_unaligned_mem_operand (op, mode)
665 enum machine_mode mode;
667 return register_operand (op, mode) || unaligned_memory_operand (op, mode);
670 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
673 any_memory_operand (op, mode)
675 enum machine_mode mode;
677 return (GET_CODE (op) == MEM
678 || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
679 || (reload_in_progress && GET_CODE (op) == REG
680 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
681 || (reload_in_progress && GET_CODE (op) == SUBREG
682 && GET_CODE (SUBREG_REG (op)) == REG
683 && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER));
686 /* REF is an alignable memory location. Place an aligned SImode
687 reference into *PALIGNED_MEM and the number of bits to shift into
691 get_aligned_mem (ref, paligned_mem, pbitnum)
693 rtx *paligned_mem, *pbitnum;
696 HOST_WIDE_INT offset = 0;
698 if (GET_CODE (ref) == SUBREG)
700 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
701 if (BYTES_BIG_ENDIAN)
702 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
703 - MIN (UNITS_PER_WORD,
704 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
705 ref = SUBREG_REG (ref);
708 if (GET_CODE (ref) == REG)
709 ref = reg_equiv_mem[REGNO (ref)];
711 if (reload_in_progress)
712 base = find_replacement (&XEXP (ref, 0));
714 base = XEXP (ref, 0);
716 if (GET_CODE (base) == PLUS)
717 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
719 *paligned_mem = gen_rtx (MEM, SImode,
720 plus_constant (base, offset & ~3));
721 MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref);
722 MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref);
723 RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref);
725 *pbitnum = GEN_INT ((offset & 3) * 8);
728 /* Similar, but just get the address. Handle the two reload cases.
729 Add EXTRA_OFFSET to the address we return. */
732 get_unaligned_address (ref, extra_offset)
737 HOST_WIDE_INT offset = 0;
739 if (GET_CODE (ref) == SUBREG)
741 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
742 if (BYTES_BIG_ENDIAN)
743 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
744 - MIN (UNITS_PER_WORD,
745 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
746 ref = SUBREG_REG (ref);
749 if (GET_CODE (ref) == REG)
750 ref = reg_equiv_mem[REGNO (ref)];
752 if (reload_in_progress)
753 base = find_replacement (&XEXP (ref, 0));
755 base = XEXP (ref, 0);
757 if (GET_CODE (base) == PLUS)
758 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
760 return plus_constant (base, offset + extra_offset);
763 /* Subfunction of the following function. Update the flags of any MEM
764 found in part of X. */
767 alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
769 int in_struct_p, volatile_p, unchanging_p;
773 switch (GET_CODE (x))
777 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
778 alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
783 alpha_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p,
788 alpha_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p,
790 alpha_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p,
795 MEM_IN_STRUCT_P (x) = in_struct_p;
796 MEM_VOLATILE_P (x) = volatile_p;
797 RTX_UNCHANGING_P (x) = unchanging_p;
802 /* Given INSN, which is either an INSN or a SEQUENCE generated to
803 perform a memory operation, look for any MEMs in either a SET_DEST or
804 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
805 REF into each of the MEMs found. If REF is not a MEM, don't do
809 alpha_set_memflags (insn, ref)
813 /* Note that it is always safe to get these flags, though they won't
814 be what we think if REF is not a MEM. */
815 int in_struct_p = MEM_IN_STRUCT_P (ref);
816 int volatile_p = MEM_VOLATILE_P (ref);
817 int unchanging_p = RTX_UNCHANGING_P (ref);
819 if (GET_CODE (ref) != MEM
820 || (! in_struct_p && ! volatile_p && ! unchanging_p))
823 alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p);
826 /* Try to output insns to set TARGET equal to the constant C if it can be
827 done in less than N insns. Do all computations in MODE. Returns the place
828 where the output has been placed if it can be done and the insns have been
829 emitted. If it would take more than N insns, zero is returned and no
830 insns and emitted. */
833 alpha_emit_set_const (target, mode, c, n)
835 enum machine_mode mode;
842 /* Try 1 insn, then 2, then up to N. */
843 for (i = 1; i <= n; i++)
844 if ((pat = alpha_emit_set_const_1 (target, mode, c, i)) != 0)
850 /* Internal routine for the above to check for N or below insns. */
853 alpha_emit_set_const_1 (target, mode, c, n)
855 enum machine_mode mode;
859 HOST_WIDE_INT new = c;
861 /* Use a pseudo if highly optimizing and still generating RTL. */
863 = (flag_expensive_optimizations && rtx_equal_function_value_matters
867 #if HOST_BITS_PER_WIDE_INT == 64
868 /* We are only called for SImode and DImode. If this is SImode, ensure that
869 we are sign extended to a full word. This does not make any sense when
870 cross-compiling on a narrow machine. */
873 c = (c & 0xffffffff) - 2 * (c & 0x80000000);
876 /* If this is a sign-extended 32-bit constant, we can do this in at most
877 three insns, so do it if we have enough insns left. We always have
878 a sign-extended 32-bit constant when compiling on a narrow machine.
879 Note that we cannot handle the constant 0x80000000. */
881 if ((HOST_BITS_PER_WIDE_INT != 64
882 || c >> 31 == -1 || c >> 31 == 0)
885 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
886 HOST_WIDE_INT tmp1 = c - low;
888 = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
889 HOST_WIDE_INT extra = 0;
891 /* If HIGH will be interpreted as negative but the constant is
892 positive, we must adjust it to do two ldha insns. */
894 if ((high & 0x8000) != 0 && c >= 0)
898 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
901 if (c == low || (low == 0 && extra == 0))
902 return copy_to_suggested_reg (GEN_INT (c), target, mode);
903 else if (n >= 2 + (extra != 0))
905 temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode);
908 temp = expand_binop (mode, add_optab, temp, GEN_INT (extra << 16),
909 subtarget, 0, OPTAB_WIDEN);
911 return expand_binop (mode, add_optab, temp, GEN_INT (high << 16),
912 target, 0, OPTAB_WIDEN);
916 /* If we couldn't do it that way, try some other methods. But if we have
917 no instructions left, don't bother. Likewise, if this is SImode and
918 we can't make pseudos, we can't do anything since the expand_binop
919 and expand_unop calls will widen and try to make pseudos. */
922 || (mode == SImode && ! rtx_equal_function_value_matters))
925 #if HOST_BITS_PER_WIDE_INT == 64
926 /* First, see if can load a value into the target that is the same as the
927 constant except that all bytes that are 0 are changed to be 0xff. If we
928 can, then we can do a ZAPNOT to obtain the desired constant. */
930 for (i = 0; i < 64; i += 8)
931 if ((new & ((HOST_WIDE_INT) 0xff << i)) == 0)
932 new |= (HOST_WIDE_INT) 0xff << i;
934 /* We are only called for SImode and DImode. If this is SImode, ensure that
935 we are sign extended to a full word. */
938 new = (new & 0xffffffff) - 2 * (new & 0x80000000);
941 && (temp = alpha_emit_set_const (subtarget, mode, new, n - 1)) != 0)
942 return expand_binop (mode, and_optab, temp, GEN_INT (c | ~ new),
943 target, 0, OPTAB_WIDEN);
946 /* Next, see if we can load a related constant and then shift and possibly
947 negate it to get the constant we want. Try this once each increasing
950 for (i = 1; i < n; i++)
952 /* First try complementing. */
953 if ((temp = alpha_emit_set_const (subtarget, mode, ~ c, i)) != 0)
954 return expand_unop (mode, one_cmpl_optab, temp, target, 0);
956 /* Next try to form a constant and do a left shift. We can do this
957 if some low-order bits are zero; the exact_log2 call below tells
958 us that information. The bits we are shifting out could be any
959 value, but here we'll just try the 0- and sign-extended forms of
960 the constant. To try to increase the chance of having the same
961 constant in more than one insn, start at the highest number of
962 bits to shift, but try all possibilities in case a ZAPNOT will
965 if ((bits = exact_log2 (c & - c)) > 0)
966 for (; bits > 0; bits--)
967 if ((temp = (alpha_emit_set_const
969 (unsigned HOST_WIDE_INT) c >> bits, i))) != 0
970 || ((temp = (alpha_emit_set_const
972 ((unsigned HOST_WIDE_INT) c) >> bits, i)))
974 return expand_binop (mode, ashl_optab, temp, GEN_INT (bits),
975 target, 0, OPTAB_WIDEN);
977 /* Now try high-order zero bits. Here we try the shifted-in bits as
978 all zero and all ones. Be careful to avoid shifting outside the
979 mode and to avoid shifting outside the host wide int size. */
981 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
982 - floor_log2 (c) - 1)) > 0)
983 for (; bits > 0; bits--)
984 if ((temp = alpha_emit_set_const (subtarget, mode,
986 || ((temp = (alpha_emit_set_const
988 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
991 return expand_binop (mode, lshr_optab, temp, GEN_INT (bits),
992 target, 1, OPTAB_WIDEN);
994 /* Now try high-order 1 bits. We get that with a sign-extension.
995 But one bit isn't enough here. Be careful to avoid shifting outside
996 the mode and to avoid shifting outside the host wide int size. */
998 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
999 - floor_log2 (~ c) - 2)) > 0)
1000 for (; bits > 0; bits--)
1001 if ((temp = alpha_emit_set_const (subtarget, mode,
1003 || ((temp = (alpha_emit_set_const
1005 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
1008 return expand_binop (mode, ashr_optab, temp, GEN_INT (bits),
1009 target, 0, OPTAB_WIDEN);
1015 #if HOST_BITS_PER_WIDE_INT == 64
1016 /* Having failed to find a 3 insn sequence in alpha_emit_set_const,
1017 fall back to a straight forward decomposition. We do this to avoid
1018 exponential run times encountered when looking for longer sequences
1019 with alpha_emit_set_const. */
1022 alpha_emit_set_long_const (target, c)
1026 /* Use a pseudo if highly optimizing and still generating RTL. */
1028 = (flag_expensive_optimizations && rtx_equal_function_value_matters
1030 HOST_WIDE_INT d1, d2, d3, d4;
1033 /* Decompose the entire word */
1034 d1 = ((c & 0xffff) ^ 0x8000) - 0x8000;
1036 d2 = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
1038 d3 = ((c & 0xffff) ^ 0x8000) - 0x8000;
1040 d4 = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
1045 /* Construct the high word */
1047 r1 = copy_to_suggested_reg (GEN_INT (d4), subtarget, DImode);
1049 r1 = copy_to_suggested_reg (GEN_INT (d3), subtarget, DImode);
1051 r1 = expand_binop (DImode, add_optab, GEN_INT (d3), GEN_INT (d4),
1052 subtarget, 0, OPTAB_WIDEN);
1054 /* Shift it into place */
1055 r2 = expand_binop (DImode, ashl_optab, r1, GEN_INT (32),
1056 subtarget, 0, OPTAB_WIDEN);
1058 if (subtarget == 0 && d1 == d3 && d2 == d4)
1059 r1 = expand_binop (DImode, add_optab, r1, r2, subtarget, 0, OPTAB_WIDEN);
1064 /* Add in the low word */
1066 r1 = expand_binop (DImode, add_optab, r1, GEN_INT (d2),
1067 subtarget, 0, OPTAB_WIDEN);
1069 r1 = expand_binop (DImode, add_optab, r1, GEN_INT (d1),
1070 subtarget, 0, OPTAB_WIDEN);
1074 r1 = copy_to_suggested_reg(r1, target, DImode);
1078 #endif /* HOST_BITS_PER_WIDE_INT == 64 */
1080 /* Rewrite a comparison against zero CMP of the form
1081 (CODE (cc0) (const_int 0)) so it can be written validly in
1082 a conditional move (if_then_else CMP ...).
1083 If both of the operands that set cc0 are non-zero we must emit
1084 an insn to perform the compare (it can't be done within
1085 the conditional move). */
1087 alpha_emit_conditional_move (cmp, mode)
1089 enum machine_mode mode;
1091 enum rtx_code code = GET_CODE (cmp);
1092 enum rtx_code cmov_code = NE;
1093 rtx op0 = alpha_compare_op0;
1094 rtx op1 = alpha_compare_op1;
1095 enum machine_mode cmp_mode
1096 = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0));
1097 enum machine_mode cmp_op_mode = alpha_compare_fp_p ? DFmode : DImode;
1100 if (alpha_compare_fp_p != FLOAT_MODE_P (mode))
1103 /* We may be able to use a conditional move directly.
1104 This avoids emitting spurious compares. */
1105 if (signed_comparison_operator (cmp, cmp_op_mode)
1106 && (op0 == CONST0_RTX (cmp_mode) || op1 == CONST0_RTX (cmp_mode)))
1107 return gen_rtx (code, VOIDmode, op0, op1);
1109 /* We can't put the comparison insides a conditional move;
1110 emit a compare instruction and put that inside the
1111 conditional move. Make sure we emit only comparisons we have;
1112 swap or reverse as necessary. */
1116 case EQ: case LE: case LT: case LEU: case LTU:
1117 /* We have these compares: */
1121 /* This must be reversed. */
1122 code = reverse_condition (code);
1126 case GE: case GT: case GEU: case GTU:
1127 /* These must be swapped. Make sure the new first operand is in
1129 code = swap_condition (code);
1130 tem = op0, op0 = op1, op1 = tem;
1131 op0 = force_reg (cmp_mode, op0);
1138 tem = gen_reg_rtx (cmp_op_mode);
1139 emit_move_insn (tem, gen_rtx (code, cmp_op_mode, op0, op1));
1140 return gen_rtx (cmov_code, VOIDmode, tem, CONST0_RTX (cmp_op_mode));
1143 /* Adjust the cost of a scheduling dependency. Return the new cost of
1144 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
1147 alpha_adjust_cost (insn, link, dep_insn, cost)
1155 /* If the dependence is an anti-dependence, there is no cost. For an
1156 output dependence, there is sometimes a cost, but it doesn't seem
1157 worth handling those few cases. */
1159 if (REG_NOTE_KIND (link) != 0)
1162 /* EV5 costs are as given in alpha.md; exceptions are given here. */
1163 if (alpha_cpu == PROCESSOR_EV5)
1165 /* And the lord DEC sayeth: "A special bypass provides an effective
1166 latency of 0 cycles for an ICMP or ILOG insn producing the test
1167 operand of an IBR or CMOV insn." */
1168 if (recog_memoized (dep_insn) >= 0
1169 && (get_attr_type (dep_insn) == TYPE_ICMP
1170 || get_attr_type (dep_insn) == TYPE_ILOG)
1171 && recog_memoized (insn) >= 0
1172 && (get_attr_type (insn) == TYPE_IBR
1173 || (get_attr_type (insn) == TYPE_CMOV
1174 && !((set = single_set (dep_insn)) != 0
1175 && GET_CODE (PATTERN (insn)) == SET
1176 && GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE
1177 && (rtx_equal_p (SET_DEST (set),
1178 XEXP (SET_SRC (PATTERN (insn)), 1))
1179 || rtx_equal_p (SET_DEST (set),
1180 XEXP (SET_SRC (PATTERN (insn)), 2)))))))
1185 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
1186 we can sometimes lower the cost. */
1188 if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST
1189 && (set = single_set (dep_insn)) != 0
1190 && GET_CODE (PATTERN (insn)) == SET
1191 && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
1192 switch (get_attr_type (dep_insn))
1195 /* No savings here. */
1200 /* In these cases, we save one cycle. */
1204 /* In all other cases, we save two cycles. */
1205 return MAX (0, cost - 4);
1208 /* Another case that needs adjustment is an arithmetic or logical
1209 operation. It's cost is usually one cycle, but we default it to
1210 two in the MD file. The only case that it is actually two is
1211 for the address in loads and stores. */
1213 if (recog_memoized (dep_insn) >= 0
1214 && (get_attr_type (dep_insn) == TYPE_IADD
1215 || get_attr_type (dep_insn) == TYPE_ILOG))
1216 switch (get_attr_type (insn))
1226 /* The final case is when a compare feeds into an integer branch. The cost
1227 is only one cycle in that case. */
1229 if (recog_memoized (dep_insn) >= 0
1230 && get_attr_type (dep_insn) == TYPE_ICMP
1231 && recog_memoized (insn) >= 0
1232 && get_attr_type (insn) == TYPE_IBR)
1235 /* Otherwise, return the default cost. */
1240 /* Print an operand. Recognize special options, documented below. */
1243 print_operand (file, x, code)
1253 /* Generates fp-rounding mode suffix: nothing for normal, 'c' for
1254 chopped, 'm' for minus-infinity, and 'd' for dynamic rounding
1255 mode. alpha_fprm controls which suffix is generated. */
1258 case ALPHA_FPRM_NORM:
1260 case ALPHA_FPRM_MINF:
1263 case ALPHA_FPRM_CHOP:
1266 case ALPHA_FPRM_DYN:
1273 /* Generates trap-mode suffix for instructions that accept the su
1274 suffix only (cmpt et al). */
1275 if (alpha_tp == ALPHA_TP_INSN)
1280 /* Generates trap-mode suffix for instructions that accept the u, su,
1281 and sui suffix. This is the bulk of the IEEE floating point
1282 instructions (addt et al). */
1293 case ALPHA_FPTM_SUI:
1294 fputs ("sui", file);
1300 /* Generates trap-mode suffix for instructions that accept the sui
1301 suffix (cvtqt and cvtqs). */
1304 case ALPHA_FPTM_N: case ALPHA_FPTM_U:
1305 case ALPHA_FPTM_SU: /* cvtqt/cvtqs can't cause underflow */
1307 case ALPHA_FPTM_SUI:
1308 fputs ("sui", file);
1314 /* Generates single precision instruction suffix. */
1315 fprintf (file, "%c", (TARGET_FLOAT_VAX?'f':'s'));
1319 /* Generates double precision instruction suffix. */
1320 fprintf (file, "%c", (TARGET_FLOAT_VAX?'g':'t'));
1324 /* If this operand is the constant zero, write it as "$31". */
1325 if (GET_CODE (x) == REG)
1326 fprintf (file, "%s", reg_names[REGNO (x)]);
1327 else if (x == CONST0_RTX (GET_MODE (x)))
1328 fprintf (file, "$31");
1330 output_operand_lossage ("invalid %%r value");
1335 /* Similar, but for floating-point. */
1336 if (GET_CODE (x) == REG)
1337 fprintf (file, "%s", reg_names[REGNO (x)]);
1338 else if (x == CONST0_RTX (GET_MODE (x)))
1339 fprintf (file, "$f31");
1341 output_operand_lossage ("invalid %%R value");
1346 /* Write the 1's complement of a constant. */
1347 if (GET_CODE (x) != CONST_INT)
1348 output_operand_lossage ("invalid %%N value");
1350 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (x));
1354 /* Write 1 << C, for a constant C. */
1355 if (GET_CODE (x) != CONST_INT)
1356 output_operand_lossage ("invalid %%P value");
1358 fprintf (file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) 1 << INTVAL (x));
1362 /* Write the high-order 16 bits of a constant, sign-extended. */
1363 if (GET_CODE (x) != CONST_INT)
1364 output_operand_lossage ("invalid %%h value");
1366 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) >> 16);
1370 /* Write the low-order 16 bits of a constant, sign-extended. */
1371 if (GET_CODE (x) != CONST_INT)
1372 output_operand_lossage ("invalid %%L value");
1374 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
1375 (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
1379 /* Write mask for ZAP insn. */
1380 if (GET_CODE (x) == CONST_DOUBLE)
1382 HOST_WIDE_INT mask = 0;
1383 HOST_WIDE_INT value;
1385 value = CONST_DOUBLE_LOW (x);
1386 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
1391 value = CONST_DOUBLE_HIGH (x);
1392 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
1395 mask |= (1 << (i + sizeof (int)));
1397 fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask & 0xff);
1400 else if (GET_CODE (x) == CONST_INT)
1402 HOST_WIDE_INT mask = 0, value = INTVAL (x);
1404 for (i = 0; i < 8; i++, value >>= 8)
1408 fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask);
1411 output_operand_lossage ("invalid %%m value");
1415 /* 'b', 'w', or 'l' as the value of the constant. */
1416 if (GET_CODE (x) != CONST_INT
1417 || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32))
1418 output_operand_lossage ("invalid %%M value");
1420 fprintf (file, "%s",
1421 INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l");
1425 /* Similar, except do it from the mask. */
1426 if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xff)
1427 fprintf (file, "b");
1428 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff)
1429 fprintf (file, "w");
1430 #if HOST_BITS_PER_WIDE_INT == 32
1431 else if (GET_CODE (x) == CONST_DOUBLE
1432 && CONST_DOUBLE_HIGH (x) == 0
1433 && CONST_DOUBLE_LOW (x) == -1)
1434 fprintf (file, "l");
1436 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
1437 fprintf (file, "l");
1440 output_operand_lossage ("invalid %%U value");
1444 /* Write the constant value divided by 8. */
1445 if (GET_CODE (x) != CONST_INT
1446 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1447 && (INTVAL (x) & 7) != 8)
1448 output_operand_lossage ("invalid %%s value");
1450 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) / 8);
1454 /* Same, except compute (64 - c) / 8 */
1456 if (GET_CODE (x) != CONST_INT
1457 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1458 && (INTVAL (x) & 7) != 8)
1459 output_operand_lossage ("invalid %%s value");
1461 fprintf (file, HOST_WIDE_INT_PRINT_DEC, (64 - INTVAL (x)) / 8);
1464 case 'C': case 'D': case 'c': case 'd':
1465 /* Write out comparison name. */
1467 enum rtx_code c = GET_CODE (x);
1469 if (GET_RTX_CLASS (c) != '<')
1470 output_operand_lossage ("invalid %%C value");
1473 c = reverse_condition (c);
1474 else if (code == 'c')
1475 c = swap_condition (c);
1476 else if (code == 'd')
1477 c = swap_condition (reverse_condition (c));
1480 fprintf (file, "ule");
1482 fprintf (file, "ult");
1484 fprintf (file, "%s", GET_RTX_NAME (c));
1489 /* Write the divide or modulus operator. */
1490 switch (GET_CODE (x))
1493 fprintf (file, "div%s", GET_MODE (x) == SImode ? "l" : "q");
1496 fprintf (file, "div%su", GET_MODE (x) == SImode ? "l" : "q");
1499 fprintf (file, "rem%s", GET_MODE (x) == SImode ? "l" : "q");
1502 fprintf (file, "rem%su", GET_MODE (x) == SImode ? "l" : "q");
1505 output_operand_lossage ("invalid %%E value");
1511 /* Write "_u" for unaligned access. */
1512 if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == AND)
1513 fprintf (file, "_u");
1517 if (GET_CODE (x) == REG)
1518 fprintf (file, "%s", reg_names[REGNO (x)]);
1519 else if (GET_CODE (x) == MEM)
1520 output_address (XEXP (x, 0));
1522 output_addr_const (file, x);
1526 output_operand_lossage ("invalid %%xn code");
1530 /* Do what is necessary for `va_start'. The argument is ignored;
1531 We look at the current function to determine if stdarg or varargs
1532 is used and fill in an initial va_list. A pointer to this constructor
1536 alpha_builtin_saveregs (arglist)
1539 rtx block, addr, dest, argsize;
1540 tree fntype = TREE_TYPE (current_function_decl);
1541 int stdarg = (TYPE_ARG_TYPES (fntype) != 0
1542 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
1543 != void_type_node));
1545 /* Compute the current position into the args, taking into account
1546 both registers and memory. Both of these are already included in
1547 current_function_args_info. */
1549 argsize = GEN_INT (CURRENT_FUNCTION_ARGS_INFO * UNITS_PER_WORD);
1551 /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1552 storing fp arg registers in the first 48 bytes, and the integer arg
1553 registers in the next 48 bytes. This is only done, however, if any
1554 integer registers need to be stored.
1556 If no integer registers need be stored, then we must subtract 48 in
1557 order to account for the integer arg registers which are counted in
1558 argsize above, but which are not actually stored on the stack. */
1560 if (TARGET_OPEN_VMS)
1561 addr = plus_constant (virtual_incoming_args_rtx,
1562 CURRENT_FUNCTION_ARGS_INFO <= 5 + stdarg
1563 ? UNITS_PER_WORD : - 6 * UNITS_PER_WORD);
1565 addr = (CURRENT_FUNCTION_ARGS_INFO <= 5 + stdarg
1566 ? plus_constant (virtual_incoming_args_rtx,
1568 : plus_constant (virtual_incoming_args_rtx,
1569 - (6 * UNITS_PER_WORD)));
1571 /* For VMS, we include the argsize, while on Unix, it's handled as
1572 a separate field. */
1573 if (TARGET_OPEN_VMS)
1574 addr = plus_constant (addr, INTVAL (argsize));
1576 addr = force_operand (addr, NULL_RTX);
1578 #ifdef POINTERS_EXTEND_UNSIGNED
1579 addr = convert_memory_address (ptr_mode, addr);
1582 if (TARGET_OPEN_VMS)
1586 /* Allocate the va_list constructor */
1587 block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
1588 RTX_UNCHANGING_P (block) = 1;
1589 RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
1591 /* Store the address of the first integer register in the __base
1594 dest = change_address (block, ptr_mode, XEXP (block, 0));
1595 emit_move_insn (dest, addr);
1597 if (flag_check_memory_usage)
1598 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest,
1599 ptr_mode, GEN_INT (GET_MODE_SIZE (ptr_mode)),
1600 TYPE_MODE (sizetype),
1601 GEN_INT (MEMORY_USE_RW), QImode);
1603 /* Store the argsize as the __va_offset member. */
1604 dest = change_address (block, TYPE_MODE (integer_type_node),
1605 plus_constant (XEXP (block, 0),
1606 POINTER_SIZE/BITS_PER_UNIT));
1607 emit_move_insn (dest, argsize);
1609 if (flag_check_memory_usage)
1610 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest,
1612 GEN_INT (GET_MODE_SIZE
1613 (TYPE_MODE (integer_type_node))),
1614 TYPE_MODE (sizetype),
1615 GEN_INT (MEMORY_USE_RW), QImode);
1617 /* Return the address of the va_list constructor, but don't put it in a
1618 register. Doing so would fail when not optimizing and produce worse
1619 code when optimizing. */
1620 return XEXP (block, 0);
1624 /* This page contains routines that are used to determine what the function
1625 prologue and epilogue code will do and write them out. */
1627 /* Compute the size of the save area in the stack. */
1634 /* These variables are used for communication between the following functions.
1635 They indicate various things about the current function being compiled
1636 that are used to tell what kind of prologue, epilogue and procedure
1637 descriptior to generate. */
1639 /* Nonzero if we need a stack procedure. */
1640 static int is_stack_procedure;
1642 /* Register number (either FP or SP) that is used to unwind the frame. */
1643 static int unwind_regno;
1645 /* Register number used to save FP. We need not have one for RA since
1646 we don't modify it for register procedures. This is only defined
1647 for register frame procedures. */
1648 static int save_fp_regno;
1650 /* Register number used to reference objects off our PV. */
1651 static int base_regno;
1653 /* Compute register masks for saved registers. */
1656 alpha_sa_mask (imaskP, fmaskP)
1657 unsigned long *imaskP;
1658 unsigned long *fmaskP;
1660 unsigned long imask = 0;
1661 unsigned long fmask = 0;
1664 if (is_stack_procedure)
1665 imask |= (1L << HARD_FRAME_POINTER_REGNUM);
1667 /* One for every register we have to save. */
1669 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1670 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1675 fmask |= (1L << (i - 32));
1688 HOST_WIDE_INT stack_needed;
1691 /* One for every register we have to save. */
1693 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1694 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1697 /* Start by assuming we can use a register procedure if we don't make any
1698 calls (REG_RA not used) or need to save any registers and a stack
1699 procedure if we do. */
1700 is_stack_procedure = regs_ever_live[REG_RA] || sa_size != 0;
1702 /* Decide whether to refer to objects off our PV via FP or PV.
1703 If we need need FP for something else or if we receive a nonlocal
1704 goto (which expects PV to contain the value), we must use PV.
1705 Otherwise, start by assuming we can use FP. */
1706 base_regno = (frame_pointer_needed || current_function_has_nonlocal_label
1707 || is_stack_procedure
1708 || current_function_outgoing_args_size
1709 ? REG_PV : HARD_FRAME_POINTER_REGNUM);
1711 /* If we want to copy PV into FP, we need to find some register in which to
1716 if (base_regno == HARD_FRAME_POINTER_REGNUM)
1717 for (i = 0; i < 32; i++)
1718 if (! fixed_regs[i] && call_used_regs[i] && ! regs_ever_live[i])
1721 if (save_fp_regno == -1)
1722 base_regno = REG_PV, is_stack_procedure = 1;
1724 /* Stack unwinding should be done via FP unless we use it for PV. */
1726 = base_regno == REG_PV ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM;
1728 /* If this is a stack procedure, allow space for saving FP and RA. */
1729 if (is_stack_procedure)
1736 alpha_pv_save_size ()
1739 return is_stack_procedure ? 8 : 0;
1746 return unwind_regno == HARD_FRAME_POINTER_REGNUM;
1749 #else /* ! OPEN_VMS */
1757 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1758 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1761 /* If some registers were saved but not reg 26, reg 26 must also
1762 be saved, so leave space for it. */
1763 if (size != 0 && ! regs_ever_live[26])
1766 /* Our size must be even (multiple of 16 bytes). */
1773 #endif /* ! OPEN_VMS */
1775 /* Return 1 if this function can directly return via $26. */
1780 return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
1781 && get_frame_size () == 0
1782 && current_function_outgoing_args_size == 0
1783 && current_function_pretend_args_size == 0);
1786 /* Write a version stamp. Don't write anything if we are running as a
1787 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1789 #if !defined(CROSS_COMPILE) && !defined(_WIN32) && !defined(__linux__) && !defined(VMS)
1794 alpha_write_verstamp (file)
1798 fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP);
1802 /* Write code to add constant C to register number IN_REG (possibly 31)
1803 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1804 usually this will be OUT_REG, but should not be if OUT_REG is
1805 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1806 Write the code to FILE. */
1809 add_long_const (file, c, in_reg, out_reg, temp_reg)
1812 int in_reg, out_reg, temp_reg;
1814 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
1815 HOST_WIDE_INT tmp1 = c - low;
1816 HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1817 HOST_WIDE_INT extra = 0;
1819 /* We don't have code to write out constants larger than 32 bits. */
1820 #if HOST_BITS_PER_LONG_INT == 64
1821 if ((unsigned HOST_WIDE_INT) c >> 32 != 0)
1825 /* If HIGH will be interpreted as negative, we must adjust it to do two
1826 ldha insns. Note that we will never be building a negative constant
1833 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1838 int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg;
1840 if (low >= 0 && low < 255)
1841 fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg);
1843 fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg);
1845 in_reg = result_reg;
1850 int result_reg = (high == 0) ? out_reg : temp_reg;
1852 fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg);
1853 in_reg = result_reg;
1857 fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg);
1860 /* Write function prologue. */
1865 Quick and dirty vmskrunch routine to ensure symbols are within the
1866 64 bytes limit imposed by VMS.
1868 This is written specifically for GNAT, and may not work for C++.
1870 This routine duplicates every symbol passed to it whether it is too
1871 long or not, which is a waste of space, fix later.
1879 int max = 60; /* Allow for the ..xx extension */
1885 len = tlen = strlen (name);
1886 foo = xstrdup (name);
1888 /* Don't muck with the ..xx extenstion */
1889 if ((foo [tlen-4] == '.') && (foo [tlen-3] == '.'))
1903 int i, j, slen, nlen, xlen, chopchar;
1907 /* Change all _ and . characters to spaces, if thats enough then quit.
1908 For example: "foobar__foo__bar" becomes "foobar foo bar" */
1910 for (i = 0; bar = index (foo, '_'); i++)
1914 for (i = 0; bar = index (foo, '.'); i++)
1918 for (i = 0; bar = index (foo, '$'); i++)
1922 /* Iteratively make blank the rightmost non-blank character on the
1923 longest leftmost substring delmited by blanks, until it's short
1924 enough. For example: "foobar foo bar" becomes, successively:
1943 /* Find first non-blank */
1945 for (i = j; foo[i]==' ' && foo[i]; i++)
1948 /* Find the first blank */
1951 for (i = j + 1; foo[i] != ' ' && foo[i]; i++)
1954 /* If this substring is the longest so far, remember the
1955 position of the character to chop off. */
1966 /* Try to avoid chopping uppercase suffix letters */
1967 if (isupper (foo [chopchar]))
1970 isupper (foo[i]) && foo[i] != ' ' && i >= 0;
1973 if (islower (foo[i]))
1976 foo [chopchar] = ' ';
1980 /* Put the ..xx extension back */
1987 /* Collapse all the blanks */
1989 for (i = 0; foo[i]; i++)
1997 /* Put back the ..xx extension */
2008 /* On vms we have two kinds of functions:
2010 - stack frame (PROC_STACK)
2011 these are 'normal' functions with local vars and which are
2012 calling other functions
2013 - register frame (PROC_REGISTER)
2014 keeps all data in registers, needs no stack
2016 We must pass this to the assembler so it can generate the
2017 proper pdsc (procedure descriptor)
2018 This is done with the '.pdesc' command.
2020 size is the stack size needed for local variables. */
2023 output_prolog (file, size)
2027 unsigned long imask = 0;
2028 unsigned long fmask = 0;
2029 /* Stack space needed for pushing registers clobbered by us. */
2030 HOST_WIDE_INT sa_size;
2031 /* Complete stack size needed. */
2032 HOST_WIDE_INT frame_size;
2033 /* Offset from base reg to register save area. */
2035 /* Offset during register save. */
2037 /* Label for the procedure entry. */
2038 char entry_label[70];
2041 sa_size = alpha_sa_size ();
2043 = ALPHA_ROUND (sa_size
2044 + (is_stack_procedure ? 8 : 0)
2045 + size + current_function_pretend_args_size);
2047 /* Issue function start and label. */
2048 fprintf (file, "\t.ent ");
2049 assemble_name (file, alpha_function_name);
2050 fprintf (file, "\n");
2051 sprintf (entry_label, "%.64s..en", alpha_function_name);
2052 ASM_OUTPUT_LABEL (file, entry_label);
2053 inside_function = TRUE;
2055 fprintf (file, "\t.base $%d\n", base_regno);
2057 /* Calculate register masks for clobbered registers. */
2059 if (is_stack_procedure)
2060 alpha_sa_mask (&imask, &fmask);
2062 /* Adjust the stack by the frame size. If the frame size is > 4096
2063 bytes, we need to be sure we probe somewhere in the first and last
2064 4096 bytes (we can probably get away without the latter test) and
2065 every 8192 bytes in between. If the frame size is > 32768, we
2066 do this in a loop. Otherwise, we generate the explicit probe
2069 Note that we are only allowed to adjust sp once in the prologue. */
2071 if (frame_size < 32768)
2073 if (frame_size > 4096)
2077 fprintf (file, "\tstq $31,-%d($30)\n", probed);
2079 while (probed + 8192 < frame_size)
2080 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
2082 /* We only have to do this probe if we aren't saving registers. */
2083 if (sa_size == 0 && probed + 4096 < frame_size)
2084 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
2087 if (frame_size != 0)
2088 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
2092 /* Here we generate code to set R4 to SP + 4096 and set R23 to the
2093 number of 8192 byte blocks to probe. We then probe each block
2094 in the loop and then set SP to the proper location. If the
2095 amount remaining is > 4096, we have to do one more probe if we
2096 are not saving any registers. */
2098 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
2099 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
2101 add_long_const (file, blocks, 31, 23, 23);
2103 fprintf (file, "\tlda $22,4096($30)\n");
2105 assemble_name (file, alpha_function_name);
2106 fprintf (file, "..sc:\n");
2108 fprintf (file, "\tstq $31,-8192($22)\n");
2109 fprintf (file, "\tsubq $23,1,$23\n");
2110 fprintf (file, "\tlda $22,-8192($22)\n");
2112 fprintf (file, "\tbne $23,");
2113 assemble_name (file, alpha_function_name);
2114 fprintf (file, "..sc\n");
2116 if (leftover > 4096 && sa_size == 0)
2117 fprintf (file, "\tstq $31,-%d($22)\n", leftover);
2119 fprintf (file, "\tlda $30,-%d($22)\n", leftover);
2122 if (is_stack_procedure)
2124 int reg_offset = rsa_offset;
2126 /* Store R26 (RA) first. */
2127 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
2130 /* Store integer regs. according to mask. */
2131 for (i = 0; i < 32; i++)
2132 if (imask & (1L<<i))
2134 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
2138 /* Print the register mask and do floating-point saves. */
2141 fprintf (file, "\t.mask 0x%x,0\n", imask);
2143 for (i = 0; i < 32; i++)
2145 if (fmask & (1L << i))
2147 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
2152 /* Print the floating-point mask, if we've saved any fp register. */
2154 fprintf (file, "\t.fmask 0x%x,0\n", fmask);
2156 fprintf (file, "\tstq $27,0($30)\n");
2160 fprintf (file, "\t.fp_save $%d\n", save_fp_regno);
2161 fprintf (file, "\tbis $%d,$%d,$%d\n", HARD_FRAME_POINTER_REGNUM,
2162 HARD_FRAME_POINTER_REGNUM, save_fp_regno);
2165 if (base_regno != REG_PV)
2166 fprintf (file, "\tbis $%d,$%d,$%d\n", REG_PV, REG_PV, base_regno);
2168 if (unwind_regno == HARD_FRAME_POINTER_REGNUM)
2169 fprintf (file, "\tbis $%d,$%d,$%d\n", STACK_POINTER_REGNUM,
2170 STACK_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM);
2172 /* Describe our frame. */
2173 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
2174 unwind_regno, frame_size, rsa_offset);
2176 /* If we have to allocate space for outgoing args, do it now. */
2177 if (current_function_outgoing_args_size != 0)
2178 fprintf (file, "\tlda $%d,%d($%d)\n", STACK_POINTER_REGNUM,
2179 - ALPHA_ROUND (current_function_outgoing_args_size),
2180 HARD_FRAME_POINTER_REGNUM);
2182 fprintf (file, "\t.prologue\n");
2185 fprintf (file, "\t.align 3\n");
2186 ASM_OUTPUT_LABEL (file, alpha_function_name);
2187 fprintf (file, "\t.pdesc ");
2188 assemble_name (file, alpha_function_name);
2189 fprintf (file, "..en,%s\n", is_stack_procedure ? "stack" : "reg");
2190 alpha_need_linkage (alpha_function_name, 1);
2196 /* Write function epilogue. */
2199 output_epilog (file, size)
2203 unsigned long imask = 0;
2204 unsigned long fmask = 0;
2205 /* Stack space needed for pushing registers clobbered by us. */
2206 HOST_WIDE_INT sa_size = alpha_sa_size ();
2207 /* Complete stack size needed. */
2208 HOST_WIDE_INT frame_size
2209 = ALPHA_ROUND (sa_size
2210 + (is_stack_procedure ? 8 : 0)
2211 + size + current_function_pretend_args_size);
2213 rtx insn = get_last_insn ();
2215 /* If the last insn was a BARRIER, we don't have to write anything except
2216 the .end pseudo-op. */
2218 if (GET_CODE (insn) == NOTE)
2219 insn = prev_nonnote_insn (insn);
2221 if (insn == 0 || GET_CODE (insn) != BARRIER)
2223 /* Restore clobbered registers, load FP last. */
2225 if (is_stack_procedure)
2231 if (unwind_regno == HARD_FRAME_POINTER_REGNUM)
2232 fprintf (file, "\tbis $%d,$%d,$%d\n", HARD_FRAME_POINTER_REGNUM,
2233 HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM);
2235 alpha_sa_mask (&imask, &fmask);
2237 /* Start reloading registers after RA. */
2238 reg_offset = rsa_offset + 8;
2240 for (i = 0; i < 32; i++)
2241 if (imask & (1L<<i))
2243 if (i == HARD_FRAME_POINTER_REGNUM)
2244 fp_offset = reg_offset;
2246 fprintf (file, "\tldq $%d,%d($30)\n",
2251 for (i = 0; i < 32; i++)
2252 if (fmask & (1L << i))
2254 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
2258 /* Restore R26 (RA). */
2259 fprintf (file, "\tldq $26,%d($30)\n", rsa_offset);
2261 /* Restore R29 (FP). */
2262 fprintf (file, "\tldq $29,%d($30)\n", fp_offset);
2265 fprintf (file, "\tbis $%d,$%d,$%d\n", save_fp_regno, save_fp_regno,
2266 HARD_FRAME_POINTER_REGNUM);
2268 if (frame_size != 0)
2270 if (frame_size < 32768)
2271 fprintf (file, "\tlda $30,%d($30)\n", frame_size);
2274 long high = frame_size >> 16;
2275 long low = frame_size & 0xffff;
2279 low = -32768 + (low & 0x7fff);
2281 fprintf (file, "\tldah $2,%ld($31)\n", high);
2282 fprintf (file, "\tlda $2,%ld($2)\n", low);
2283 fprintf (file, "\taddq $30,$2,$30\n");
2287 /* Finally return to the caller. */
2288 fprintf (file, "\tret $31,($26),1\n");
2291 /* End the function. */
2292 fprintf (file, "\t.end ");
2293 assemble_name (file, alpha_function_name);
2294 fprintf (file, "\n");
2295 inside_function = FALSE;
2297 /* Show that we know this function if it is called again. */
2298 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
2301 #else /* !OPEN_VMS */
2304 output_prolog (file, size)
2308 HOST_WIDE_INT out_args_size
2309 = ALPHA_ROUND (current_function_outgoing_args_size);
2310 HOST_WIDE_INT sa_size = alpha_sa_size ();
2311 HOST_WIDE_INT frame_size
2312 = (out_args_size + sa_size
2313 + ALPHA_ROUND (size + current_function_pretend_args_size));
2314 HOST_WIDE_INT reg_offset = out_args_size;
2315 HOST_WIDE_INT start_reg_offset = reg_offset;
2316 HOST_WIDE_INT actual_start_reg_offset = start_reg_offset;
2317 int int_reg_save_area_size = 0;
2319 unsigned reg_mask = 0;
2322 /* Ecoff can handle multiple .file directives, so put out file and lineno.
2323 We have to do that before the .ent directive as we cannot switch
2324 files within procedures with native ecoff because line numbers are
2325 linked to procedure descriptors.
2326 Outputting the lineno helps debugging of one line functions as they
2327 would otherwise get no line number at all. Please note that we would
2328 like to put out last_linenum from final.c, but it is not accessible. */
2330 if (write_symbols == SDB_DEBUG)
2332 ASM_OUTPUT_SOURCE_FILENAME (file,
2333 DECL_SOURCE_FILE (current_function_decl));
2334 if (debug_info_level != DINFO_LEVEL_TERSE)
2335 ASM_OUTPUT_SOURCE_LINE (file,
2336 DECL_SOURCE_LINE (current_function_decl));
2339 /* The assembly language programmer's guide states that the second argument
2340 to the .ent directive, the lex_level, is ignored by the assembler,
2341 so we might as well omit it. */
2343 if (!flag_inhibit_size_directive)
2345 fprintf (file, "\t.ent ");
2346 assemble_name (file, alpha_function_name);
2347 fprintf (file, "\n");
2349 ASM_OUTPUT_LABEL (file, alpha_function_name);
2350 inside_function = TRUE;
2352 if (TARGET_IEEE_CONFORMANT && !flag_inhibit_size_directive)
2353 /* Set flags in procedure descriptor to request IEEE-conformant
2354 math-library routines. The value we set it to is PDSC_EXC_IEEE
2355 (/usr/include/pdsc.h). */
2356 fprintf (file, "\t.eflag 48\n");
2358 /* Set up offsets to alpha virtual arg/local debugging pointer. */
2360 alpha_auto_offset = -frame_size + current_function_pretend_args_size;
2361 alpha_arg_offset = -frame_size + 48;
2363 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
2364 Even if we are a static function, we still need to do this in case
2365 our address is taken and passed to something like qsort.
2367 We never need a GP for Windows/NT. */
2369 alpha_function_needs_gp = 0;
2371 #ifdef TARGET_PROFILING_NEEDS_GP
2373 alpha_function_needs_gp = 1;
2376 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2377 if ((GET_CODE (insn) == CALL_INSN)
2378 || (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2379 && GET_CODE (PATTERN (insn)) != USE
2380 && GET_CODE (PATTERN (insn)) != CLOBBER
2381 && (get_attr_type (insn) == TYPE_LDSYM
2382 || get_attr_type (insn) == TYPE_ISUBR)))
2384 alpha_function_needs_gp = 1;
2388 if (TARGET_WINDOWS_NT == 0)
2390 if (alpha_function_needs_gp)
2391 fprintf (file, "\tldgp $29,0($27)\n");
2393 /* Put a label after the GP load so we can enter the function at it. */
2394 assemble_name (file, alpha_function_name);
2395 fprintf (file, "..ng:\n");
2398 /* Adjust the stack by the frame size. If the frame size is > 4096
2399 bytes, we need to be sure we probe somewhere in the first and last
2400 4096 bytes (we can probably get away without the latter test) and
2401 every 8192 bytes in between. If the frame size is > 32768, we
2402 do this in a loop. Otherwise, we generate the explicit probe
2405 Note that we are only allowed to adjust sp once in the prologue. */
2407 if (frame_size < 32768)
2409 if (frame_size > 4096)
2413 fprintf (file, "\tstq $31,-%d($30)\n", probed);
2415 while (probed + 8192 < frame_size)
2416 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
2418 /* We only have to do this probe if we aren't saving registers. */
2419 if (sa_size == 0 && probed + 4096 < frame_size)
2420 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
2423 if (frame_size != 0)
2424 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
2428 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
2429 number of 8192 byte blocks to probe. We then probe each block
2430 in the loop and then set SP to the proper location. If the
2431 amount remaining is > 4096, we have to do one more probe if we
2432 are not saving any registers. */
2434 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
2435 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
2437 add_long_const (file, blocks, 31, 5, 5);
2439 fprintf (file, "\tlda $4,4096($30)\n");
2441 assemble_name (file, alpha_function_name);
2442 fprintf (file, "..sc:\n");
2444 fprintf (file, "\tstq $31,-8192($4)\n");
2445 fprintf (file, "\tsubq $5,1,$5\n");
2446 fprintf (file, "\tlda $4,-8192($4)\n");
2448 fprintf (file, "\tbne $5,");
2449 assemble_name (file, alpha_function_name);
2450 fprintf (file, "..sc\n");
2452 if (leftover > 4096 && sa_size == 0)
2453 fprintf (file, "\tstq $31,-%d($4)\n", leftover);
2455 fprintf (file, "\tlda $30,-%d($4)\n", leftover);
2458 /* Describe our frame. */
2459 if (!flag_inhibit_size_directive)
2461 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
2462 (frame_pointer_needed
2463 ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM),
2464 frame_size, current_function_pretend_args_size);
2467 /* Save register 26 if any other register needs to be saved. */
2470 reg_mask |= 1 << 26;
2471 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
2473 int_reg_save_area_size += 8;
2476 /* Now save any other used integer registers required to be saved. */
2477 for (i = 0; i < 32; i++)
2478 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26)
2481 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
2483 int_reg_save_area_size += 8;
2486 /* Print the register mask and do floating-point saves. */
2487 if (reg_mask && !flag_inhibit_size_directive)
2488 fprintf (file, "\t.mask 0x%x,%d\n", reg_mask,
2489 actual_start_reg_offset - frame_size);
2491 start_reg_offset = reg_offset;
2494 for (i = 0; i < 32; i++)
2495 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
2496 && regs_ever_live[i + 32])
2499 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
2503 /* Print the floating-point mask, if we've saved any fp register. */
2504 if (reg_mask && !flag_inhibit_size_directive)
2505 fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask,
2506 actual_start_reg_offset - frame_size + int_reg_save_area_size);
2508 /* If we need a frame pointer, set it from the stack pointer. Note that
2509 this must always be the last instruction in the prologue. */
2510 if (frame_pointer_needed)
2511 fprintf (file, "\tbis $30,$30,$15\n");
2513 /* End the prologue and say if we used gp. */
2514 if (!flag_inhibit_size_directive)
2515 fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
2518 /* Write function epilogue. */
2521 output_epilog (file, size)
2525 rtx insn = get_last_insn ();
2526 HOST_WIDE_INT out_args_size
2527 = ALPHA_ROUND (current_function_outgoing_args_size);
2528 HOST_WIDE_INT sa_size = alpha_sa_size ();
2529 HOST_WIDE_INT frame_size
2530 = (out_args_size + sa_size
2531 + ALPHA_ROUND (size + current_function_pretend_args_size));
2532 HOST_WIDE_INT reg_offset = out_args_size;
2533 HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset;
2535 = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM];
2538 /* If the last insn was a BARRIER, we don't have to write anything except
2539 the .end pseudo-op. */
2540 if (GET_CODE (insn) == NOTE)
2541 insn = prev_nonnote_insn (insn);
2542 if (insn == 0 || GET_CODE (insn) != BARRIER)
2546 final_prescan_insn (NULL_RTX, NULL_PTR, 0);
2548 /* If we have a frame pointer, restore SP from it. */
2549 if (frame_pointer_needed)
2550 fprintf (file, "\tbis $15,$15,$30\n");
2552 /* Restore all the registers, starting with the return address
2556 fprintf (file, "\tldq $26,%d($30)\n", reg_offset);
2560 /* Now restore any other used integer registers that that we saved,
2561 except for FP if it is being used as FP, since it must be
2564 for (i = 0; i < 32; i++)
2565 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]
2568 if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
2569 fp_offset = reg_offset;
2571 fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset);
2575 for (i = 0; i < 32; i++)
2576 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
2577 && regs_ever_live[i + 32])
2579 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
2583 /* If the stack size is large and we have a frame pointer, compute the
2584 size of the stack into a register because the old FP restore, stack
2585 pointer adjust, and return are required to be consecutive
2587 if (frame_size > 32767 && restore_fp)
2588 add_long_const (file, frame_size, 31, 1, 1);
2590 /* If we needed a frame pointer and we have to restore it, do it
2591 now. This must be done in one instruction immediately
2592 before the SP update. */
2593 if (restore_fp && fp_offset)
2594 fprintf (file, "\tldq $15,%d($30)\n", fp_offset);
2596 /* Now update the stack pointer, if needed. Only one instruction must
2597 modify the stack pointer. It must be the last instruction in the
2598 sequence and must be an ADDQ or LDA instruction. If the frame
2599 pointer was loaded above, we may only put one instruction here. */
2601 if (frame_size > 32768 && restore_fp)
2602 fprintf (file, "\taddq $1,$30,$30\n");
2604 add_long_const (file, frame_size, 30, 30, 1);
2606 /* Finally return to the caller. */
2607 fprintf (file, "\tret $31,($26),1\n");
2610 /* End the function. */
2611 if (!flag_inhibit_size_directive)
2613 fprintf (file, "\t.end ");
2614 assemble_name (file, alpha_function_name);
2615 fprintf (file, "\n");
2617 inside_function = FALSE;
2619 /* Show that we know this function if it is called again. */
2620 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
2622 #endif /* !OPEN_VMS */
2624 /* Debugging support. */
2628 /* Count the number of sdb related labels are generated (to find block
2629 start and end boundaries). */
2631 int sdb_label_count = 0;
2633 /* Next label # for each statement. */
2635 static int sym_lineno = 0;
2637 /* Count the number of .file directives, so that .loc is up to date. */
2639 static int num_source_filenames = 0;
2641 /* Name of the file containing the current function. */
2643 static char *current_function_file = "";
2645 /* Offsets to alpha virtual arg/local debugging pointers. */
2647 long alpha_arg_offset;
2648 long alpha_auto_offset;
2650 /* Emit a new filename to a stream. */
2653 alpha_output_filename (stream, name)
2657 static int first_time = TRUE;
2658 char ltext_label_name[100];
2663 ++num_source_filenames;
2664 current_function_file = name;
2665 fprintf (stream, "\t.file\t%d ", num_source_filenames);
2666 output_quoted_string (stream, name);
2667 fprintf (stream, "\n");
2668 if (!TARGET_GAS && write_symbols == DBX_DEBUG)
2669 fprintf (stream, "\t#@stabs\n");
2672 else if (write_symbols == DBX_DEBUG)
2674 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0);
2675 fprintf (stream, "%s ", ASM_STABS_OP);
2676 output_quoted_string (stream, name);
2677 fprintf (stream, ",%d,0,0,%s\n", N_SOL, <ext_label_name[1]);
2680 else if (name != current_function_file
2681 && strcmp (name, current_function_file) != 0)
2683 if (inside_function && ! TARGET_GAS)
2684 fprintf (stream, "\t#.file\t%d ", num_source_filenames);
2687 ++num_source_filenames;
2688 current_function_file = name;
2689 fprintf (stream, "\t.file\t%d ", num_source_filenames);
2692 output_quoted_string (stream, name);
2693 fprintf (stream, "\n");
2697 /* Emit a linenumber to a stream. */
2700 alpha_output_lineno (stream, line)
2704 if (write_symbols == DBX_DEBUG)
2706 /* mips-tfile doesn't understand .stabd directives. */
2708 fprintf (stream, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
2709 sym_lineno, ASM_STABN_OP, N_SLINE, line, sym_lineno);
2712 fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line);
2715 /* Structure to show the current status of registers and memory. */
2717 struct shadow_summary
2720 unsigned long i : 32; /* Mask of int regs */
2721 unsigned long fp : 32; /* Mask of fp regs */
2722 unsigned long mem : 1; /* mem == imem | fpmem */
2726 /* Summary the effects of expression X on the machine. Update SUM, a pointer
2727 to the summary structure. SET is nonzero if the insn is setting the
2728 object, otherwise zero. */
2731 summarize_insn (x, sum, set)
2733 struct shadow_summary *sum;
2742 switch (GET_CODE (x))
2744 /* ??? Note that this case would be incorrect if the Alpha had a
2745 ZERO_EXTRACT in SET_DEST. */
2747 summarize_insn (SET_SRC (x), sum, 0);
2748 summarize_insn (SET_DEST (x), sum, 1);
2752 summarize_insn (XEXP (x, 0), sum, 1);
2756 summarize_insn (XEXP (x, 0), sum, 0);
2760 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
2761 summarize_insn (XVECEXP (x, 0, i), sum, 0);
2766 int regno = REGNO (x);
2767 unsigned long mask = 1UL << (regno % 32);
2769 if (regno == 31 || regno == 63)
2775 sum->defd.i |= mask;
2777 sum->defd.fp |= mask;
2782 sum->used.i |= mask;
2784 sum->used.fp |= mask;
2795 /* Find the regs used in memory address computation: */
2796 summarize_insn (XEXP (x, 0), sum, 0);
2800 summarize_insn (SUBREG_REG (x), sum, 0);
2803 case CONST_INT: case CONST_DOUBLE:
2804 case SYMBOL_REF: case LABEL_REF: case CONST:
2807 /* Handle common unary and binary ops for efficiency. */
2808 case COMPARE: case PLUS: case MINUS: case MULT: case DIV:
2809 case MOD: case UDIV: case UMOD: case AND: case IOR:
2810 case XOR: case ASHIFT: case ROTATE: case ASHIFTRT: case LSHIFTRT:
2811 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
2812 case NE: case EQ: case GE: case GT: case LE:
2813 case LT: case GEU: case GTU: case LEU: case LTU:
2814 summarize_insn (XEXP (x, 0), sum, 0);
2815 summarize_insn (XEXP (x, 1), sum, 0);
2818 case NEG: case NOT: case SIGN_EXTEND: case ZERO_EXTEND:
2819 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: case FLOAT:
2820 case FIX: case UNSIGNED_FLOAT: case UNSIGNED_FIX: case ABS:
2821 case SQRT: case FFS:
2822 summarize_insn (XEXP (x, 0), sum, 0);
2826 format_ptr = GET_RTX_FORMAT (GET_CODE (x));
2827 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2828 switch (format_ptr[i])
2831 summarize_insn (XEXP (x, i), sum, 0);
2835 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2836 summarize_insn (XVECEXP (x, i, j), sum, 0);
2845 /* This function is executed just prior to the output of assembler code for
2846 INSN to modify the extracted operands so they will be output differently.
2848 OPVEC is the vector containing the operands extracted from INSN, and
2849 NOPERANDS is the number of elements of the vector which contain meaningful
2850 data for this insn. The contents of this vector are what will be used to
2851 convert the insn template into assembler code, so you can change the
2852 assembler output by changing the contents of the vector.
2854 We use this function to ensure a sufficient number of `trapb' instructions
2855 are in the code when the user requests code with a trap precision of
2856 functions or instructions.
2858 In naive mode, when the user requests a trap-precision of "instruction", a
2859 trapb is needed after every instruction that may generate a trap (and after
2860 jsr/bsr instructions, because called functions may import a trap from the
2861 caller). This ensures that the code is resumption safe but it is also slow.
2863 When optimizations are turned on, we delay issuing a trapb as long as
2864 possible. In this context, a trap shadow is the sequence of instructions
2865 that starts with a (potentially) trap generating instruction and extends to
2866 the next trapb or call_pal instruction (but GCC never generates call_pal by
2867 itself). We can delay (and therefore sometimes omit) a trapb subject to the
2868 following conditions:
2870 (a) On entry to the trap shadow, if any Alpha register or memory location
2871 contains a value that is used as an operand value by some instruction in
2872 the trap shadow (live on entry), then no instruction in the trap shadow
2873 may modify the register or memory location.
2875 (b) Within the trap shadow, the computation of the base register for a
2876 memory load or store instruction may not involve using the result
2877 of an instruction that might generate an UNPREDICTABLE result.
2879 (c) Within the trap shadow, no register may be used more than once as a
2880 destination register. (This is to make life easier for the trap-handler.)
2882 (d) The trap shadow may not include any branch instructions.
2887 final_prescan_insn (insn, opvec, noperands)
2892 static struct shadow_summary shadow = {0, 0, 0, 0, 0};
2894 #define CLOSE_SHADOW \
2897 fputs ("\ttrapb\n", asm_out_file); \
2899 bzero ((char *) &shadow, sizeof shadow); \
2903 if (alpha_tp == ALPHA_TP_PROG)
2910 /* Generate one trapb before epilogue (indicated by INSN==0) */
2916 if (optimize && insn != 0)
2918 struct shadow_summary sum = {0, 0, 0};
2920 switch (GET_CODE(insn))
2923 summarize_insn (PATTERN (insn), &sum, 0);
2925 if ((sum.defd.i & shadow.defd.i)
2926 || (sum.defd.fp & shadow.defd.fp))
2928 /* (c) would be violated */
2933 /* Combine shadow with summary of current insn: */
2934 shadow.used.i |= sum.used.i;
2935 shadow.used.fp |= sum.used.fp;
2936 shadow.used.mem |= sum.used.mem;
2937 shadow.defd.i |= sum.defd.i;
2938 shadow.defd.fp |= sum.defd.fp;
2939 shadow.defd.mem |= sum.defd.mem;
2941 if ((sum.defd.i & shadow.used.i)
2942 || (sum.defd.fp & shadow.used.fp)
2943 || (sum.defd.mem & shadow.used.mem))
2945 /* (a) would be violated (also takes care of (b)). */
2946 if (get_attr_trap (insn) == TRAP_YES
2947 && ((sum.defd.i & sum.used.i)
2948 || (sum.defd.fp & sum.used.fp)))
2971 if (insn != 0 && get_attr_trap (insn) == TRAP_YES)
2973 if (optimize && !trap_pending && GET_CODE (insn) == INSN)
2974 summarize_insn (PATTERN (insn), &shadow, 0);
2979 /* Check a floating-point value for validity for a particular machine mode. */
2981 static char *float_strings[] =
2983 /* These are for FLOAT_VAX. */
2984 "1.70141173319264430e+38", /* 2^127 (2^24 - 1) / 2^24 */
2985 "-1.70141173319264430e+38",
2986 "2.93873587705571877e-39", /* 2^-128 */
2987 "-2.93873587705571877e-39",
2988 /* These are for the default broken IEEE mode, which traps
2989 on infinity or denormal numbers. */
2990 "3.402823466385288598117e+38", /* 2^128 (1 - 2^-24) */
2991 "-3.402823466385288598117e+38",
2992 "1.1754943508222875079687e-38", /* 2^-126 */
2993 "-1.1754943508222875079687e-38",
2996 static REAL_VALUE_TYPE float_values[8];
2997 static int inited_float_values = 0;
3000 check_float_value (mode, d, overflow)
3001 enum machine_mode mode;
3006 if (TARGET_IEEE || TARGET_IEEE_CONFORMANT || TARGET_IEEE_WITH_INEXACT)
3009 if (inited_float_values == 0)
3012 for (i = 0; i < 8; i++)
3013 float_values[i] = REAL_VALUE_ATOF (float_strings[i], DFmode);
3015 inited_float_values = 1;
3021 REAL_VALUE_TYPE *fvptr;
3023 if (TARGET_FLOAT_VAX)
3024 fvptr = &float_values[0];
3026 fvptr = &float_values[4];
3028 bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE));
3029 if (REAL_VALUES_LESS (fvptr[0], r))
3031 bcopy ((char *) &fvptr[0], (char *) d,
3032 sizeof (REAL_VALUE_TYPE));
3035 else if (REAL_VALUES_LESS (r, fvptr[1]))
3037 bcopy ((char *) &fvptr[1], (char *) d,
3038 sizeof (REAL_VALUE_TYPE));
3041 else if (REAL_VALUES_LESS (dconst0, r)
3042 && REAL_VALUES_LESS (r, fvptr[2]))
3044 bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
3047 else if (REAL_VALUES_LESS (r, dconst0)
3048 && REAL_VALUES_LESS (fvptr[3], r))
3050 bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
3061 function_arg (cum, mode, type, named)
3062 CUMULATIVE_ARGS *cum;
3063 enum machine_mode mode;
3069 if (mode == VOIDmode) /* final call, return argument information */
3071 return GEN_INT (*cum);
3079 *cum |= (((TARGET_FLOAT_VAX)?1:4) << ((arg * 3)+8)); /* 4 = AI$K_AR_FS, IEEE single */
3082 *cum |= (((TARGET_FLOAT_VAX)?3:5) << ((arg * 3)+8)); /* 5 = AI$K_AR_FT, IEEE double */
3085 *cum |= (7 << ((arg * 3)+8)); /* 5 = AI$K_AR_FT, IEEE double */
3091 return (arg < 6 && ! MUST_PASS_IN_STACK (mode, type)
3092 ? gen_rtx(REG, mode,
3093 (*cum & 0xff) + 16 + ((TARGET_FPREGS
3094 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3095 || GET_MODE_CLASS (mode) == MODE_FLOAT))
3100 /* Structure to collect function names for final output
3103 enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN};
3106 struct alpha_links {
3107 struct alpha_links *next;
3109 enum links_kind kind;
3112 static struct alpha_links *alpha_links_base = 0;
3114 /* Make (or fake) .linkage entry for function call.
3116 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
3119 alpha_need_linkage (name, is_local)
3124 struct alpha_links *lptr, *nptr;
3129 /* Is this name already defined ? */
3131 for (lptr = alpha_links_base; lptr; lptr = lptr->next)
3132 if (strcmp (lptr->name, name) == 0)
3136 /* Defined here but external assumed. */
3137 if (lptr->kind == KIND_EXTERN)
3138 lptr->kind = KIND_LOCAL;
3142 /* Used here but unused assumed. */
3143 if (lptr->kind == KIND_UNUSED)
3144 lptr->kind = KIND_LOCAL;
3149 nptr = (struct alpha_links *) xmalloc (sizeof (struct alpha_links));
3150 nptr->next = alpha_links_base;
3151 nptr->name = xstrdup (name);
3153 /* Assume external if no definition. */
3154 nptr->kind = (is_local ? KIND_UNUSED : KIND_EXTERN);
3156 /* Ensure we have an IDENTIFIER so assemble_name can mark is used. */
3157 get_identifier (name);
3159 alpha_links_base = nptr;
3166 alpha_write_linkage (stream)
3169 struct alpha_links *lptr, *nptr;
3171 readonly_section ();
3173 fprintf (stream, "\t.align 3\n");
3175 for (lptr = alpha_links_base; lptr; lptr = nptr)
3179 if (lptr->kind == KIND_UNUSED
3180 || ! TREE_SYMBOL_REFERENCED (get_identifier (lptr->name)))
3183 fprintf (stream, "%s..lk:\n", lptr->name);
3184 if (lptr->kind == KIND_LOCAL)
3186 /* Local and used, build linkage pair. */
3187 fprintf (stream, "\t.quad %s..en\n", lptr->name);
3188 fprintf (stream, "\t.quad %s\n", lptr->name);
3191 /* External and used, request linkage pair. */
3192 fprintf (stream, "\t.linkage %s\n", lptr->name);
3199 alpha_need_linkage (name, is_local)
3205 #endif /* OPEN_VMS */