1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
44 extern char *version_string;
45 extern int rtx_equal_function_value_matters;
47 /* Specify which cpu to schedule for. */
49 enum processor_type alpha_cpu;
51 /* Specify how accurate floating-point traps need to be. */
53 enum alpha_trap_precision alpha_tp;
55 /* Specify the floating-point rounding mode. */
57 enum alpha_fp_rounding_mode alpha_fprm;
59 /* Specify which things cause traps. */
61 enum alpha_fp_trap_mode alpha_fptm;
63 /* Strings decoded into the above options. */
65 char *alpha_cpu_string; /* -mcpu=ev[4|5] */
66 char *alpha_tp_string; /* -mtrap-precision=[p|s|i] */
67 char *alpha_fprm_string; /* -mfp-rounding-mode=[n|m|c|d] */
68 char *alpha_fptm_string; /* -mfp-trap-mode=[n|u|su|sui] */
70 /* Save information from a "cmpxx" operation until the branch or scc is
73 rtx alpha_compare_op0, alpha_compare_op1;
74 int alpha_compare_fp_p;
76 /* Save the name of the current function as used by the assembler. This
77 is used by the epilogue. */
79 char *alpha_function_name;
81 /* Non-zero if inside of a function, because the Alpha asm can't
82 handle .files inside of functions. */
84 static int inside_function = FALSE;
86 /* Nonzero if the current function needs gp. */
88 int alpha_function_needs_gp;
90 /* If non-null, this rtx holds the return address for the function. */
92 static rtx alpha_return_addr_rtx;
94 /* Declarations of static functions. */
95 static void alpha_set_memflags_1 PROTO((rtx, int, int, int));
96 static rtx alpha_emit_set_const_1 PROTO((rtx, enum machine_mode,
98 static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int));
100 /* Compute the size of the save area in the stack. */
101 static void alpha_sa_mask PROTO((unsigned long *imaskP,
102 unsigned long *fmaskP));
104 /* Strip type information. */
105 #define CURRENT_FUNCTION_ARGS_INFO \
106 (TARGET_OPEN_VMS ? current_function_args_info & 0xff \
107 : current_function_args_info)
109 /* Some helpful register info. */
114 /* Parse target option strings. */
120 = TARGET_CPU_DEFAULT & MASK_CPU_EV5 ? PROCESSOR_EV5 : PROCESSOR_EV4;
122 if (alpha_cpu_string)
124 if (! strcmp (alpha_cpu_string, "ev4")
125 || ! strcmp (alpha_cpu_string, "21064"))
126 alpha_cpu = PROCESSOR_EV4;
127 else if (! strcmp (alpha_cpu_string, "ev5")
128 || ! strcmp (alpha_cpu_string, "21164"))
129 alpha_cpu = PROCESSOR_EV5;
130 else if (! strcmp (alpha_cpu_string, "ev56")
131 || ! strcmp (alpha_cpu_string, "21164a"))
133 alpha_cpu = PROCESSOR_EV5;
134 target_flags |= MASK_BYTE_OPS;
137 error ("bad value `%s' for -mcpu switch", alpha_cpu_string);
140 alpha_tp = ALPHA_TP_PROG;
141 alpha_fprm = ALPHA_FPRM_NORM;
142 alpha_fptm = ALPHA_FPTM_N;
146 alpha_tp = ALPHA_TP_INSN;
147 alpha_fptm = ALPHA_FPTM_SU;
150 if (TARGET_IEEE_WITH_INEXACT)
152 alpha_tp = ALPHA_TP_INSN;
153 alpha_fptm = ALPHA_FPTM_SUI;
158 if (! strcmp (alpha_tp_string, "p"))
159 alpha_tp = ALPHA_TP_PROG;
160 else if (! strcmp (alpha_tp_string, "f"))
161 alpha_tp = ALPHA_TP_FUNC;
162 else if (! strcmp (alpha_tp_string, "i"))
163 alpha_tp = ALPHA_TP_INSN;
165 error ("bad value `%s' for -mtrap-precision switch", alpha_tp_string);
168 if (alpha_fprm_string)
170 if (! strcmp (alpha_fprm_string, "n"))
171 alpha_fprm = ALPHA_FPRM_NORM;
172 else if (! strcmp (alpha_fprm_string, "m"))
173 alpha_fprm = ALPHA_FPRM_MINF;
174 else if (! strcmp (alpha_fprm_string, "c"))
175 alpha_fprm = ALPHA_FPRM_CHOP;
176 else if (! strcmp (alpha_fprm_string,"d"))
177 alpha_fprm = ALPHA_FPRM_DYN;
179 error ("bad value `%s' for -mfp-rounding-mode switch",
183 if (alpha_fptm_string)
185 if (strcmp (alpha_fptm_string, "n") == 0)
186 alpha_fptm = ALPHA_FPTM_N;
187 else if (strcmp (alpha_fptm_string, "u") == 0)
188 alpha_fptm = ALPHA_FPTM_U;
189 else if (strcmp (alpha_fptm_string, "su") == 0)
190 alpha_fptm = ALPHA_FPTM_SU;
191 else if (strcmp (alpha_fptm_string, "sui") == 0)
192 alpha_fptm = ALPHA_FPTM_SUI;
194 error ("bad value `%s' for -mfp-trap-mode switch", alpha_fptm_string);
197 /* Do some sanity checks on the above option. */
199 if ((alpha_fptm == ALPHA_FPTM_SU || alpha_fptm == ALPHA_FPTM_SUI)
200 && alpha_tp != ALPHA_TP_INSN)
202 warning ("fp software completion requires -mtrap-precision=i");
203 alpha_tp = ALPHA_TP_INSN;
206 if (TARGET_FLOAT_VAX)
208 if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN)
210 warning ("rounding mode not supported for VAX floats");
211 alpha_fprm = ALPHA_FPRM_NORM;
213 if (alpha_fptm == ALPHA_FPTM_SUI)
215 warning ("trap mode not supported for VAX floats");
216 alpha_fptm = ALPHA_FPTM_SU;
221 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
229 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
231 if ((value & 0xff) != 0 && (value & 0xff) != 0xff)
237 /* Returns 1 if OP is either the constant zero or a register. If a
238 register, it must be in the proper mode unless MODE is VOIDmode. */
241 reg_or_0_operand (op, mode)
243 enum machine_mode mode;
245 return op == const0_rtx || register_operand (op, mode);
248 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
252 reg_or_6bit_operand (op, mode)
254 enum machine_mode mode;
256 return ((GET_CODE (op) == CONST_INT
257 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64)
258 || register_operand (op, mode));
262 /* Return 1 if OP is an 8-bit constant or any register. */
265 reg_or_8bit_operand (op, mode)
267 enum machine_mode mode;
269 return ((GET_CODE (op) == CONST_INT
270 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)
271 || register_operand (op, mode));
274 /* Return 1 if OP is an 8-bit constant. */
277 cint8_operand (op, mode)
279 enum machine_mode mode;
281 return (GET_CODE (op) == CONST_INT
282 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100);
285 /* Return 1 if the operand is a valid second operand to an add insn. */
288 add_operand (op, mode)
290 enum machine_mode mode;
292 if (GET_CODE (op) == CONST_INT)
293 return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
294 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')
295 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
297 return register_operand (op, mode);
300 /* Return 1 if the operand is a valid second operand to a sign-extending
304 sext_add_operand (op, mode)
306 enum machine_mode mode;
308 if (GET_CODE (op) == CONST_INT)
309 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255
310 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255);
312 return register_operand (op, mode);
315 /* Return 1 if OP is the constant 4 or 8. */
318 const48_operand (op, mode)
320 enum machine_mode mode;
322 return (GET_CODE (op) == CONST_INT
323 && (INTVAL (op) == 4 || INTVAL (op) == 8));
326 /* Return 1 if OP is a valid first operand to an AND insn. */
329 and_operand (op, mode)
331 enum machine_mode mode;
333 if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
334 return (zap_mask (CONST_DOUBLE_LOW (op))
335 && zap_mask (CONST_DOUBLE_HIGH (op)));
337 if (GET_CODE (op) == CONST_INT)
338 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
339 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100
340 || zap_mask (INTVAL (op)));
342 return register_operand (op, mode);
345 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
348 or_operand (op, mode)
350 enum machine_mode mode;
352 if (GET_CODE (op) == CONST_INT)
353 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
354 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100);
356 return register_operand (op, mode);
359 /* Return 1 if OP is a constant that is the width, in bits, of an integral
360 mode smaller than DImode. */
363 mode_width_operand (op, mode)
365 enum machine_mode mode;
367 return (GET_CODE (op) == CONST_INT
368 && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32));
371 /* Return 1 if OP is a constant that is the width of an integral machine mode
372 smaller than an integer. */
375 mode_mask_operand (op, mode)
377 enum machine_mode mode;
379 #if HOST_BITS_PER_WIDE_INT == 32
380 if (GET_CODE (op) == CONST_DOUBLE)
381 return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1;
384 return (GET_CODE (op) == CONST_INT
385 && (INTVAL (op) == 0xff
386 || INTVAL (op) == 0xffff
387 #if HOST_BITS_PER_WIDE_INT == 64
388 || INTVAL (op) == 0xffffffff
393 /* Return 1 if OP is a multiple of 8 less than 64. */
396 mul8_operand (op, mode)
398 enum machine_mode mode;
400 return (GET_CODE (op) == CONST_INT
401 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64
402 && (INTVAL (op) & 7) == 0);
405 /* Return 1 if OP is the constant zero in floating-point. */
408 fp0_operand (op, mode)
410 enum machine_mode mode;
412 return (GET_MODE (op) == mode
413 && GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode));
416 /* Return 1 if OP is the floating-point constant zero or a register. */
419 reg_or_fp0_operand (op, mode)
421 enum machine_mode mode;
423 return fp0_operand (op, mode) || register_operand (op, mode);
426 /* Return 1 if OP is a register or a constant integer. */
430 reg_or_cint_operand (op, mode)
432 enum machine_mode mode;
434 return GET_CODE (op) == CONST_INT || register_operand (op, mode);
437 /* Return 1 if OP is something that can be reloaded into a register;
438 if it is a MEM, it need not be valid. */
441 some_operand (op, mode)
443 enum machine_mode mode;
445 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
448 switch (GET_CODE (op))
450 case REG: case MEM: case CONST_DOUBLE:
451 case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST:
455 return some_operand (SUBREG_REG (op), VOIDmode);
461 /* Return 1 if OP is a valid operand for the source of a move insn. */
464 input_operand (op, mode)
466 enum machine_mode mode;
468 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
471 if (GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE (op) != mode)
474 switch (GET_CODE (op))
479 /* This handles both the Windows/NT and OSF cases. */
480 return mode == ptr_mode || mode == DImode;
486 if (register_operand (op, mode))
488 /* ... fall through ... */
490 return ((TARGET_BYTE_OPS || (mode != HImode && mode != QImode))
491 && general_operand (op, mode));
494 return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode);
497 return mode == QImode || mode == HImode || add_operand (op, mode);
503 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
507 current_file_function_operand (op, mode)
509 enum machine_mode mode;
511 return (GET_CODE (op) == SYMBOL_REF
512 && ! profile_flag && ! profile_block_flag
513 && (SYMBOL_REF_FLAG (op)
514 || op == XEXP (DECL_RTL (current_function_decl), 0)));
517 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
520 call_operand (op, mode)
522 enum machine_mode mode;
527 return (GET_CODE (op) == SYMBOL_REF
528 || (GET_CODE (op) == REG && (TARGET_OPEN_VMS || REGNO (op) == 27)));
531 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
532 comparisons are valid in which insn. */
535 alpha_comparison_operator (op, mode)
537 enum machine_mode mode;
539 enum rtx_code code = GET_CODE (op);
541 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
544 return (code == EQ || code == LE || code == LT
545 || (mode == DImode && (code == LEU || code == LTU)));
548 /* Return 1 if OP is a valid Alpha swapped comparison operator. */
551 alpha_swapped_comparison_operator (op, mode)
553 enum machine_mode mode;
555 enum rtx_code code = GET_CODE (op);
557 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
560 code = swap_condition (code);
561 return (code == EQ || code == LE || code == LT
562 || (mode == DImode && (code == LEU || code == LTU)));
565 /* Return 1 if OP is a signed comparison operation. */
568 signed_comparison_operator (op, mode)
570 enum machine_mode mode;
572 switch (GET_CODE (op))
574 case EQ: case NE: case LE: case LT: case GE: case GT:
581 /* Return 1 if this is a divide or modulus operator. */
584 divmod_operator (op, mode)
586 enum machine_mode mode;
588 switch (GET_CODE (op))
590 case DIV: case MOD: case UDIV: case UMOD:
597 /* Return 1 if this memory address is a known aligned register plus
598 a constant. It must be a valid address. This means that we can do
599 this as an aligned reference plus some offset.
601 Take into account what reload will do.
603 We could say that out-of-range stack slots are alignable, but that would
604 complicate get_aligned_mem and it isn't worth the trouble since few
605 functions have large stack space. */
608 aligned_memory_operand (op, mode)
610 enum machine_mode mode;
612 if (GET_CODE (op) == SUBREG)
614 if (GET_MODE (op) != mode)
616 op = SUBREG_REG (op);
617 mode = GET_MODE (op);
620 if (reload_in_progress && GET_CODE (op) == REG
621 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
622 op = reg_equiv_mem[REGNO (op)];
624 if (GET_CODE (op) != MEM || GET_MODE (op) != mode
625 || ! memory_address_p (mode, XEXP (op, 0)))
630 if (GET_CODE (op) == PLUS)
633 return (GET_CODE (op) == REG
634 && REGNO_POINTER_ALIGN (REGNO (op)) >= 4);
637 /* Similar, but return 1 if OP is a MEM which is not alignable. */
640 unaligned_memory_operand (op, mode)
642 enum machine_mode mode;
644 if (GET_CODE (op) == SUBREG)
646 if (GET_MODE (op) != mode)
648 op = SUBREG_REG (op);
649 mode = GET_MODE (op);
652 if (reload_in_progress && GET_CODE (op) == REG
653 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
654 op = reg_equiv_mem[REGNO (op)];
656 if (GET_CODE (op) != MEM || GET_MODE (op) != mode)
661 if (! memory_address_p (mode, op))
664 if (GET_CODE (op) == PLUS)
667 return (GET_CODE (op) != REG
668 || REGNO_POINTER_ALIGN (REGNO (op)) < 4);
671 /* Return 1 if OP is either a register or an unaligned memory location. */
674 reg_or_unaligned_mem_operand (op, mode)
676 enum machine_mode mode;
678 return register_operand (op, mode) || unaligned_memory_operand (op, mode);
681 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
684 any_memory_operand (op, mode)
686 enum machine_mode mode;
688 return (GET_CODE (op) == MEM
689 || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
690 || (reload_in_progress && GET_CODE (op) == REG
691 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
692 || (reload_in_progress && GET_CODE (op) == SUBREG
693 && GET_CODE (SUBREG_REG (op)) == REG
694 && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER));
697 /* REF is an alignable memory location. Place an aligned SImode
698 reference into *PALIGNED_MEM and the number of bits to shift into
702 get_aligned_mem (ref, paligned_mem, pbitnum)
704 rtx *paligned_mem, *pbitnum;
707 HOST_WIDE_INT offset = 0;
709 if (GET_CODE (ref) == SUBREG)
711 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
712 if (BYTES_BIG_ENDIAN)
713 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
714 - MIN (UNITS_PER_WORD,
715 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
716 ref = SUBREG_REG (ref);
719 if (GET_CODE (ref) == REG)
720 ref = reg_equiv_mem[REGNO (ref)];
722 if (reload_in_progress)
723 base = find_replacement (&XEXP (ref, 0));
725 base = XEXP (ref, 0);
727 if (GET_CODE (base) == PLUS)
728 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
730 *paligned_mem = gen_rtx (MEM, SImode,
731 plus_constant (base, offset & ~3));
732 MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref);
733 MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref);
734 RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref);
736 *pbitnum = GEN_INT ((offset & 3) * 8);
739 /* Similar, but just get the address. Handle the two reload cases.
740 Add EXTRA_OFFSET to the address we return. */
743 get_unaligned_address (ref, extra_offset)
748 HOST_WIDE_INT offset = 0;
750 if (GET_CODE (ref) == SUBREG)
752 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
753 if (BYTES_BIG_ENDIAN)
754 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
755 - MIN (UNITS_PER_WORD,
756 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
757 ref = SUBREG_REG (ref);
760 if (GET_CODE (ref) == REG)
761 ref = reg_equiv_mem[REGNO (ref)];
763 if (reload_in_progress)
764 base = find_replacement (&XEXP (ref, 0));
766 base = XEXP (ref, 0);
768 if (GET_CODE (base) == PLUS)
769 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
771 return plus_constant (base, offset + extra_offset);
774 /* Subfunction of the following function. Update the flags of any MEM
775 found in part of X. */
778 alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
780 int in_struct_p, volatile_p, unchanging_p;
784 switch (GET_CODE (x))
788 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
789 alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
794 alpha_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p,
799 alpha_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p,
801 alpha_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p,
806 MEM_IN_STRUCT_P (x) = in_struct_p;
807 MEM_VOLATILE_P (x) = volatile_p;
808 RTX_UNCHANGING_P (x) = unchanging_p;
813 /* Given INSN, which is either an INSN or a SEQUENCE generated to
814 perform a memory operation, look for any MEMs in either a SET_DEST or
815 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
816 REF into each of the MEMs found. If REF is not a MEM, don't do
820 alpha_set_memflags (insn, ref)
824 /* Note that it is always safe to get these flags, though they won't
825 be what we think if REF is not a MEM. */
826 int in_struct_p = MEM_IN_STRUCT_P (ref);
827 int volatile_p = MEM_VOLATILE_P (ref);
828 int unchanging_p = RTX_UNCHANGING_P (ref);
830 if (GET_CODE (ref) != MEM
831 || (! in_struct_p && ! volatile_p && ! unchanging_p))
834 alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p);
837 /* Try to output insns to set TARGET equal to the constant C if it can be
838 done in less than N insns. Do all computations in MODE. Returns the place
839 where the output has been placed if it can be done and the insns have been
840 emitted. If it would take more than N insns, zero is returned and no
841 insns and emitted. */
844 alpha_emit_set_const (target, mode, c, n)
846 enum machine_mode mode;
853 /* Try 1 insn, then 2, then up to N. */
854 for (i = 1; i <= n; i++)
855 if ((pat = alpha_emit_set_const_1 (target, mode, c, i)) != 0)
861 /* Internal routine for the above to check for N or below insns. */
864 alpha_emit_set_const_1 (target, mode, c, n)
866 enum machine_mode mode;
870 HOST_WIDE_INT new = c;
872 /* Use a pseudo if highly optimizing and still generating RTL. */
874 = (flag_expensive_optimizations && rtx_equal_function_value_matters
878 #if HOST_BITS_PER_WIDE_INT == 64
879 /* We are only called for SImode and DImode. If this is SImode, ensure that
880 we are sign extended to a full word. This does not make any sense when
881 cross-compiling on a narrow machine. */
884 c = (c & 0xffffffff) - 2 * (c & 0x80000000);
887 /* If this is a sign-extended 32-bit constant, we can do this in at most
888 three insns, so do it if we have enough insns left. We always have
889 a sign-extended 32-bit constant when compiling on a narrow machine.
890 Note that we cannot handle the constant 0x80000000. */
892 if ((HOST_BITS_PER_WIDE_INT != 64
893 || c >> 31 == -1 || c >> 31 == 0)
896 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
897 HOST_WIDE_INT tmp1 = c - low;
899 = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
900 HOST_WIDE_INT extra = 0;
902 /* If HIGH will be interpreted as negative but the constant is
903 positive, we must adjust it to do two ldha insns. */
905 if ((high & 0x8000) != 0 && c >= 0)
909 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
912 if (c == low || (low == 0 && extra == 0))
913 return copy_to_suggested_reg (GEN_INT (c), target, mode);
914 else if (n >= 2 + (extra != 0))
916 temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode);
919 temp = expand_binop (mode, add_optab, temp, GEN_INT (extra << 16),
920 subtarget, 0, OPTAB_WIDEN);
922 return expand_binop (mode, add_optab, temp, GEN_INT (high << 16),
923 target, 0, OPTAB_WIDEN);
927 /* If we couldn't do it that way, try some other methods. But if we have
928 no instructions left, don't bother. Likewise, if this is SImode and
929 we can't make pseudos, we can't do anything since the expand_binop
930 and expand_unop calls will widen and try to make pseudos. */
933 || (mode == SImode && ! rtx_equal_function_value_matters))
936 #if HOST_BITS_PER_WIDE_INT == 64
937 /* First, see if can load a value into the target that is the same as the
938 constant except that all bytes that are 0 are changed to be 0xff. If we
939 can, then we can do a ZAPNOT to obtain the desired constant. */
941 for (i = 0; i < 64; i += 8)
942 if ((new & ((HOST_WIDE_INT) 0xff << i)) == 0)
943 new |= (HOST_WIDE_INT) 0xff << i;
945 /* We are only called for SImode and DImode. If this is SImode, ensure that
946 we are sign extended to a full word. */
949 new = (new & 0xffffffff) - 2 * (new & 0x80000000);
952 && (temp = alpha_emit_set_const (subtarget, mode, new, n - 1)) != 0)
953 return expand_binop (mode, and_optab, temp, GEN_INT (c | ~ new),
954 target, 0, OPTAB_WIDEN);
957 /* Next, see if we can load a related constant and then shift and possibly
958 negate it to get the constant we want. Try this once each increasing
961 for (i = 1; i < n; i++)
963 /* First try complementing. */
964 if ((temp = alpha_emit_set_const (subtarget, mode, ~ c, i)) != 0)
965 return expand_unop (mode, one_cmpl_optab, temp, target, 0);
967 /* Next try to form a constant and do a left shift. We can do this
968 if some low-order bits are zero; the exact_log2 call below tells
969 us that information. The bits we are shifting out could be any
970 value, but here we'll just try the 0- and sign-extended forms of
971 the constant. To try to increase the chance of having the same
972 constant in more than one insn, start at the highest number of
973 bits to shift, but try all possibilities in case a ZAPNOT will
976 if ((bits = exact_log2 (c & - c)) > 0)
977 for (; bits > 0; bits--)
978 if ((temp = (alpha_emit_set_const
980 (unsigned HOST_WIDE_INT) c >> bits, i))) != 0
981 || ((temp = (alpha_emit_set_const
983 ((unsigned HOST_WIDE_INT) c) >> bits, i)))
985 return expand_binop (mode, ashl_optab, temp, GEN_INT (bits),
986 target, 0, OPTAB_WIDEN);
988 /* Now try high-order zero bits. Here we try the shifted-in bits as
989 all zero and all ones. Be careful to avoid shifting outside the
990 mode and to avoid shifting outside the host wide int size. */
992 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
993 - floor_log2 (c) - 1)) > 0)
994 for (; bits > 0; bits--)
995 if ((temp = alpha_emit_set_const (subtarget, mode,
997 || ((temp = (alpha_emit_set_const
999 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
1002 return expand_binop (mode, lshr_optab, temp, GEN_INT (bits),
1003 target, 1, OPTAB_WIDEN);
1005 /* Now try high-order 1 bits. We get that with a sign-extension.
1006 But one bit isn't enough here. Be careful to avoid shifting outside
1007 the mode and to avoid shifting outside the host wide int size. */
1009 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
1010 - floor_log2 (~ c) - 2)) > 0)
1011 for (; bits > 0; bits--)
1012 if ((temp = alpha_emit_set_const (subtarget, mode,
1014 || ((temp = (alpha_emit_set_const
1016 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
1019 return expand_binop (mode, ashr_optab, temp, GEN_INT (bits),
1020 target, 0, OPTAB_WIDEN);
1026 #if HOST_BITS_PER_WIDE_INT == 64
1027 /* Having failed to find a 3 insn sequence in alpha_emit_set_const,
1028 fall back to a straight forward decomposition. We do this to avoid
1029 exponential run times encountered when looking for longer sequences
1030 with alpha_emit_set_const. */
1033 alpha_emit_set_long_const (target, c)
1037 /* Use a pseudo if highly optimizing and still generating RTL. */
1039 = (flag_expensive_optimizations && rtx_equal_function_value_matters
1041 HOST_WIDE_INT d1, d2, d3, d4;
1044 /* Decompose the entire word */
1045 d1 = ((c & 0xffff) ^ 0x8000) - 0x8000;
1047 d2 = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
1049 d3 = ((c & 0xffff) ^ 0x8000) - 0x8000;
1051 d4 = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
1056 /* Construct the high word */
1058 r1 = copy_to_suggested_reg (GEN_INT (d4), subtarget, DImode);
1060 r1 = copy_to_suggested_reg (GEN_INT (d3), subtarget, DImode);
1062 r1 = expand_binop (DImode, add_optab, GEN_INT (d3), GEN_INT (d4),
1063 subtarget, 0, OPTAB_WIDEN);
1065 /* Shift it into place */
1066 r2 = expand_binop (DImode, ashl_optab, r1, GEN_INT (32),
1067 subtarget, 0, OPTAB_WIDEN);
1069 if (subtarget == 0 && d1 == d3 && d2 == d4)
1070 r1 = expand_binop (DImode, add_optab, r1, r2, subtarget, 0, OPTAB_WIDEN);
1075 /* Add in the low word */
1077 r1 = expand_binop (DImode, add_optab, r1, GEN_INT (d2),
1078 subtarget, 0, OPTAB_WIDEN);
1080 r1 = expand_binop (DImode, add_optab, r1, GEN_INT (d1),
1081 subtarget, 0, OPTAB_WIDEN);
1085 r1 = copy_to_suggested_reg(r1, target, DImode);
1089 #endif /* HOST_BITS_PER_WIDE_INT == 64 */
1091 /* Rewrite a comparison against zero CMP of the form
1092 (CODE (cc0) (const_int 0)) so it can be written validly in
1093 a conditional move (if_then_else CMP ...).
1094 If both of the operands that set cc0 are non-zero we must emit
1095 an insn to perform the compare (it can't be done within
1096 the conditional move). */
1098 alpha_emit_conditional_move (cmp, mode)
1100 enum machine_mode mode;
1102 enum rtx_code code = GET_CODE (cmp);
1103 enum rtx_code cmov_code = NE;
1104 rtx op0 = alpha_compare_op0;
1105 rtx op1 = alpha_compare_op1;
1106 enum machine_mode cmp_mode
1107 = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0));
1108 enum machine_mode cmp_op_mode = alpha_compare_fp_p ? DFmode : DImode;
1111 if (alpha_compare_fp_p != FLOAT_MODE_P (mode))
1114 /* We may be able to use a conditional move directly.
1115 This avoids emitting spurious compares. */
1116 if (signed_comparison_operator (cmp, cmp_op_mode)
1117 && (op0 == CONST0_RTX (cmp_mode) || op1 == CONST0_RTX (cmp_mode)))
1118 return gen_rtx (code, VOIDmode, op0, op1);
1120 /* We can't put the comparison insides a conditional move;
1121 emit a compare instruction and put that inside the
1122 conditional move. Make sure we emit only comparisons we have;
1123 swap or reverse as necessary. */
1127 case EQ: case LE: case LT: case LEU: case LTU:
1128 /* We have these compares: */
1132 /* This must be reversed. */
1133 code = reverse_condition (code);
1137 case GE: case GT: case GEU: case GTU:
1138 /* These must be swapped. Make sure the new first operand is in
1140 code = swap_condition (code);
1141 tem = op0, op0 = op1, op1 = tem;
1142 op0 = force_reg (cmp_mode, op0);
1149 tem = gen_reg_rtx (cmp_op_mode);
1150 emit_move_insn (tem, gen_rtx (code, cmp_op_mode, op0, op1));
1151 return gen_rtx (cmov_code, VOIDmode, tem, CONST0_RTX (cmp_op_mode));
1154 /* Adjust the cost of a scheduling dependency. Return the new cost of
1155 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
1158 alpha_adjust_cost (insn, link, dep_insn, cost)
1166 /* If the dependence is an anti-dependence, there is no cost. For an
1167 output dependence, there is sometimes a cost, but it doesn't seem
1168 worth handling those few cases. */
1170 if (REG_NOTE_KIND (link) != 0)
1173 if (alpha_cpu == PROCESSOR_EV5)
1175 /* On EV5, "A special bypass provides an effective latency of 0
1176 cycles for an ICMP or ILOG insn producing the test operand of an
1177 IBR or CMOV insn." */
1179 if (recog_memoized (dep_insn) >= 0
1180 && (get_attr_type (dep_insn) == TYPE_ICMP
1181 || get_attr_type (dep_insn) == TYPE_ILOG)
1182 && recog_memoized (insn) >= 0
1183 && (get_attr_type (insn) == TYPE_IBR
1184 || (get_attr_type (insn) == TYPE_CMOV
1185 && !((set = single_set (dep_insn)) != 0
1186 && GET_CODE (PATTERN (insn)) == SET
1187 && (set_src = SET_SRC (PATTERN (insn)),
1188 GET_CODE (set_src) == IF_THEN_ELSE)
1189 && (set = SET_DEST (set),
1190 rtx_equal_p (set, XEXP (set_src, 1))
1191 || rtx_equal_p (set, XEXP (set_src, 2)))))))
1194 /* On EV5 it takes longer to get data to the multiplier than to
1195 anywhere else, so increase costs. */
1197 if (recog_memoized (insn) >= 0
1198 && recog_memoized (dep_insn) >= 0
1199 && (get_attr_type (insn) == TYPE_IMULL
1200 || get_attr_type (insn) == TYPE_IMULQ
1201 || get_attr_type (insn) == TYPE_IMULH)
1202 && (set = single_set (dep_insn)) != 0
1203 && GET_CODE (PATTERN (insn)) == SET
1204 && (set_src = SET_SRC (PATTERN (insn)),
1205 GET_CODE (set_src) == MULT)
1206 && (set = SET_DEST (set),
1207 rtx_equal_p (set, XEXP (set_src, 0))
1208 || rtx_equal_p (set, XEXP (set_src, 1))))
1210 switch (get_attr_type (insn))
1229 /* On EV4, if INSN is a store insn and DEP_INSN is setting the data
1230 being stored, we can sometimes lower the cost. */
1232 if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST
1233 && (set = single_set (dep_insn)) != 0
1234 && GET_CODE (PATTERN (insn)) == SET
1235 && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
1237 switch (get_attr_type (dep_insn))
1240 /* No savings here. */
1246 /* In these cases, we save one cycle. */
1250 /* In all other cases, we save two cycles. */
1251 return MAX (0, cost - 2);
1255 /* Another case that needs adjustment is an arithmetic or logical
1256 operation. It's cost is usually one cycle, but we default it to
1257 two in the MD file. The only case that it is actually two is
1258 for the address in loads and stores. */
1260 if (recog_memoized (dep_insn) >= 0
1261 && (get_attr_type (dep_insn) == TYPE_IADD
1262 || get_attr_type (dep_insn) == TYPE_ILOG))
1264 switch (get_attr_type (insn))
1274 /* The final case is when a compare feeds into an integer branch;
1275 the cost is only one cycle in that case. */
1277 if (recog_memoized (dep_insn) >= 0
1278 && get_attr_type (dep_insn) == TYPE_ICMP
1279 && recog_memoized (insn) >= 0
1280 && get_attr_type (insn) == TYPE_IBR)
1284 /* Otherwise, return the default cost. */
1288 /* Functions to save and restore alpha_return_addr_rtx. */
1290 struct machine_function
1296 alpha_save_machine_status (p)
1299 struct machine_function *machine =
1300 (struct machine_function *) xmalloc (sizeof (struct machine_function));
1302 p->machine = machine;
1303 machine->ra_rtx = alpha_return_addr_rtx;
1307 alpha_restore_machine_status (p)
1310 struct machine_function *machine = p->machine;
1312 alpha_return_addr_rtx = machine->ra_rtx;
1315 p->machine = (struct machine_function *)0;
1318 /* Do anything needed before RTL is emitted for each function. */
1321 alpha_init_expanders ()
1323 alpha_return_addr_rtx = NULL_RTX;
1325 /* Arrange to save and restore machine status around nested functions. */
1326 save_machine_status = alpha_save_machine_status;
1327 restore_machine_status = alpha_restore_machine_status;
1330 /* Start the ball rolling with RETURN_ADDR_RTX. */
1333 alpha_return_addr (count, frame)
1342 if (alpha_return_addr_rtx)
1343 return alpha_return_addr_rtx;
1345 /* No rtx yet. Invent one, and initialize it from $26 in the prologue. */
1346 alpha_return_addr_rtx = gen_reg_rtx (Pmode);
1347 init = gen_rtx (SET, Pmode, alpha_return_addr_rtx, gen_rtx (REG, Pmode, 26));
1349 /* Emit the insn to the prologue with the other argument copies. */
1350 push_topmost_sequence ();
1351 emit_insn_after (init, get_insns ());
1352 pop_topmost_sequence ();
1354 return alpha_return_addr_rtx;
1358 alpha_ra_ever_killed ()
1362 if (!alpha_return_addr_rtx)
1363 return regs_ever_live[REG_RA];
1365 return reg_set_between_p (gen_rtx (REG, REG_RA), get_insns(), NULL_RTX);
1369 /* Print an operand. Recognize special options, documented below. */
1372 print_operand (file, x, code)
1382 /* Generates fp-rounding mode suffix: nothing for normal, 'c' for
1383 chopped, 'm' for minus-infinity, and 'd' for dynamic rounding
1384 mode. alpha_fprm controls which suffix is generated. */
1387 case ALPHA_FPRM_NORM:
1389 case ALPHA_FPRM_MINF:
1392 case ALPHA_FPRM_CHOP:
1395 case ALPHA_FPRM_DYN:
1402 /* Generates trap-mode suffix for instructions that accept the su
1403 suffix only (cmpt et al). */
1404 if (alpha_tp == ALPHA_TP_INSN)
1409 /* Generates trap-mode suffix for instructions that accept the u, su,
1410 and sui suffix. This is the bulk of the IEEE floating point
1411 instructions (addt et al). */
1422 case ALPHA_FPTM_SUI:
1423 fputs ("sui", file);
1429 /* Generates trap-mode suffix for instructions that accept the sui
1430 suffix (cvtqt and cvtqs). */
1433 case ALPHA_FPTM_N: case ALPHA_FPTM_U:
1434 case ALPHA_FPTM_SU: /* cvtqt/cvtqs can't cause underflow */
1436 case ALPHA_FPTM_SUI:
1437 fputs ("sui", file);
1443 /* Generates single precision instruction suffix. */
1444 fprintf (file, "%c", (TARGET_FLOAT_VAX?'f':'s'));
1448 /* Generates double precision instruction suffix. */
1449 fprintf (file, "%c", (TARGET_FLOAT_VAX?'g':'t'));
1453 /* If this operand is the constant zero, write it as "$31". */
1454 if (GET_CODE (x) == REG)
1455 fprintf (file, "%s", reg_names[REGNO (x)]);
1456 else if (x == CONST0_RTX (GET_MODE (x)))
1457 fprintf (file, "$31");
1459 output_operand_lossage ("invalid %%r value");
1464 /* Similar, but for floating-point. */
1465 if (GET_CODE (x) == REG)
1466 fprintf (file, "%s", reg_names[REGNO (x)]);
1467 else if (x == CONST0_RTX (GET_MODE (x)))
1468 fprintf (file, "$f31");
1470 output_operand_lossage ("invalid %%R value");
1475 /* Write the 1's complement of a constant. */
1476 if (GET_CODE (x) != CONST_INT)
1477 output_operand_lossage ("invalid %%N value");
1479 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (x));
1483 /* Write 1 << C, for a constant C. */
1484 if (GET_CODE (x) != CONST_INT)
1485 output_operand_lossage ("invalid %%P value");
1487 fprintf (file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) 1 << INTVAL (x));
1491 /* Write the high-order 16 bits of a constant, sign-extended. */
1492 if (GET_CODE (x) != CONST_INT)
1493 output_operand_lossage ("invalid %%h value");
1495 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) >> 16);
1499 /* Write the low-order 16 bits of a constant, sign-extended. */
1500 if (GET_CODE (x) != CONST_INT)
1501 output_operand_lossage ("invalid %%L value");
1503 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
1504 (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
1508 /* Write mask for ZAP insn. */
1509 if (GET_CODE (x) == CONST_DOUBLE)
1511 HOST_WIDE_INT mask = 0;
1512 HOST_WIDE_INT value;
1514 value = CONST_DOUBLE_LOW (x);
1515 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
1520 value = CONST_DOUBLE_HIGH (x);
1521 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
1524 mask |= (1 << (i + sizeof (int)));
1526 fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask & 0xff);
1529 else if (GET_CODE (x) == CONST_INT)
1531 HOST_WIDE_INT mask = 0, value = INTVAL (x);
1533 for (i = 0; i < 8; i++, value >>= 8)
1537 fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask);
1540 output_operand_lossage ("invalid %%m value");
1544 /* 'b', 'w', or 'l' as the value of the constant. */
1545 if (GET_CODE (x) != CONST_INT
1546 || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32))
1547 output_operand_lossage ("invalid %%M value");
1549 fprintf (file, "%s",
1550 INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l");
1554 /* Similar, except do it from the mask. */
1555 if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xff)
1556 fprintf (file, "b");
1557 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff)
1558 fprintf (file, "w");
1559 #if HOST_BITS_PER_WIDE_INT == 32
1560 else if (GET_CODE (x) == CONST_DOUBLE
1561 && CONST_DOUBLE_HIGH (x) == 0
1562 && CONST_DOUBLE_LOW (x) == -1)
1563 fprintf (file, "l");
1565 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
1566 fprintf (file, "l");
1569 output_operand_lossage ("invalid %%U value");
1573 /* Write the constant value divided by 8. */
1574 if (GET_CODE (x) != CONST_INT
1575 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1576 && (INTVAL (x) & 7) != 8)
1577 output_operand_lossage ("invalid %%s value");
1579 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) / 8);
1583 /* Same, except compute (64 - c) / 8 */
1585 if (GET_CODE (x) != CONST_INT
1586 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1587 && (INTVAL (x) & 7) != 8)
1588 output_operand_lossage ("invalid %%s value");
1590 fprintf (file, HOST_WIDE_INT_PRINT_DEC, (64 - INTVAL (x)) / 8);
1593 case 'C': case 'D': case 'c': case 'd':
1594 /* Write out comparison name. */
1596 enum rtx_code c = GET_CODE (x);
1598 if (GET_RTX_CLASS (c) != '<')
1599 output_operand_lossage ("invalid %%C value");
1602 c = reverse_condition (c);
1603 else if (code == 'c')
1604 c = swap_condition (c);
1605 else if (code == 'd')
1606 c = swap_condition (reverse_condition (c));
1609 fprintf (file, "ule");
1611 fprintf (file, "ult");
1613 fprintf (file, "%s", GET_RTX_NAME (c));
1618 /* Write the divide or modulus operator. */
1619 switch (GET_CODE (x))
1622 fprintf (file, "div%s", GET_MODE (x) == SImode ? "l" : "q");
1625 fprintf (file, "div%su", GET_MODE (x) == SImode ? "l" : "q");
1628 fprintf (file, "rem%s", GET_MODE (x) == SImode ? "l" : "q");
1631 fprintf (file, "rem%su", GET_MODE (x) == SImode ? "l" : "q");
1634 output_operand_lossage ("invalid %%E value");
1640 /* Write "_u" for unaligned access. */
1641 if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == AND)
1642 fprintf (file, "_u");
1646 if (GET_CODE (x) == REG)
1647 fprintf (file, "%s", reg_names[REGNO (x)]);
1648 else if (GET_CODE (x) == MEM)
1649 output_address (XEXP (x, 0));
1651 output_addr_const (file, x);
1655 output_operand_lossage ("invalid %%xn code");
1659 /* Do what is necessary for `va_start'. The argument is ignored;
1660 We look at the current function to determine if stdarg or varargs
1661 is used and fill in an initial va_list. A pointer to this constructor
1665 alpha_builtin_saveregs (arglist)
1668 rtx block, addr, dest, argsize;
1669 tree fntype = TREE_TYPE (current_function_decl);
1670 int stdarg = (TYPE_ARG_TYPES (fntype) != 0
1671 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
1672 != void_type_node));
1674 /* Compute the current position into the args, taking into account
1675 both registers and memory. Both of these are already included in
1676 current_function_args_info. */
1678 argsize = GEN_INT (CURRENT_FUNCTION_ARGS_INFO * UNITS_PER_WORD);
1680 /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1681 storing fp arg registers in the first 48 bytes, and the integer arg
1682 registers in the next 48 bytes. This is only done, however, if any
1683 integer registers need to be stored.
1685 If no integer registers need be stored, then we must subtract 48 in
1686 order to account for the integer arg registers which are counted in
1687 argsize above, but which are not actually stored on the stack. */
1689 if (TARGET_OPEN_VMS)
1690 addr = plus_constant (virtual_incoming_args_rtx,
1691 CURRENT_FUNCTION_ARGS_INFO <= 5 + stdarg
1692 ? UNITS_PER_WORD : - 6 * UNITS_PER_WORD);
1694 addr = (CURRENT_FUNCTION_ARGS_INFO <= 5 + stdarg
1695 ? plus_constant (virtual_incoming_args_rtx,
1697 : plus_constant (virtual_incoming_args_rtx,
1698 - (6 * UNITS_PER_WORD)));
1700 /* For VMS, we include the argsize, while on Unix, it's handled as
1701 a separate field. */
1702 if (TARGET_OPEN_VMS)
1703 addr = plus_constant (addr, INTVAL (argsize));
1705 addr = force_operand (addr, NULL_RTX);
1707 #ifdef POINTERS_EXTEND_UNSIGNED
1708 addr = convert_memory_address (ptr_mode, addr);
1711 if (TARGET_OPEN_VMS)
1715 /* Allocate the va_list constructor */
1716 block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
1717 RTX_UNCHANGING_P (block) = 1;
1718 RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
1720 /* Store the address of the first integer register in the __base
1723 dest = change_address (block, ptr_mode, XEXP (block, 0));
1724 emit_move_insn (dest, addr);
1726 if (flag_check_memory_usage)
1727 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest,
1728 ptr_mode, GEN_INT (GET_MODE_SIZE (ptr_mode)),
1729 TYPE_MODE (sizetype),
1730 GEN_INT (MEMORY_USE_RW), QImode);
1732 /* Store the argsize as the __va_offset member. */
1733 dest = change_address (block, TYPE_MODE (integer_type_node),
1734 plus_constant (XEXP (block, 0),
1735 POINTER_SIZE/BITS_PER_UNIT));
1736 emit_move_insn (dest, argsize);
1738 if (flag_check_memory_usage)
1739 emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest,
1741 GEN_INT (GET_MODE_SIZE
1742 (TYPE_MODE (integer_type_node))),
1743 TYPE_MODE (sizetype),
1744 GEN_INT (MEMORY_USE_RW), QImode);
1746 /* Return the address of the va_list constructor, but don't put it in a
1747 register. Doing so would fail when not optimizing and produce worse
1748 code when optimizing. */
1749 return XEXP (block, 0);
1753 /* This page contains routines that are used to determine what the function
1754 prologue and epilogue code will do and write them out. */
1756 /* Compute the size of the save area in the stack. */
1760 /* These variables are used for communication between the following functions.
1761 They indicate various things about the current function being compiled
1762 that are used to tell what kind of prologue, epilogue and procedure
1763 descriptior to generate. */
1765 /* Nonzero if we need a stack procedure. */
1766 static int is_stack_procedure;
1768 /* Register number (either FP or SP) that is used to unwind the frame. */
1769 static int unwind_regno;
1771 /* Register number used to save FP. We need not have one for RA since
1772 we don't modify it for register procedures. This is only defined
1773 for register frame procedures. */
1774 static int save_fp_regno;
1776 /* Register number used to reference objects off our PV. */
1777 static int base_regno;
1779 /* Compute register masks for saved registers. */
1782 alpha_sa_mask (imaskP, fmaskP)
1783 unsigned long *imaskP;
1784 unsigned long *fmaskP;
1786 unsigned long imask = 0;
1787 unsigned long fmask = 0;
1790 if (is_stack_procedure)
1791 imask |= (1L << HARD_FRAME_POINTER_REGNUM);
1793 /* One for every register we have to save. */
1795 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1796 if (! fixed_regs[i] && ! call_used_regs[i]
1797 && regs_ever_live[i] && i != REG_RA)
1802 fmask |= (1L << (i - 32));
1815 HOST_WIDE_INT stack_needed;
1818 /* One for every register we have to save. */
1820 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1821 if (! fixed_regs[i] && ! call_used_regs[i]
1822 && regs_ever_live[i] && i != REG_RA)
1825 /* Start by assuming we can use a register procedure if we don't make any
1826 calls (REG_RA not used) or need to save any registers and a stack
1827 procedure if we do. */
1828 is_stack_procedure = sa_size != 0 || alpha_ra_ever_killed ();
1830 /* Decide whether to refer to objects off our PV via FP or PV.
1831 If we need need FP for something else or if we receive a nonlocal
1832 goto (which expects PV to contain the value), we must use PV.
1833 Otherwise, start by assuming we can use FP. */
1834 base_regno = (frame_pointer_needed || current_function_has_nonlocal_label
1835 || is_stack_procedure
1836 || current_function_outgoing_args_size
1837 ? REG_PV : HARD_FRAME_POINTER_REGNUM);
1839 /* If we want to copy PV into FP, we need to find some register in which to
1844 if (base_regno == HARD_FRAME_POINTER_REGNUM)
1845 for (i = 0; i < 32; i++)
1846 if (! fixed_regs[i] && call_used_regs[i] && ! regs_ever_live[i])
1849 if (save_fp_regno == -1)
1850 base_regno = REG_PV, is_stack_procedure = 1;
1852 /* Stack unwinding should be done via FP unless we use it for PV. */
1854 = base_regno == REG_PV ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM;
1856 /* If this is a stack procedure, allow space for saving FP and RA. */
1857 if (is_stack_procedure)
1864 alpha_pv_save_size ()
1867 return is_stack_procedure ? 8 : 0;
1874 return unwind_regno == HARD_FRAME_POINTER_REGNUM;
1877 #else /* ! OPEN_VMS */
1885 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1886 if (! fixed_regs[i] && ! call_used_regs[i]
1887 && regs_ever_live[i] && i != REG_RA)
1890 /* If some registers were saved but not reg 26, reg 26 must also
1891 be saved, so leave space for it. */
1892 if (size != 0 || alpha_ra_ever_killed ())
1895 /* Our size must be even (multiple of 16 bytes). */
1902 #endif /* ! OPEN_VMS */
1904 /* Return 1 if this function can directly return via $26. */
1909 return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
1910 && get_frame_size () == 0
1911 && current_function_outgoing_args_size == 0
1912 && current_function_pretend_args_size == 0);
1915 /* Write a version stamp. Don't write anything if we are running as a
1916 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1918 #if !defined(CROSS_COMPILE) && !defined(_WIN32) && !defined(__linux__) && !defined(VMS)
1923 alpha_write_verstamp (file)
1927 fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP);
1931 /* Write code to add constant C to register number IN_REG (possibly 31)
1932 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1933 usually this will be OUT_REG, but should not be if OUT_REG is
1934 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1935 Write the code to FILE. */
1938 add_long_const (file, c, in_reg, out_reg, temp_reg)
1941 int in_reg, out_reg, temp_reg;
1943 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
1944 HOST_WIDE_INT tmp1 = c - low;
1945 HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1946 HOST_WIDE_INT extra = 0;
1948 /* We don't have code to write out constants larger than 32 bits. */
1949 #if HOST_BITS_PER_LONG_INT == 64
1950 if ((unsigned HOST_WIDE_INT) c >> 32 != 0)
1954 /* If HIGH will be interpreted as negative, we must adjust it to do two
1955 ldha insns. Note that we will never be building a negative constant
1962 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1967 int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg;
1969 if (low >= 0 && low < 255)
1970 fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg);
1972 fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg);
1974 in_reg = result_reg;
1979 int result_reg = (high == 0) ? out_reg : temp_reg;
1981 fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg);
1982 in_reg = result_reg;
1986 fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg);
1989 /* Write function prologue. */
1993 /* On vms we have two kinds of functions:
1995 - stack frame (PROC_STACK)
1996 these are 'normal' functions with local vars and which are
1997 calling other functions
1998 - register frame (PROC_REGISTER)
1999 keeps all data in registers, needs no stack
2001 We must pass this to the assembler so it can generate the
2002 proper pdsc (procedure descriptor)
2003 This is done with the '.pdesc' command.
2005 size is the stack size needed for local variables. */
2008 output_prolog (file, size)
2012 unsigned long imask = 0;
2013 unsigned long fmask = 0;
2014 /* Stack space needed for pushing registers clobbered by us. */
2015 HOST_WIDE_INT sa_size;
2016 /* Complete stack size needed. */
2017 HOST_WIDE_INT frame_size;
2018 /* Offset from base reg to register save area. */
2020 /* Offset during register save. */
2022 /* Label for the procedure entry. */
2023 char *entry_label = (char *) alloca (strlen (alpha_function_name) + 5);
2026 sa_size = alpha_sa_size ();
2028 = ALPHA_ROUND (sa_size
2029 + (is_stack_procedure ? 8 : 0)
2030 + size + current_function_pretend_args_size);
2032 /* Issue function start and label. */
2033 fprintf (file, "\t.ent ");
2034 assemble_name (file, alpha_function_name);
2035 fprintf (file, "\n");
2036 sprintf (entry_label, "%s..en", alpha_function_name);
2037 ASM_OUTPUT_LABEL (file, entry_label);
2038 inside_function = TRUE;
2040 fprintf (file, "\t.base $%d\n", base_regno);
2042 /* Calculate register masks for clobbered registers. */
2044 if (is_stack_procedure)
2045 alpha_sa_mask (&imask, &fmask);
2047 /* Adjust the stack by the frame size. If the frame size is > 4096
2048 bytes, we need to be sure we probe somewhere in the first and last
2049 4096 bytes (we can probably get away without the latter test) and
2050 every 8192 bytes in between. If the frame size is > 32768, we
2051 do this in a loop. Otherwise, we generate the explicit probe
2054 Note that we are only allowed to adjust sp once in the prologue. */
2056 if (frame_size < 32768)
2058 if (frame_size > 4096)
2062 fprintf (file, "\tstq $31,-%d($30)\n", probed);
2064 while (probed + 8192 < frame_size)
2065 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
2067 /* We only have to do this probe if we aren't saving registers. */
2068 if (sa_size == 0 && probed + 4096 < frame_size)
2069 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
2072 if (frame_size != 0)
2073 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
2077 /* Here we generate code to set R4 to SP + 4096 and set R23 to the
2078 number of 8192 byte blocks to probe. We then probe each block
2079 in the loop and then set SP to the proper location. If the
2080 amount remaining is > 4096, we have to do one more probe if we
2081 are not saving any registers. */
2083 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
2084 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
2086 add_long_const (file, blocks, 31, 23, 23);
2088 fprintf (file, "\tlda $22,4096($30)\n");
2090 assemble_name (file, alpha_function_name);
2091 fprintf (file, "..sc:\n");
2093 fprintf (file, "\tstq $31,-8192($22)\n");
2094 fprintf (file, "\tsubq $23,1,$23\n");
2095 fprintf (file, "\tlda $22,-8192($22)\n");
2097 fprintf (file, "\tbne $23,");
2098 assemble_name (file, alpha_function_name);
2099 fprintf (file, "..sc\n");
2101 if (leftover > 4096 && sa_size == 0)
2102 fprintf (file, "\tstq $31,-%d($22)\n", leftover);
2104 fprintf (file, "\tlda $30,-%d($22)\n", leftover);
2107 if (is_stack_procedure)
2109 int reg_offset = rsa_offset;
2111 /* Store R26 (RA) first. */
2112 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
2115 /* Store integer regs. according to mask. */
2116 for (i = 0; i < 32; i++)
2117 if (imask & (1L<<i))
2119 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
2123 /* Print the register mask and do floating-point saves. */
2126 fprintf (file, "\t.mask 0x%x,0\n", imask);
2128 for (i = 0; i < 32; i++)
2130 if (fmask & (1L << i))
2132 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
2137 /* Print the floating-point mask, if we've saved any fp register. */
2139 fprintf (file, "\t.fmask 0x%x,0\n", fmask);
2141 fprintf (file, "\tstq $27,0($30)\n");
2145 fprintf (file, "\t.fp_save $%d\n", save_fp_regno);
2146 fprintf (file, "\tbis $%d,$%d,$%d\n", HARD_FRAME_POINTER_REGNUM,
2147 HARD_FRAME_POINTER_REGNUM, save_fp_regno);
2150 if (base_regno != REG_PV)
2151 fprintf (file, "\tbis $%d,$%d,$%d\n", REG_PV, REG_PV, base_regno);
2153 if (unwind_regno == HARD_FRAME_POINTER_REGNUM)
2154 fprintf (file, "\tbis $%d,$%d,$%d\n", STACK_POINTER_REGNUM,
2155 STACK_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM);
2157 /* Describe our frame. */
2158 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
2159 unwind_regno, frame_size, rsa_offset);
2161 /* If we have to allocate space for outgoing args, do it now. */
2162 if (current_function_outgoing_args_size != 0)
2163 fprintf (file, "\tlda $%d,%d($%d)\n", STACK_POINTER_REGNUM,
2164 - ALPHA_ROUND (current_function_outgoing_args_size),
2165 HARD_FRAME_POINTER_REGNUM);
2167 fprintf (file, "\t.prologue\n");
2170 fprintf (file, "\t.align 3\n");
2171 ASM_OUTPUT_LABEL (file, alpha_function_name);
2172 fprintf (file, "\t.pdesc ");
2173 assemble_name (file, alpha_function_name);
2174 fprintf (file, "..en,%s\n", is_stack_procedure ? "stack" : "reg");
2175 alpha_need_linkage (alpha_function_name, 1);
2181 /* Write function epilogue. */
2184 output_epilog (file, size)
2188 unsigned long imask = 0;
2189 unsigned long fmask = 0;
2190 /* Stack space needed for pushing registers clobbered by us. */
2191 HOST_WIDE_INT sa_size = alpha_sa_size ();
2192 /* Complete stack size needed. */
2193 HOST_WIDE_INT frame_size
2194 = ALPHA_ROUND (sa_size
2195 + (is_stack_procedure ? 8 : 0)
2196 + size + current_function_pretend_args_size);
2198 rtx insn = get_last_insn ();
2200 /* If the last insn was a BARRIER, we don't have to write anything except
2201 the .end pseudo-op. */
2203 if (GET_CODE (insn) == NOTE)
2204 insn = prev_nonnote_insn (insn);
2206 if (insn == 0 || GET_CODE (insn) != BARRIER)
2208 /* Restore clobbered registers, load FP last. */
2210 if (is_stack_procedure)
2216 if (unwind_regno == HARD_FRAME_POINTER_REGNUM)
2217 fprintf (file, "\tbis $%d,$%d,$%d\n", HARD_FRAME_POINTER_REGNUM,
2218 HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM);
2220 alpha_sa_mask (&imask, &fmask);
2222 /* Start reloading registers after RA. */
2223 reg_offset = rsa_offset + 8;
2225 for (i = 0; i < 32; i++)
2226 if (imask & (1L<<i))
2228 if (i == HARD_FRAME_POINTER_REGNUM)
2229 fp_offset = reg_offset;
2231 fprintf (file, "\tldq $%d,%d($30)\n",
2236 for (i = 0; i < 32; i++)
2237 if (fmask & (1L << i))
2239 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
2243 /* Restore R26 (RA). */
2244 fprintf (file, "\tldq $26,%d($30)\n", rsa_offset);
2246 /* Restore R29 (FP). */
2247 fprintf (file, "\tldq $29,%d($30)\n", fp_offset);
2250 fprintf (file, "\tbis $%d,$%d,$%d\n", save_fp_regno, save_fp_regno,
2251 HARD_FRAME_POINTER_REGNUM);
2253 if (frame_size != 0)
2255 if (frame_size < 32768)
2256 fprintf (file, "\tlda $30,%d($30)\n", frame_size);
2259 long high = frame_size >> 16;
2260 long low = frame_size & 0xffff;
2264 low = -32768 + (low & 0x7fff);
2266 fprintf (file, "\tldah $2,%ld($31)\n", high);
2267 fprintf (file, "\tlda $2,%ld($2)\n", low);
2268 fprintf (file, "\taddq $30,$2,$30\n");
2272 /* Finally return to the caller. */
2273 fprintf (file, "\tret $31,($26),1\n");
2276 /* End the function. */
2277 fprintf (file, "\t.end ");
2278 assemble_name (file, alpha_function_name);
2279 fprintf (file, "\n");
2280 inside_function = FALSE;
2282 /* Show that we know this function if it is called again. */
2283 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
2286 #else /* !OPEN_VMS */
2289 alpha_does_function_need_gp ()
2293 /* We never need a GP for Windows/NT. */
2294 if (TARGET_WINDOWS_NT)
2297 #ifdef TARGET_PROFILING_NEEDS_GP
2302 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
2303 Even if we are a static function, we still need to do this in case
2304 our address is taken and passed to something like qsort. */
2306 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2307 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2308 && GET_CODE (PATTERN (insn)) != USE
2309 && GET_CODE (PATTERN (insn)) != CLOBBER)
2311 enum attr_type type = get_attr_type (insn);
2312 if (type == TYPE_LDSYM || type == TYPE_JSR)
2320 output_prolog (file, size)
2324 HOST_WIDE_INT out_args_size
2325 = ALPHA_ROUND (current_function_outgoing_args_size);
2326 HOST_WIDE_INT sa_size = alpha_sa_size ();
2327 HOST_WIDE_INT frame_size
2328 = (out_args_size + sa_size
2329 + ALPHA_ROUND (size + current_function_pretend_args_size));
2330 HOST_WIDE_INT reg_offset = out_args_size;
2331 HOST_WIDE_INT start_reg_offset = reg_offset;
2332 HOST_WIDE_INT actual_start_reg_offset = start_reg_offset;
2333 int int_reg_save_area_size = 0;
2334 unsigned reg_mask = 0;
2337 /* Ecoff can handle multiple .file directives, so put out file and lineno.
2338 We have to do that before the .ent directive as we cannot switch
2339 files within procedures with native ecoff because line numbers are
2340 linked to procedure descriptors.
2341 Outputting the lineno helps debugging of one line functions as they
2342 would otherwise get no line number at all. Please note that we would
2343 like to put out last_linenum from final.c, but it is not accessible. */
2345 if (write_symbols == SDB_DEBUG)
2347 ASM_OUTPUT_SOURCE_FILENAME (file,
2348 DECL_SOURCE_FILE (current_function_decl));
2349 if (debug_info_level != DINFO_LEVEL_TERSE)
2350 ASM_OUTPUT_SOURCE_LINE (file,
2351 DECL_SOURCE_LINE (current_function_decl));
2354 /* The assembly language programmer's guide states that the second argument
2355 to the .ent directive, the lex_level, is ignored by the assembler,
2356 so we might as well omit it. */
2358 if (!flag_inhibit_size_directive)
2360 fprintf (file, "\t.ent ");
2361 assemble_name (file, alpha_function_name);
2362 fprintf (file, "\n");
2364 ASM_OUTPUT_LABEL (file, alpha_function_name);
2365 inside_function = TRUE;
2367 if (TARGET_IEEE_CONFORMANT && !flag_inhibit_size_directive)
2368 /* Set flags in procedure descriptor to request IEEE-conformant
2369 math-library routines. The value we set it to is PDSC_EXC_IEEE
2370 (/usr/include/pdsc.h). */
2371 fprintf (file, "\t.eflag 48\n");
2373 /* Set up offsets to alpha virtual arg/local debugging pointer. */
2375 alpha_auto_offset = -frame_size + current_function_pretend_args_size;
2376 alpha_arg_offset = -frame_size + 48;
2378 alpha_function_needs_gp = alpha_does_function_need_gp ();
2380 if (TARGET_WINDOWS_NT == 0)
2382 if (alpha_function_needs_gp)
2383 fprintf (file, "\tldgp $29,0($27)\n");
2385 /* Put a label after the GP load so we can enter the function at it. */
2386 assemble_name (file, alpha_function_name);
2387 fprintf (file, "..ng:\n");
2390 /* Adjust the stack by the frame size. If the frame size is > 4096
2391 bytes, we need to be sure we probe somewhere in the first and last
2392 4096 bytes (we can probably get away without the latter test) and
2393 every 8192 bytes in between. If the frame size is > 32768, we
2394 do this in a loop. Otherwise, we generate the explicit probe
2397 Note that we are only allowed to adjust sp once in the prologue. */
2399 if (frame_size < 32768)
2401 if (frame_size > 4096)
2405 fprintf (file, "\tstq $31,-%d($30)\n", probed);
2407 while (probed + 8192 < frame_size)
2408 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
2410 /* We only have to do this probe if we aren't saving registers. */
2411 if (sa_size == 0 && probed + 4096 < frame_size)
2412 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
2415 if (frame_size != 0)
2416 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
2420 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
2421 number of 8192 byte blocks to probe. We then probe each block
2422 in the loop and then set SP to the proper location. If the
2423 amount remaining is > 4096, we have to do one more probe if we
2424 are not saving any registers. */
2426 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
2427 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
2429 add_long_const (file, blocks, 31, 5, 5);
2431 fprintf (file, "\tlda $4,4096($30)\n");
2433 assemble_name (file, alpha_function_name);
2434 fprintf (file, "..sc:\n");
2436 fprintf (file, "\tstq $31,-8192($4)\n");
2437 fprintf (file, "\tsubq $5,1,$5\n");
2438 fprintf (file, "\tlda $4,-8192($4)\n");
2440 fprintf (file, "\tbne $5,");
2441 assemble_name (file, alpha_function_name);
2442 fprintf (file, "..sc\n");
2444 if (leftover > 4096 && sa_size == 0)
2445 fprintf (file, "\tstq $31,-%d($4)\n", leftover);
2447 fprintf (file, "\tlda $30,-%d($4)\n", leftover);
2450 /* Describe our frame. */
2451 if (!flag_inhibit_size_directive)
2453 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
2454 (frame_pointer_needed
2455 ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM),
2456 frame_size, current_function_pretend_args_size);
2459 /* Cope with very large offsets to the register save area. */
2461 if (reg_offset + sa_size > 0x8000)
2463 int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000;
2464 if (low + sa_size <= 0x8000)
2466 add_long_const (file, reg_offset - low, 30, 24, 24);
2471 add_long_const (file, reg_offset, 30, 24, 24);
2477 /* Save register RA if any other register needs to be saved. */
2480 reg_mask |= 1 << REG_RA;
2481 fprintf (file, "\tstq $26,%d($%d)\n", reg_offset, sa_reg);
2483 int_reg_save_area_size += 8;
2486 /* Now save any other used integer registers required to be saved. */
2487 for (i = 0; i < 32; i++)
2488 if (! fixed_regs[i] && ! call_used_regs[i]
2489 && regs_ever_live[i] && i != REG_RA)
2492 fprintf (file, "\tstq $%d,%d($%d)\n", i, reg_offset, sa_reg);
2494 int_reg_save_area_size += 8;
2497 /* Print the register mask and do floating-point saves. */
2498 if (reg_mask && !flag_inhibit_size_directive)
2499 fprintf (file, "\t.mask 0x%x,%d\n", reg_mask,
2500 actual_start_reg_offset - frame_size);
2502 start_reg_offset = reg_offset;
2505 for (i = 0; i < 32; i++)
2506 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
2507 && regs_ever_live[i + 32])
2510 fprintf (file, "\tstt $f%d,%d($%d)\n", i, reg_offset, sa_reg);
2514 /* Print the floating-point mask, if we've saved any fp register. */
2515 if (reg_mask && !flag_inhibit_size_directive)
2516 fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask,
2517 actual_start_reg_offset - frame_size + int_reg_save_area_size);
2519 /* If we need a frame pointer, set it from the stack pointer. Note that
2520 this must always be the last instruction in the prologue. */
2521 if (frame_pointer_needed)
2522 fprintf (file, "\tbis $30,$30,$15\n");
2524 /* End the prologue and say if we used gp. */
2525 if (!flag_inhibit_size_directive)
2526 fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
2529 /* Write function epilogue. */
2532 output_epilog (file, size)
2536 rtx insn = get_last_insn ();
2537 HOST_WIDE_INT out_args_size
2538 = ALPHA_ROUND (current_function_outgoing_args_size);
2539 HOST_WIDE_INT sa_size = alpha_sa_size ();
2540 HOST_WIDE_INT frame_size
2541 = (out_args_size + sa_size
2542 + ALPHA_ROUND (size + current_function_pretend_args_size));
2543 HOST_WIDE_INT reg_offset = out_args_size;
2544 HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset;
2546 = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM];
2549 /* If the last insn was a BARRIER, we don't have to write anything except
2550 the .end pseudo-op. */
2551 if (GET_CODE (insn) == NOTE)
2552 insn = prev_nonnote_insn (insn);
2553 if (insn == 0 || GET_CODE (insn) != BARRIER)
2558 /* If we have a frame pointer, restore SP from it. */
2559 if (frame_pointer_needed)
2560 fprintf (file, "\tbis $15,$15,$30\n");
2562 /* Cope with large offsets to the register save area. */
2564 if (reg_offset + sa_size > 0x8000)
2566 int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000;
2567 if (low + sa_size <= 0x8000)
2569 add_long_const (file, reg_offset - low, 30, 24, 24);
2574 add_long_const (file, reg_offset, 30, 24, 24);
2580 /* Restore all the registers, starting with the return address
2584 fprintf (file, "\tldq $26,%d($%d)\n", reg_offset, sa_reg);
2588 /* Now restore any other used integer registers that that we saved,
2589 except for FP if it is being used as FP, since it must be
2592 for (i = 0; i < 32; i++)
2593 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]
2596 if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
2597 fp_offset = reg_offset;
2599 fprintf (file, "\tldq $%d,%d($%d)\n", i, reg_offset, sa_reg);
2603 for (i = 0; i < 32; i++)
2604 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
2605 && regs_ever_live[i + 32])
2607 fprintf (file, "\tldt $f%d,%d($%d)\n", i, reg_offset, sa_reg);
2611 /* If the stack size is large and we have a frame pointer, compute the
2612 size of the stack into a register because the old FP restore, stack
2613 pointer adjust, and return are required to be consecutive
2615 if (frame_size > 32767 && restore_fp)
2616 add_long_const (file, frame_size, 31, 1, 1);
2618 /* If we needed a frame pointer and we have to restore it, do it
2619 now. This must be done in one instruction immediately
2620 before the SP update. */
2621 if (restore_fp && fp_offset)
2622 fprintf (file, "\tldq $15,%d($%d)\n", fp_offset, sa_reg);
2624 /* Now update the stack pointer, if needed. Only one instruction must
2625 modify the stack pointer. It must be the last instruction in the
2626 sequence and must be an ADDQ or LDA instruction. If the frame
2627 pointer was loaded above, we may only put one instruction here. */
2629 if (frame_size > 32768 && restore_fp)
2630 fprintf (file, "\taddq $1,$30,$30\n");
2632 add_long_const (file, frame_size, 30, 30, 1);
2634 /* Finally return to the caller. */
2635 fprintf (file, "\tret $31,($26),1\n");
2638 /* End the function. */
2639 if (!flag_inhibit_size_directive)
2641 fprintf (file, "\t.end ");
2642 assemble_name (file, alpha_function_name);
2643 fprintf (file, "\n");
2645 inside_function = FALSE;
2647 /* Show that we know this function if it is called again. */
2648 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
2650 #endif /* !OPEN_VMS */
2652 /* Debugging support. */
2656 /* Count the number of sdb related labels are generated (to find block
2657 start and end boundaries). */
2659 int sdb_label_count = 0;
2661 /* Next label # for each statement. */
2663 static int sym_lineno = 0;
2665 /* Count the number of .file directives, so that .loc is up to date. */
2667 static int num_source_filenames = 0;
2669 /* Name of the file containing the current function. */
2671 static char *current_function_file = "";
2673 /* Offsets to alpha virtual arg/local debugging pointers. */
2675 long alpha_arg_offset;
2676 long alpha_auto_offset;
2678 /* Emit a new filename to a stream. */
2681 alpha_output_filename (stream, name)
2685 static int first_time = TRUE;
2686 char ltext_label_name[100];
2691 ++num_source_filenames;
2692 current_function_file = name;
2693 fprintf (stream, "\t.file\t%d ", num_source_filenames);
2694 output_quoted_string (stream, name);
2695 fprintf (stream, "\n");
2696 if (!TARGET_GAS && write_symbols == DBX_DEBUG)
2697 fprintf (stream, "\t#@stabs\n");
2700 else if (write_symbols == DBX_DEBUG)
2702 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0);
2703 fprintf (stream, "%s ", ASM_STABS_OP);
2704 output_quoted_string (stream, name);
2705 fprintf (stream, ",%d,0,0,%s\n", N_SOL, <ext_label_name[1]);
2708 else if (name != current_function_file
2709 && strcmp (name, current_function_file) != 0)
2711 if (inside_function && ! TARGET_GAS)
2712 fprintf (stream, "\t#.file\t%d ", num_source_filenames);
2715 ++num_source_filenames;
2716 current_function_file = name;
2717 fprintf (stream, "\t.file\t%d ", num_source_filenames);
2720 output_quoted_string (stream, name);
2721 fprintf (stream, "\n");
2725 /* Emit a linenumber to a stream. */
2728 alpha_output_lineno (stream, line)
2732 if (write_symbols == DBX_DEBUG)
2734 /* mips-tfile doesn't understand .stabd directives. */
2736 fprintf (stream, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
2737 sym_lineno, ASM_STABN_OP, N_SLINE, line, sym_lineno);
2740 fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line);
2743 /* Structure to show the current status of registers and memory. */
2745 struct shadow_summary
2748 unsigned long i : 31; /* Mask of int regs */
2749 unsigned long fp : 31; /* Mask of fp regs */
2750 unsigned long mem : 1; /* mem == imem | fpmem */
2754 /* Summary the effects of expression X on the machine. Update SUM, a pointer
2755 to the summary structure. SET is nonzero if the insn is setting the
2756 object, otherwise zero. */
2759 summarize_insn (x, sum, set)
2761 struct shadow_summary *sum;
2770 switch (GET_CODE (x))
2772 /* ??? Note that this case would be incorrect if the Alpha had a
2773 ZERO_EXTRACT in SET_DEST. */
2775 summarize_insn (SET_SRC (x), sum, 0);
2776 summarize_insn (SET_DEST (x), sum, 1);
2780 summarize_insn (XEXP (x, 0), sum, 1);
2784 summarize_insn (XEXP (x, 0), sum, 0);
2788 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
2789 summarize_insn (XVECEXP (x, 0, i), sum, 0);
2794 int regno = REGNO (x);
2795 unsigned long mask = 1UL << (regno % 32);
2797 if (regno == 31 || regno == 63)
2803 sum->defd.i |= mask;
2805 sum->defd.fp |= mask;
2810 sum->used.i |= mask;
2812 sum->used.fp |= mask;
2823 /* Find the regs used in memory address computation: */
2824 summarize_insn (XEXP (x, 0), sum, 0);
2828 summarize_insn (SUBREG_REG (x), sum, 0);
2831 case CONST_INT: case CONST_DOUBLE:
2832 case SYMBOL_REF: case LABEL_REF: case CONST:
2835 /* Handle common unary and binary ops for efficiency. */
2836 case COMPARE: case PLUS: case MINUS: case MULT: case DIV:
2837 case MOD: case UDIV: case UMOD: case AND: case IOR:
2838 case XOR: case ASHIFT: case ROTATE: case ASHIFTRT: case LSHIFTRT:
2839 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
2840 case NE: case EQ: case GE: case GT: case LE:
2841 case LT: case GEU: case GTU: case LEU: case LTU:
2842 summarize_insn (XEXP (x, 0), sum, 0);
2843 summarize_insn (XEXP (x, 1), sum, 0);
2846 case NEG: case NOT: case SIGN_EXTEND: case ZERO_EXTEND:
2847 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: case FLOAT:
2848 case FIX: case UNSIGNED_FLOAT: case UNSIGNED_FIX: case ABS:
2849 case SQRT: case FFS:
2850 summarize_insn (XEXP (x, 0), sum, 0);
2854 format_ptr = GET_RTX_FORMAT (GET_CODE (x));
2855 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2856 switch (format_ptr[i])
2859 summarize_insn (XEXP (x, i), sum, 0);
2863 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2864 summarize_insn (XVECEXP (x, i, j), sum, 0);
2873 /* Ensure a sufficient number of `trapb' insns are in the code when the user
2874 requests code with a trap precision of functions or instructions.
2876 In naive mode, when the user requests a trap-precision of "instruction", a
2877 trapb is needed after every instruction that may generate a trap (and after
2878 jsr/bsr instructions, because called functions may import a trap from the
2879 caller). This ensures that the code is resumption safe but it is also slow.
2881 When optimizations are turned on, we delay issuing a trapb as long as
2882 possible. In this context, a trap shadow is the sequence of instructions
2883 that starts with a (potentially) trap generating instruction and extends to
2884 the next trapb or call_pal instruction (but GCC never generates call_pal by
2885 itself). We can delay (and therefore sometimes omit) a trapb subject to the
2886 following conditions:
2888 (a) On entry to the trap shadow, if any Alpha register or memory location
2889 contains a value that is used as an operand value by some instruction in
2890 the trap shadow (live on entry), then no instruction in the trap shadow
2891 may modify the register or memory location.
2893 (b) Within the trap shadow, the computation of the base register for a
2894 memory load or store instruction may not involve using the result
2895 of an instruction that might generate an UNPREDICTABLE result.
2897 (c) Within the trap shadow, no register may be used more than once as a
2898 destination register. (This is to make life easier for the trap-handler.)
2900 (d) The trap shadow may not include any branch instructions. */
2903 alpha_handle_trap_shadows (insns)
2906 struct shadow_summary shadow;
2907 int trap_pending, exception_nesting;
2910 if (alpha_tp == ALPHA_TP_PROG && !flag_exceptions)
2914 exception_nesting = 0;
2917 shadow.used.mem = 0;
2918 shadow.defd = shadow.used;
2920 for (i = insns; i ; i = NEXT_INSN (i))
2922 if (GET_CODE (i) == NOTE)
2924 switch (NOTE_LINE_NUMBER (i))
2926 case NOTE_INSN_EH_REGION_BEG:
2927 exception_nesting++;
2932 case NOTE_INSN_EH_REGION_END:
2933 exception_nesting--;
2938 case NOTE_INSN_EPILOGUE_BEG:
2939 if (trap_pending && alpha_tp >= ALPHA_TP_FUNC)
2944 else if (trap_pending)
2946 if (alpha_tp == ALPHA_TP_FUNC)
2948 if (GET_CODE (i) == JUMP_INSN
2949 && GET_CODE (PATTERN (i)) == RETURN)
2952 else if (alpha_tp == ALPHA_TP_INSN)
2956 struct shadow_summary sum;
2961 sum.defd = shadow.used;
2963 switch (GET_CODE (i))
2966 /* Annoyingly, get_attr_trap will abort on USE. */
2967 if (GET_CODE (PATTERN (i)) == USE)
2970 summarize_insn (PATTERN (i), &sum, 0);
2972 if ((sum.defd.i & shadow.defd.i)
2973 || (sum.defd.fp & shadow.defd.fp))
2975 /* (c) would be violated */
2979 /* Combine shadow with summary of current insn: */
2980 shadow.used.i |= sum.used.i;
2981 shadow.used.fp |= sum.used.fp;
2982 shadow.used.mem |= sum.used.mem;
2983 shadow.defd.i |= sum.defd.i;
2984 shadow.defd.fp |= sum.defd.fp;
2985 shadow.defd.mem |= sum.defd.mem;
2987 if ((sum.defd.i & shadow.used.i)
2988 || (sum.defd.fp & shadow.used.fp)
2989 || (sum.defd.mem & shadow.used.mem))
2991 /* (a) would be violated (also takes care of (b)) */
2992 if (get_attr_trap (i) == TRAP_YES
2993 && ((sum.defd.i & sum.used.i)
2994 || (sum.defd.fp & sum.used.fp)))
3013 emit_insn_before (gen_trapb (), i);
3017 shadow.used.mem = 0;
3018 shadow.defd = shadow.used;
3023 if (exception_nesting > 0 || alpha_tp >= ALPHA_TP_FUNC)
3024 if (GET_CODE (i) == INSN
3025 && GET_CODE (PATTERN (i)) != USE
3026 && get_attr_trap (i) == TRAP_YES)
3028 if (optimize && !trap_pending)
3029 summarize_insn (PATTERN (i), &shadow, 0);
3035 /* Machine dependant reorg pass. */
3041 alpha_handle_trap_shadows (insns);
3045 /* Check a floating-point value for validity for a particular machine mode. */
3047 static char *float_strings[] =
3049 /* These are for FLOAT_VAX. */
3050 "1.70141173319264430e+38", /* 2^127 (2^24 - 1) / 2^24 */
3051 "-1.70141173319264430e+38",
3052 "2.93873587705571877e-39", /* 2^-128 */
3053 "-2.93873587705571877e-39",
3054 /* These are for the default broken IEEE mode, which traps
3055 on infinity or denormal numbers. */
3056 "3.402823466385288598117e+38", /* 2^128 (1 - 2^-24) */
3057 "-3.402823466385288598117e+38",
3058 "1.1754943508222875079687e-38", /* 2^-126 */
3059 "-1.1754943508222875079687e-38",
3062 static REAL_VALUE_TYPE float_values[8];
3063 static int inited_float_values = 0;
3066 check_float_value (mode, d, overflow)
3067 enum machine_mode mode;
3072 if (TARGET_IEEE || TARGET_IEEE_CONFORMANT || TARGET_IEEE_WITH_INEXACT)
3075 if (inited_float_values == 0)
3078 for (i = 0; i < 8; i++)
3079 float_values[i] = REAL_VALUE_ATOF (float_strings[i], DFmode);
3081 inited_float_values = 1;
3087 REAL_VALUE_TYPE *fvptr;
3089 if (TARGET_FLOAT_VAX)
3090 fvptr = &float_values[0];
3092 fvptr = &float_values[4];
3094 bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE));
3095 if (REAL_VALUES_LESS (fvptr[0], r))
3097 bcopy ((char *) &fvptr[0], (char *) d,
3098 sizeof (REAL_VALUE_TYPE));
3101 else if (REAL_VALUES_LESS (r, fvptr[1]))
3103 bcopy ((char *) &fvptr[1], (char *) d,
3104 sizeof (REAL_VALUE_TYPE));
3107 else if (REAL_VALUES_LESS (dconst0, r)
3108 && REAL_VALUES_LESS (r, fvptr[2]))
3110 bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
3113 else if (REAL_VALUES_LESS (r, dconst0)
3114 && REAL_VALUES_LESS (fvptr[3], r))
3116 bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
3127 function_arg (cum, mode, type, named)
3128 CUMULATIVE_ARGS *cum;
3129 enum machine_mode mode;
3135 if (mode == VOIDmode) /* final call, return argument information */
3137 return GEN_INT (*cum);
3145 *cum |= (((TARGET_FLOAT_VAX)?1:4) << ((arg * 3)+8)); /* 4 = AI$K_AR_FS, IEEE single */
3148 *cum |= (((TARGET_FLOAT_VAX)?3:5) << ((arg * 3)+8)); /* 5 = AI$K_AR_FT, IEEE double */
3151 *cum |= (7 << ((arg * 3)+8)); /* 5 = AI$K_AR_FT, IEEE double */
3157 return (arg < 6 && ! MUST_PASS_IN_STACK (mode, type)
3158 ? gen_rtx(REG, mode,
3159 (*cum & 0xff) + 16 + ((TARGET_FPREGS
3160 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3161 || GET_MODE_CLASS (mode) == MODE_FLOAT))
3166 /* Structure to collect function names for final output
3169 enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN};
3172 struct alpha_links {
3173 struct alpha_links *next;
3175 enum links_kind kind;
3178 static struct alpha_links *alpha_links_base = 0;
3180 /* Make (or fake) .linkage entry for function call.
3182 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
3185 alpha_need_linkage (name, is_local)
3190 struct alpha_links *lptr, *nptr;
3195 /* Is this name already defined ? */
3197 for (lptr = alpha_links_base; lptr; lptr = lptr->next)
3198 if (strcmp (lptr->name, name) == 0)
3202 /* Defined here but external assumed. */
3203 if (lptr->kind == KIND_EXTERN)
3204 lptr->kind = KIND_LOCAL;
3208 /* Used here but unused assumed. */
3209 if (lptr->kind == KIND_UNUSED)
3210 lptr->kind = KIND_LOCAL;
3215 nptr = (struct alpha_links *) xmalloc (sizeof (struct alpha_links));
3216 nptr->next = alpha_links_base;
3217 nptr->name = xstrdup (name);
3219 /* Assume external if no definition. */
3220 nptr->kind = (is_local ? KIND_UNUSED : KIND_EXTERN);
3222 /* Ensure we have an IDENTIFIER so assemble_name can mark is used. */
3223 get_identifier (name);
3225 alpha_links_base = nptr;
3232 alpha_write_linkage (stream)
3235 struct alpha_links *lptr, *nptr;
3237 readonly_section ();
3239 fprintf (stream, "\t.align 3\n");
3241 for (lptr = alpha_links_base; lptr; lptr = nptr)
3245 if (lptr->kind == KIND_UNUSED
3246 || ! TREE_SYMBOL_REFERENCED (get_identifier (lptr->name)))
3249 fprintf (stream, "%s..lk:\n", lptr->name);
3250 if (lptr->kind == KIND_LOCAL)
3252 /* Local and used, build linkage pair. */
3253 fprintf (stream, "\t.quad %s..en\n", lptr->name);
3254 fprintf (stream, "\t.quad %s\n", lptr->name);
3257 /* External and used, request linkage pair. */
3258 fprintf (stream, "\t.linkage %s\n", lptr->name);
3265 alpha_need_linkage (name, is_local)
3271 #endif /* OPEN_VMS */