1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
25 #include "insn-config.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
39 #define MAX_MOVE_MAX MOVE_MAX
42 #ifndef MIN_UNITS_PER_WORD
43 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
46 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
48 /* Modes for each hard register that we can save. The smallest mode is wide
49 enough to save the entire contents of the register. When saving the
50 register because it is live we first try to save in multi-register modes.
51 If that is not possible the save is done one register at a time. */
53 static enum machine_mode
54 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
56 /* For each hard register, a place on the stack where it can be saved,
60 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
62 /* We will only make a register eligible for caller-save if it can be
63 saved in its widest mode with a simple SET insn as long as the memory
64 address is valid. We record the INSN_CODE is those insns here since
65 when we emit them, the addresses might not be valid, so they might not
69 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
71 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
73 /* Set of hard regs currently residing in save area (during insn scan). */
75 static HARD_REG_SET hard_regs_saved;
77 /* Number of registers currently in hard_regs_saved. */
79 static int n_regs_saved;
81 /* Computed by mark_referenced_regs, all regs referenced in a given
83 static HARD_REG_SET referenced_regs;
85 /* Computed in mark_set_regs, holds all registers set by the current
87 static HARD_REG_SET this_insn_sets;
90 static void mark_set_regs PARAMS ((rtx, rtx, void *));
91 static void mark_referenced_regs PARAMS ((rtx));
92 static int insert_save PARAMS ((struct insn_chain *, int, int,
94 enum machine_mode *));
95 static int insert_restore PARAMS ((struct insn_chain *, int, int,
96 int, enum machine_mode *));
97 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
98 enum insn_code, rtx));
99 static void add_stored_regs PARAMS ((rtx, rtx, void *));
101 /* Initialize for caller-save.
103 Look at all the hard registers that are used by a call and for which
104 regclass.c has not already excluded from being used across a call.
106 Ensure that we can find a mode to save the register and that there is a
107 simple insn to save and restore the register. This latter check avoids
108 problems that would occur if we tried to save the MQ register of some
109 machines directly into memory. */
118 enum machine_mode mode;
120 /* First find all the registers that we need to deal with and all
121 the modes that they can have. If we can't find a mode to use,
122 we can't have the register live over calls. */
124 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
126 if (call_used_regs[i] && ! call_fixed_regs[i])
128 for (j = 1; j <= MOVE_MAX_WORDS; j++)
130 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
132 if (regno_save_mode[i][j] == VOIDmode && j == 1)
134 call_fixed_regs[i] = 1;
135 SET_HARD_REG_BIT (call_fixed_reg_set, i);
140 regno_save_mode[i][1] = VOIDmode;
143 /* The following code tries to approximate the conditions under which
144 we can easily save and restore a register without scratch registers or
145 other complexities. It will usually work, except under conditions where
146 the validity of an insn operand is dependent on the address offset.
147 No such cases are currently known.
149 We first find a typical offset from some BASE_REG_CLASS register.
150 This address is chosen by finding the first register in the class
151 and by finding the smallest power of two that is a valid offset from
152 that register in every mode we will use to save registers. */
154 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
155 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
158 if (i == FIRST_PSEUDO_REGISTER)
161 addr_reg = gen_rtx_REG (Pmode, i);
163 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
165 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
167 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
168 if (regno_save_mode[i][1] != VOIDmode
169 && ! strict_memory_address_p (regno_save_mode[i][1], address))
172 if (i == FIRST_PSEUDO_REGISTER)
176 /* If we didn't find a valid address, we must use register indirect. */
180 /* Next we try to form an insn to save and restore the register. We
181 see if such an insn is recognized and meets its constraints. */
185 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
186 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
187 if (HARD_REGNO_MODE_OK (i, mode))
189 rtx mem = gen_rtx_MEM (mode, address);
190 rtx reg = gen_rtx_REG (mode, i);
191 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
192 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
193 rtx saveinsn = emit_insn (savepat);
194 rtx restinsn = emit_insn (restpat);
197 reg_save_code[i][mode] = recog_memoized (saveinsn);
198 reg_restore_code[i][mode] = recog_memoized (restinsn);
200 /* Now extract both insns and see if we can meet their
202 ok = (reg_save_code[i][mode] != (enum insn_code)-1
203 && reg_restore_code[i][mode] != (enum insn_code)-1);
206 extract_insn (saveinsn);
207 ok = constrain_operands (1);
208 extract_insn (restinsn);
209 ok &= constrain_operands (1);
214 reg_save_code[i][mode] = (enum insn_code) -1;
215 reg_restore_code[i][mode] = (enum insn_code) -1;
220 reg_save_code[i][mode] = (enum insn_code) -1;
221 reg_restore_code[i][mode] = (enum insn_code) -1;
223 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
224 for (j = 1; j <= MOVE_MAX_WORDS; j++)
225 if (reg_save_code [i][regno_save_mode[i][j]] == (enum insn_code) -1)
227 regno_save_mode[i][j] = VOIDmode;
230 call_fixed_regs[i] = 1;
231 SET_HARD_REG_BIT (call_fixed_reg_set, i);
238 /* Initialize save areas by showing that we haven't allocated any yet. */
245 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
246 for (j = 1; j <= MOVE_MAX_WORDS; j++)
247 regno_save_mem[i][j] = 0;
250 /* Allocate save areas for any hard registers that might need saving.
251 We take a conservative approach here and look for call-clobbered hard
252 registers that are assigned to pseudos that cross calls. This may
253 overestimate slightly (especially if some of these registers are later
254 used as spill registers), but it should not be significant.
258 In the fallback case we should iterate backwards across all possible
259 modes for the save, choosing the largest available one instead of
260 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
262 We do not try to use "move multiple" instructions that exist
263 on some machines (such as the 68k moveml). It could be a win to try
264 and use them when possible. The hard part is doing it in a way that is
265 machine independent since they might be saving non-consecutive
266 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
273 HARD_REG_SET hard_regs_used;
275 /* Allocate space in the save area for the largest multi-register
276 pseudos first, then work backwards to single register
279 /* Find and record all call-used hard-registers in this function. */
280 CLEAR_HARD_REG_SET (hard_regs_used);
281 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
282 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
284 unsigned int regno = reg_renumber[i];
285 unsigned int endregno
286 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
288 for (r = regno; r < endregno; r++)
289 if (call_used_regs[r])
290 SET_HARD_REG_BIT (hard_regs_used, r);
293 /* Now run through all the call-used hard-registers and allocate
294 space for them in the caller-save area. Try to allocate space
295 in a manner which allows multi-register saves/restores to be done. */
297 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
298 for (j = MOVE_MAX_WORDS; j > 0; j--)
302 /* If no mode exists for this size, try another. Also break out
303 if we have already saved this hard register. */
304 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
307 /* See if any register in this group has been saved. */
308 for (k = 0; k < j; k++)
309 if (regno_save_mem[i + k][1])
317 for (k = 0; k < j; k++)
318 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
326 /* We have found an acceptable mode to store in. */
328 = assign_stack_local (regno_save_mode[i][j],
329 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
331 /* Setup single word save area just in case... */
332 for (k = 0; k < j; k++)
333 /* This should not depend on WORDS_BIG_ENDIAN.
334 The order of words in regs is the same as in memory. */
335 regno_save_mem[i + k][1]
336 = adjust_address_nv (regno_save_mem[i][j],
337 regno_save_mode[i + k][1],
341 /* Now loop again and set the alias set of any save areas we made to
342 the alias set used to represent frame objects. */
343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
344 for (j = MOVE_MAX_WORDS; j > 0; j--)
345 if (regno_save_mem[i][j] != 0)
346 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
349 /* Find the places where hard regs are live across calls and save them. */
352 save_call_clobbered_regs ()
354 struct insn_chain *chain, *next;
355 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
357 CLEAR_HARD_REG_SET (hard_regs_saved);
360 for (chain = reload_insn_chain; chain != 0; chain = next)
362 rtx insn = chain->insn;
363 enum rtx_code code = GET_CODE (insn);
367 if (chain->is_caller_save_insn)
370 if (GET_RTX_CLASS (code) == 'i')
372 /* If some registers have been saved, see if INSN references
373 any of them. We must restore them before the insn if so. */
379 if (code == JUMP_INSN)
380 /* Restore all registers if this is a JUMP_INSN. */
381 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
384 CLEAR_HARD_REG_SET (referenced_regs);
385 mark_referenced_regs (PATTERN (insn));
386 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
389 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
390 if (TEST_HARD_REG_BIT (referenced_regs, regno))
391 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
394 if (code == CALL_INSN)
397 HARD_REG_SET hard_regs_to_save;
399 /* Use the register life information in CHAIN to compute which
400 regs are live during the call. */
401 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
402 &chain->live_throughout);
403 /* Save hard registers always in the widest mode availble. */
404 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
405 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
406 save_mode [regno] = regno_save_mode [regno][1];
408 save_mode [regno] = VOIDmode;
410 /* Look trought all live pseudos, mark their hard registers
411 and choose proper mode for saving. */
412 EXECUTE_IF_SET_IN_REG_SET
413 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
415 int r = reg_renumber[regno];
420 enum machine_mode mode;
422 nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (regno));
423 mode = HARD_REGNO_CALLER_SAVE_MODE
424 (r, nregs, PSEUDO_REGNO_MODE (regno));
425 if (GET_MODE_BITSIZE (mode)
426 > GET_MODE_BITSIZE (save_mode[r]))
429 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
435 /* Record all registers set in this call insn. These don't need
436 to be saved. N.B. the call insn might set a subreg of a
437 multi-hard-reg pseudo; then the pseudo is considered live
438 during the call, but the subreg that is set isn't. */
439 CLEAR_HARD_REG_SET (this_insn_sets);
440 note_stores (PATTERN (insn), mark_set_regs, NULL);
442 /* Compute which hard regs must be saved before this call. */
443 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
444 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
445 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
446 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
448 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
449 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
450 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
452 /* Must recompute n_regs_saved. */
454 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
455 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
460 if (chain->next == 0 || chain->next->block > chain->block)
463 /* At the end of the basic block, we must restore any registers that
464 remain saved. If the last insn in the block is a JUMP_INSN, put
465 the restore before the insn, otherwise, put it after the insn. */
468 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
469 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
470 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
471 regno, MOVE_MAX_WORDS, save_mode);
476 /* Here from note_stores when an insn stores a value in a register.
477 Set the proper bit or bits in this_insn_sets. All pseudos that have
478 been assigned hard regs have had their register number changed already,
479 so we can ignore pseudos. */
481 mark_set_regs (reg, setter, data)
483 rtx setter ATTRIBUTE_UNUSED;
484 void *data ATTRIBUTE_UNUSED;
486 register int regno, endregno, i;
487 enum machine_mode mode = GET_MODE (reg);
489 if (GET_CODE (reg) == SUBREG)
491 rtx inner = SUBREG_REG (reg);
492 if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
495 regno = subreg_hard_regno (reg, 1);
497 else if (GET_CODE (reg) == REG
498 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
503 endregno = regno + HARD_REGNO_NREGS (regno, mode);
505 for (i = regno; i < endregno; i++)
506 SET_HARD_REG_BIT (this_insn_sets, i);
509 /* Here from note_stores when an insn stores a value in a register.
510 Set the proper bit or bits in the passed regset. All pseudos that have
511 been assigned hard regs have had their register number changed already,
512 so we can ignore pseudos. */
514 add_stored_regs (reg, setter, data)
519 register int regno, endregno, i;
520 enum machine_mode mode = GET_MODE (reg);
523 if (GET_CODE (setter) == CLOBBER)
526 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
528 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
529 GET_MODE (SUBREG_REG (reg)),
532 reg = SUBREG_REG (reg);
535 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
538 regno = REGNO (reg) + offset;
539 endregno = regno + HARD_REGNO_NREGS (regno, mode);
541 for (i = regno; i < endregno; i++)
542 SET_REGNO_REG_SET ((regset) data, i);
545 /* Walk X and record all referenced registers in REFERENCED_REGS. */
547 mark_referenced_regs (x)
550 enum rtx_code code = GET_CODE (x);
555 mark_referenced_regs (SET_SRC (x));
556 if (code == SET || code == CLOBBER)
560 if (code == REG || code == PC || code == CC0
561 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
562 /* If we're setting only part of a multi-word register,
563 we shall mark it as referenced, because the words
564 that are not being set should be restored. */
565 && ((GET_MODE_SIZE (GET_MODE (x))
566 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
567 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
568 <= UNITS_PER_WORD))))
571 if (code == MEM || code == SUBREG)
579 int regno = REGNO (x);
580 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
581 : reg_renumber[regno]);
585 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
587 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
589 /* If this is a pseudo that did not get a hard register, scan its
590 memory location, since it might involve the use of another
591 register, which might be saved. */
592 else if (reg_equiv_mem[regno] != 0)
593 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
594 else if (reg_equiv_address[regno] != 0)
595 mark_referenced_regs (reg_equiv_address[regno]);
599 fmt = GET_RTX_FORMAT (code);
600 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
603 mark_referenced_regs (XEXP (x, i));
604 else if (fmt[i] == 'E')
605 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
606 mark_referenced_regs (XVECEXP (x, i, j));
610 /* Insert a sequence of insns to restore. Place these insns in front of
611 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
612 the maximum number of registers which should be restored during this call.
613 It should never be less than 1 since we only work with entire registers.
615 Note that we have verified in init_caller_save that we can do this
616 with a simple SET, so use it. Set INSN_CODE to what we save there
617 since the address might not be valid so the insn might not be recognized.
618 These insns will be reloaded and have register elimination done by
619 find_reload, so we need not worry about that here.
621 Return the extra number of registers saved. */
624 insert_restore (chain, before_p, regno, maxrestore, save_mode)
625 struct insn_chain *chain;
629 enum machine_mode *save_mode;
633 enum insn_code code = CODE_FOR_nothing;
634 unsigned int numregs = 0;
635 struct insn_chain *new;
638 /* A common failure mode if register status is not correct in the RTL
639 is for this routine to be called with a REGNO we didn't expect to
640 save. That will cause us to write an insn with a (nil) SET_DEST
641 or SET_SRC. Instead of doing so and causing a crash later, check
642 for this common case and abort here instead. This will remove one
643 step in debugging such problems. */
645 if (regno_save_mem[regno][1] == 0)
648 /* Get the pattern to emit and update our status.
650 See if we can restore `maxrestore' registers at once. Work
651 backwards to the single register case. */
652 for (i = maxrestore; i > 0; i--)
657 if (regno_save_mem[regno][i] == 0)
660 for (j = 0; j < i; j++)
661 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
666 /* Must do this one restore at a time */
674 mem = regno_save_mem [regno][numregs];
675 if (save_mode [regno] != VOIDmode
676 && save_mode [regno] != GET_MODE (mem)
677 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
678 mem = adjust_address (mem, save_mode[regno], 0);
679 pat = gen_rtx_SET (VOIDmode,
680 gen_rtx_REG (GET_MODE (mem),
682 code = reg_restore_code[regno][GET_MODE (mem)];
683 new = insert_one_insn (chain, before_p, code, pat);
685 /* Clear status for all registers we restored. */
686 for (k = 0; k < i; k++)
688 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
689 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
695 /* Tell our callers how many extra registers we saved/restored */
699 /* Like insert_restore above, but save registers instead. */
701 insert_save (chain, before_p, regno, to_save, save_mode)
702 struct insn_chain *chain;
705 HARD_REG_SET *to_save;
706 enum machine_mode *save_mode;
711 enum insn_code code = CODE_FOR_nothing;
712 unsigned int numregs = 0;
713 struct insn_chain *new;
716 /* A common failure mode if register status is not correct in the RTL
717 is for this routine to be called with a REGNO we didn't expect to
718 save. That will cause us to write an insn with a (nil) SET_DEST
719 or SET_SRC. Instead of doing so and causing a crash later, check
720 for this common case and abort here instead. This will remove one
721 step in debugging such problems. */
723 if (regno_save_mem[regno][1] == 0)
726 /* Get the pattern to emit and update our status.
728 See if we can save several registers with a single instruction.
729 Work backwards to the single register case. */
730 for (i = MOVE_MAX_WORDS; i > 0; i--)
734 if (regno_save_mem[regno][i] == 0)
737 for (j = 0; j < i; j++)
738 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
743 /* Must do this one save at a time */
751 mem = regno_save_mem [regno][numregs];
752 if (save_mode [regno] != VOIDmode
753 && save_mode [regno] != GET_MODE (mem)
754 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
755 mem = adjust_address (mem, save_mode[regno], 0);
756 pat = gen_rtx_SET (VOIDmode, mem,
757 gen_rtx_REG (GET_MODE (mem),
759 code = reg_save_code[regno][GET_MODE (mem)];
760 new = insert_one_insn (chain, before_p, code, pat);
762 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
763 for (k = 0; k < numregs; k++)
765 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
766 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
770 /* Tell our callers how many extra registers we saved/restored */
774 /* Emit a new caller-save insn and set the code. */
775 static struct insn_chain *
776 insert_one_insn (chain, before_p, code, pat)
777 struct insn_chain *chain;
782 rtx insn = chain->insn;
783 struct insn_chain *new;
786 /* If INSN references CC0, put our insns in front of the insn that sets
787 CC0. This is always safe, since the only way we could be passed an
788 insn that references CC0 is for a restore, and doing a restore earlier
789 isn't a problem. We do, however, assume here that CALL_INSNs don't
790 reference CC0. Guard against non-INSN's like CODE_LABEL. */
792 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
794 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
795 chain = chain->prev, insn = chain->insn;
798 new = new_insn_chain ();
803 new->prev = chain->prev;
805 new->prev->next = new;
807 reload_insn_chain = new;
811 new->insn = emit_insn_before (pat, insn);
812 /* ??? It would be nice if we could exclude the already / still saved
813 registers from the live sets. */
814 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
815 /* Registers that die in CHAIN->INSN still live in the new insn. */
816 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
818 if (REG_NOTE_KIND (link) == REG_DEAD)
820 rtx reg = XEXP (link, 0);
823 if (GET_CODE (reg) != REG)
827 if (regno >= FIRST_PSEUDO_REGISTER)
828 regno = reg_renumber[regno];
831 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
833 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
836 CLEAR_REG_SET (&new->dead_or_set);
837 if (chain->insn == BLOCK_HEAD (chain->block))
838 BLOCK_HEAD (chain->block) = new->insn;
842 new->next = chain->next;
844 new->next->prev = new;
847 new->insn = emit_insn_after (pat, insn);
848 /* ??? It would be nice if we could exclude the already / still saved
849 registers from the live sets, and observe REG_UNUSED notes. */
850 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
851 /* Registers that are set in CHAIN->INSN live in the new insn.
852 (Unless there is a REG_UNUSED note for them, but we don't
853 look for them here.) */
854 note_stores (PATTERN (chain->insn), add_stored_regs,
855 &new->live_throughout);
856 CLEAR_REG_SET (&new->dead_or_set);
857 if (chain->insn == BLOCK_END (chain->block))
858 BLOCK_END (chain->block) = new->insn;
860 new->block = chain->block;
861 new->is_caller_save_insn = 1;
863 INSN_CODE (new->insn) = code;