1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 #include "coretypes.h"
28 #include "insn-config.h"
30 #include "hard-reg-set.h"
32 #include "basic-block.h"
38 #include "addresses.h"
43 #define MAX_MOVE_MAX MOVE_MAX
46 #ifndef MIN_UNITS_PER_WORD
47 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
50 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
52 /* Modes for each hard register that we can save. The smallest mode is wide
53 enough to save the entire contents of the register. When saving the
54 register because it is live we first try to save in multi-register modes.
55 If that is not possible the save is done one register at a time. */
57 static enum machine_mode
58 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
60 /* For each hard register, a place on the stack where it can be saved,
64 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
66 /* We will only make a register eligible for caller-save if it can be
67 saved in its widest mode with a simple SET insn as long as the memory
68 address is valid. We record the INSN_CODE is those insns here since
69 when we emit them, the addresses might not be valid, so they might not
73 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
75 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
77 /* Set of hard regs currently residing in save area (during insn scan). */
79 static HARD_REG_SET hard_regs_saved;
81 /* Number of registers currently in hard_regs_saved. */
83 static int n_regs_saved;
85 /* Computed by mark_referenced_regs, all regs referenced in a given
87 static HARD_REG_SET referenced_regs;
90 static void mark_set_regs (rtx, rtx, void *);
91 static void mark_referenced_regs (rtx);
92 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
94 static int insert_restore (struct insn_chain *, int, int, int,
96 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
98 static void add_stored_regs (rtx, rtx, void *);
100 static GTY(()) rtx savepat;
101 static GTY(()) rtx restpat;
102 static GTY(()) rtx test_reg;
103 static GTY(()) rtx test_mem;
104 static GTY(()) rtx saveinsn;
105 static GTY(()) rtx restinsn;
107 /* Return the INSN_CODE used to save register REG in mode MODE. */
109 reg_save_code (int reg, enum machine_mode mode)
112 if (cached_reg_save_code[reg][mode])
113 return cached_reg_save_code[reg][mode];
114 if (!HARD_REGNO_MODE_OK (reg, mode))
116 cached_reg_save_code[reg][mode] = -1;
120 /* Update the register number and modes of the register
121 and memory operand. */
122 SET_REGNO (test_reg, reg);
123 PUT_MODE (test_reg, mode);
124 PUT_MODE (test_mem, mode);
126 /* Force re-recognition of the modified insns. */
127 INSN_CODE (saveinsn) = -1;
129 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
130 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
132 /* Now extract both insns and see if we can meet their
134 ok = (cached_reg_save_code[reg][mode] != -1
135 && cached_reg_restore_code[reg][mode] != -1);
138 extract_insn (saveinsn);
139 ok = constrain_operands (1);
140 extract_insn (restinsn);
141 ok &= constrain_operands (1);
146 cached_reg_save_code[reg][mode] = -1;
147 cached_reg_restore_code[reg][mode] = -1;
149 gcc_assert (cached_reg_save_code[reg][mode]);
150 return cached_reg_save_code[reg][mode];
153 /* Return the INSN_CODE used to restore register REG in mode MODE. */
155 reg_restore_code (int reg, enum machine_mode mode)
157 if (cached_reg_restore_code[reg][mode])
158 return cached_reg_restore_code[reg][mode];
159 /* Populate our cache. */
160 reg_save_code (reg, mode);
161 return cached_reg_restore_code[reg][mode];
164 /* Initialize for caller-save.
166 Look at all the hard registers that are used by a call and for which
167 regclass.c has not already excluded from being used across a call.
169 Ensure that we can find a mode to save the register and that there is a
170 simple insn to save and restore the register. This latter check avoids
171 problems that would occur if we tried to save the MQ register of some
172 machines directly into memory. */
175 init_caller_save (void)
182 /* First find all the registers that we need to deal with and all
183 the modes that they can have. If we can't find a mode to use,
184 we can't have the register live over calls. */
186 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
188 if (call_used_regs[i] && ! call_fixed_regs[i])
190 for (j = 1; j <= MOVE_MAX_WORDS; j++)
192 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
194 if (regno_save_mode[i][j] == VOIDmode && j == 1)
196 call_fixed_regs[i] = 1;
197 SET_HARD_REG_BIT (call_fixed_reg_set, i);
202 regno_save_mode[i][1] = VOIDmode;
205 /* The following code tries to approximate the conditions under which
206 we can easily save and restore a register without scratch registers or
207 other complexities. It will usually work, except under conditions where
208 the validity of an insn operand is dependent on the address offset.
209 No such cases are currently known.
211 We first find a typical offset from some BASE_REG_CLASS register.
212 This address is chosen by finding the first register in the class
213 and by finding the smallest power of two that is a valid offset from
214 that register in every mode we will use to save registers. */
216 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
217 if (TEST_HARD_REG_BIT
219 [(int) base_reg_class (regno_save_mode [i][1], PLUS, CONST_INT)], i))
222 gcc_assert (i < FIRST_PSEUDO_REGISTER);
224 addr_reg = gen_rtx_REG (Pmode, i);
226 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
228 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
230 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
231 if (regno_save_mode[i][1] != VOIDmode
232 && ! strict_memory_address_p (regno_save_mode[i][1], address))
235 if (i == FIRST_PSEUDO_REGISTER)
239 /* If we didn't find a valid address, we must use register indirect. */
243 /* Next we try to form an insn to save and restore the register. We
244 see if such an insn is recognized and meets its constraints.
246 To avoid lots of unnecessary RTL allocation, we construct all the RTL
247 once, then modify the memory and register operands in-place. */
249 test_reg = gen_rtx_REG (VOIDmode, 0);
250 test_mem = gen_rtx_MEM (VOIDmode, address);
251 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
252 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
254 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
255 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
257 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
258 for (j = 1; j <= MOVE_MAX_WORDS; j++)
259 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
261 regno_save_mode[i][j] = VOIDmode;
264 call_fixed_regs[i] = 1;
265 SET_HARD_REG_BIT (call_fixed_reg_set, i);
270 /* Initialize save areas by showing that we haven't allocated any yet. */
273 init_save_areas (void)
277 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
278 for (j = 1; j <= MOVE_MAX_WORDS; j++)
279 regno_save_mem[i][j] = 0;
282 /* Allocate save areas for any hard registers that might need saving.
283 We take a conservative approach here and look for call-clobbered hard
284 registers that are assigned to pseudos that cross calls. This may
285 overestimate slightly (especially if some of these registers are later
286 used as spill registers), but it should not be significant.
290 In the fallback case we should iterate backwards across all possible
291 modes for the save, choosing the largest available one instead of
292 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
294 We do not try to use "move multiple" instructions that exist
295 on some machines (such as the 68k moveml). It could be a win to try
296 and use them when possible. The hard part is doing it in a way that is
297 machine independent since they might be saving non-consecutive
298 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
301 setup_save_areas (void)
305 HARD_REG_SET hard_regs_used;
307 /* Allocate space in the save area for the largest multi-register
308 pseudos first, then work backwards to single register
311 /* Find and record all call-used hard-registers in this function. */
312 CLEAR_HARD_REG_SET (hard_regs_used);
313 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
314 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
316 unsigned int regno = reg_renumber[i];
317 unsigned int endregno
318 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
320 for (r = regno; r < endregno; r++)
321 if (call_used_regs[r])
322 SET_HARD_REG_BIT (hard_regs_used, r);
325 /* Now run through all the call-used hard-registers and allocate
326 space for them in the caller-save area. Try to allocate space
327 in a manner which allows multi-register saves/restores to be done. */
329 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
330 for (j = MOVE_MAX_WORDS; j > 0; j--)
334 /* If no mode exists for this size, try another. Also break out
335 if we have already saved this hard register. */
336 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
339 /* See if any register in this group has been saved. */
340 for (k = 0; k < j; k++)
341 if (regno_save_mem[i + k][1])
349 for (k = 0; k < j; k++)
350 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
358 /* We have found an acceptable mode to store in. */
360 = assign_stack_local (regno_save_mode[i][j],
361 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
363 /* Setup single word save area just in case... */
364 for (k = 0; k < j; k++)
365 /* This should not depend on WORDS_BIG_ENDIAN.
366 The order of words in regs is the same as in memory. */
367 regno_save_mem[i + k][1]
368 = adjust_address_nv (regno_save_mem[i][j],
369 regno_save_mode[i + k][1],
373 /* Now loop again and set the alias set of any save areas we made to
374 the alias set used to represent frame objects. */
375 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
376 for (j = MOVE_MAX_WORDS; j > 0; j--)
377 if (regno_save_mem[i][j] != 0)
378 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
381 /* Find the places where hard regs are live across calls and save them. */
384 save_call_clobbered_regs (void)
386 struct insn_chain *chain, *next;
387 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
389 /* Computed in mark_set_regs, holds all registers set by the current
391 HARD_REG_SET this_insn_sets;
393 CLEAR_HARD_REG_SET (hard_regs_saved);
396 for (chain = reload_insn_chain; chain != 0; chain = next)
398 rtx insn = chain->insn;
399 enum rtx_code code = GET_CODE (insn);
403 gcc_assert (!chain->is_caller_save_insn);
407 /* If some registers have been saved, see if INSN references
408 any of them. We must restore them before the insn if so. */
414 if (code == JUMP_INSN)
415 /* Restore all registers if this is a JUMP_INSN. */
416 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
419 CLEAR_HARD_REG_SET (referenced_regs);
420 mark_referenced_regs (PATTERN (insn));
421 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
424 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
425 if (TEST_HARD_REG_BIT (referenced_regs, regno))
426 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
429 if (code == CALL_INSN
430 && ! SIBLING_CALL_P (insn)
431 && ! find_reg_note (insn, REG_NORETURN, NULL))
434 HARD_REG_SET hard_regs_to_save;
435 reg_set_iterator rsi;
437 /* Use the register life information in CHAIN to compute which
438 regs are live during the call. */
439 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
440 &chain->live_throughout);
441 /* Save hard registers always in the widest mode available. */
442 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
443 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
444 save_mode [regno] = regno_save_mode [regno][1];
446 save_mode [regno] = VOIDmode;
448 /* Look through all live pseudos, mark their hard registers
449 and choose proper mode for saving. */
450 EXECUTE_IF_SET_IN_REG_SET
451 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
453 int r = reg_renumber[regno];
455 enum machine_mode mode;
458 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
459 mode = HARD_REGNO_CALLER_SAVE_MODE
460 (r, nregs, PSEUDO_REGNO_MODE (regno));
461 if (GET_MODE_BITSIZE (mode)
462 > GET_MODE_BITSIZE (save_mode[r]))
465 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
468 /* Record all registers set in this call insn. These don't need
469 to be saved. N.B. the call insn might set a subreg of a
470 multi-hard-reg pseudo; then the pseudo is considered live
471 during the call, but the subreg that is set isn't. */
472 CLEAR_HARD_REG_SET (this_insn_sets);
473 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
475 /* Compute which hard regs must be saved before this call. */
476 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
477 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
478 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
479 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
481 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
482 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
483 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
485 /* Must recompute n_regs_saved. */
487 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
488 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
493 if (chain->next == 0 || chain->next->block > chain->block)
496 /* At the end of the basic block, we must restore any registers that
497 remain saved. If the last insn in the block is a JUMP_INSN, put
498 the restore before the insn, otherwise, put it after the insn. */
501 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
502 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
503 regno += insert_restore (chain, JUMP_P (insn),
504 regno, MOVE_MAX_WORDS, save_mode);
509 /* Here from note_stores, or directly from save_call_clobbered_regs, when
510 an insn stores a value in a register.
511 Set the proper bit or bits in this_insn_sets. All pseudos that have
512 been assigned hard regs have had their register number changed already,
513 so we can ignore pseudos. */
515 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *data)
517 int regno, endregno, i;
518 HARD_REG_SET *this_insn_sets = data;
520 if (GET_CODE (reg) == SUBREG)
522 rtx inner = SUBREG_REG (reg);
523 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
525 regno = subreg_regno (reg);
526 endregno = regno + subreg_nregs (reg);
529 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
532 endregno = END_HARD_REGNO (reg);
537 for (i = regno; i < endregno; i++)
538 SET_HARD_REG_BIT (*this_insn_sets, i);
541 /* Here from note_stores when an insn stores a value in a register.
542 Set the proper bit or bits in the passed regset. All pseudos that have
543 been assigned hard regs have had their register number changed already,
544 so we can ignore pseudos. */
546 add_stored_regs (rtx reg, rtx setter, void *data)
548 int regno, endregno, i;
549 enum machine_mode mode = GET_MODE (reg);
552 if (GET_CODE (setter) == CLOBBER)
555 if (GET_CODE (reg) == SUBREG
556 && REG_P (SUBREG_REG (reg))
557 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
559 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
560 GET_MODE (SUBREG_REG (reg)),
563 regno = REGNO (SUBREG_REG (reg)) + offset;
564 endregno = regno + subreg_nregs (reg);
568 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
571 regno = REGNO (reg) + offset;
572 endregno = end_hard_regno (mode, regno);
575 for (i = regno; i < endregno; i++)
576 SET_REGNO_REG_SET ((regset) data, i);
579 /* Walk X and record all referenced registers in REFERENCED_REGS. */
581 mark_referenced_regs (rtx x)
583 enum rtx_code code = GET_CODE (x);
588 mark_referenced_regs (SET_SRC (x));
589 if (code == SET || code == CLOBBER)
593 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
594 || code == PC || code == CC0
595 || (code == SUBREG && REG_P (SUBREG_REG (x))
596 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
597 /* If we're setting only part of a multi-word register,
598 we shall mark it as referenced, because the words
599 that are not being set should be restored. */
600 && ((GET_MODE_SIZE (GET_MODE (x))
601 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
602 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
603 <= UNITS_PER_WORD))))
606 if (code == MEM || code == SUBREG)
614 int regno = REGNO (x);
615 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
616 : reg_renumber[regno]);
619 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
620 /* If this is a pseudo that did not get a hard register, scan its
621 memory location, since it might involve the use of another
622 register, which might be saved. */
623 else if (reg_equiv_mem[regno] != 0)
624 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
625 else if (reg_equiv_address[regno] != 0)
626 mark_referenced_regs (reg_equiv_address[regno]);
630 fmt = GET_RTX_FORMAT (code);
631 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
634 mark_referenced_regs (XEXP (x, i));
635 else if (fmt[i] == 'E')
636 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
637 mark_referenced_regs (XVECEXP (x, i, j));
641 /* Insert a sequence of insns to restore. Place these insns in front of
642 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
643 the maximum number of registers which should be restored during this call.
644 It should never be less than 1 since we only work with entire registers.
646 Note that we have verified in init_caller_save that we can do this
647 with a simple SET, so use it. Set INSN_CODE to what we save there
648 since the address might not be valid so the insn might not be recognized.
649 These insns will be reloaded and have register elimination done by
650 find_reload, so we need not worry about that here.
652 Return the extra number of registers saved. */
655 insert_restore (struct insn_chain *chain, int before_p, int regno,
656 int maxrestore, enum machine_mode *save_mode)
661 unsigned int numregs = 0;
662 struct insn_chain *new;
665 /* A common failure mode if register status is not correct in the
666 RTL is for this routine to be called with a REGNO we didn't
667 expect to save. That will cause us to write an insn with a (nil)
668 SET_DEST or SET_SRC. Instead of doing so and causing a crash
669 later, check for this common case here instead. This will remove
670 one step in debugging such problems. */
671 gcc_assert (regno_save_mem[regno][1]);
673 /* Get the pattern to emit and update our status.
675 See if we can restore `maxrestore' registers at once. Work
676 backwards to the single register case. */
677 for (i = maxrestore; i > 0; i--)
682 if (regno_save_mem[regno][i] == 0)
685 for (j = 0; j < i; j++)
686 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
691 /* Must do this one restore at a time. */
699 mem = regno_save_mem [regno][numregs];
700 if (save_mode [regno] != VOIDmode
701 && save_mode [regno] != GET_MODE (mem)
702 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
703 mem = adjust_address (mem, save_mode[regno], 0);
705 mem = copy_rtx (mem);
706 pat = gen_rtx_SET (VOIDmode,
707 gen_rtx_REG (GET_MODE (mem),
709 code = reg_restore_code (regno, GET_MODE (mem));
710 new = insert_one_insn (chain, before_p, code, pat);
712 /* Clear status for all registers we restored. */
713 for (k = 0; k < i; k++)
715 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
716 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
720 /* Tell our callers how many extra registers we saved/restored. */
724 /* Like insert_restore above, but save registers instead. */
727 insert_save (struct insn_chain *chain, int before_p, int regno,
728 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
734 unsigned int numregs = 0;
735 struct insn_chain *new;
738 /* A common failure mode if register status is not correct in the
739 RTL is for this routine to be called with a REGNO we didn't
740 expect to save. That will cause us to write an insn with a (nil)
741 SET_DEST or SET_SRC. Instead of doing so and causing a crash
742 later, check for this common case here. This will remove one
743 step in debugging such problems. */
744 gcc_assert (regno_save_mem[regno][1]);
746 /* Get the pattern to emit and update our status.
748 See if we can save several registers with a single instruction.
749 Work backwards to the single register case. */
750 for (i = MOVE_MAX_WORDS; i > 0; i--)
754 if (regno_save_mem[regno][i] == 0)
757 for (j = 0; j < i; j++)
758 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
763 /* Must do this one save at a time. */
771 mem = regno_save_mem [regno][numregs];
772 if (save_mode [regno] != VOIDmode
773 && save_mode [regno] != GET_MODE (mem)
774 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
775 mem = adjust_address (mem, save_mode[regno], 0);
777 mem = copy_rtx (mem);
778 pat = gen_rtx_SET (VOIDmode, mem,
779 gen_rtx_REG (GET_MODE (mem),
781 code = reg_save_code (regno, GET_MODE (mem));
782 new = insert_one_insn (chain, before_p, code, pat);
784 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
785 for (k = 0; k < numregs; k++)
787 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
788 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
792 /* Tell our callers how many extra registers we saved/restored. */
796 /* Emit a new caller-save insn and set the code. */
797 static struct insn_chain *
798 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
800 rtx insn = chain->insn;
801 struct insn_chain *new;
804 /* If INSN references CC0, put our insns in front of the insn that sets
805 CC0. This is always safe, since the only way we could be passed an
806 insn that references CC0 is for a restore, and doing a restore earlier
807 isn't a problem. We do, however, assume here that CALL_INSNs don't
808 reference CC0. Guard against non-INSN's like CODE_LABEL. */
810 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
812 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
813 chain = chain->prev, insn = chain->insn;
816 new = new_insn_chain ();
821 new->prev = chain->prev;
823 new->prev->next = new;
825 reload_insn_chain = new;
829 new->insn = emit_insn_before (pat, insn);
830 /* ??? It would be nice if we could exclude the already / still saved
831 registers from the live sets. */
832 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
833 /* Registers that die in CHAIN->INSN still live in the new insn. */
834 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
836 if (REG_NOTE_KIND (link) == REG_DEAD)
838 rtx reg = XEXP (link, 0);
841 gcc_assert (REG_P (reg));
843 if (regno >= FIRST_PSEUDO_REGISTER)
844 regno = reg_renumber[regno];
847 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
849 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
852 CLEAR_REG_SET (&new->dead_or_set);
853 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
854 BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
858 new->next = chain->next;
860 new->next->prev = new;
863 new->insn = emit_insn_after (pat, insn);
864 /* ??? It would be nice if we could exclude the already / still saved
865 registers from the live sets, and observe REG_UNUSED notes. */
866 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
867 /* Registers that are set in CHAIN->INSN live in the new insn.
868 (Unless there is a REG_UNUSED note for them, but we don't
869 look for them here.) */
870 note_stores (PATTERN (chain->insn), add_stored_regs,
871 &new->live_throughout);
872 CLEAR_REG_SET (&new->dead_or_set);
873 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
874 BB_END (BASIC_BLOCK (chain->block)) = new->insn;
876 new->block = chain->block;
877 new->is_caller_save_insn = 1;
879 INSN_CODE (new->insn) = code;
882 #include "gt-caller-save.h"