1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
25 #include "insn-config.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
38 #define MAX_MOVE_MAX MOVE_MAX
41 #ifndef MIN_UNITS_PER_WORD
42 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
45 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
47 /* Modes for each hard register that we can save. The smallest mode is wide
48 enough to save the entire contents of the register. When saving the
49 register because it is live we first try to save in multi-register modes.
50 If that is not possible the save is done one register at a time. */
52 static enum machine_mode
53 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* For each hard register, a place on the stack where it can be saved,
59 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
68 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
70 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
82 static HARD_REG_SET referenced_regs;
84 /* Computed in mark_set_regs, holds all registers set by the current
86 static HARD_REG_SET this_insn_sets;
89 static void mark_set_regs PARAMS ((rtx, rtx, void *));
90 static void mark_referenced_regs PARAMS ((rtx));
91 static int insert_save PARAMS ((struct insn_chain *, int, int,
93 enum machine_mode *));
94 static int insert_restore PARAMS ((struct insn_chain *, int, int,
95 int, enum machine_mode *));
96 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
97 enum insn_code, rtx));
98 static void add_stored_regs PARAMS ((rtx, rtx, void *));
100 /* Initialize for caller-save.
102 Look at all the hard registers that are used by a call and for which
103 regclass.c has not already excluded from being used across a call.
105 Ensure that we can find a mode to save the register and that there is a
106 simple insn to save and restore the register. This latter check avoids
107 problems that would occur if we tried to save the MQ register of some
108 machines directly into memory. */
117 enum machine_mode mode;
119 /* First find all the registers that we need to deal with and all
120 the modes that they can have. If we can't find a mode to use,
121 we can't have the register live over calls. */
123 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
125 if (call_used_regs[i] && ! call_fixed_regs[i])
127 for (j = 1; j <= MOVE_MAX_WORDS; j++)
129 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
131 if (regno_save_mode[i][j] == VOIDmode && j == 1)
133 call_fixed_regs[i] = 1;
134 SET_HARD_REG_BIT (call_fixed_reg_set, i);
139 regno_save_mode[i][1] = VOIDmode;
142 /* The following code tries to approximate the conditions under which
143 we can easily save and restore a register without scratch registers or
144 other complexities. It will usually work, except under conditions where
145 the validity of an insn operand is dependent on the address offset.
146 No such cases are currently known.
148 We first find a typical offset from some BASE_REG_CLASS register.
149 This address is chosen by finding the first register in the class
150 and by finding the smallest power of two that is a valid offset from
151 that register in every mode we will use to save registers. */
153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
154 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
157 if (i == FIRST_PSEUDO_REGISTER)
160 addr_reg = gen_rtx_REG (Pmode, i);
162 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
164 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
166 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
167 if (regno_save_mode[i][1] != VOIDmode
168 && ! strict_memory_address_p (regno_save_mode[i][1], address))
171 if (i == FIRST_PSEUDO_REGISTER)
175 /* If we didn't find a valid address, we must use register indirect. */
179 /* Next we try to form an insn to save and restore the register. We
180 see if such an insn is recognized and meets its constraints. */
184 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
185 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
186 if (HARD_REGNO_MODE_OK (i, mode))
188 rtx mem = gen_rtx_MEM (mode, address);
189 rtx reg = gen_rtx_REG (mode, i);
190 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
191 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
192 rtx saveinsn = emit_insn (savepat);
193 rtx restinsn = emit_insn (restpat);
196 reg_save_code[i][mode] = recog_memoized (saveinsn);
197 reg_restore_code[i][mode] = recog_memoized (restinsn);
199 /* Now extract both insns and see if we can meet their
201 ok = (reg_save_code[i][mode] != (enum insn_code)-1
202 && reg_restore_code[i][mode] != (enum insn_code)-1);
205 extract_insn (saveinsn);
206 ok = constrain_operands (1);
207 extract_insn (restinsn);
208 ok &= constrain_operands (1);
213 reg_save_code[i][mode] = (enum insn_code) -1;
214 reg_restore_code[i][mode] = (enum insn_code) -1;
219 reg_save_code[i][mode] = (enum insn_code) -1;
220 reg_restore_code[i][mode] = (enum insn_code) -1;
222 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
223 for (j = 1; j <= MOVE_MAX_WORDS; j++)
224 if (reg_save_code [i][regno_save_mode[i][j]] == (enum insn_code) -1)
226 regno_save_mode[i][j] = VOIDmode;
229 call_fixed_regs[i] = 1;
230 SET_HARD_REG_BIT (call_fixed_reg_set, i);
237 /* Initialize save areas by showing that we haven't allocated any yet. */
244 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
245 for (j = 1; j <= MOVE_MAX_WORDS; j++)
246 regno_save_mem[i][j] = 0;
249 /* Allocate save areas for any hard registers that might need saving.
250 We take a conservative approach here and look for call-clobbered hard
251 registers that are assigned to pseudos that cross calls. This may
252 overestimate slightly (especially if some of these registers are later
253 used as spill registers), but it should not be significant.
257 In the fallback case we should iterate backwards across all possible
258 modes for the save, choosing the largest available one instead of
259 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
261 We do not try to use "move multiple" instructions that exist
262 on some machines (such as the 68k moveml). It could be a win to try
263 and use them when possible. The hard part is doing it in a way that is
264 machine independent since they might be saving non-consecutive
265 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
272 HARD_REG_SET hard_regs_used;
274 /* Allocate space in the save area for the largest multi-register
275 pseudos first, then work backwards to single register
278 /* Find and record all call-used hard-registers in this function. */
279 CLEAR_HARD_REG_SET (hard_regs_used);
280 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
281 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
283 unsigned int regno = reg_renumber[i];
284 unsigned int endregno
285 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
287 for (r = regno; r < endregno; r++)
288 if (call_used_regs[r])
289 SET_HARD_REG_BIT (hard_regs_used, r);
292 /* Now run through all the call-used hard-registers and allocate
293 space for them in the caller-save area. Try to allocate space
294 in a manner which allows multi-register saves/restores to be done. */
296 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
297 for (j = MOVE_MAX_WORDS; j > 0; j--)
301 /* If no mode exists for this size, try another. Also break out
302 if we have already saved this hard register. */
303 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
306 /* See if any register in this group has been saved. */
307 for (k = 0; k < j; k++)
308 if (regno_save_mem[i + k][1])
316 for (k = 0; k < j; k++)
317 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
325 /* We have found an acceptable mode to store in. */
327 = assign_stack_local (regno_save_mode[i][j],
328 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
330 /* Setup single word save area just in case... */
331 for (k = 0; k < j; k++)
332 /* This should not depend on WORDS_BIG_ENDIAN.
333 The order of words in regs is the same as in memory. */
334 regno_save_mem[i + k][1]
335 = adjust_address (regno_save_mem[i][j], regno_save_mode[i + k][1],
339 /* Now loop again and set the alias set of any save areas we made to
340 the alias set used to represent frame objects. */
341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
342 for (j = MOVE_MAX_WORDS; j > 0; j--)
343 if (regno_save_mem[i][j] != 0)
344 MEM_ALIAS_SET (regno_save_mem[i][j]) = get_frame_alias_set ();
347 /* Find the places where hard regs are live across calls and save them. */
350 save_call_clobbered_regs ()
352 struct insn_chain *chain, *next;
353 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
355 CLEAR_HARD_REG_SET (hard_regs_saved);
358 for (chain = reload_insn_chain; chain != 0; chain = next)
360 rtx insn = chain->insn;
361 enum rtx_code code = GET_CODE (insn);
365 if (chain->is_caller_save_insn)
368 if (GET_RTX_CLASS (code) == 'i')
370 /* If some registers have been saved, see if INSN references
371 any of them. We must restore them before the insn if so. */
377 if (code == JUMP_INSN)
378 /* Restore all registers if this is a JUMP_INSN. */
379 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
382 CLEAR_HARD_REG_SET (referenced_regs);
383 mark_referenced_regs (PATTERN (insn));
384 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
387 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
388 if (TEST_HARD_REG_BIT (referenced_regs, regno))
389 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
392 if (code == CALL_INSN)
395 HARD_REG_SET hard_regs_to_save;
397 /* Use the register life information in CHAIN to compute which
398 regs are live during the call. */
399 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
400 &chain->live_throughout);
401 /* Save hard registers always in the widest mode availble. */
402 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
403 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
404 save_mode [regno] = regno_save_mode [regno][1];
406 save_mode [regno] = VOIDmode;
408 /* Look trought all live pseudos, mark their hard registers
409 and choose proper mode for saving. */
410 EXECUTE_IF_SET_IN_REG_SET
411 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
413 int r = reg_renumber[regno];
418 enum machine_mode mode;
420 nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (regno));
421 mode = HARD_REGNO_CALLER_SAVE_MODE
422 (r, nregs, PSEUDO_REGNO_MODE (regno));
423 if (GET_MODE_BITSIZE (mode)
424 > GET_MODE_BITSIZE (save_mode[r]))
427 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
433 /* Record all registers set in this call insn. These don't need
434 to be saved. N.B. the call insn might set a subreg of a
435 multi-hard-reg pseudo; then the pseudo is considered live
436 during the call, but the subreg that is set isn't. */
437 CLEAR_HARD_REG_SET (this_insn_sets);
438 note_stores (PATTERN (insn), mark_set_regs, NULL);
440 /* Compute which hard regs must be saved before this call. */
441 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
442 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
443 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
444 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
446 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
447 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
448 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
450 /* Must recompute n_regs_saved. */
452 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
453 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
458 if (chain->next == 0 || chain->next->block > chain->block)
461 /* At the end of the basic block, we must restore any registers that
462 remain saved. If the last insn in the block is a JUMP_INSN, put
463 the restore before the insn, otherwise, put it after the insn. */
466 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
467 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
468 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
469 regno, MOVE_MAX_WORDS, save_mode);
474 /* Here from note_stores when an insn stores a value in a register.
475 Set the proper bit or bits in this_insn_sets. All pseudos that have
476 been assigned hard regs have had their register number changed already,
477 so we can ignore pseudos. */
479 mark_set_regs (reg, setter, data)
481 rtx setter ATTRIBUTE_UNUSED;
482 void *data ATTRIBUTE_UNUSED;
484 register int regno, endregno, i;
485 enum machine_mode mode = GET_MODE (reg);
487 if (GET_CODE (reg) == SUBREG)
489 rtx inner = SUBREG_REG (reg);
490 if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
493 regno = subreg_hard_regno (reg, 1);
495 else if (GET_CODE (reg) == REG
496 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
501 endregno = regno + HARD_REGNO_NREGS (regno, mode);
503 for (i = regno; i < endregno; i++)
504 SET_HARD_REG_BIT (this_insn_sets, i);
507 /* Here from note_stores when an insn stores a value in a register.
508 Set the proper bit or bits in the passed regset. All pseudos that have
509 been assigned hard regs have had their register number changed already,
510 so we can ignore pseudos. */
512 add_stored_regs (reg, setter, data)
517 register int regno, endregno, i;
518 enum machine_mode mode = GET_MODE (reg);
521 if (GET_CODE (setter) == CLOBBER)
524 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
526 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
527 GET_MODE (SUBREG_REG (reg)),
530 reg = SUBREG_REG (reg);
533 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
536 regno = REGNO (reg) + offset;
537 endregno = regno + HARD_REGNO_NREGS (regno, mode);
539 for (i = regno; i < endregno; i++)
540 SET_REGNO_REG_SET ((regset) data, i);
543 /* Walk X and record all referenced registers in REFERENCED_REGS. */
545 mark_referenced_regs (x)
548 enum rtx_code code = GET_CODE (x);
553 mark_referenced_regs (SET_SRC (x));
554 if (code == SET || code == CLOBBER)
558 if (code == REG || code == PC || code == CC0
559 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
560 /* If we're setting only part of a multi-word register,
561 we shall mark it as referenced, because the words
562 that are not being set should be restored. */
563 && ((GET_MODE_SIZE (GET_MODE (x))
564 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
565 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
566 <= UNITS_PER_WORD))))
569 if (code == MEM || code == SUBREG)
577 int regno = REGNO (x);
578 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
579 : reg_renumber[regno]);
583 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
585 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
587 /* If this is a pseudo that did not get a hard register, scan its
588 memory location, since it might involve the use of another
589 register, which might be saved. */
590 else if (reg_equiv_mem[regno] != 0)
591 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
592 else if (reg_equiv_address[regno] != 0)
593 mark_referenced_regs (reg_equiv_address[regno]);
597 fmt = GET_RTX_FORMAT (code);
598 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
601 mark_referenced_regs (XEXP (x, i));
602 else if (fmt[i] == 'E')
603 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
604 mark_referenced_regs (XVECEXP (x, i, j));
608 /* Insert a sequence of insns to restore. Place these insns in front of
609 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
610 the maximum number of registers which should be restored during this call.
611 It should never be less than 1 since we only work with entire registers.
613 Note that we have verified in init_caller_save that we can do this
614 with a simple SET, so use it. Set INSN_CODE to what we save there
615 since the address might not be valid so the insn might not be recognized.
616 These insns will be reloaded and have register elimination done by
617 find_reload, so we need not worry about that here.
619 Return the extra number of registers saved. */
622 insert_restore (chain, before_p, regno, maxrestore, save_mode)
623 struct insn_chain *chain;
627 enum machine_mode *save_mode;
631 enum insn_code code = CODE_FOR_nothing;
632 unsigned int numregs = 0;
633 struct insn_chain *new;
636 /* A common failure mode if register status is not correct in the RTL
637 is for this routine to be called with a REGNO we didn't expect to
638 save. That will cause us to write an insn with a (nil) SET_DEST
639 or SET_SRC. Instead of doing so and causing a crash later, check
640 for this common case and abort here instead. This will remove one
641 step in debugging such problems. */
643 if (regno_save_mem[regno][1] == 0)
646 /* Get the pattern to emit and update our status.
648 See if we can restore `maxrestore' registers at once. Work
649 backwards to the single register case. */
650 for (i = maxrestore; i > 0; i--)
655 if (regno_save_mem[regno][i] == 0)
658 for (j = 0; j < i; j++)
659 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
664 /* Must do this one restore at a time */
672 mem = regno_save_mem [regno][numregs];
673 if (save_mode [regno] != VOIDmode
674 && save_mode [regno] != GET_MODE (mem)
675 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
676 mem = adjust_address (mem, save_mode[regno], 0);
677 pat = gen_rtx_SET (VOIDmode,
678 gen_rtx_REG (GET_MODE (mem),
680 code = reg_restore_code[regno][GET_MODE (mem)];
681 new = insert_one_insn (chain, before_p, code, pat);
683 /* Clear status for all registers we restored. */
684 for (k = 0; k < i; k++)
686 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
687 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
693 /* Tell our callers how many extra registers we saved/restored */
697 /* Like insert_restore above, but save registers instead. */
699 insert_save (chain, before_p, regno, to_save, save_mode)
700 struct insn_chain *chain;
703 HARD_REG_SET *to_save;
704 enum machine_mode *save_mode;
709 enum insn_code code = CODE_FOR_nothing;
710 unsigned int numregs = 0;
711 struct insn_chain *new;
714 /* A common failure mode if register status is not correct in the RTL
715 is for this routine to be called with a REGNO we didn't expect to
716 save. That will cause us to write an insn with a (nil) SET_DEST
717 or SET_SRC. Instead of doing so and causing a crash later, check
718 for this common case and abort here instead. This will remove one
719 step in debugging such problems. */
721 if (regno_save_mem[regno][1] == 0)
724 /* Get the pattern to emit and update our status.
726 See if we can save several registers with a single instruction.
727 Work backwards to the single register case. */
728 for (i = MOVE_MAX_WORDS; i > 0; i--)
732 if (regno_save_mem[regno][i] == 0)
735 for (j = 0; j < i; j++)
736 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
741 /* Must do this one save at a time */
749 mem = regno_save_mem [regno][numregs];
750 if (save_mode [regno] != VOIDmode
751 && save_mode [regno] != GET_MODE (mem)
752 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
753 mem = adjust_address (mem, save_mode[regno], 0);
754 pat = gen_rtx_SET (VOIDmode, mem,
755 gen_rtx_REG (GET_MODE (mem),
757 code = reg_save_code[regno][GET_MODE (mem)];
758 new = insert_one_insn (chain, before_p, code, pat);
760 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
761 for (k = 0; k < numregs; k++)
763 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
764 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
768 /* Tell our callers how many extra registers we saved/restored */
772 /* Emit a new caller-save insn and set the code. */
773 static struct insn_chain *
774 insert_one_insn (chain, before_p, code, pat)
775 struct insn_chain *chain;
780 rtx insn = chain->insn;
781 struct insn_chain *new;
784 /* If INSN references CC0, put our insns in front of the insn that sets
785 CC0. This is always safe, since the only way we could be passed an
786 insn that references CC0 is for a restore, and doing a restore earlier
787 isn't a problem. We do, however, assume here that CALL_INSNs don't
788 reference CC0. Guard against non-INSN's like CODE_LABEL. */
790 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
792 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
793 chain = chain->prev, insn = chain->insn;
796 new = new_insn_chain ();
801 new->prev = chain->prev;
803 new->prev->next = new;
805 reload_insn_chain = new;
809 new->insn = emit_insn_before (pat, insn);
810 /* ??? It would be nice if we could exclude the already / still saved
811 registers from the live sets. */
812 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
813 /* Registers that die in CHAIN->INSN still live in the new insn. */
814 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
816 if (REG_NOTE_KIND (link) == REG_DEAD)
818 rtx reg = XEXP (link, 0);
821 if (GET_CODE (reg) != REG)
825 if (regno >= FIRST_PSEUDO_REGISTER)
826 regno = reg_renumber[regno];
829 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
831 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
834 CLEAR_REG_SET (&new->dead_or_set);
835 if (chain->insn == BLOCK_HEAD (chain->block))
836 BLOCK_HEAD (chain->block) = new->insn;
840 new->next = chain->next;
842 new->next->prev = new;
845 new->insn = emit_insn_after (pat, insn);
846 /* ??? It would be nice if we could exclude the already / still saved
847 registers from the live sets, and observe REG_UNUSED notes. */
848 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
849 /* Registers that are set in CHAIN->INSN live in the new insn.
850 (Unless there is a REG_UNUSED note for them, but we don't
851 look for them here.) */
852 note_stores (PATTERN (chain->insn), add_stored_regs,
853 &new->live_throughout);
854 CLEAR_REG_SET (&new->dead_or_set);
855 if (chain->insn == BLOCK_END (chain->block))
856 BLOCK_END (chain->block) = new->insn;
858 new->block = chain->block;
859 new->is_caller_save_insn = 1;
861 INSN_CODE (new->insn) = code;