1 2006-08-24 Bob Wilson <bob.wilson@acm.org>
3 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
4 (INIT_LITERAL_SECTION_NAME): Delete.
5 (lit_state struct): Remove segment names, init_lit_seg, and
6 fini_lit_seg. Add lit_prefix and current_text_seg.
7 (init_literal_head_h, init_literal_head): Delete.
8 (fini_literal_head_h, fini_literal_head): Delete.
9 (xtensa_begin_directive): Move argument parsing to
10 xtensa_literal_prefix function.
11 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
12 (xtensa_literal_prefix): Parse the directive argument here and
13 record it in the lit_prefix field. Remove code to derive literal
16 (get_is_linkonce_section): Use linkonce_len. Check for any
17 ".gnu.linkonce.*" section, not just text sections.
18 (md_begin): Remove initialization of deleted lit_state fields.
19 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
20 to init_literal_head and fini_literal_head.
21 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
22 when traversing literal_head list.
23 (match_section_group): New.
24 (cache_literal_section): Rewrite to determine the literal section
25 name on the fly, create the section and return it.
26 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
27 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
28 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
29 Use xtensa_get_property_section from bfd.
30 (retrieve_xtensa_section): Delete.
31 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
32 description to refer to plural literal sections and add xref to
33 the Literal Directive section.
34 (Literal Directive): Describe new rules for deriving literal section
35 names. Add footnote for special case of .init/.fini with
36 --text-section-literals.
37 (Literal Prefix Directive): Replace old naming rules with xref to the
38 Literal Directive section.
40 2006-08-21 Joseph Myers <joseph@codesourcery.com>
42 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
43 merging with previous long opcode.
45 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
47 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
48 * Makefile.in: Regenerate.
49 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
52 2006-08-16 Julian Brown <julian@codesourcery.com>
54 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
55 to use ARM instructions on non-ARM-supporting cores.
56 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
57 mode automatically based on cpu variant.
58 (md_begin): Call above function.
60 2006-08-16 Julian Brown <julian@codesourcery.com>
62 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
63 recognized in non-unified syntax mode.
65 2006-08-15 Thiemo Seufer <ths@mips.com>
66 Nigel Stephens <nigel@mips.com>
67 David Ung <davidu@mips.com>
69 * configure.tgt: Handle mips*-sde-elf*.
71 2006-08-12 Thiemo Seufer <ths@networkno.de>
73 * config/tc-mips.c (mips16_ip): Fix argument register handling
74 for restore instruction.
76 2006-08-08 Bob Wilson <bob.wilson@acm.org>
78 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
80 (out_fixed_inc_line_addr): New.
81 (process_entries): Use out_fixed_inc_line_addr when
82 DWARF2_USE_FIXED_ADVANCE_PC is set.
83 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
85 2006-08-08 DJ Delorie <dj@redhat.com>
87 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
88 vs full symbols so that we never have more than one pointer value
89 for any given symbol in our symbol table.
91 2006-08-08 Sterling Augustine <sterling@tensilica.com>
93 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
94 and emit DW_AT_ranges when code in compilation unit is not
96 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
98 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
99 (out_debug_ranges): New function to emit .debug_ranges section
100 when code is not contiguous.
102 2006-08-08 Nick Clifton <nickc@redhat.com>
104 * config/tc-arm.c (WARN_DEPRECATED): Enable.
106 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
108 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
110 (pe_directive_secrel) [TE_PE]: New function.
111 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
112 loc, loc_mark_labels.
113 [TE_PE]: Handle secrel32.
114 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
116 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
117 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
118 (md_section_align): Only round section sizes here for AOUT
120 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
121 (tc_pe_dwarf2_emit_offset): New function.
122 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
123 (cons_fix_new_arm): Handle O_secrel.
124 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
125 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
126 of OBJ_ELF only block.
127 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
128 tc_pe_dwarf2_emit_offset.
130 2006-08-04 Richard Sandiford <richard@codesourcery.com>
132 * config/tc-sh.c (apply_full_field_fix): New function.
133 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
134 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
135 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
136 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
138 2006-08-03 Nick Clifton <nickc@redhat.com>
141 * config.in: Regenerate.
143 2006-08-03 Joseph Myers <joseph@codesourcery.com>
145 * config/tc-arm.c (parse_operands): Handle invalid register name
148 2006-08-03 Joseph Myers <joseph@codesourcery.com>
150 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
151 (parse_operands): Handle it.
152 (insns): Use it for tmcr and tmrc.
154 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
157 * config/tc-i386.c (md_parse_option): Treat any target starting
158 with elf64_x86_64 as a viable target for the -64 switch.
159 (i386_target_format): For 64-bit ELF flavoured output use
161 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
163 2006-08-02 Nick Clifton <nickc@redhat.com>
166 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
168 * configure.in: Run BFD_BINARY_FOPEN.
169 * configure: Regenerate.
170 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
173 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
175 * config/tc-i386.c (md_assemble): Don't update
178 2006-08-01 Thiemo Seufer <ths@mips.com>
180 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
182 2006-08-01 Thiemo Seufer <ths@mips.com>
184 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
185 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
186 BFD_RELOC_32 and BFD_RELOC_16.
187 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
188 md_convert_frag, md_obj_end): Fix comment formatting.
190 2006-07-31 Thiemo Seufer <ths@mips.com>
192 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
193 handling for BFD_RELOC_MIPS16_JMP.
195 2006-07-24 Andreas Schwab <schwab@suse.de>
198 * read.c (read_a_source_file): Ignore unknown text after line
199 comment character. Fix misleading comment.
201 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
203 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
204 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
205 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
206 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
207 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
208 doc/c-z80.texi, doc/internals.texi: Fix some typos.
210 2006-07-21 Nick Clifton <nickc@redhat.com>
212 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
215 2006-07-20 Thiemo Seufer <ths@mips.com>
216 Nigel Stephens <nigel@mips.com>
218 * config/tc-mips.c (md_parse_option): Don't infer optimisation
219 options from debug options.
221 2006-07-20 Thiemo Seufer <ths@mips.com>
223 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
224 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
226 2006-07-19 Paul Brook <paul@codesourcery.com>
228 * config/tc-arm.c (insns): Fix rbit Arm opcode.
230 2006-07-18 Paul Brook <paul@codesourcery.com>
232 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
233 (md_convert_frag): Use correct reloc for add_pc. Use
234 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
235 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
236 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
238 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
240 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
241 when file and line unknown.
243 2006-07-17 Thiemo Seufer <ths@mips.com>
245 * read.c (s_struct): Use IS_ELF.
246 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
247 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
248 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
249 s_mips_mask): Likewise.
251 2006-07-16 Thiemo Seufer <ths@mips.com>
252 David Ung <davidu@mips.com>
254 * read.c (s_struct): Handle ELF section changing.
255 * config/tc-mips.c (s_align): Leave enabling auto-align to the
257 (s_change_sec): Try section changing only if we output ELF.
259 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
261 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
263 (smallest_imm_type): Remove Cpu086.
264 (i386_target_format): Likewise.
266 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
269 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
270 Michael Meissner <michael.meissner@amd.com>
272 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
273 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
274 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
276 (i386_align_code): Ditto.
277 (md_assemble_code): Add support for insertq/extrq instructions,
278 swapping as needed for intel syntax.
279 (swap_imm_operands): New function to swap immediate operands.
280 (swap_operands): Deal with 4 operand instructions.
281 (build_modrm_byte): Add support for insertq instruction.
283 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
285 * config/tc-i386.h (Size64): Fix a typo in comment.
287 2006-07-12 Nick Clifton <nickc@redhat.com>
289 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
290 fixup_segment() to repeat a range check on a value that has
291 already been checked here.
293 2006-07-07 James E Wilson <wilson@specifix.com>
295 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
297 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
298 Nick Clifton <nickc@redhat.com>
301 * doc/as.texi: Fix spelling typo: branchs => branches.
302 * doc/c-m68hc11.texi: Likewise.
303 * config/tc-m68hc11.c: Likewise.
304 Support old spelling of command line switch for backwards
307 2006-07-04 Thiemo Seufer <ths@mips.com>
308 David Ung <davidu@mips.com>
310 * config/tc-mips.c (s_is_linkonce): New function.
311 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
312 weak, external, and linkonce symbols.
313 (pic_need_relax): Use s_is_linkonce.
315 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
317 * doc/as.texinfo (Org): Remove space.
318 (P2align): Add "@var{abs-expr},".
320 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
322 * config/tc-i386.c (cpu_arch_tune_set): New.
323 (cpu_arch_isa): Likewise.
324 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
325 nops with short or long nop sequences based on -march=/.arch
327 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
328 set cpu_arch_tune and cpu_arch_tune_flags.
329 (md_parse_option): For -march=, set cpu_arch_isa and set
330 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
331 0. Set cpu_arch_tune_set to 1 for -mtune=.
332 (i386_target_format): Don't set cpu_arch_tune.
334 2006-06-23 Nigel Stephens <nigel@mips.com>
336 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
337 generated .sbss.* and .gnu.linkonce.sb.*.
339 2006-06-23 Thiemo Seufer <ths@mips.com>
340 David Ung <davidu@mips.com>
342 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
344 * config/tc-mips.c (label_list): Define per-segment label_list.
345 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
346 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
347 mips_from_file_after_relocs, mips_define_label): Use per-segment
350 2006-06-22 Thiemo Seufer <ths@mips.com>
352 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
353 (append_insn): Use it.
354 (md_apply_fix): Whitespace formatting.
355 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
356 mips16_extended_frag): Remove register specifier.
357 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
360 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
362 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
363 a directive saving VFP registers for ARMv6 or later.
364 (s_arm_unwind_save): Add parameter arch_v6 and call
365 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
367 (md_pseudo_table): Add entry for new "vsave" directive.
368 * doc/c-arm.texi: Correct error in example for "save"
369 directive (fstmdf -> fstmdx). Also document "vsave" directive.
371 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
372 Anatoly Sokolov <aesok@post.ru>
374 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
375 and atmega644p devices. Rename atmega164/atmega324 devices to
376 atmega164p/atmega324p.
377 * doc/c-avr.texi: Document new mcu and arch options.
379 2006-06-17 Nick Clifton <nickc@redhat.com>
381 * config/tc-arm.c (enum parse_operand_result): Move outside of
382 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
384 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
386 * config/tc-i386.h (processor_type): New.
387 (arch_entry): Add type.
389 * config/tc-i386.c (cpu_arch_tune): New.
390 (cpu_arch_tune_flags): Likewise.
391 (cpu_arch_isa_flags): Likewise.
393 (set_cpu_arch): Also update cpu_arch_isa_flags.
394 (md_assemble): Update cpu_arch_isa_flags.
396 (OPTION_MTUNE): Likewise.
397 (md_longopts): Add -march= and -mtune=.
398 (md_parse_option): Support -march= and -mtune=.
399 (md_show_usage): Add -march=CPU/-mtune=CPU.
400 (i386_target_format): Also update cpu_arch_isa_flags,
401 cpu_arch_tune and cpu_arch_tune_flags.
403 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
405 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
407 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
409 * config/tc-arm.c (enum parse_operand_result): New.
410 (struct group_reloc_table_entry): New.
411 (enum group_reloc_type): New.
412 (group_reloc_table): New array.
413 (find_group_reloc_table_entry): New function.
414 (parse_shifter_operand_group_reloc): New function.
415 (parse_address_main): New function, incorporating code
416 from the old parse_address function. To be used via...
417 (parse_address): wrapper for parse_address_main; and
418 (parse_address_group_reloc): new function, likewise.
419 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
420 OP_ADDRGLDRS, OP_ADDRGLDC.
421 (parse_operands): Support for these new operand codes.
422 New macro po_misc_or_fail_no_backtrack.
423 (encode_arm_cp_address): Preserve group relocations.
424 (insns): Modify to use the above operand codes where group
425 relocations are permitted.
426 (md_apply_fix): Handle the group relocations
427 ALU_PC_G0_NC through LDC_SB_G2.
428 (tc_gen_reloc): Likewise.
429 (arm_force_relocation): Leave group relocations for the linker.
430 (arm_fix_adjustable): Likewise.
432 2006-06-15 Julian Brown <julian@codesourcery.com>
434 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
435 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
438 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
440 * config/tc-i386.c (process_suffix): Don't add rex64 for
443 2006-06-09 Thiemo Seufer <ths@mips.com>
445 * config/tc-mips.c (mips_ip): Maintain argument count.
447 2006-06-09 Alan Modra <amodra@bigpond.net.au>
449 * config/tc-iq2000.c: Include sb.h.
451 2006-06-08 Nigel Stephens <nigel@mips.com>
453 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
454 aliases for better compatibility with SGI tools.
456 2006-06-08 Alan Modra <amodra@bigpond.net.au>
458 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
459 * Makefile.am (GASLIBS): Expand @BFDLIB@.
461 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
462 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
463 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
465 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
466 * Makefile.in: Regenerate.
467 * doc/Makefile.in: Regenerate.
468 * configure: Regenerate.
470 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
472 * po/Make-in (pdf, ps): New dummy targets.
474 2006-06-07 Julian Brown <julian@codesourcery.com>
476 * config/tc-arm.c (stdarg.h): include.
477 (arm_it): Add uncond_value field. Add isvec and issingle to operand
479 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
480 REG_TYPE_NSDQ (single, double or quad vector reg).
481 (reg_expected_msgs): Update.
482 (BAD_FPU): Add macro for unsupported FPU instruction error.
483 (parse_neon_type): Support 'd' as an alias for .f64.
484 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
486 (parse_vfp_reg_list): Don't update first arg on error.
487 (parse_neon_mov): Support extra syntax for VFP moves.
488 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
489 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
490 (parse_operands): Support isvec, issingle operands fields, new parse
492 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
494 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
495 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
496 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
497 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
499 (neon_shape): Redefine in terms of above.
500 (neon_shape_class): New enumeration, table of shape classes.
501 (neon_shape_el): New enumeration. One element of a shape.
502 (neon_shape_el_size): Register widths of above, where appropriate.
503 (neon_shape_info): New struct. Info for shape table.
504 (neon_shape_tab): New array.
505 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
506 (neon_check_shape): Rewrite as...
507 (neon_select_shape): New function to classify instruction shapes,
508 driven by new table neon_shape_tab array.
509 (neon_quad): New function. Return 1 if shape should set Q flag in
510 instructions (or equivalent), 0 otherwise.
511 (type_chk_of_el_type): Support F64.
512 (el_type_of_type_chk): Likewise.
513 (neon_check_type): Add support for VFP type checking (VFP data
514 elements fill their containing registers).
515 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
516 in thumb mode for VFP instructions.
517 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
518 and encode the current instruction as if it were that opcode.
519 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
520 arguments, call function in PFN.
521 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
522 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
523 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
524 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
525 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
526 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
527 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
528 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
529 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
530 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
531 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
532 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
533 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
534 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
535 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
537 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
538 between VFP and Neon turns out to belong to Neon. Perform
539 architecture check and fill in condition field if appropriate.
540 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
541 (do_neon_cvt): Add support for VFP variants of instructions.
542 (neon_cvt_flavour): Extend to cover VFP conversions.
543 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
545 (do_neon_ldr_str): Handle single-precision VFP load/store.
546 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
547 NS_NULL not NS_IGNORE.
548 (opcode_tag): Add OT_csuffixF for operands which either take a
549 conditional suffix, or have 0xF in the condition field.
550 (md_assemble): Add support for OT_csuffixF.
551 (NCE): Replace macro with...
552 (NCE_tag, NCE, NCEF): New macros.
553 (nCE): Replace macro with...
554 (nCE_tag, nCE, nCEF): New macros.
555 (insns): Add support for VFP insns or VFP versions of insns msr,
556 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
557 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
558 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
559 VFP/Neon insns together.
561 2006-06-07 Alan Modra <amodra@bigpond.net.au>
562 Ladislav Michl <ladis@linux-mips.org>
564 * app.c: Don't include headers already included by as.h.
566 * atof-generic.c: Likewise.
568 * dwarf2dbg.c: Likewise.
570 * input-file.c: Likewise.
571 * input-scrub.c: Likewise.
573 * output-file.c: Likewise.
576 * config/bfin-lex.l: Likewise.
577 * config/obj-coff.h: Likewise.
578 * config/obj-elf.h: Likewise.
579 * config/obj-som.h: Likewise.
580 * config/tc-arc.c: Likewise.
581 * config/tc-arm.c: Likewise.
582 * config/tc-avr.c: Likewise.
583 * config/tc-bfin.c: Likewise.
584 * config/tc-cris.c: Likewise.
585 * config/tc-d10v.c: Likewise.
586 * config/tc-d30v.c: Likewise.
587 * config/tc-dlx.h: Likewise.
588 * config/tc-fr30.c: Likewise.
589 * config/tc-frv.c: Likewise.
590 * config/tc-h8300.c: Likewise.
591 * config/tc-hppa.c: Likewise.
592 * config/tc-i370.c: Likewise.
593 * config/tc-i860.c: Likewise.
594 * config/tc-i960.c: Likewise.
595 * config/tc-ip2k.c: Likewise.
596 * config/tc-iq2000.c: Likewise.
597 * config/tc-m32c.c: Likewise.
598 * config/tc-m32r.c: Likewise.
599 * config/tc-maxq.c: Likewise.
600 * config/tc-mcore.c: Likewise.
601 * config/tc-mips.c: Likewise.
602 * config/tc-mmix.c: Likewise.
603 * config/tc-mn10200.c: Likewise.
604 * config/tc-mn10300.c: Likewise.
605 * config/tc-msp430.c: Likewise.
606 * config/tc-mt.c: Likewise.
607 * config/tc-ns32k.c: Likewise.
608 * config/tc-openrisc.c: Likewise.
609 * config/tc-ppc.c: Likewise.
610 * config/tc-s390.c: Likewise.
611 * config/tc-sh.c: Likewise.
612 * config/tc-sh64.c: Likewise.
613 * config/tc-sparc.c: Likewise.
614 * config/tc-tic30.c: Likewise.
615 * config/tc-tic4x.c: Likewise.
616 * config/tc-tic54x.c: Likewise.
617 * config/tc-v850.c: Likewise.
618 * config/tc-vax.c: Likewise.
619 * config/tc-xc16x.c: Likewise.
620 * config/tc-xstormy16.c: Likewise.
621 * config/tc-xtensa.c: Likewise.
622 * config/tc-z80.c: Likewise.
623 * config/tc-z8k.c: Likewise.
624 * macro.h: Don't include sb.h or ansidecl.h.
625 * sb.h: Don't include stdio.h or ansidecl.h.
626 * cond.c: Include sb.h.
627 * itbl-lex.l: Include as.h instead of other system headers.
628 * itbl-parse.y: Likewise.
629 * itbl-ops.c: Similarly.
630 * itbl-ops.h: Don't include as.h or ansidecl.h.
631 * config/bfin-defs.h: Don't include bfd.h or as.h.
632 * config/bfin-parse.y: Include as.h instead of other system headers.
634 2006-06-06 Ben Elliston <bje@au.ibm.com>
635 Anton Blanchard <anton@samba.org>
637 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
638 (md_show_usage): Document it.
639 (ppc_setup_opcodes): Test power6 opcode flag bits.
640 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
642 2006-06-06 Thiemo Seufer <ths@mips.com>
643 Chao-ying Fu <fu@mips.com>
645 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
646 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
647 (macro_build): Update comment.
648 (mips_ip): Allow DSP64 instructions for MIPS64R2.
649 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
651 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
652 MIPS_CPU_ASE_MDMX flags for sb1.
654 2006-06-05 Thiemo Seufer <ths@mips.com>
656 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
658 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
659 (mips_ip): Make overflowed/underflowed constant arguments in DSP
660 and MT instructions a fatal error. Use INSERT_OPERAND where
661 appropriate. Improve warnings for break and wait code overflows.
662 Use symbolic constant of OP_MASK_COPZ.
663 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
665 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
667 * po/Make-in (top_builddir): Define.
669 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
671 * doc/Makefile.am (TEXI2DVI): Define.
672 * doc/Makefile.in: Regenerate.
673 * doc/c-arc.texi: Fix typo.
675 2006-06-01 Alan Modra <amodra@bigpond.net.au>
677 * config/obj-ieee.c: Delete.
678 * config/obj-ieee.h: Delete.
679 * Makefile.am (OBJ_FORMATS): Remove ieee.
680 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
681 (obj-ieee.o): Remove rule.
682 * Makefile.in: Regenerate.
683 * configure.in (atof): Remove tahoe.
684 (OBJ_MAYBE_IEEE): Don't define.
685 * configure: Regenerate.
686 * config.in: Regenerate.
687 * doc/Makefile.in: Regenerate.
688 * po/POTFILES.in: Regenerate.
690 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
692 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
693 and LIBINTL_DEP everywhere.
695 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
696 * acinclude.m4: Include new gettext macros.
697 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
698 Remove local code for po/Makefile.
699 * Makefile.in, configure, doc/Makefile.in: Regenerated.
701 2006-05-30 Nick Clifton <nickc@redhat.com>
703 * po/es.po: Updated Spanish translation.
705 2006-05-06 Denis Chertykov <denisc@overta.ru>
707 * doc/c-avr.texi: New file.
708 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
709 * doc/all.texi: Set AVR
710 * doc/as.texinfo: Include c-avr.texi
712 2006-05-28 Jie Zhang <jie.zhang@analog.com>
714 * config/bfin-parse.y (check_macfunc): Loose the condition of
715 calling check_multiply_halfregs ().
717 2006-05-25 Jie Zhang <jie.zhang@analog.com>
719 * config/bfin-parse.y (asm_1): Better check and deal with
720 vector and scalar Multiply 16-Bit Operands instructions.
722 2006-05-24 Nick Clifton <nickc@redhat.com>
724 * config/tc-hppa.c: Convert to ISO C90 format.
725 * config/tc-hppa.h: Likewise.
727 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
728 Randolph Chung <randolph@tausq.org>
730 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
731 is_tls_ieoff, is_tls_leoff): Define.
732 (fix_new_hppa): Handle TLS.
733 (cons_fix_new_hppa): Likewise.
735 (md_apply_fix): Handle TLS relocs.
736 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
738 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
740 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
742 2006-05-23 Thiemo Seufer <ths@mips.com>
743 David Ung <davidu@mips.com>
744 Nigel Stephens <nigel@mips.com>
747 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
748 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
749 ISA_HAS_MXHC1): New macros.
750 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
751 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
752 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
753 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
754 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
755 (mips_after_parse_args): Change default handling of float register
756 size to account for 32bit code with 64bit FP. Better sanity checking
757 of ISA/ASE/ABI option combinations.
758 (s_mipsset): Support switching of GPR and FPR sizes via
759 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
761 (mips_elf_final_processing): We should record the use of 64bit FP
762 registers in 32bit code but we don't, because ELF header flags are
764 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
765 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
766 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
767 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
768 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
769 missing -march options. Document .set arch=CPU. Move .set smartmips
770 to ASE page. Use @code for .set FOO examples.
772 2006-05-23 Jie Zhang <jie.zhang@analog.com>
774 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
777 2006-05-23 Jie Zhang <jie.zhang@analog.com>
779 * config/bfin-defs.h (bfin_equals): Remove declaration.
780 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
781 * config/tc-bfin.c (bfin_name_is_register): Remove.
782 (bfin_equals): Remove.
783 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
784 (bfin_name_is_register): Remove declaration.
786 2006-05-19 Thiemo Seufer <ths@mips.com>
787 Nigel Stephens <nigel@mips.com>
789 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
790 (mips_oddfpreg_ok): New function.
793 2006-05-19 Thiemo Seufer <ths@mips.com>
794 David Ung <davidu@mips.com>
796 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
797 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
798 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
799 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
800 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
801 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
802 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
803 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
804 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
805 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
806 reg_names_o32, reg_names_n32n64): Define register classes.
807 (reg_lookup): New function, use register classes.
808 (md_begin): Reserve register names in the symbol table. Simplify
810 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
812 (mips16_ip): Use reg_lookup.
813 (tc_get_register): Likewise.
814 (tc_mips_regname_to_dw2regnum): New function.
816 2006-05-19 Thiemo Seufer <ths@mips.com>
818 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
819 Un-constify string argument.
820 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
822 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
824 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
826 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
828 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
830 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
833 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
835 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
836 cfloat/m68881 to correct architecture before using it.
838 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
840 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
843 2006-05-15 Paul Brook <paul@codesourcery.com>
845 * config/tc-arm.c (arm_adjust_symtab): Use
846 bfd_is_arm_special_symbol_name.
848 2006-05-15 Bob Wilson <bob.wilson@acm.org>
850 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
851 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
852 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
853 Handle errors from calls to xtensa_opcode_is_* functions.
855 2006-05-14 Thiemo Seufer <ths@mips.com>
857 * config/tc-mips.c (macro_build): Test for currently active
859 (mips16_ip): Reject invalid opcodes.
861 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
863 * doc/as.texinfo: Rename "Index" to "AS Index",
864 and "ABORT" to "ABORT (COFF)".
866 2006-05-11 Paul Brook <paul@codesourcery.com>
868 * config/tc-arm.c (parse_half): New function.
869 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
870 (parse_operands): Ditto.
871 (do_mov16): Reject invalid relocations.
872 (do_t_mov16): Ditto. Use Thumb reloc numbers.
873 (insns): Replace Iffff with HALF.
874 (md_apply_fix): Add MOVW and MOVT relocs.
875 (tc_gen_reloc): Ditto.
876 * doc/c-arm.texi: Document relocation operators
878 2006-05-11 Paul Brook <paul@codesourcery.com>
880 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
882 2006-05-11 Thiemo Seufer <ths@mips.com>
884 * config/tc-mips.c (append_insn): Don't check the range of j or
887 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
889 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
890 relocs against external symbols for WinCE targets.
891 (md_apply_fix): Likewise.
893 2006-05-09 David Ung <davidu@mips.com>
895 * config/tc-mips.c (append_insn): Only warn about an out-of-range
898 2006-05-09 Nick Clifton <nickc@redhat.com>
900 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
901 against symbols which are not going to be placed into the symbol
904 2006-05-09 Ben Elliston <bje@au.ibm.com>
906 * expr.c (operand): Remove `if (0 && ..)' statement and
907 subsequently unused target_op label. Collapse `if (1 || ..)'
909 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
910 separately above the switch.
912 2006-05-08 Nick Clifton <nickc@redhat.com>
915 * config/tc-msp430.c (line_separator_character): Define as |.
917 2006-05-08 Thiemo Seufer <ths@mips.com>
918 Nigel Stephens <nigel@mips.com>
919 David Ung <davidu@mips.com>
921 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
922 (mips_opts): Likewise.
923 (file_ase_smartmips): New variable.
924 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
925 (macro_build): Handle SmartMIPS instructions.
927 (md_longopts): Add argument handling for smartmips.
928 (md_parse_options, mips_after_parse_args): Likewise.
929 (s_mipsset): Add .set smartmips support.
930 (md_show_usage): Document -msmartmips/-mno-smartmips.
931 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
933 * doc/c-mips.texi: Likewise.
935 2006-05-08 Alan Modra <amodra@bigpond.net.au>
937 * write.c (relax_segment): Add pass count arg. Don't error on
938 negative org/space on first two passes.
939 (relax_seg_info): New struct.
940 (relax_seg, write_object_file): Adjust.
941 * write.h (relax_segment): Update prototype.
943 2006-05-05 Julian Brown <julian@codesourcery.com>
945 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
947 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
948 architecture version checks.
949 (insns): Allow overlapping instructions to be used in VFP mode.
951 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
954 * config/obj-elf.c (obj_elf_change_section): Allow user
955 specified SHF_ALPHA_GPREL.
957 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
959 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
960 for PMEM related expressions.
962 2006-05-05 Nick Clifton <nickc@redhat.com>
965 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
966 insertion of a directory separator character into a string at a
967 given offset. Uses heuristics to decide when to use a backslash
968 character rather than a forward-slash character.
969 (dwarf2_directive_loc): Use the macro.
970 (out_debug_info): Likewise.
972 2006-05-05 Thiemo Seufer <ths@mips.com>
973 David Ung <davidu@mips.com>
975 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
977 (macro): Add new case M_CACHE_AB.
979 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
981 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
982 (opcode_lookup): Issue a warning for opcode with
983 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
984 identical to OT_cinfix3.
985 (TxC3w, TC3w, tC3w): New.
986 (insns): Use tC3w and TC3w for comparison instructions with
989 2006-05-04 Alan Modra <amodra@bigpond.net.au>
991 * subsegs.h (struct frchain): Delete frch_seg.
992 (frchain_root): Delete.
993 (seg_info): Define as macro.
994 * subsegs.c (frchain_root): Delete.
995 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
996 (subsegs_begin, subseg_change): Adjust for above.
997 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
998 rather than to one big list.
999 (subseg_get): Don't special case abs, und sections.
1000 (subseg_new, subseg_force_new): Don't set frchainP here.
1002 (subsegs_print_statistics): Adjust frag chain control list traversal.
1003 * debug.c (dmp_frags): Likewise.
1004 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1005 at frchain_root. Make use of known frchain ordering.
1006 (last_frag_for_seg): Likewise.
1007 (get_frag_fix): Likewise. Add seg param.
1008 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1009 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1010 (SUB_SEGMENT_ALIGN): Likewise.
1011 (subsegs_finish): Adjust frchain list traversal.
1012 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1013 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1014 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1015 (xtensa_fix_b_j_loop_end_frags): Likewise.
1016 (xtensa_fix_close_loop_end_frags): Likewise.
1017 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1018 (retrieve_segment_info): Delete frch_seg initialisation.
1020 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1022 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1023 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1024 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1025 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1027 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1029 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1031 (md_apply_fix3): Multiply offset by 4 here for
1032 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1034 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1035 Jan Beulich <jbeulich@novell.com>
1037 * config/tc-i386.c (output_invalid_buf): Change size for
1039 * config/tc-tic30.c (output_invalid_buf): Likewise.
1041 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1043 * config/tc-tic30.c (output_invalid): Likewise.
1045 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1047 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1048 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1049 (asconfig.texi): Don't set top_srcdir.
1050 * doc/as.texinfo: Don't use top_srcdir.
1051 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1053 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1055 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1056 * config/tc-tic30.c (output_invalid_buf): Likewise.
1058 * config/tc-i386.c (output_invalid): Use snprintf instead of
1060 * config/tc-ia64.c (declare_register_set): Likewise.
1061 (emit_one_bundle): Likewise.
1062 (check_dependencies): Likewise.
1063 * config/tc-tic30.c (output_invalid): Likewise.
1065 2006-05-02 Paul Brook <paul@codesourcery.com>
1067 * config/tc-arm.c (arm_optimize_expr): New function.
1068 * config/tc-arm.h (md_optimize_expr): Define
1069 (arm_optimize_expr): Add prototype.
1070 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1072 2006-05-02 Ben Elliston <bje@au.ibm.com>
1074 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1077 * sb.h (sb_list_vector): Move to sb.c.
1078 * sb.c (free_list): Use type of sb_list_vector directly.
1079 (sb_build): Fix off-by-one error in assertion about `size'.
1081 2006-05-01 Ben Elliston <bje@au.ibm.com>
1083 * listing.c (listing_listing): Remove useless loop.
1084 * macro.c (macro_expand): Remove is_positional local variable.
1085 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1086 and simplify surrounding expressions, where possible.
1087 (assign_symbol): Likewise.
1088 (s_weakref): Likewise.
1089 * symbols.c (colon): Likewise.
1091 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1093 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1095 2006-04-30 Thiemo Seufer <ths@mips.com>
1096 David Ung <davidu@mips.com>
1098 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1099 (mips_immed): New table that records various handling of udi
1100 instruction patterns.
1101 (mips_ip): Adds udi handling.
1103 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1105 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1106 of list rather than beginning.
1108 2006-04-26 Julian Brown <julian@codesourcery.com>
1110 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1111 (is_quarter_float): Rename from above. Simplify slightly.
1112 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1114 (parse_neon_mov): Parse floating-point constants.
1115 (neon_qfloat_bits): Fix encoding.
1116 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1117 preference to integer encoding when using the F32 type.
1119 2006-04-26 Julian Brown <julian@codesourcery.com>
1121 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1122 zero-initialising structures containing it will lead to invalid types).
1123 (arm_it): Add vectype to each operand.
1124 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1126 (neon_typed_alias): New structure. Extra information for typed
1128 (reg_entry): Add neon type info field.
1129 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1130 Break out alternative syntax for coprocessor registers, etc. into...
1131 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1132 out from arm_reg_parse.
1133 (parse_neon_type): Move. Return SUCCESS/FAIL.
1134 (first_error): New function. Call to ensure first error which occurs is
1136 (parse_neon_operand_type): Parse exactly one type.
1137 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1138 (parse_typed_reg_or_scalar): New function. Handle core of both
1139 arm_typed_reg_parse and parse_scalar.
1140 (arm_typed_reg_parse): Parse a register with an optional type.
1141 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1143 (parse_scalar): Parse a Neon scalar with optional type.
1144 (parse_reg_list): Use first_error.
1145 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1146 (neon_alias_types_same): New function. Return true if two (alias) types
1148 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1150 (insert_reg_alias): Return new reg_entry not void.
1151 (insert_neon_reg_alias): New function. Insert type/index information as
1152 well as register for alias.
1153 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1154 make typed register aliases accordingly.
1155 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1157 (s_unreq): Delete type information if present.
1158 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1159 (s_arm_unwind_save_mmxwcg): Likewise.
1160 (s_arm_unwind_movsp): Likewise.
1161 (s_arm_unwind_setfp): Likewise.
1162 (parse_shift): Likewise.
1163 (parse_shifter_operand): Likewise.
1164 (parse_address): Likewise.
1165 (parse_tb): Likewise.
1166 (tc_arm_regname_to_dw2regnum): Likewise.
1167 (md_pseudo_table): Add dn, qn.
1168 (parse_neon_mov): Handle typed operands.
1169 (parse_operands): Likewise.
1170 (neon_type_mask): Add N_SIZ.
1171 (N_ALLMODS): New macro.
1172 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1173 (el_type_of_type_chk): Add some safeguards.
1174 (modify_types_allowed): Fix logic bug.
1175 (neon_check_type): Handle operands with types.
1176 (neon_three_same): Remove redundant optional arg handling.
1177 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1178 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1179 (do_neon_step): Adjust accordingly.
1180 (neon_cmode_for_logic_imm): Use first_error.
1181 (do_neon_bitfield): Call neon_check_type.
1182 (neon_dyadic): Rename to...
1183 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1184 to allow modification of type of the destination.
1185 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1186 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1187 (do_neon_compare): Make destination be an untyped bitfield.
1188 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1189 (neon_mul_mac): Return early in case of errors.
1190 (neon_move_immediate): Use first_error.
1191 (neon_mac_reg_scalar_long): Fix type to include scalar.
1192 (do_neon_dup): Likewise.
1193 (do_neon_mov): Likewise (in several places).
1194 (do_neon_tbl_tbx): Fix type.
1195 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1196 (do_neon_ld_dup): Exit early in case of errors and/or use
1198 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1199 Handle .dn/.qn directives.
1200 (REGDEF): Add zero for reg_entry neon field.
1202 2006-04-26 Julian Brown <julian@codesourcery.com>
1204 * config/tc-arm.c (limits.h): Include.
1205 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1206 (fpu_vfp_v3_or_neon_ext): Declare constants.
1207 (neon_el_type): New enumeration of types for Neon vector elements.
1208 (neon_type_el): New struct. Define type and size of a vector element.
1209 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1211 (neon_type): Define struct. The type of an instruction.
1212 (arm_it): Add 'vectype' for the current instruction.
1213 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1214 (vfp_sp_reg_pos): Rename to...
1215 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1217 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1218 (Neon D or Q register).
1219 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1221 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1222 (my_get_expression): Allow above constant as argument to accept
1223 64-bit constants with optional prefix.
1224 (arm_reg_parse): Add extra argument to return the specific type of
1225 register in when either a D or Q register (REG_TYPE_NDQ) is
1226 requested. Can be NULL.
1227 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1228 (parse_reg_list): Update for new arm_reg_parse args.
1229 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1230 (parse_neon_el_struct_list): New function. Parse element/structure
1231 register lists for VLD<n>/VST<n> instructions.
1232 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1233 (s_arm_unwind_save_mmxwr): Likewise.
1234 (s_arm_unwind_save_mmxwcg): Likewise.
1235 (s_arm_unwind_movsp): Likewise.
1236 (s_arm_unwind_setfp): Likewise.
1237 (parse_big_immediate): New function. Parse an immediate, which may be
1238 64 bits wide. Put results in inst.operands[i].
1239 (parse_shift): Update for new arm_reg_parse args.
1240 (parse_address): Likewise. Add parsing of alignment specifiers.
1241 (parse_neon_mov): Parse the operands of a VMOV instruction.
1242 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1243 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1244 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1245 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1246 (parse_operands): Handle new codes above.
1247 (encode_arm_vfp_sp_reg): Rename to...
1248 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1249 selected VFP version only supports D0-D15.
1250 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1251 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1252 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1253 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1254 encode_arm_vfp_reg name, and allow 32 D regs.
1255 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1256 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1258 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1259 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1260 constant-load and conversion insns introduced with VFPv3.
1261 (neon_tab_entry): New struct.
1262 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1263 those which are the targets of pseudo-instructions.
1264 (neon_opc): Enumerate opcodes, use as indices into...
1265 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1266 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1267 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1268 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1270 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1272 (neon_type_mask): New. Compact type representation for type checking.
1273 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1274 permitted type combinations.
1275 (N_IGNORE_TYPE): New macro.
1276 (neon_check_shape): New function. Check an instruction shape for
1277 multiple alternatives. Return the specific shape for the current
1279 (neon_modify_type_size): New function. Modify a vector type and size,
1280 depending on the bit mask in argument 1.
1281 (neon_type_promote): New function. Convert a given "key" type (of an
1282 operand) into the correct type for a different operand, based on a bit
1284 (type_chk_of_el_type): New function. Convert a type and size into the
1285 compact representation used for type checking.
1286 (el_type_of_type_ckh): New function. Reverse of above (only when a
1287 single bit is set in the bit mask).
1288 (modify_types_allowed): New function. Alter a mask of allowed types
1289 based on a bit mask of modifications.
1290 (neon_check_type): New function. Check the type of the current
1291 instruction against the variable argument list. The "key" type of the
1292 instruction is returned.
1293 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1294 a Neon data-processing instruction depending on whether we're in ARM
1295 mode or Thumb-2 mode.
1296 (neon_logbits): New function.
1297 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1298 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1299 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1300 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1301 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1302 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1303 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1304 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1305 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1306 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1307 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1308 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1309 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1310 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1311 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1312 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1313 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1314 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1315 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1316 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1317 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1318 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1319 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1320 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1321 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1323 (parse_neon_type): New function. Parse Neon type specifier.
1324 (opcode_lookup): Allow parsing of Neon type specifiers.
1325 (REGNUM2, REGSETH, REGSET2): New macros.
1326 (reg_names): Add new VFPv3 and Neon registers.
1327 (NUF, nUF, NCE, nCE): New macros for opcode table.
1328 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1329 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1330 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1331 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1332 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1333 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1334 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1335 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1336 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1337 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1338 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1339 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1340 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1341 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1343 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1344 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1345 (arm_option_cpu_value): Add vfp3 and neon.
1346 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1349 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1351 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1352 syntax instead of hardcoded opcodes with ".w18" suffixes.
1353 (wide_branch_opcode): New.
1354 (build_transition): Use it to check for wide branch opcodes with
1355 either ".w18" or ".w15" suffixes.
1357 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1359 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1360 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1361 frag's is_literal flag.
1363 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1365 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1367 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1369 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1370 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1371 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1372 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1373 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1375 2005-04-20 Paul Brook <paul@codesourcery.com>
1377 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1379 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1381 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1383 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1384 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1385 Make some cpus unsupported on ELF. Run "make dep-am".
1386 * Makefile.in: Regenerate.
1388 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1390 * configure.in (--enable-targets): Indent help message.
1391 * configure: Regenerate.
1393 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1396 * config/tc-i386.c (i386_immediate): Check illegal immediate
1399 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1401 * config/tc-i386.c: Formatting.
1402 (output_disp, output_imm): ISO C90 params.
1404 * frags.c (frag_offset_fixed_p): Constify args.
1405 * frags.h (frag_offset_fixed_p): Ditto.
1407 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1408 (COFF_MAGIC): Delete.
1410 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1412 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1414 * po/POTFILES.in: Regenerated.
1416 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1418 * doc/as.texinfo: Mention that some .type syntaxes are not
1419 supported on all architectures.
1421 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1423 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1424 instructions when such transformations have been disabled.
1426 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1428 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1429 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1430 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1431 decoding the loop instructions. Remove current_offset variable.
1432 (xtensa_fix_short_loop_frags): Likewise.
1433 (min_bytes_to_other_loop_end): Remove current_offset argument.
1435 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1437 * config/tc-z80.c (z80_optimize_expr): Removed.
1438 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1440 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1442 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1443 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1444 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1445 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1446 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1447 at90can64, at90usb646, at90usb647, at90usb1286 and
1449 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1451 2006-04-07 Paul Brook <paul@codesourcery.com>
1453 * config/tc-arm.c (parse_operands): Set default error message.
1455 2006-04-07 Paul Brook <paul@codesourcery.com>
1457 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1459 2006-04-07 Paul Brook <paul@codesourcery.com>
1461 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1463 2006-04-07 Paul Brook <paul@codesourcery.com>
1465 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1466 (move_or_literal_pool): Handle Thumb-2 instructions.
1467 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1469 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1472 * config/tc-i386.c (match_template): Move 64-bit operand tests
1475 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1477 * po/Make-in: Add install-html target.
1478 * Makefile.am: Add install-html and install-html-recursive targets.
1479 * Makefile.in: Regenerate.
1480 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1481 * configure: Regenerate.
1482 * doc/Makefile.am: Add install-html and install-html-am targets.
1483 * doc/Makefile.in: Regenerate.
1485 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1487 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1490 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1491 Daniel Jacobowitz <dan@codesourcery.com>
1493 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1494 (GOTT_BASE, GOTT_INDEX): New.
1495 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1496 GOTT_INDEX when generating VxWorks PIC.
1497 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1498 use the generic *-*-vxworks* stanza instead.
1500 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1503 * frags.c (frag_offset_fixed_p): New function.
1504 * frags.h (frag_offset_fixed_p): Declare.
1505 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1506 (resolve_expression): Likewise.
1508 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1510 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1511 of the same length but different numbers of slots.
1513 2006-03-30 Andreas Schwab <schwab@suse.de>
1515 * configure.in: Fix help string for --enable-targets option.
1516 * configure: Regenerate.
1518 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1520 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1521 (m68k_ip): ... here. Use for all chips. Protect against buffer
1522 overrun and avoid excessive copying.
1524 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1525 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1526 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1527 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1528 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1529 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1530 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1531 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1532 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1533 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1534 (struct m68k_cpu): Change chip field to control_regs.
1535 (current_chip): Remove.
1536 (control_regs): New.
1537 (m68k_archs, m68k_extensions): Adjust.
1538 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1539 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1540 (find_cf_chip): Reimplement for new organization of cpu table.
1541 (select_control_regs): Remove.
1543 (struct save_opts): Save control regs, not chip.
1544 (s_save, s_restore): Adjust.
1545 (m68k_lookup_cpu): Give deprecated warning when necessary.
1546 (m68k_init_arch): Adjust.
1547 (md_show_usage): Adjust for new cpu table organization.
1549 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1551 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1552 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1553 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1555 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1556 (any_gotrel): New rule.
1557 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1558 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1560 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1561 (bfin_pic_ptr): New function.
1562 (md_pseudo_table): Add it for ".picptr".
1563 (OPTION_FDPIC): New macro.
1564 (md_longopts): Add -mfdpic.
1565 (md_parse_option): Handle it.
1566 (md_begin): Set BFD flags.
1567 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1568 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1570 * Makefile.am (bfin-parse.o): Update dependencies.
1571 (DEPTC_bfin_elf): Likewise.
1572 * Makefile.in: Regenerate.
1574 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1576 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1577 mcfemac instead of mcfmac.
1579 2006-03-23 Michael Matz <matz@suse.de>
1581 * config/tc-i386.c (type_names): Correct placement of 'static'.
1582 (reloc): Map some more relocs to their 64 bit counterpart when
1584 (output_insn): Work around breakage if DEBUG386 is defined.
1585 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1586 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1587 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1588 different from i386.
1589 (output_imm): Ditto.
1590 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1592 (md_convert_frag): Jumps can now be larger than 2GB away, error
1594 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1595 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1597 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1598 Daniel Jacobowitz <dan@codesourcery.com>
1599 Phil Edwards <phil@codesourcery.com>
1600 Zack Weinberg <zack@codesourcery.com>
1601 Mark Mitchell <mark@codesourcery.com>
1602 Nathan Sidwell <nathan@codesourcery.com>
1604 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1605 (md_begin): Complain about -G being used for PIC. Don't change
1606 the text, data and bss alignments on VxWorks.
1607 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1608 generating VxWorks PIC.
1609 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1610 (macro): Likewise, but do not treat la $25 specially for
1611 VxWorks PIC, and do not handle jal.
1612 (OPTION_MVXWORKS_PIC): New macro.
1613 (md_longopts): Add -mvxworks-pic.
1614 (md_parse_option): Don't complain about using PIC and -G together here.
1615 Handle OPTION_MVXWORKS_PIC.
1616 (md_estimate_size_before_relax): Always use the first relaxation
1617 sequence on VxWorks.
1618 * config/tc-mips.h (VXWORKS_PIC): New.
1620 2006-03-21 Paul Brook <paul@codesourcery.com>
1622 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1624 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1626 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1627 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1628 (get_loop_align_size): New.
1629 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1630 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1631 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1632 (get_noop_aligned_address): Use get_loop_align_size.
1633 (get_aligned_diff): Likewise.
1635 2006-03-21 Paul Brook <paul@codesourcery.com>
1637 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1639 2006-03-20 Paul Brook <paul@codesourcery.com>
1641 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1642 (do_t_branch): Encode branches inside IT blocks as unconditional.
1643 (do_t_cps): New function.
1644 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1645 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1646 (opcode_lookup): Allow conditional suffixes on all instructions in
1648 (md_assemble): Advance condexec state before checking for errors.
1649 (insns): Use do_t_cps.
1651 2006-03-20 Paul Brook <paul@codesourcery.com>
1653 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1654 outputting the insn.
1656 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1658 * config/tc-vax.c: Update copyright year.
1659 * config/tc-vax.h: Likewise.
1661 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1663 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1665 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1667 2006-03-17 Paul Brook <paul@codesourcery.com>
1669 * config/tc-arm.c (insns): Add ldm and stm.
1671 2006-03-17 Ben Elliston <bje@au.ibm.com>
1674 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1676 2006-03-16 Paul Brook <paul@codesourcery.com>
1678 * config/tc-arm.c (insns): Add "svc".
1680 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1682 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1683 flag and avoid double underscore prefixes.
1685 2006-03-10 Paul Brook <paul@codesourcery.com>
1687 * config/tc-arm.c (md_begin): Handle EABIv5.
1688 (arm_eabis): Add EF_ARM_EABI_VER5.
1689 * doc/c-arm.texi: Document -meabi=5.
1691 2006-03-10 Ben Elliston <bje@au.ibm.com>
1693 * app.c (do_scrub_chars): Simplify string handling.
1695 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1696 Daniel Jacobowitz <dan@codesourcery.com>
1697 Zack Weinberg <zack@codesourcery.com>
1698 Nathan Sidwell <nathan@codesourcery.com>
1699 Paul Brook <paul@codesourcery.com>
1700 Ricardo Anguiano <anguiano@codesourcery.com>
1701 Phil Edwards <phil@codesourcery.com>
1703 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1704 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1706 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1707 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1708 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1710 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1712 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1713 even when using the text-section-literals option.
1715 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1717 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1719 (m68k_ip): <case 'J'> Check we have some control regs.
1720 (md_parse_option): Allow raw arch switch.
1721 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1722 whether 68881 or cfloat was meant by -mfloat.
1723 (md_show_usage): Adjust extension display.
1724 (m68k_elf_final_processing): Adjust.
1726 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1728 * config/tc-avr.c (avr_mod_hash_value): New function.
1729 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1730 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1731 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1732 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1734 (tc_gen_reloc): Handle substractions of symbols, if possible do
1735 fixups, abort otherwise.
1736 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1737 tc_fix_adjustable): Define.
1739 2006-03-02 James E Wilson <wilson@specifix.com>
1741 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1742 change the template, then clear md.slot[curr].end_of_insn_group.
1744 2006-02-28 Jan Beulich <jbeulich@novell.com>
1746 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1748 2006-02-28 Jan Beulich <jbeulich@novell.com>
1751 * macro.c (getstring): Don't treat parentheses special anymore.
1752 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1753 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1756 2006-02-28 Mat <mat@csail.mit.edu>
1758 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1760 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1762 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1764 (CFI_signal_frame): Define.
1765 (cfi_pseudo_table): Add .cfi_signal_frame.
1766 (dot_cfi): Handle CFI_signal_frame.
1767 (output_cie): Handle cie->signal_frame.
1768 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1769 different. Copy signal_frame from FDE to newly created CIE.
1770 * doc/as.texinfo: Document .cfi_signal_frame.
1772 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1774 * doc/Makefile.am: Add html target.
1775 * doc/Makefile.in: Regenerate.
1776 * po/Make-in: Add html target.
1778 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1780 * config/tc-i386.c (output_insn): Support Intel Merom New
1783 * config/tc-i386.h (CpuMNI): New.
1784 (CpuUnknownFlags): Add CpuMNI.
1786 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1788 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1789 (hpriv_reg_table): New table for hyperprivileged registers.
1790 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1793 2006-02-24 DJ Delorie <dj@redhat.com>
1795 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1796 (tc_gen_reloc): Don't define.
1797 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1798 (OPTION_LINKRELAX): New.
1799 (md_longopts): Add it.
1801 (md_parse_options): Set it.
1802 (md_assemble): Emit relaxation relocs as needed.
1803 (md_convert_frag): Emit relaxation relocs as needed.
1804 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1805 (m32c_apply_fix): New.
1806 (tc_gen_reloc): New.
1807 (m32c_force_relocation): Force out jump relocs when relaxing.
1808 (m32c_fix_adjustable): Return false if relaxing.
1810 2006-02-24 Paul Brook <paul@codesourcery.com>
1812 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1813 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1814 (struct asm_barrier_opt): Define.
1815 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1816 (parse_psr): Accept V7M psr names.
1817 (parse_barrier): New function.
1818 (enum operand_parse_code): Add OP_oBARRIER.
1819 (parse_operands): Implement OP_oBARRIER.
1820 (do_barrier): New function.
1821 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1822 (do_t_cpsi): Add V7M restrictions.
1823 (do_t_mrs, do_t_msr): Validate V7M variants.
1824 (md_assemble): Check for NULL variants.
1825 (v7m_psrs, barrier_opt_names): New tables.
1826 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1827 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1828 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1829 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1830 (struct cpu_arch_ver_table): Define.
1831 (cpu_arch_ver): New.
1832 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1833 Tag_CPU_arch_profile.
1834 * doc/c-arm.texi: Document new cpu and arch options.
1836 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1838 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1840 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1842 * config/tc-ia64.c: Update copyright years.
1844 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1846 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1849 2005-02-22 Paul Brook <paul@codesourcery.com>
1851 * config/tc-arm.c (do_pld): Remove incorrect write to
1853 (encode_thumb32_addr_mode): Use correct operand.
1855 2006-02-21 Paul Brook <paul@codesourcery.com>
1857 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1859 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1860 Anil Paranjape <anilp1@kpitcummins.com>
1861 Shilin Shakti <shilins@kpitcummins.com>
1863 * Makefile.am: Add xc16x related entry.
1864 * Makefile.in: Regenerate.
1865 * configure.in: Added xc16x related entry.
1866 * configure: Regenerate.
1867 * config/tc-xc16x.h: New file
1868 * config/tc-xc16x.c: New file
1869 * doc/c-xc16x.texi: New file for xc16x
1870 * doc/all.texi: Entry for xc16x
1871 * doc/Makefile.texi: Added c-xc16x.texi
1872 * NEWS: Announce the support for the new target.
1874 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1876 * configure.tgt: set emulation for mips-*-netbsd*
1878 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1880 * config.in: Rebuilt.
1882 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1884 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1885 from 1, not 0, in error messages.
1886 (md_assemble): Simplify special-case check for ENTRY instructions.
1887 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1888 operand in error message.
1890 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1892 * configure.tgt (arm-*-linux-gnueabi*): Change to
1895 2006-02-10 Nick Clifton <nickc@redhat.com>
1897 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1898 32-bit value is propagated into the upper bits of a 64-bit long.
1900 * config/tc-arc.c (init_opcode_tables): Fix cast.
1901 (arc_extoper, md_operand): Likewise.
1903 2006-02-09 David Heine <dlheine@tensilica.com>
1905 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1906 each relaxation step.
1908 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1910 * configure.in (CHECK_DECLS): Add vsnprintf.
1911 * configure: Regenerate.
1912 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1913 include/declare here, but...
1914 * as.h: Move code detecting VARARGS idiom to the top.
1915 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1916 (vsnprintf): Declare if not already declared.
1918 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1920 * as.c (close_output_file): New.
1921 (main): Register close_output_file with xatexit before
1922 dump_statistics. Don't call output_file_close.
1924 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1926 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1927 mcf5329_control_regs): New.
1928 (not_current_architecture, selected_arch, selected_cpu): New.
1929 (m68k_archs, m68k_extensions): New.
1930 (archs): Renamed to ...
1931 (m68k_cpus): ... here. Adjust.
1933 (md_pseudo_table): Add arch and cpu directives.
1934 (find_cf_chip, m68k_ip): Adjust table scanning.
1935 (no_68851, no_68881): Remove.
1936 (md_assemble): Lazily initialize.
1937 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1938 (md_init_after_args): Move functionality to m68k_init_arch.
1939 (mri_chip): Adjust table scanning.
1940 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1941 options with saner parsing.
1942 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1943 m68k_init_arch): New.
1944 (s_m68k_cpu, s_m68k_arch): New.
1945 (md_show_usage): Adjust.
1946 (m68k_elf_final_processing): Set CF EF flags.
1947 * config/tc-m68k.h (m68k_init_after_args): Remove.
1948 (tc_init_after_args): Remove.
1949 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1950 (M68k-Directives): Document .arch and .cpu directives.
1952 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1954 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1955 synonyms for equ and defl.
1956 (z80_cons_fix_new): New function.
1957 (emit_byte): Disallow relative jumps to absolute locations.
1958 (emit_data): Only handle defb, prototype changed, because defb is
1959 now handled as pseudo-op rather than an instruction.
1960 (instab): Entries for defb,defw,db,dw moved from here...
1961 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1962 Add entries for def24,def32,d24,d32.
1963 (md_assemble): Improved error handling.
1964 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1965 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1966 (z80_cons_fix_new): Declare.
1967 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1968 (def24,d24,def32,d32): New pseudo-ops.
1970 2006-02-02 Paul Brook <paul@codesourcery.com>
1972 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1974 2005-02-02 Paul Brook <paul@codesourcery.com>
1976 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1977 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1978 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1979 T2_OPCODE_RSB): Define.
1980 (thumb32_negate_data_op): New function.
1981 (md_apply_fix): Use it.
1983 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1985 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1987 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1988 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1990 (relaxation_requirements): Add pfinish_frag argument and use it to
1991 replace setting tinsn->record_fix fields.
1992 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1993 and vinsn_to_insnbuf. Remove references to record_fix and
1994 slot_sub_symbols fields.
1995 (xtensa_mark_narrow_branches): Delete unused code.
1996 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1998 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2000 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2001 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2002 of the record_fix field. Simplify error messages for unexpected
2004 (set_expr_symbol_offset_diff): Delete.
2006 2006-01-31 Paul Brook <paul@codesourcery.com>
2008 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2010 2006-01-31 Paul Brook <paul@codesourcery.com>
2011 Richard Earnshaw <rearnsha@arm.com>
2013 * config/tc-arm.c: Use arm_feature_set.
2014 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2015 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2016 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2019 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2020 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2021 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2022 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2024 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2025 (arm_opts): Move old cpu/arch options from here...
2026 (arm_legacy_opts): ... to here.
2027 (md_parse_option): Search arm_legacy_opts.
2028 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2029 (arm_float_abis, arm_eabis): Make const.
2031 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2033 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2035 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2037 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2038 in load immediate intruction.
2040 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2042 * config/bfin-parse.y (value_match): Use correct conversion
2043 specifications in template string for __FILE__ and __LINE__.
2047 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2049 Introduce TLS descriptors for i386 and x86_64.
2050 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2051 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2052 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2053 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2054 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2056 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2057 (lex_got): Handle @tlsdesc and @tlscall.
2058 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2060 2006-01-11 Nick Clifton <nickc@redhat.com>
2062 Fixes for building on 64-bit hosts:
2063 * config/tc-avr.c (mod_index): New union to allow conversion
2064 between pointers and integers.
2065 (md_begin, avr_ldi_expression): Use it.
2066 * config/tc-i370.c (md_assemble): Add cast for argument to print
2068 * config/tc-tic54x.c (subsym_substitute): Likewise.
2069 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2070 opindex field of fr_cgen structure into a pointer so that it can
2071 be stored in a frag.
2072 * config/tc-mn10300.c (md_assemble): Likewise.
2073 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2075 * config/tc-v850.c: Replace uses of (int) casts with correct
2078 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2081 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2083 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2086 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2087 a local-label reference.
2089 For older changes see ChangeLog-2005
2095 version-control: never
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