1 2006-07-17 Thiemo Seufer <ths@mips.com>
3 * read.c (s_struct): Use IS_ELF.
4 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
5 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
6 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
7 s_mips_mask): Likewise.
9 2006-07-16 Thiemo Seufer <ths@mips.com>
10 David Ung <davidu@mips.com>
12 * read.c (s_struct): Handle ELF section changing.
13 * config/tc-mips.c (s_align): Leave enabling auto-align to the
15 (s_change_sec): Try section changing only if we output ELF.
17 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
19 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
21 (smallest_imm_type): Remove Cpu086.
22 (i386_target_format): Likewise.
24 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
27 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
28 Michael Meissner <michael.meissner@amd.com>
30 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
31 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
32 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
34 (i386_align_code): Ditto.
35 (md_assemble_code): Add support for insertq/extrq instructions,
36 swapping as needed for intel syntax.
37 (swap_imm_operands): New function to swap immediate operands.
38 (swap_operands): Deal with 4 operand instructions.
39 (build_modrm_byte): Add support for insertq instruction.
41 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
43 * config/tc-i386.h (Size64): Fix a typo in comment.
45 2006-07-12 Nick Clifton <nickc@redhat.com>
47 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
48 fixup_segment() to repeat a range check on a value that has
49 already been checked here.
51 2006-07-07 James E Wilson <wilson@specifix.com>
53 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
55 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
56 Nick Clifton <nickc@redhat.com>
59 * doc/as.texi: Fix spelling typo: branchs => branches.
60 * doc/c-m68hc11.texi: Likewise.
61 * config/tc-m68hc11.c: Likewise.
62 Support old spelling of command line switch for backwards
65 2006-07-04 Thiemo Seufer <ths@mips.com>
66 David Ung <davidu@mips.com>
68 * config/tc-mips.c (s_is_linkonce): New function.
69 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
70 weak, external, and linkonce symbols.
71 (pic_need_relax): Use s_is_linkonce.
73 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
75 * doc/as.texinfo (Org): Remove space.
76 (P2align): Add "@var{abs-expr},".
78 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
80 * config/tc-i386.c (cpu_arch_tune_set): New.
81 (cpu_arch_isa): Likewise.
82 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
83 nops with short or long nop sequences based on -march=/.arch
85 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
86 set cpu_arch_tune and cpu_arch_tune_flags.
87 (md_parse_option): For -march=, set cpu_arch_isa and set
88 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
89 0. Set cpu_arch_tune_set to 1 for -mtune=.
90 (i386_target_format): Don't set cpu_arch_tune.
92 2006-06-23 Nigel Stephens <nigel@mips.com>
94 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
95 generated .sbss.* and .gnu.linkonce.sb.*.
97 2006-06-23 Thiemo Seufer <ths@mips.com>
98 David Ung <davidu@mips.com>
100 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
102 * config/tc-mips.c (label_list): Define per-segment label_list.
103 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
104 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
105 mips_from_file_after_relocs, mips_define_label): Use per-segment
108 2006-06-22 Thiemo Seufer <ths@mips.com>
110 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
111 (append_insn): Use it.
112 (md_apply_fix): Whitespace formatting.
113 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
114 mips16_extended_frag): Remove register specifier.
115 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
118 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
120 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
121 a directive saving VFP registers for ARMv6 or later.
122 (s_arm_unwind_save): Add parameter arch_v6 and call
123 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
125 (md_pseudo_table): Add entry for new "vsave" directive.
126 * doc/c-arm.texi: Correct error in example for "save"
127 directive (fstmdf -> fstmdx). Also document "vsave" directive.
129 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
130 Anatoly Sokolov <aesok@post.ru>
132 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
133 and atmega644p devices. Rename atmega164/atmega324 devices to
134 atmega164p/atmega324p.
135 * doc/c-avr.texi: Document new mcu and arch options.
137 2006-06-17 Nick Clifton <nickc@redhat.com>
139 * config/tc-arm.c (enum parse_operand_result): Move outside of
140 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
142 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
144 * config/tc-i386.h (processor_type): New.
145 (arch_entry): Add type.
147 * config/tc-i386.c (cpu_arch_tune): New.
148 (cpu_arch_tune_flags): Likewise.
149 (cpu_arch_isa_flags): Likewise.
151 (set_cpu_arch): Also update cpu_arch_isa_flags.
152 (md_assemble): Update cpu_arch_isa_flags.
154 (OPTION_MTUNE): Likewise.
155 (md_longopts): Add -march= and -mtune=.
156 (md_parse_option): Support -march= and -mtune=.
157 (md_show_usage): Add -march=CPU/-mtune=CPU.
158 (i386_target_format): Also update cpu_arch_isa_flags,
159 cpu_arch_tune and cpu_arch_tune_flags.
161 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
163 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
165 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
167 * config/tc-arm.c (enum parse_operand_result): New.
168 (struct group_reloc_table_entry): New.
169 (enum group_reloc_type): New.
170 (group_reloc_table): New array.
171 (find_group_reloc_table_entry): New function.
172 (parse_shifter_operand_group_reloc): New function.
173 (parse_address_main): New function, incorporating code
174 from the old parse_address function. To be used via...
175 (parse_address): wrapper for parse_address_main; and
176 (parse_address_group_reloc): new function, likewise.
177 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
178 OP_ADDRGLDRS, OP_ADDRGLDC.
179 (parse_operands): Support for these new operand codes.
180 New macro po_misc_or_fail_no_backtrack.
181 (encode_arm_cp_address): Preserve group relocations.
182 (insns): Modify to use the above operand codes where group
183 relocations are permitted.
184 (md_apply_fix): Handle the group relocations
185 ALU_PC_G0_NC through LDC_SB_G2.
186 (tc_gen_reloc): Likewise.
187 (arm_force_relocation): Leave group relocations for the linker.
188 (arm_fix_adjustable): Likewise.
190 2006-06-15 Julian Brown <julian@codesourcery.com>
192 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
193 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
196 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
198 * config/tc-i386.c (process_suffix): Don't add rex64 for
201 2006-06-09 Thiemo Seufer <ths@mips.com>
203 * config/tc-mips.c (mips_ip): Maintain argument count.
205 2006-06-09 Alan Modra <amodra@bigpond.net.au>
207 * config/tc-iq2000.c: Include sb.h.
209 2006-06-08 Nigel Stephens <nigel@mips.com>
211 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
212 aliases for better compatibility with SGI tools.
214 2006-06-08 Alan Modra <amodra@bigpond.net.au>
216 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
217 * Makefile.am (GASLIBS): Expand @BFDLIB@.
219 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
220 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
221 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
223 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
224 * Makefile.in: Regenerate.
225 * doc/Makefile.in: Regenerate.
226 * configure: Regenerate.
228 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
230 * po/Make-in (pdf, ps): New dummy targets.
232 2006-06-07 Julian Brown <julian@codesourcery.com>
234 * config/tc-arm.c (stdarg.h): include.
235 (arm_it): Add uncond_value field. Add isvec and issingle to operand
237 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
238 REG_TYPE_NSDQ (single, double or quad vector reg).
239 (reg_expected_msgs): Update.
240 (BAD_FPU): Add macro for unsupported FPU instruction error.
241 (parse_neon_type): Support 'd' as an alias for .f64.
242 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
244 (parse_vfp_reg_list): Don't update first arg on error.
245 (parse_neon_mov): Support extra syntax for VFP moves.
246 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
247 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
248 (parse_operands): Support isvec, issingle operands fields, new parse
250 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
252 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
253 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
254 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
255 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
257 (neon_shape): Redefine in terms of above.
258 (neon_shape_class): New enumeration, table of shape classes.
259 (neon_shape_el): New enumeration. One element of a shape.
260 (neon_shape_el_size): Register widths of above, where appropriate.
261 (neon_shape_info): New struct. Info for shape table.
262 (neon_shape_tab): New array.
263 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
264 (neon_check_shape): Rewrite as...
265 (neon_select_shape): New function to classify instruction shapes,
266 driven by new table neon_shape_tab array.
267 (neon_quad): New function. Return 1 if shape should set Q flag in
268 instructions (or equivalent), 0 otherwise.
269 (type_chk_of_el_type): Support F64.
270 (el_type_of_type_chk): Likewise.
271 (neon_check_type): Add support for VFP type checking (VFP data
272 elements fill their containing registers).
273 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
274 in thumb mode for VFP instructions.
275 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
276 and encode the current instruction as if it were that opcode.
277 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
278 arguments, call function in PFN.
279 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
280 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
281 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
282 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
283 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
284 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
285 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
286 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
287 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
288 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
289 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
290 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
291 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
292 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
293 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
295 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
296 between VFP and Neon turns out to belong to Neon. Perform
297 architecture check and fill in condition field if appropriate.
298 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
299 (do_neon_cvt): Add support for VFP variants of instructions.
300 (neon_cvt_flavour): Extend to cover VFP conversions.
301 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
303 (do_neon_ldr_str): Handle single-precision VFP load/store.
304 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
305 NS_NULL not NS_IGNORE.
306 (opcode_tag): Add OT_csuffixF for operands which either take a
307 conditional suffix, or have 0xF in the condition field.
308 (md_assemble): Add support for OT_csuffixF.
309 (NCE): Replace macro with...
310 (NCE_tag, NCE, NCEF): New macros.
311 (nCE): Replace macro with...
312 (nCE_tag, nCE, nCEF): New macros.
313 (insns): Add support for VFP insns or VFP versions of insns msr,
314 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
315 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
316 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
317 VFP/Neon insns together.
319 2006-06-07 Alan Modra <amodra@bigpond.net.au>
320 Ladislav Michl <ladis@linux-mips.org>
322 * app.c: Don't include headers already included by as.h.
324 * atof-generic.c: Likewise.
326 * dwarf2dbg.c: Likewise.
328 * input-file.c: Likewise.
329 * input-scrub.c: Likewise.
331 * output-file.c: Likewise.
334 * config/bfin-lex.l: Likewise.
335 * config/obj-coff.h: Likewise.
336 * config/obj-elf.h: Likewise.
337 * config/obj-som.h: Likewise.
338 * config/tc-arc.c: Likewise.
339 * config/tc-arm.c: Likewise.
340 * config/tc-avr.c: Likewise.
341 * config/tc-bfin.c: Likewise.
342 * config/tc-cris.c: Likewise.
343 * config/tc-d10v.c: Likewise.
344 * config/tc-d30v.c: Likewise.
345 * config/tc-dlx.h: Likewise.
346 * config/tc-fr30.c: Likewise.
347 * config/tc-frv.c: Likewise.
348 * config/tc-h8300.c: Likewise.
349 * config/tc-hppa.c: Likewise.
350 * config/tc-i370.c: Likewise.
351 * config/tc-i860.c: Likewise.
352 * config/tc-i960.c: Likewise.
353 * config/tc-ip2k.c: Likewise.
354 * config/tc-iq2000.c: Likewise.
355 * config/tc-m32c.c: Likewise.
356 * config/tc-m32r.c: Likewise.
357 * config/tc-maxq.c: Likewise.
358 * config/tc-mcore.c: Likewise.
359 * config/tc-mips.c: Likewise.
360 * config/tc-mmix.c: Likewise.
361 * config/tc-mn10200.c: Likewise.
362 * config/tc-mn10300.c: Likewise.
363 * config/tc-msp430.c: Likewise.
364 * config/tc-mt.c: Likewise.
365 * config/tc-ns32k.c: Likewise.
366 * config/tc-openrisc.c: Likewise.
367 * config/tc-ppc.c: Likewise.
368 * config/tc-s390.c: Likewise.
369 * config/tc-sh.c: Likewise.
370 * config/tc-sh64.c: Likewise.
371 * config/tc-sparc.c: Likewise.
372 * config/tc-tic30.c: Likewise.
373 * config/tc-tic4x.c: Likewise.
374 * config/tc-tic54x.c: Likewise.
375 * config/tc-v850.c: Likewise.
376 * config/tc-vax.c: Likewise.
377 * config/tc-xc16x.c: Likewise.
378 * config/tc-xstormy16.c: Likewise.
379 * config/tc-xtensa.c: Likewise.
380 * config/tc-z80.c: Likewise.
381 * config/tc-z8k.c: Likewise.
382 * macro.h: Don't include sb.h or ansidecl.h.
383 * sb.h: Don't include stdio.h or ansidecl.h.
384 * cond.c: Include sb.h.
385 * itbl-lex.l: Include as.h instead of other system headers.
386 * itbl-parse.y: Likewise.
387 * itbl-ops.c: Similarly.
388 * itbl-ops.h: Don't include as.h or ansidecl.h.
389 * config/bfin-defs.h: Don't include bfd.h or as.h.
390 * config/bfin-parse.y: Include as.h instead of other system headers.
392 2006-06-06 Ben Elliston <bje@au.ibm.com>
393 Anton Blanchard <anton@samba.org>
395 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
396 (md_show_usage): Document it.
397 (ppc_setup_opcodes): Test power6 opcode flag bits.
398 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
400 2006-06-06 Thiemo Seufer <ths@mips.com>
401 Chao-ying Fu <fu@mips.com>
403 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
404 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
405 (macro_build): Update comment.
406 (mips_ip): Allow DSP64 instructions for MIPS64R2.
407 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
409 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
410 MIPS_CPU_ASE_MDMX flags for sb1.
412 2006-06-05 Thiemo Seufer <ths@mips.com>
414 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
416 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
417 (mips_ip): Make overflowed/underflowed constant arguments in DSP
418 and MT instructions a fatal error. Use INSERT_OPERAND where
419 appropriate. Improve warnings for break and wait code overflows.
420 Use symbolic constant of OP_MASK_COPZ.
421 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
423 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
425 * po/Make-in (top_builddir): Define.
427 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
429 * doc/Makefile.am (TEXI2DVI): Define.
430 * doc/Makefile.in: Regenerate.
431 * doc/c-arc.texi: Fix typo.
433 2006-06-01 Alan Modra <amodra@bigpond.net.au>
435 * config/obj-ieee.c: Delete.
436 * config/obj-ieee.h: Delete.
437 * Makefile.am (OBJ_FORMATS): Remove ieee.
438 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
439 (obj-ieee.o): Remove rule.
440 * Makefile.in: Regenerate.
441 * configure.in (atof): Remove tahoe.
442 (OBJ_MAYBE_IEEE): Don't define.
443 * configure: Regenerate.
444 * config.in: Regenerate.
445 * doc/Makefile.in: Regenerate.
446 * po/POTFILES.in: Regenerate.
448 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
450 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
451 and LIBINTL_DEP everywhere.
453 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
454 * acinclude.m4: Include new gettext macros.
455 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
456 Remove local code for po/Makefile.
457 * Makefile.in, configure, doc/Makefile.in: Regenerated.
459 2006-05-30 Nick Clifton <nickc@redhat.com>
461 * po/es.po: Updated Spanish translation.
463 2006-05-06 Denis Chertykov <denisc@overta.ru>
465 * doc/c-avr.texi: New file.
466 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
467 * doc/all.texi: Set AVR
468 * doc/as.texinfo: Include c-avr.texi
470 2006-05-28 Jie Zhang <jie.zhang@analog.com>
472 * config/bfin-parse.y (check_macfunc): Loose the condition of
473 calling check_multiply_halfregs ().
475 2006-05-25 Jie Zhang <jie.zhang@analog.com>
477 * config/bfin-parse.y (asm_1): Better check and deal with
478 vector and scalar Multiply 16-Bit Operands instructions.
480 2006-05-24 Nick Clifton <nickc@redhat.com>
482 * config/tc-hppa.c: Convert to ISO C90 format.
483 * config/tc-hppa.h: Likewise.
485 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
486 Randolph Chung <randolph@tausq.org>
488 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
489 is_tls_ieoff, is_tls_leoff): Define.
490 (fix_new_hppa): Handle TLS.
491 (cons_fix_new_hppa): Likewise.
493 (md_apply_fix): Handle TLS relocs.
494 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
496 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
498 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
500 2006-05-23 Thiemo Seufer <ths@mips.com>
501 David Ung <davidu@mips.com>
502 Nigel Stephens <nigel@mips.com>
505 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
506 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
507 ISA_HAS_MXHC1): New macros.
508 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
509 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
510 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
511 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
512 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
513 (mips_after_parse_args): Change default handling of float register
514 size to account for 32bit code with 64bit FP. Better sanity checking
515 of ISA/ASE/ABI option combinations.
516 (s_mipsset): Support switching of GPR and FPR sizes via
517 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
519 (mips_elf_final_processing): We should record the use of 64bit FP
520 registers in 32bit code but we don't, because ELF header flags are
522 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
523 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
524 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
525 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
526 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
527 missing -march options. Document .set arch=CPU. Move .set smartmips
528 to ASE page. Use @code for .set FOO examples.
530 2006-05-23 Jie Zhang <jie.zhang@analog.com>
532 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
535 2006-05-23 Jie Zhang <jie.zhang@analog.com>
537 * config/bfin-defs.h (bfin_equals): Remove declaration.
538 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
539 * config/tc-bfin.c (bfin_name_is_register): Remove.
540 (bfin_equals): Remove.
541 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
542 (bfin_name_is_register): Remove declaration.
544 2006-05-19 Thiemo Seufer <ths@mips.com>
545 Nigel Stephens <nigel@mips.com>
547 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
548 (mips_oddfpreg_ok): New function.
551 2006-05-19 Thiemo Seufer <ths@mips.com>
552 David Ung <davidu@mips.com>
554 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
555 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
556 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
557 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
558 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
559 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
560 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
561 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
562 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
563 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
564 reg_names_o32, reg_names_n32n64): Define register classes.
565 (reg_lookup): New function, use register classes.
566 (md_begin): Reserve register names in the symbol table. Simplify
568 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
570 (mips16_ip): Use reg_lookup.
571 (tc_get_register): Likewise.
572 (tc_mips_regname_to_dw2regnum): New function.
574 2006-05-19 Thiemo Seufer <ths@mips.com>
576 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
577 Un-constify string argument.
578 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
580 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
582 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
584 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
586 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
588 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
591 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
593 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
594 cfloat/m68881 to correct architecture before using it.
596 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
598 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
601 2006-05-15 Paul Brook <paul@codesourcery.com>
603 * config/tc-arm.c (arm_adjust_symtab): Use
604 bfd_is_arm_special_symbol_name.
606 2006-05-15 Bob Wilson <bob.wilson@acm.org>
608 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
609 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
610 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
611 Handle errors from calls to xtensa_opcode_is_* functions.
613 2006-05-14 Thiemo Seufer <ths@mips.com>
615 * config/tc-mips.c (macro_build): Test for currently active
617 (mips16_ip): Reject invalid opcodes.
619 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
621 * doc/as.texinfo: Rename "Index" to "AS Index",
622 and "ABORT" to "ABORT (COFF)".
624 2006-05-11 Paul Brook <paul@codesourcery.com>
626 * config/tc-arm.c (parse_half): New function.
627 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
628 (parse_operands): Ditto.
629 (do_mov16): Reject invalid relocations.
630 (do_t_mov16): Ditto. Use Thumb reloc numbers.
631 (insns): Replace Iffff with HALF.
632 (md_apply_fix): Add MOVW and MOVT relocs.
633 (tc_gen_reloc): Ditto.
634 * doc/c-arm.texi: Document relocation operators
636 2006-05-11 Paul Brook <paul@codesourcery.com>
638 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
640 2006-05-11 Thiemo Seufer <ths@mips.com>
642 * config/tc-mips.c (append_insn): Don't check the range of j or
645 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
647 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
648 relocs against external symbols for WinCE targets.
649 (md_apply_fix): Likewise.
651 2006-05-09 David Ung <davidu@mips.com>
653 * config/tc-mips.c (append_insn): Only warn about an out-of-range
656 2006-05-09 Nick Clifton <nickc@redhat.com>
658 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
659 against symbols which are not going to be placed into the symbol
662 2006-05-09 Ben Elliston <bje@au.ibm.com>
664 * expr.c (operand): Remove `if (0 && ..)' statement and
665 subsequently unused target_op label. Collapse `if (1 || ..)'
667 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
668 separately above the switch.
670 2006-05-08 Nick Clifton <nickc@redhat.com>
673 * config/tc-msp430.c (line_separator_character): Define as |.
675 2006-05-08 Thiemo Seufer <ths@mips.com>
676 Nigel Stephens <nigel@mips.com>
677 David Ung <davidu@mips.com>
679 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
680 (mips_opts): Likewise.
681 (file_ase_smartmips): New variable.
682 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
683 (macro_build): Handle SmartMIPS instructions.
685 (md_longopts): Add argument handling for smartmips.
686 (md_parse_options, mips_after_parse_args): Likewise.
687 (s_mipsset): Add .set smartmips support.
688 (md_show_usage): Document -msmartmips/-mno-smartmips.
689 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
691 * doc/c-mips.texi: Likewise.
693 2006-05-08 Alan Modra <amodra@bigpond.net.au>
695 * write.c (relax_segment): Add pass count arg. Don't error on
696 negative org/space on first two passes.
697 (relax_seg_info): New struct.
698 (relax_seg, write_object_file): Adjust.
699 * write.h (relax_segment): Update prototype.
701 2006-05-05 Julian Brown <julian@codesourcery.com>
703 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
705 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
706 architecture version checks.
707 (insns): Allow overlapping instructions to be used in VFP mode.
709 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
712 * config/obj-elf.c (obj_elf_change_section): Allow user
713 specified SHF_ALPHA_GPREL.
715 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
717 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
718 for PMEM related expressions.
720 2006-05-05 Nick Clifton <nickc@redhat.com>
723 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
724 insertion of a directory separator character into a string at a
725 given offset. Uses heuristics to decide when to use a backslash
726 character rather than a forward-slash character.
727 (dwarf2_directive_loc): Use the macro.
728 (out_debug_info): Likewise.
730 2006-05-05 Thiemo Seufer <ths@mips.com>
731 David Ung <davidu@mips.com>
733 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
735 (macro): Add new case M_CACHE_AB.
737 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
739 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
740 (opcode_lookup): Issue a warning for opcode with
741 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
742 identical to OT_cinfix3.
743 (TxC3w, TC3w, tC3w): New.
744 (insns): Use tC3w and TC3w for comparison instructions with
747 2006-05-04 Alan Modra <amodra@bigpond.net.au>
749 * subsegs.h (struct frchain): Delete frch_seg.
750 (frchain_root): Delete.
751 (seg_info): Define as macro.
752 * subsegs.c (frchain_root): Delete.
753 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
754 (subsegs_begin, subseg_change): Adjust for above.
755 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
756 rather than to one big list.
757 (subseg_get): Don't special case abs, und sections.
758 (subseg_new, subseg_force_new): Don't set frchainP here.
760 (subsegs_print_statistics): Adjust frag chain control list traversal.
761 * debug.c (dmp_frags): Likewise.
762 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
763 at frchain_root. Make use of known frchain ordering.
764 (last_frag_for_seg): Likewise.
765 (get_frag_fix): Likewise. Add seg param.
766 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
767 * write.c (chain_frchains_together_1): Adjust for struct frchain.
768 (SUB_SEGMENT_ALIGN): Likewise.
769 (subsegs_finish): Adjust frchain list traversal.
770 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
771 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
772 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
773 (xtensa_fix_b_j_loop_end_frags): Likewise.
774 (xtensa_fix_close_loop_end_frags): Likewise.
775 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
776 (retrieve_segment_info): Delete frch_seg initialisation.
778 2006-05-03 Alan Modra <amodra@bigpond.net.au>
780 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
781 * config/obj-elf.h (obj_sec_set_private_data): Delete.
782 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
783 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
785 2006-05-02 Joseph Myers <joseph@codesourcery.com>
787 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
789 (md_apply_fix3): Multiply offset by 4 here for
790 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
792 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
793 Jan Beulich <jbeulich@novell.com>
795 * config/tc-i386.c (output_invalid_buf): Change size for
797 * config/tc-tic30.c (output_invalid_buf): Likewise.
799 * config/tc-i386.c (output_invalid): Cast none-ascii char to
801 * config/tc-tic30.c (output_invalid): Likewise.
803 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
805 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
806 (TEXI2POD): Use AM_MAKEINFOFLAGS.
807 (asconfig.texi): Don't set top_srcdir.
808 * doc/as.texinfo: Don't use top_srcdir.
809 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
811 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
813 * config/tc-i386.c (output_invalid_buf): Change size to 16.
814 * config/tc-tic30.c (output_invalid_buf): Likewise.
816 * config/tc-i386.c (output_invalid): Use snprintf instead of
818 * config/tc-ia64.c (declare_register_set): Likewise.
819 (emit_one_bundle): Likewise.
820 (check_dependencies): Likewise.
821 * config/tc-tic30.c (output_invalid): Likewise.
823 2006-05-02 Paul Brook <paul@codesourcery.com>
825 * config/tc-arm.c (arm_optimize_expr): New function.
826 * config/tc-arm.h (md_optimize_expr): Define
827 (arm_optimize_expr): Add prototype.
828 (TC_FORCE_RELOCATION_SUB_SAME): Define.
830 2006-05-02 Ben Elliston <bje@au.ibm.com>
832 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
835 * sb.h (sb_list_vector): Move to sb.c.
836 * sb.c (free_list): Use type of sb_list_vector directly.
837 (sb_build): Fix off-by-one error in assertion about `size'.
839 2006-05-01 Ben Elliston <bje@au.ibm.com>
841 * listing.c (listing_listing): Remove useless loop.
842 * macro.c (macro_expand): Remove is_positional local variable.
843 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
844 and simplify surrounding expressions, where possible.
845 (assign_symbol): Likewise.
846 (s_weakref): Likewise.
847 * symbols.c (colon): Likewise.
849 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
851 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
853 2006-04-30 Thiemo Seufer <ths@mips.com>
854 David Ung <davidu@mips.com>
856 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
857 (mips_immed): New table that records various handling of udi
858 instruction patterns.
859 (mips_ip): Adds udi handling.
861 2006-04-28 Alan Modra <amodra@bigpond.net.au>
863 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
864 of list rather than beginning.
866 2006-04-26 Julian Brown <julian@codesourcery.com>
868 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
869 (is_quarter_float): Rename from above. Simplify slightly.
870 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
872 (parse_neon_mov): Parse floating-point constants.
873 (neon_qfloat_bits): Fix encoding.
874 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
875 preference to integer encoding when using the F32 type.
877 2006-04-26 Julian Brown <julian@codesourcery.com>
879 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
880 zero-initialising structures containing it will lead to invalid types).
881 (arm_it): Add vectype to each operand.
882 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
884 (neon_typed_alias): New structure. Extra information for typed
886 (reg_entry): Add neon type info field.
887 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
888 Break out alternative syntax for coprocessor registers, etc. into...
889 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
890 out from arm_reg_parse.
891 (parse_neon_type): Move. Return SUCCESS/FAIL.
892 (first_error): New function. Call to ensure first error which occurs is
894 (parse_neon_operand_type): Parse exactly one type.
895 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
896 (parse_typed_reg_or_scalar): New function. Handle core of both
897 arm_typed_reg_parse and parse_scalar.
898 (arm_typed_reg_parse): Parse a register with an optional type.
899 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
901 (parse_scalar): Parse a Neon scalar with optional type.
902 (parse_reg_list): Use first_error.
903 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
904 (neon_alias_types_same): New function. Return true if two (alias) types
906 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
908 (insert_reg_alias): Return new reg_entry not void.
909 (insert_neon_reg_alias): New function. Insert type/index information as
910 well as register for alias.
911 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
912 make typed register aliases accordingly.
913 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
915 (s_unreq): Delete type information if present.
916 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
917 (s_arm_unwind_save_mmxwcg): Likewise.
918 (s_arm_unwind_movsp): Likewise.
919 (s_arm_unwind_setfp): Likewise.
920 (parse_shift): Likewise.
921 (parse_shifter_operand): Likewise.
922 (parse_address): Likewise.
923 (parse_tb): Likewise.
924 (tc_arm_regname_to_dw2regnum): Likewise.
925 (md_pseudo_table): Add dn, qn.
926 (parse_neon_mov): Handle typed operands.
927 (parse_operands): Likewise.
928 (neon_type_mask): Add N_SIZ.
929 (N_ALLMODS): New macro.
930 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
931 (el_type_of_type_chk): Add some safeguards.
932 (modify_types_allowed): Fix logic bug.
933 (neon_check_type): Handle operands with types.
934 (neon_three_same): Remove redundant optional arg handling.
935 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
936 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
937 (do_neon_step): Adjust accordingly.
938 (neon_cmode_for_logic_imm): Use first_error.
939 (do_neon_bitfield): Call neon_check_type.
940 (neon_dyadic): Rename to...
941 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
942 to allow modification of type of the destination.
943 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
944 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
945 (do_neon_compare): Make destination be an untyped bitfield.
946 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
947 (neon_mul_mac): Return early in case of errors.
948 (neon_move_immediate): Use first_error.
949 (neon_mac_reg_scalar_long): Fix type to include scalar.
950 (do_neon_dup): Likewise.
951 (do_neon_mov): Likewise (in several places).
952 (do_neon_tbl_tbx): Fix type.
953 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
954 (do_neon_ld_dup): Exit early in case of errors and/or use
956 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
957 Handle .dn/.qn directives.
958 (REGDEF): Add zero for reg_entry neon field.
960 2006-04-26 Julian Brown <julian@codesourcery.com>
962 * config/tc-arm.c (limits.h): Include.
963 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
964 (fpu_vfp_v3_or_neon_ext): Declare constants.
965 (neon_el_type): New enumeration of types for Neon vector elements.
966 (neon_type_el): New struct. Define type and size of a vector element.
967 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
969 (neon_type): Define struct. The type of an instruction.
970 (arm_it): Add 'vectype' for the current instruction.
971 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
972 (vfp_sp_reg_pos): Rename to...
973 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
975 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
976 (Neon D or Q register).
977 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
979 (GE_OPT_PREFIX_BIG): Define constant, for use in...
980 (my_get_expression): Allow above constant as argument to accept
981 64-bit constants with optional prefix.
982 (arm_reg_parse): Add extra argument to return the specific type of
983 register in when either a D or Q register (REG_TYPE_NDQ) is
984 requested. Can be NULL.
985 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
986 (parse_reg_list): Update for new arm_reg_parse args.
987 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
988 (parse_neon_el_struct_list): New function. Parse element/structure
989 register lists for VLD<n>/VST<n> instructions.
990 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
991 (s_arm_unwind_save_mmxwr): Likewise.
992 (s_arm_unwind_save_mmxwcg): Likewise.
993 (s_arm_unwind_movsp): Likewise.
994 (s_arm_unwind_setfp): Likewise.
995 (parse_big_immediate): New function. Parse an immediate, which may be
996 64 bits wide. Put results in inst.operands[i].
997 (parse_shift): Update for new arm_reg_parse args.
998 (parse_address): Likewise. Add parsing of alignment specifiers.
999 (parse_neon_mov): Parse the operands of a VMOV instruction.
1000 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1001 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1002 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1003 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1004 (parse_operands): Handle new codes above.
1005 (encode_arm_vfp_sp_reg): Rename to...
1006 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1007 selected VFP version only supports D0-D15.
1008 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1009 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1010 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1011 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1012 encode_arm_vfp_reg name, and allow 32 D regs.
1013 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1014 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1016 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1017 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1018 constant-load and conversion insns introduced with VFPv3.
1019 (neon_tab_entry): New struct.
1020 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1021 those which are the targets of pseudo-instructions.
1022 (neon_opc): Enumerate opcodes, use as indices into...
1023 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1024 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1025 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1026 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1028 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1030 (neon_type_mask): New. Compact type representation for type checking.
1031 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1032 permitted type combinations.
1033 (N_IGNORE_TYPE): New macro.
1034 (neon_check_shape): New function. Check an instruction shape for
1035 multiple alternatives. Return the specific shape for the current
1037 (neon_modify_type_size): New function. Modify a vector type and size,
1038 depending on the bit mask in argument 1.
1039 (neon_type_promote): New function. Convert a given "key" type (of an
1040 operand) into the correct type for a different operand, based on a bit
1042 (type_chk_of_el_type): New function. Convert a type and size into the
1043 compact representation used for type checking.
1044 (el_type_of_type_ckh): New function. Reverse of above (only when a
1045 single bit is set in the bit mask).
1046 (modify_types_allowed): New function. Alter a mask of allowed types
1047 based on a bit mask of modifications.
1048 (neon_check_type): New function. Check the type of the current
1049 instruction against the variable argument list. The "key" type of the
1050 instruction is returned.
1051 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1052 a Neon data-processing instruction depending on whether we're in ARM
1053 mode or Thumb-2 mode.
1054 (neon_logbits): New function.
1055 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1056 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1057 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1058 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1059 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1060 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1061 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1062 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1063 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1064 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1065 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1066 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1067 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1068 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1069 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1070 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1071 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1072 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1073 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1074 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1075 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1076 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1077 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1078 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1079 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1081 (parse_neon_type): New function. Parse Neon type specifier.
1082 (opcode_lookup): Allow parsing of Neon type specifiers.
1083 (REGNUM2, REGSETH, REGSET2): New macros.
1084 (reg_names): Add new VFPv3 and Neon registers.
1085 (NUF, nUF, NCE, nCE): New macros for opcode table.
1086 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1087 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1088 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1089 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1090 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1091 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1092 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1093 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1094 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1095 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1096 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1097 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1098 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1099 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1101 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1102 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1103 (arm_option_cpu_value): Add vfp3 and neon.
1104 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1107 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1109 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1110 syntax instead of hardcoded opcodes with ".w18" suffixes.
1111 (wide_branch_opcode): New.
1112 (build_transition): Use it to check for wide branch opcodes with
1113 either ".w18" or ".w15" suffixes.
1115 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1117 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1118 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1119 frag's is_literal flag.
1121 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1123 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1125 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1127 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1128 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1129 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1130 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1131 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1133 2005-04-20 Paul Brook <paul@codesourcery.com>
1135 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1137 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1139 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1141 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1142 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1143 Make some cpus unsupported on ELF. Run "make dep-am".
1144 * Makefile.in: Regenerate.
1146 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1148 * configure.in (--enable-targets): Indent help message.
1149 * configure: Regenerate.
1151 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1154 * config/tc-i386.c (i386_immediate): Check illegal immediate
1157 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1159 * config/tc-i386.c: Formatting.
1160 (output_disp, output_imm): ISO C90 params.
1162 * frags.c (frag_offset_fixed_p): Constify args.
1163 * frags.h (frag_offset_fixed_p): Ditto.
1165 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1166 (COFF_MAGIC): Delete.
1168 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1170 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1172 * po/POTFILES.in: Regenerated.
1174 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1176 * doc/as.texinfo: Mention that some .type syntaxes are not
1177 supported on all architectures.
1179 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1181 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1182 instructions when such transformations have been disabled.
1184 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1186 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1187 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1188 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1189 decoding the loop instructions. Remove current_offset variable.
1190 (xtensa_fix_short_loop_frags): Likewise.
1191 (min_bytes_to_other_loop_end): Remove current_offset argument.
1193 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1195 * config/tc-z80.c (z80_optimize_expr): Removed.
1196 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1198 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1200 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1201 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1202 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1203 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1204 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1205 at90can64, at90usb646, at90usb647, at90usb1286 and
1207 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1209 2006-04-07 Paul Brook <paul@codesourcery.com>
1211 * config/tc-arm.c (parse_operands): Set default error message.
1213 2006-04-07 Paul Brook <paul@codesourcery.com>
1215 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1217 2006-04-07 Paul Brook <paul@codesourcery.com>
1219 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1221 2006-04-07 Paul Brook <paul@codesourcery.com>
1223 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1224 (move_or_literal_pool): Handle Thumb-2 instructions.
1225 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1227 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1230 * config/tc-i386.c (match_template): Move 64-bit operand tests
1233 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1235 * po/Make-in: Add install-html target.
1236 * Makefile.am: Add install-html and install-html-recursive targets.
1237 * Makefile.in: Regenerate.
1238 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1239 * configure: Regenerate.
1240 * doc/Makefile.am: Add install-html and install-html-am targets.
1241 * doc/Makefile.in: Regenerate.
1243 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1245 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1248 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1249 Daniel Jacobowitz <dan@codesourcery.com>
1251 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1252 (GOTT_BASE, GOTT_INDEX): New.
1253 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1254 GOTT_INDEX when generating VxWorks PIC.
1255 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1256 use the generic *-*-vxworks* stanza instead.
1258 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1261 * frags.c (frag_offset_fixed_p): New function.
1262 * frags.h (frag_offset_fixed_p): Declare.
1263 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1264 (resolve_expression): Likewise.
1266 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1268 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1269 of the same length but different numbers of slots.
1271 2006-03-30 Andreas Schwab <schwab@suse.de>
1273 * configure.in: Fix help string for --enable-targets option.
1274 * configure: Regenerate.
1276 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1278 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1279 (m68k_ip): ... here. Use for all chips. Protect against buffer
1280 overrun and avoid excessive copying.
1282 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1283 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1284 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1285 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1286 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1287 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1288 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1289 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1290 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1291 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1292 (struct m68k_cpu): Change chip field to control_regs.
1293 (current_chip): Remove.
1294 (control_regs): New.
1295 (m68k_archs, m68k_extensions): Adjust.
1296 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1297 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1298 (find_cf_chip): Reimplement for new organization of cpu table.
1299 (select_control_regs): Remove.
1301 (struct save_opts): Save control regs, not chip.
1302 (s_save, s_restore): Adjust.
1303 (m68k_lookup_cpu): Give deprecated warning when necessary.
1304 (m68k_init_arch): Adjust.
1305 (md_show_usage): Adjust for new cpu table organization.
1307 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1309 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1310 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1311 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1313 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1314 (any_gotrel): New rule.
1315 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1316 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1318 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1319 (bfin_pic_ptr): New function.
1320 (md_pseudo_table): Add it for ".picptr".
1321 (OPTION_FDPIC): New macro.
1322 (md_longopts): Add -mfdpic.
1323 (md_parse_option): Handle it.
1324 (md_begin): Set BFD flags.
1325 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1326 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1328 * Makefile.am (bfin-parse.o): Update dependencies.
1329 (DEPTC_bfin_elf): Likewise.
1330 * Makefile.in: Regenerate.
1332 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1334 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1335 mcfemac instead of mcfmac.
1337 2006-03-23 Michael Matz <matz@suse.de>
1339 * config/tc-i386.c (type_names): Correct placement of 'static'.
1340 (reloc): Map some more relocs to their 64 bit counterpart when
1342 (output_insn): Work around breakage if DEBUG386 is defined.
1343 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1344 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1345 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1346 different from i386.
1347 (output_imm): Ditto.
1348 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1350 (md_convert_frag): Jumps can now be larger than 2GB away, error
1352 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1353 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1355 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1356 Daniel Jacobowitz <dan@codesourcery.com>
1357 Phil Edwards <phil@codesourcery.com>
1358 Zack Weinberg <zack@codesourcery.com>
1359 Mark Mitchell <mark@codesourcery.com>
1360 Nathan Sidwell <nathan@codesourcery.com>
1362 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1363 (md_begin): Complain about -G being used for PIC. Don't change
1364 the text, data and bss alignments on VxWorks.
1365 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1366 generating VxWorks PIC.
1367 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1368 (macro): Likewise, but do not treat la $25 specially for
1369 VxWorks PIC, and do not handle jal.
1370 (OPTION_MVXWORKS_PIC): New macro.
1371 (md_longopts): Add -mvxworks-pic.
1372 (md_parse_option): Don't complain about using PIC and -G together here.
1373 Handle OPTION_MVXWORKS_PIC.
1374 (md_estimate_size_before_relax): Always use the first relaxation
1375 sequence on VxWorks.
1376 * config/tc-mips.h (VXWORKS_PIC): New.
1378 2006-03-21 Paul Brook <paul@codesourcery.com>
1380 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1382 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1384 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1385 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1386 (get_loop_align_size): New.
1387 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1388 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1389 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1390 (get_noop_aligned_address): Use get_loop_align_size.
1391 (get_aligned_diff): Likewise.
1393 2006-03-21 Paul Brook <paul@codesourcery.com>
1395 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1397 2006-03-20 Paul Brook <paul@codesourcery.com>
1399 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1400 (do_t_branch): Encode branches inside IT blocks as unconditional.
1401 (do_t_cps): New function.
1402 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1403 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1404 (opcode_lookup): Allow conditional suffixes on all instructions in
1406 (md_assemble): Advance condexec state before checking for errors.
1407 (insns): Use do_t_cps.
1409 2006-03-20 Paul Brook <paul@codesourcery.com>
1411 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1412 outputting the insn.
1414 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1416 * config/tc-vax.c: Update copyright year.
1417 * config/tc-vax.h: Likewise.
1419 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1421 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1423 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1425 2006-03-17 Paul Brook <paul@codesourcery.com>
1427 * config/tc-arm.c (insns): Add ldm and stm.
1429 2006-03-17 Ben Elliston <bje@au.ibm.com>
1432 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1434 2006-03-16 Paul Brook <paul@codesourcery.com>
1436 * config/tc-arm.c (insns): Add "svc".
1438 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1440 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1441 flag and avoid double underscore prefixes.
1443 2006-03-10 Paul Brook <paul@codesourcery.com>
1445 * config/tc-arm.c (md_begin): Handle EABIv5.
1446 (arm_eabis): Add EF_ARM_EABI_VER5.
1447 * doc/c-arm.texi: Document -meabi=5.
1449 2006-03-10 Ben Elliston <bje@au.ibm.com>
1451 * app.c (do_scrub_chars): Simplify string handling.
1453 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1454 Daniel Jacobowitz <dan@codesourcery.com>
1455 Zack Weinberg <zack@codesourcery.com>
1456 Nathan Sidwell <nathan@codesourcery.com>
1457 Paul Brook <paul@codesourcery.com>
1458 Ricardo Anguiano <anguiano@codesourcery.com>
1459 Phil Edwards <phil@codesourcery.com>
1461 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1462 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1464 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1465 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1466 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1468 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1470 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1471 even when using the text-section-literals option.
1473 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1475 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1477 (m68k_ip): <case 'J'> Check we have some control regs.
1478 (md_parse_option): Allow raw arch switch.
1479 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1480 whether 68881 or cfloat was meant by -mfloat.
1481 (md_show_usage): Adjust extension display.
1482 (m68k_elf_final_processing): Adjust.
1484 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1486 * config/tc-avr.c (avr_mod_hash_value): New function.
1487 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1488 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1489 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1490 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1492 (tc_gen_reloc): Handle substractions of symbols, if possible do
1493 fixups, abort otherwise.
1494 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1495 tc_fix_adjustable): Define.
1497 2006-03-02 James E Wilson <wilson@specifix.com>
1499 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1500 change the template, then clear md.slot[curr].end_of_insn_group.
1502 2006-02-28 Jan Beulich <jbeulich@novell.com>
1504 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1506 2006-02-28 Jan Beulich <jbeulich@novell.com>
1509 * macro.c (getstring): Don't treat parentheses special anymore.
1510 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1511 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1514 2006-02-28 Mat <mat@csail.mit.edu>
1516 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1518 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1520 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1522 (CFI_signal_frame): Define.
1523 (cfi_pseudo_table): Add .cfi_signal_frame.
1524 (dot_cfi): Handle CFI_signal_frame.
1525 (output_cie): Handle cie->signal_frame.
1526 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1527 different. Copy signal_frame from FDE to newly created CIE.
1528 * doc/as.texinfo: Document .cfi_signal_frame.
1530 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1532 * doc/Makefile.am: Add html target.
1533 * doc/Makefile.in: Regenerate.
1534 * po/Make-in: Add html target.
1536 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1538 * config/tc-i386.c (output_insn): Support Intel Merom New
1541 * config/tc-i386.h (CpuMNI): New.
1542 (CpuUnknownFlags): Add CpuMNI.
1544 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1546 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1547 (hpriv_reg_table): New table for hyperprivileged registers.
1548 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1551 2006-02-24 DJ Delorie <dj@redhat.com>
1553 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1554 (tc_gen_reloc): Don't define.
1555 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1556 (OPTION_LINKRELAX): New.
1557 (md_longopts): Add it.
1559 (md_parse_options): Set it.
1560 (md_assemble): Emit relaxation relocs as needed.
1561 (md_convert_frag): Emit relaxation relocs as needed.
1562 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1563 (m32c_apply_fix): New.
1564 (tc_gen_reloc): New.
1565 (m32c_force_relocation): Force out jump relocs when relaxing.
1566 (m32c_fix_adjustable): Return false if relaxing.
1568 2006-02-24 Paul Brook <paul@codesourcery.com>
1570 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1571 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1572 (struct asm_barrier_opt): Define.
1573 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1574 (parse_psr): Accept V7M psr names.
1575 (parse_barrier): New function.
1576 (enum operand_parse_code): Add OP_oBARRIER.
1577 (parse_operands): Implement OP_oBARRIER.
1578 (do_barrier): New function.
1579 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1580 (do_t_cpsi): Add V7M restrictions.
1581 (do_t_mrs, do_t_msr): Validate V7M variants.
1582 (md_assemble): Check for NULL variants.
1583 (v7m_psrs, barrier_opt_names): New tables.
1584 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1585 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1586 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1587 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1588 (struct cpu_arch_ver_table): Define.
1589 (cpu_arch_ver): New.
1590 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1591 Tag_CPU_arch_profile.
1592 * doc/c-arm.texi: Document new cpu and arch options.
1594 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1596 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1598 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1600 * config/tc-ia64.c: Update copyright years.
1602 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1604 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1607 2005-02-22 Paul Brook <paul@codesourcery.com>
1609 * config/tc-arm.c (do_pld): Remove incorrect write to
1611 (encode_thumb32_addr_mode): Use correct operand.
1613 2006-02-21 Paul Brook <paul@codesourcery.com>
1615 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1617 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1618 Anil Paranjape <anilp1@kpitcummins.com>
1619 Shilin Shakti <shilins@kpitcummins.com>
1621 * Makefile.am: Add xc16x related entry.
1622 * Makefile.in: Regenerate.
1623 * configure.in: Added xc16x related entry.
1624 * configure: Regenerate.
1625 * config/tc-xc16x.h: New file
1626 * config/tc-xc16x.c: New file
1627 * doc/c-xc16x.texi: New file for xc16x
1628 * doc/all.texi: Entry for xc16x
1629 * doc/Makefile.texi: Added c-xc16x.texi
1630 * NEWS: Announce the support for the new target.
1632 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1634 * configure.tgt: set emulation for mips-*-netbsd*
1636 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1638 * config.in: Rebuilt.
1640 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1642 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1643 from 1, not 0, in error messages.
1644 (md_assemble): Simplify special-case check for ENTRY instructions.
1645 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1646 operand in error message.
1648 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1650 * configure.tgt (arm-*-linux-gnueabi*): Change to
1653 2006-02-10 Nick Clifton <nickc@redhat.com>
1655 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1656 32-bit value is propagated into the upper bits of a 64-bit long.
1658 * config/tc-arc.c (init_opcode_tables): Fix cast.
1659 (arc_extoper, md_operand): Likewise.
1661 2006-02-09 David Heine <dlheine@tensilica.com>
1663 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1664 each relaxation step.
1666 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1668 * configure.in (CHECK_DECLS): Add vsnprintf.
1669 * configure: Regenerate.
1670 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1671 include/declare here, but...
1672 * as.h: Move code detecting VARARGS idiom to the top.
1673 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1674 (vsnprintf): Declare if not already declared.
1676 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1678 * as.c (close_output_file): New.
1679 (main): Register close_output_file with xatexit before
1680 dump_statistics. Don't call output_file_close.
1682 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1684 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1685 mcf5329_control_regs): New.
1686 (not_current_architecture, selected_arch, selected_cpu): New.
1687 (m68k_archs, m68k_extensions): New.
1688 (archs): Renamed to ...
1689 (m68k_cpus): ... here. Adjust.
1691 (md_pseudo_table): Add arch and cpu directives.
1692 (find_cf_chip, m68k_ip): Adjust table scanning.
1693 (no_68851, no_68881): Remove.
1694 (md_assemble): Lazily initialize.
1695 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1696 (md_init_after_args): Move functionality to m68k_init_arch.
1697 (mri_chip): Adjust table scanning.
1698 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1699 options with saner parsing.
1700 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1701 m68k_init_arch): New.
1702 (s_m68k_cpu, s_m68k_arch): New.
1703 (md_show_usage): Adjust.
1704 (m68k_elf_final_processing): Set CF EF flags.
1705 * config/tc-m68k.h (m68k_init_after_args): Remove.
1706 (tc_init_after_args): Remove.
1707 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1708 (M68k-Directives): Document .arch and .cpu directives.
1710 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1712 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1713 synonyms for equ and defl.
1714 (z80_cons_fix_new): New function.
1715 (emit_byte): Disallow relative jumps to absolute locations.
1716 (emit_data): Only handle defb, prototype changed, because defb is
1717 now handled as pseudo-op rather than an instruction.
1718 (instab): Entries for defb,defw,db,dw moved from here...
1719 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1720 Add entries for def24,def32,d24,d32.
1721 (md_assemble): Improved error handling.
1722 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1723 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1724 (z80_cons_fix_new): Declare.
1725 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1726 (def24,d24,def32,d32): New pseudo-ops.
1728 2006-02-02 Paul Brook <paul@codesourcery.com>
1730 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1732 2005-02-02 Paul Brook <paul@codesourcery.com>
1734 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1735 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1736 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1737 T2_OPCODE_RSB): Define.
1738 (thumb32_negate_data_op): New function.
1739 (md_apply_fix): Use it.
1741 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1743 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1745 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1746 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1748 (relaxation_requirements): Add pfinish_frag argument and use it to
1749 replace setting tinsn->record_fix fields.
1750 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1751 and vinsn_to_insnbuf. Remove references to record_fix and
1752 slot_sub_symbols fields.
1753 (xtensa_mark_narrow_branches): Delete unused code.
1754 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1756 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1758 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1759 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1760 of the record_fix field. Simplify error messages for unexpected
1762 (set_expr_symbol_offset_diff): Delete.
1764 2006-01-31 Paul Brook <paul@codesourcery.com>
1766 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1768 2006-01-31 Paul Brook <paul@codesourcery.com>
1769 Richard Earnshaw <rearnsha@arm.com>
1771 * config/tc-arm.c: Use arm_feature_set.
1772 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1773 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1774 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1777 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1778 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1779 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1780 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1782 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1783 (arm_opts): Move old cpu/arch options from here...
1784 (arm_legacy_opts): ... to here.
1785 (md_parse_option): Search arm_legacy_opts.
1786 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1787 (arm_float_abis, arm_eabis): Make const.
1789 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1791 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1793 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1795 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1796 in load immediate intruction.
1798 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1800 * config/bfin-parse.y (value_match): Use correct conversion
1801 specifications in template string for __FILE__ and __LINE__.
1805 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1807 Introduce TLS descriptors for i386 and x86_64.
1808 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1809 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1810 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1811 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1812 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1814 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1815 (lex_got): Handle @tlsdesc and @tlscall.
1816 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1818 2006-01-11 Nick Clifton <nickc@redhat.com>
1820 Fixes for building on 64-bit hosts:
1821 * config/tc-avr.c (mod_index): New union to allow conversion
1822 between pointers and integers.
1823 (md_begin, avr_ldi_expression): Use it.
1824 * config/tc-i370.c (md_assemble): Add cast for argument to print
1826 * config/tc-tic54x.c (subsym_substitute): Likewise.
1827 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1828 opindex field of fr_cgen structure into a pointer so that it can
1829 be stored in a frag.
1830 * config/tc-mn10300.c (md_assemble): Likewise.
1831 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1833 * config/tc-v850.c: Replace uses of (int) casts with correct
1836 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1839 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1841 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1844 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1845 a local-label reference.
1847 For older changes see ChangeLog-2005
1853 version-control: never