1 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
3 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
4 relocs against external symbols for WinCE targets.
5 (md_apply_fix): Likewise.
7 2006-05-09 David Ung <davidu@mips.com>
9 * config/tc-mips.c (append_insn): Only warn about an out-of-range
12 2006-05-09 Nick Clifton <nickc@redhat.com>
14 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
15 against symbols which are not going to be placed into the symbol
18 2006-05-09 Ben Elliston <bje@au.ibm.com>
20 * expr.c (operand): Remove `if (0 && ..)' statement and
21 subsequently unused target_op label. Collapse `if (1 || ..)'
23 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
24 separately above the switch.
26 2006-05-08 Nick Clifton <nickc@redhat.com>
29 * config/tc-msp430.c (line_separator_character): Define as |.
31 2006-05-08 Thiemo Seufer <ths@mips.com>
32 Nigel Stephens <nigel@mips.com>
33 David Ung <davidu@mips.com>
35 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
36 (mips_opts): Likewise.
37 (file_ase_smartmips): New variable.
38 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
39 (macro_build): Handle SmartMIPS instructions.
41 (md_longopts): Add argument handling for smartmips.
42 (md_parse_options, mips_after_parse_args): Likewise.
43 (s_mipsset): Add .set smartmips support.
44 (md_show_usage): Document -msmartmips/-mno-smartmips.
45 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
47 * doc/c-mips.texi: Likewise.
49 2006-05-08 Alan Modra <amodra@bigpond.net.au>
51 * write.c (relax_segment): Add pass count arg. Don't error on
52 negative org/space on first two passes.
53 (relax_seg_info): New struct.
54 (relax_seg, write_object_file): Adjust.
55 * write.h (relax_segment): Update prototype.
57 2006-05-05 Julian Brown <julian@codesourcery.com>
59 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
61 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
62 architecture version checks.
63 (insns): Allow overlapping instructions to be used in VFP mode.
65 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
68 * config/obj-elf.c (obj_elf_change_section): Allow user
69 specified SHF_ALPHA_GPREL.
71 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
73 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
74 for PMEM related expressions.
76 2006-05-05 Nick Clifton <nickc@redhat.com>
79 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
80 insertion of a directory separator character into a string at a
81 given offset. Uses heuristics to decide when to use a backslash
82 character rather than a forward-slash character.
83 (dwarf2_directive_loc): Use the macro.
84 (out_debug_info): Likewise.
86 2006-05-05 Thiemo Seufer <ths@mips.com>
87 David Ung <davidu@mips.com>
89 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
91 (macro): Add new case M_CACHE_AB.
93 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
95 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
96 (opcode_lookup): Issue a warning for opcode with
97 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
98 identical to OT_cinfix3.
99 (TxC3w, TC3w, tC3w): New.
100 (insns): Use tC3w and TC3w for comparison instructions with
103 2006-05-04 Alan Modra <amodra@bigpond.net.au>
105 * subsegs.h (struct frchain): Delete frch_seg.
106 (frchain_root): Delete.
107 (seg_info): Define as macro.
108 * subsegs.c (frchain_root): Delete.
109 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
110 (subsegs_begin, subseg_change): Adjust for above.
111 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
112 rather than to one big list.
113 (subseg_get): Don't special case abs, und sections.
114 (subseg_new, subseg_force_new): Don't set frchainP here.
116 (subsegs_print_statistics): Adjust frag chain control list traversal.
117 * debug.c (dmp_frags): Likewise.
118 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
119 at frchain_root. Make use of known frchain ordering.
120 (last_frag_for_seg): Likewise.
121 (get_frag_fix): Likewise. Add seg param.
122 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
123 * write.c (chain_frchains_together_1): Adjust for struct frchain.
124 (SUB_SEGMENT_ALIGN): Likewise.
125 (subsegs_finish): Adjust frchain list traversal.
126 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
127 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
128 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
129 (xtensa_fix_b_j_loop_end_frags): Likewise.
130 (xtensa_fix_close_loop_end_frags): Likewise.
131 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
132 (retrieve_segment_info): Delete frch_seg initialisation.
134 2006-05-03 Alan Modra <amodra@bigpond.net.au>
136 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
137 * config/obj-elf.h (obj_sec_set_private_data): Delete.
138 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
139 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
141 2006-05-02 Joseph Myers <joseph@codesourcery.com>
143 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
145 (md_apply_fix3): Multiply offset by 4 here for
146 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
148 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
149 Jan Beulich <jbeulich@novell.com>
151 * config/tc-i386.c (output_invalid_buf): Change size for
153 * config/tc-tic30.c (output_invalid_buf): Likewise.
155 * config/tc-i386.c (output_invalid): Cast none-ascii char to
157 * config/tc-tic30.c (output_invalid): Likewise.
159 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
161 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
162 (TEXI2POD): Use AM_MAKEINFOFLAGS.
163 (asconfig.texi): Don't set top_srcdir.
164 * doc/as.texinfo: Don't use top_srcdir.
165 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
167 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
169 * config/tc-i386.c (output_invalid_buf): Change size to 16.
170 * config/tc-tic30.c (output_invalid_buf): Likewise.
172 * config/tc-i386.c (output_invalid): Use snprintf instead of
174 * config/tc-ia64.c (declare_register_set): Likewise.
175 (emit_one_bundle): Likewise.
176 (check_dependencies): Likewise.
177 * config/tc-tic30.c (output_invalid): Likewise.
179 2006-05-02 Paul Brook <paul@codesourcery.com>
181 * config/tc-arm.c (arm_optimize_expr): New function.
182 * config/tc-arm.h (md_optimize_expr): Define
183 (arm_optimize_expr): Add prototype.
184 (TC_FORCE_RELOCATION_SUB_SAME): Define.
186 2006-05-02 Ben Elliston <bje@au.ibm.com>
188 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
191 * sb.h (sb_list_vector): Move to sb.c.
192 * sb.c (free_list): Use type of sb_list_vector directly.
193 (sb_build): Fix off-by-one error in assertion about `size'.
195 2006-05-01 Ben Elliston <bje@au.ibm.com>
197 * listing.c (listing_listing): Remove useless loop.
198 * macro.c (macro_expand): Remove is_positional local variable.
199 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
200 and simplify surrounding expressions, where possible.
201 (assign_symbol): Likewise.
202 (s_weakref): Likewise.
203 * symbols.c (colon): Likewise.
205 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
207 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
209 2006-04-30 Thiemo Seufer <ths@mips.com>
210 David Ung <davidu@mips.com>
212 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
213 (mips_immed): New table that records various handling of udi
214 instruction patterns.
215 (mips_ip): Adds udi handling.
217 2006-04-28 Alan Modra <amodra@bigpond.net.au>
219 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
220 of list rather than beginning.
222 2006-04-26 Julian Brown <julian@codesourcery.com>
224 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
225 (is_quarter_float): Rename from above. Simplify slightly.
226 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
228 (parse_neon_mov): Parse floating-point constants.
229 (neon_qfloat_bits): Fix encoding.
230 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
231 preference to integer encoding when using the F32 type.
233 2006-04-26 Julian Brown <julian@codesourcery.com>
235 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
236 zero-initialising structures containing it will lead to invalid types).
237 (arm_it): Add vectype to each operand.
238 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
240 (neon_typed_alias): New structure. Extra information for typed
242 (reg_entry): Add neon type info field.
243 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
244 Break out alternative syntax for coprocessor registers, etc. into...
245 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
246 out from arm_reg_parse.
247 (parse_neon_type): Move. Return SUCCESS/FAIL.
248 (first_error): New function. Call to ensure first error which occurs is
250 (parse_neon_operand_type): Parse exactly one type.
251 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
252 (parse_typed_reg_or_scalar): New function. Handle core of both
253 arm_typed_reg_parse and parse_scalar.
254 (arm_typed_reg_parse): Parse a register with an optional type.
255 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
257 (parse_scalar): Parse a Neon scalar with optional type.
258 (parse_reg_list): Use first_error.
259 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
260 (neon_alias_types_same): New function. Return true if two (alias) types
262 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
264 (insert_reg_alias): Return new reg_entry not void.
265 (insert_neon_reg_alias): New function. Insert type/index information as
266 well as register for alias.
267 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
268 make typed register aliases accordingly.
269 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
271 (s_unreq): Delete type information if present.
272 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
273 (s_arm_unwind_save_mmxwcg): Likewise.
274 (s_arm_unwind_movsp): Likewise.
275 (s_arm_unwind_setfp): Likewise.
276 (parse_shift): Likewise.
277 (parse_shifter_operand): Likewise.
278 (parse_address): Likewise.
279 (parse_tb): Likewise.
280 (tc_arm_regname_to_dw2regnum): Likewise.
281 (md_pseudo_table): Add dn, qn.
282 (parse_neon_mov): Handle typed operands.
283 (parse_operands): Likewise.
284 (neon_type_mask): Add N_SIZ.
285 (N_ALLMODS): New macro.
286 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
287 (el_type_of_type_chk): Add some safeguards.
288 (modify_types_allowed): Fix logic bug.
289 (neon_check_type): Handle operands with types.
290 (neon_three_same): Remove redundant optional arg handling.
291 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
292 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
293 (do_neon_step): Adjust accordingly.
294 (neon_cmode_for_logic_imm): Use first_error.
295 (do_neon_bitfield): Call neon_check_type.
296 (neon_dyadic): Rename to...
297 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
298 to allow modification of type of the destination.
299 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
300 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
301 (do_neon_compare): Make destination be an untyped bitfield.
302 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
303 (neon_mul_mac): Return early in case of errors.
304 (neon_move_immediate): Use first_error.
305 (neon_mac_reg_scalar_long): Fix type to include scalar.
306 (do_neon_dup): Likewise.
307 (do_neon_mov): Likewise (in several places).
308 (do_neon_tbl_tbx): Fix type.
309 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
310 (do_neon_ld_dup): Exit early in case of errors and/or use
312 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
313 Handle .dn/.qn directives.
314 (REGDEF): Add zero for reg_entry neon field.
316 2006-04-26 Julian Brown <julian@codesourcery.com>
318 * config/tc-arm.c (limits.h): Include.
319 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
320 (fpu_vfp_v3_or_neon_ext): Declare constants.
321 (neon_el_type): New enumeration of types for Neon vector elements.
322 (neon_type_el): New struct. Define type and size of a vector element.
323 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
325 (neon_type): Define struct. The type of an instruction.
326 (arm_it): Add 'vectype' for the current instruction.
327 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
328 (vfp_sp_reg_pos): Rename to...
329 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
331 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
332 (Neon D or Q register).
333 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
335 (GE_OPT_PREFIX_BIG): Define constant, for use in...
336 (my_get_expression): Allow above constant as argument to accept
337 64-bit constants with optional prefix.
338 (arm_reg_parse): Add extra argument to return the specific type of
339 register in when either a D or Q register (REG_TYPE_NDQ) is
340 requested. Can be NULL.
341 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
342 (parse_reg_list): Update for new arm_reg_parse args.
343 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
344 (parse_neon_el_struct_list): New function. Parse element/structure
345 register lists for VLD<n>/VST<n> instructions.
346 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
347 (s_arm_unwind_save_mmxwr): Likewise.
348 (s_arm_unwind_save_mmxwcg): Likewise.
349 (s_arm_unwind_movsp): Likewise.
350 (s_arm_unwind_setfp): Likewise.
351 (parse_big_immediate): New function. Parse an immediate, which may be
352 64 bits wide. Put results in inst.operands[i].
353 (parse_shift): Update for new arm_reg_parse args.
354 (parse_address): Likewise. Add parsing of alignment specifiers.
355 (parse_neon_mov): Parse the operands of a VMOV instruction.
356 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
357 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
358 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
359 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
360 (parse_operands): Handle new codes above.
361 (encode_arm_vfp_sp_reg): Rename to...
362 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
363 selected VFP version only supports D0-D15.
364 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
365 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
366 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
367 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
368 encode_arm_vfp_reg name, and allow 32 D regs.
369 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
370 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
372 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
373 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
374 constant-load and conversion insns introduced with VFPv3.
375 (neon_tab_entry): New struct.
376 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
377 those which are the targets of pseudo-instructions.
378 (neon_opc): Enumerate opcodes, use as indices into...
379 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
380 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
381 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
382 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
384 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
386 (neon_type_mask): New. Compact type representation for type checking.
387 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
388 permitted type combinations.
389 (N_IGNORE_TYPE): New macro.
390 (neon_check_shape): New function. Check an instruction shape for
391 multiple alternatives. Return the specific shape for the current
393 (neon_modify_type_size): New function. Modify a vector type and size,
394 depending on the bit mask in argument 1.
395 (neon_type_promote): New function. Convert a given "key" type (of an
396 operand) into the correct type for a different operand, based on a bit
398 (type_chk_of_el_type): New function. Convert a type and size into the
399 compact representation used for type checking.
400 (el_type_of_type_ckh): New function. Reverse of above (only when a
401 single bit is set in the bit mask).
402 (modify_types_allowed): New function. Alter a mask of allowed types
403 based on a bit mask of modifications.
404 (neon_check_type): New function. Check the type of the current
405 instruction against the variable argument list. The "key" type of the
406 instruction is returned.
407 (neon_dp_fixup): New function. Fill in and modify instruction bits for
408 a Neon data-processing instruction depending on whether we're in ARM
409 mode or Thumb-2 mode.
410 (neon_logbits): New function.
411 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
412 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
413 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
414 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
415 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
416 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
417 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
418 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
419 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
420 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
421 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
422 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
423 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
424 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
425 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
426 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
427 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
428 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
429 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
430 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
431 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
432 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
433 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
434 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
435 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
437 (parse_neon_type): New function. Parse Neon type specifier.
438 (opcode_lookup): Allow parsing of Neon type specifiers.
439 (REGNUM2, REGSETH, REGSET2): New macros.
440 (reg_names): Add new VFPv3 and Neon registers.
441 (NUF, nUF, NCE, nCE): New macros for opcode table.
442 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
443 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
444 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
445 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
446 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
447 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
448 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
449 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
450 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
451 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
452 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
453 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
454 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
455 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
457 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
458 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
459 (arm_option_cpu_value): Add vfp3 and neon.
460 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
463 2006-04-25 Bob Wilson <bob.wilson@acm.org>
465 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
466 syntax instead of hardcoded opcodes with ".w18" suffixes.
467 (wide_branch_opcode): New.
468 (build_transition): Use it to check for wide branch opcodes with
469 either ".w18" or ".w15" suffixes.
471 2006-04-25 Bob Wilson <bob.wilson@acm.org>
473 * config/tc-xtensa.c (xtensa_create_literal_symbol,
474 xg_assemble_literal, xg_assemble_literal_space): Do not set the
475 frag's is_literal flag.
477 2006-04-25 Bob Wilson <bob.wilson@acm.org>
479 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
481 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
483 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
484 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
485 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
486 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
487 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
489 2005-04-20 Paul Brook <paul@codesourcery.com>
491 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
493 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
495 2006-04-19 Alan Modra <amodra@bigpond.net.au>
497 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
498 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
499 Make some cpus unsupported on ELF. Run "make dep-am".
500 * Makefile.in: Regenerate.
502 2006-04-19 Alan Modra <amodra@bigpond.net.au>
504 * configure.in (--enable-targets): Indent help message.
505 * configure: Regenerate.
507 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
510 * config/tc-i386.c (i386_immediate): Check illegal immediate
513 2006-04-18 Alan Modra <amodra@bigpond.net.au>
515 * config/tc-i386.c: Formatting.
516 (output_disp, output_imm): ISO C90 params.
518 * frags.c (frag_offset_fixed_p): Constify args.
519 * frags.h (frag_offset_fixed_p): Ditto.
521 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
522 (COFF_MAGIC): Delete.
524 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
526 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
528 * po/POTFILES.in: Regenerated.
530 2006-04-16 Mark Mitchell <mark@codesourcery.com>
532 * doc/as.texinfo: Mention that some .type syntaxes are not
533 supported on all architectures.
535 2006-04-14 Sterling Augustine <sterling@tensilica.com>
537 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
538 instructions when such transformations have been disabled.
540 2006-04-10 Sterling Augustine <sterling@tensilica.com>
542 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
543 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
544 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
545 decoding the loop instructions. Remove current_offset variable.
546 (xtensa_fix_short_loop_frags): Likewise.
547 (min_bytes_to_other_loop_end): Remove current_offset argument.
549 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
551 * config/tc-z80.c (z80_optimize_expr): Removed.
552 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
554 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
556 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
557 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
558 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
559 atmega644, atmega329, atmega3290, atmega649, atmega6490,
560 atmega406, atmega640, atmega1280, atmega1281, at90can32,
561 at90can64, at90usb646, at90usb647, at90usb1286 and
563 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
565 2006-04-07 Paul Brook <paul@codesourcery.com>
567 * config/tc-arm.c (parse_operands): Set default error message.
569 2006-04-07 Paul Brook <paul@codesourcery.com>
571 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
573 2006-04-07 Paul Brook <paul@codesourcery.com>
575 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
577 2006-04-07 Paul Brook <paul@codesourcery.com>
579 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
580 (move_or_literal_pool): Handle Thumb-2 instructions.
581 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
583 2006-04-07 Alan Modra <amodra@bigpond.net.au>
586 * config/tc-i386.c (match_template): Move 64-bit operand tests
589 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
591 * po/Make-in: Add install-html target.
592 * Makefile.am: Add install-html and install-html-recursive targets.
593 * Makefile.in: Regenerate.
594 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
595 * configure: Regenerate.
596 * doc/Makefile.am: Add install-html and install-html-am targets.
597 * doc/Makefile.in: Regenerate.
599 2006-04-06 Alan Modra <amodra@bigpond.net.au>
601 * frags.c (frag_offset_fixed_p): Reinitialise offset before
604 2006-04-05 Richard Sandiford <richard@codesourcery.com>
605 Daniel Jacobowitz <dan@codesourcery.com>
607 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
608 (GOTT_BASE, GOTT_INDEX): New.
609 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
610 GOTT_INDEX when generating VxWorks PIC.
611 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
612 use the generic *-*-vxworks* stanza instead.
614 2006-04-04 Alan Modra <amodra@bigpond.net.au>
617 * frags.c (frag_offset_fixed_p): New function.
618 * frags.h (frag_offset_fixed_p): Declare.
619 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
620 (resolve_expression): Likewise.
622 2006-04-03 Sterling Augustine <sterling@tensilica.com>
624 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
625 of the same length but different numbers of slots.
627 2006-03-30 Andreas Schwab <schwab@suse.de>
629 * configure.in: Fix help string for --enable-targets option.
630 * configure: Regenerate.
632 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
634 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
635 (m68k_ip): ... here. Use for all chips. Protect against buffer
636 overrun and avoid excessive copying.
638 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
639 m68020_control_regs, m68040_control_regs, m68060_control_regs,
640 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
641 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
642 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
643 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
644 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
645 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
646 mcf5282_ctrl, mcfv4e_ctrl): ... these.
647 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
648 (struct m68k_cpu): Change chip field to control_regs.
649 (current_chip): Remove.
651 (m68k_archs, m68k_extensions): Adjust.
652 (m68k_cpus): Reorder to be in cpu number order. Adjust.
653 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
654 (find_cf_chip): Reimplement for new organization of cpu table.
655 (select_control_regs): Remove.
657 (struct save_opts): Save control regs, not chip.
658 (s_save, s_restore): Adjust.
659 (m68k_lookup_cpu): Give deprecated warning when necessary.
660 (m68k_init_arch): Adjust.
661 (md_show_usage): Adjust for new cpu table organization.
663 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
665 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
666 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
667 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
669 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
670 (any_gotrel): New rule.
671 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
672 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
674 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
675 (bfin_pic_ptr): New function.
676 (md_pseudo_table): Add it for ".picptr".
677 (OPTION_FDPIC): New macro.
678 (md_longopts): Add -mfdpic.
679 (md_parse_option): Handle it.
680 (md_begin): Set BFD flags.
681 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
682 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
684 * Makefile.am (bfin-parse.o): Update dependencies.
685 (DEPTC_bfin_elf): Likewise.
686 * Makefile.in: Regenerate.
688 2006-03-25 Richard Sandiford <richard@codesourcery.com>
690 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
691 mcfemac instead of mcfmac.
693 2006-03-23 Michael Matz <matz@suse.de>
695 * config/tc-i386.c (type_names): Correct placement of 'static'.
696 (reloc): Map some more relocs to their 64 bit counterpart when
698 (output_insn): Work around breakage if DEBUG386 is defined.
699 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
700 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
701 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
704 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
706 (md_convert_frag): Jumps can now be larger than 2GB away, error
708 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
709 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
711 2006-03-22 Richard Sandiford <richard@codesourcery.com>
712 Daniel Jacobowitz <dan@codesourcery.com>
713 Phil Edwards <phil@codesourcery.com>
714 Zack Weinberg <zack@codesourcery.com>
715 Mark Mitchell <mark@codesourcery.com>
716 Nathan Sidwell <nathan@codesourcery.com>
718 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
719 (md_begin): Complain about -G being used for PIC. Don't change
720 the text, data and bss alignments on VxWorks.
721 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
722 generating VxWorks PIC.
723 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
724 (macro): Likewise, but do not treat la $25 specially for
725 VxWorks PIC, and do not handle jal.
726 (OPTION_MVXWORKS_PIC): New macro.
727 (md_longopts): Add -mvxworks-pic.
728 (md_parse_option): Don't complain about using PIC and -G together here.
729 Handle OPTION_MVXWORKS_PIC.
730 (md_estimate_size_before_relax): Always use the first relaxation
732 * config/tc-mips.h (VXWORKS_PIC): New.
734 2006-03-21 Paul Brook <paul@codesourcery.com>
736 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
738 2006-03-21 Sterling Augustine <sterling@tensilica.com>
740 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
741 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
742 (get_loop_align_size): New.
743 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
744 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
745 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
746 (get_noop_aligned_address): Use get_loop_align_size.
747 (get_aligned_diff): Likewise.
749 2006-03-21 Paul Brook <paul@codesourcery.com>
751 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
753 2006-03-20 Paul Brook <paul@codesourcery.com>
755 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
756 (do_t_branch): Encode branches inside IT blocks as unconditional.
757 (do_t_cps): New function.
758 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
759 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
760 (opcode_lookup): Allow conditional suffixes on all instructions in
762 (md_assemble): Advance condexec state before checking for errors.
763 (insns): Use do_t_cps.
765 2006-03-20 Paul Brook <paul@codesourcery.com>
767 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
770 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
772 * config/tc-vax.c: Update copyright year.
773 * config/tc-vax.h: Likewise.
775 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
777 * config/tc-vax.c (md_chars_to_number): Used only locally, so
779 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
781 2006-03-17 Paul Brook <paul@codesourcery.com>
783 * config/tc-arm.c (insns): Add ldm and stm.
785 2006-03-17 Ben Elliston <bje@au.ibm.com>
788 * doc/as.texinfo (Ident): Document this directive more thoroughly.
790 2006-03-16 Paul Brook <paul@codesourcery.com>
792 * config/tc-arm.c (insns): Add "svc".
794 2006-03-13 Bob Wilson <bob.wilson@acm.org>
796 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
797 flag and avoid double underscore prefixes.
799 2006-03-10 Paul Brook <paul@codesourcery.com>
801 * config/tc-arm.c (md_begin): Handle EABIv5.
802 (arm_eabis): Add EF_ARM_EABI_VER5.
803 * doc/c-arm.texi: Document -meabi=5.
805 2006-03-10 Ben Elliston <bje@au.ibm.com>
807 * app.c (do_scrub_chars): Simplify string handling.
809 2006-03-07 Richard Sandiford <richard@codesourcery.com>
810 Daniel Jacobowitz <dan@codesourcery.com>
811 Zack Weinberg <zack@codesourcery.com>
812 Nathan Sidwell <nathan@codesourcery.com>
813 Paul Brook <paul@codesourcery.com>
814 Ricardo Anguiano <anguiano@codesourcery.com>
815 Phil Edwards <phil@codesourcery.com>
817 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
818 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
820 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
821 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
822 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
824 2006-03-06 Bob Wilson <bob.wilson@acm.org>
826 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
827 even when using the text-section-literals option.
829 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
831 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
833 (m68k_ip): <case 'J'> Check we have some control regs.
834 (md_parse_option): Allow raw arch switch.
835 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
836 whether 68881 or cfloat was meant by -mfloat.
837 (md_show_usage): Adjust extension display.
838 (m68k_elf_final_processing): Adjust.
840 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
842 * config/tc-avr.c (avr_mod_hash_value): New function.
843 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
844 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
845 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
846 instead of int avr_ldi_expression: use avr_mod_hash_value instead
848 (tc_gen_reloc): Handle substractions of symbols, if possible do
849 fixups, abort otherwise.
850 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
851 tc_fix_adjustable): Define.
853 2006-03-02 James E Wilson <wilson@specifix.com>
855 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
856 change the template, then clear md.slot[curr].end_of_insn_group.
858 2006-02-28 Jan Beulich <jbeulich@novell.com>
860 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
862 2006-02-28 Jan Beulich <jbeulich@novell.com>
865 * macro.c (getstring): Don't treat parentheses special anymore.
866 (get_any_string): Don't consider '(' and ')' as quoting anymore.
867 Special-case '(', ')', '[', and ']' when dealing with non-quoting
870 2006-02-28 Mat <mat@csail.mit.edu>
872 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
874 2006-02-27 Jakub Jelinek <jakub@redhat.com>
876 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
878 (CFI_signal_frame): Define.
879 (cfi_pseudo_table): Add .cfi_signal_frame.
880 (dot_cfi): Handle CFI_signal_frame.
881 (output_cie): Handle cie->signal_frame.
882 (select_cie_for_fde): Don't share CIE if signal_frame flag is
883 different. Copy signal_frame from FDE to newly created CIE.
884 * doc/as.texinfo: Document .cfi_signal_frame.
886 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
888 * doc/Makefile.am: Add html target.
889 * doc/Makefile.in: Regenerate.
890 * po/Make-in: Add html target.
892 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
894 * config/tc-i386.c (output_insn): Support Intel Merom New
897 * config/tc-i386.h (CpuMNI): New.
898 (CpuUnknownFlags): Add CpuMNI.
900 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
902 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
903 (hpriv_reg_table): New table for hyperprivileged registers.
904 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
907 2006-02-24 DJ Delorie <dj@redhat.com>
909 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
910 (tc_gen_reloc): Don't define.
911 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
912 (OPTION_LINKRELAX): New.
913 (md_longopts): Add it.
915 (md_parse_options): Set it.
916 (md_assemble): Emit relaxation relocs as needed.
917 (md_convert_frag): Emit relaxation relocs as needed.
918 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
919 (m32c_apply_fix): New.
921 (m32c_force_relocation): Force out jump relocs when relaxing.
922 (m32c_fix_adjustable): Return false if relaxing.
924 2006-02-24 Paul Brook <paul@codesourcery.com>
926 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
927 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
928 (struct asm_barrier_opt): Define.
929 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
930 (parse_psr): Accept V7M psr names.
931 (parse_barrier): New function.
932 (enum operand_parse_code): Add OP_oBARRIER.
933 (parse_operands): Implement OP_oBARRIER.
934 (do_barrier): New function.
935 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
936 (do_t_cpsi): Add V7M restrictions.
937 (do_t_mrs, do_t_msr): Validate V7M variants.
938 (md_assemble): Check for NULL variants.
939 (v7m_psrs, barrier_opt_names): New tables.
940 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
941 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
942 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
943 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
944 (struct cpu_arch_ver_table): Define.
946 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
947 Tag_CPU_arch_profile.
948 * doc/c-arm.texi: Document new cpu and arch options.
950 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
952 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
954 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
956 * config/tc-ia64.c: Update copyright years.
958 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
960 * config/tc-ia64.c (specify_resource): Add the rule 17 from
963 2005-02-22 Paul Brook <paul@codesourcery.com>
965 * config/tc-arm.c (do_pld): Remove incorrect write to
967 (encode_thumb32_addr_mode): Use correct operand.
969 2006-02-21 Paul Brook <paul@codesourcery.com>
971 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
973 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
974 Anil Paranjape <anilp1@kpitcummins.com>
975 Shilin Shakti <shilins@kpitcummins.com>
977 * Makefile.am: Add xc16x related entry.
978 * Makefile.in: Regenerate.
979 * configure.in: Added xc16x related entry.
980 * configure: Regenerate.
981 * config/tc-xc16x.h: New file
982 * config/tc-xc16x.c: New file
983 * doc/c-xc16x.texi: New file for xc16x
984 * doc/all.texi: Entry for xc16x
985 * doc/Makefile.texi: Added c-xc16x.texi
986 * NEWS: Announce the support for the new target.
988 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
990 * configure.tgt: set emulation for mips-*-netbsd*
992 2006-02-14 Jakub Jelinek <jakub@redhat.com>
994 * config.in: Rebuilt.
996 2006-02-13 Bob Wilson <bob.wilson@acm.org>
998 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
999 from 1, not 0, in error messages.
1000 (md_assemble): Simplify special-case check for ENTRY instructions.
1001 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1002 operand in error message.
1004 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1006 * configure.tgt (arm-*-linux-gnueabi*): Change to
1009 2006-02-10 Nick Clifton <nickc@redhat.com>
1011 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1012 32-bit value is propagated into the upper bits of a 64-bit long.
1014 * config/tc-arc.c (init_opcode_tables): Fix cast.
1015 (arc_extoper, md_operand): Likewise.
1017 2006-02-09 David Heine <dlheine@tensilica.com>
1019 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1020 each relaxation step.
1022 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1024 * configure.in (CHECK_DECLS): Add vsnprintf.
1025 * configure: Regenerate.
1026 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1027 include/declare here, but...
1028 * as.h: Move code detecting VARARGS idiom to the top.
1029 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1030 (vsnprintf): Declare if not already declared.
1032 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1034 * as.c (close_output_file): New.
1035 (main): Register close_output_file with xatexit before
1036 dump_statistics. Don't call output_file_close.
1038 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1040 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1041 mcf5329_control_regs): New.
1042 (not_current_architecture, selected_arch, selected_cpu): New.
1043 (m68k_archs, m68k_extensions): New.
1044 (archs): Renamed to ...
1045 (m68k_cpus): ... here. Adjust.
1047 (md_pseudo_table): Add arch and cpu directives.
1048 (find_cf_chip, m68k_ip): Adjust table scanning.
1049 (no_68851, no_68881): Remove.
1050 (md_assemble): Lazily initialize.
1051 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1052 (md_init_after_args): Move functionality to m68k_init_arch.
1053 (mri_chip): Adjust table scanning.
1054 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1055 options with saner parsing.
1056 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1057 m68k_init_arch): New.
1058 (s_m68k_cpu, s_m68k_arch): New.
1059 (md_show_usage): Adjust.
1060 (m68k_elf_final_processing): Set CF EF flags.
1061 * config/tc-m68k.h (m68k_init_after_args): Remove.
1062 (tc_init_after_args): Remove.
1063 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1064 (M68k-Directives): Document .arch and .cpu directives.
1066 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1068 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1069 synonyms for equ and defl.
1070 (z80_cons_fix_new): New function.
1071 (emit_byte): Disallow relative jumps to absolute locations.
1072 (emit_data): Only handle defb, prototype changed, because defb is
1073 now handled as pseudo-op rather than an instruction.
1074 (instab): Entries for defb,defw,db,dw moved from here...
1075 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1076 Add entries for def24,def32,d24,d32.
1077 (md_assemble): Improved error handling.
1078 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1079 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1080 (z80_cons_fix_new): Declare.
1081 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1082 (def24,d24,def32,d32): New pseudo-ops.
1084 2006-02-02 Paul Brook <paul@codesourcery.com>
1086 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1088 2005-02-02 Paul Brook <paul@codesourcery.com>
1090 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1091 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1092 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1093 T2_OPCODE_RSB): Define.
1094 (thumb32_negate_data_op): New function.
1095 (md_apply_fix): Use it.
1097 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1099 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1101 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1102 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1104 (relaxation_requirements): Add pfinish_frag argument and use it to
1105 replace setting tinsn->record_fix fields.
1106 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1107 and vinsn_to_insnbuf. Remove references to record_fix and
1108 slot_sub_symbols fields.
1109 (xtensa_mark_narrow_branches): Delete unused code.
1110 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1112 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1114 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1115 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1116 of the record_fix field. Simplify error messages for unexpected
1118 (set_expr_symbol_offset_diff): Delete.
1120 2006-01-31 Paul Brook <paul@codesourcery.com>
1122 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1124 2006-01-31 Paul Brook <paul@codesourcery.com>
1125 Richard Earnshaw <rearnsha@arm.com>
1127 * config/tc-arm.c: Use arm_feature_set.
1128 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1129 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1130 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1133 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1134 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1135 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1136 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1138 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1139 (arm_opts): Move old cpu/arch options from here...
1140 (arm_legacy_opts): ... to here.
1141 (md_parse_option): Search arm_legacy_opts.
1142 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1143 (arm_float_abis, arm_eabis): Make const.
1145 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1147 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1149 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1151 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1152 in load immediate intruction.
1154 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1156 * config/bfin-parse.y (value_match): Use correct conversion
1157 specifications in template string for __FILE__ and __LINE__.
1161 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1163 Introduce TLS descriptors for i386 and x86_64.
1164 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1165 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1166 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1167 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1168 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1170 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1171 (lex_got): Handle @tlsdesc and @tlscall.
1172 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1174 2006-01-11 Nick Clifton <nickc@redhat.com>
1176 Fixes for building on 64-bit hosts:
1177 * config/tc-avr.c (mod_index): New union to allow conversion
1178 between pointers and integers.
1179 (md_begin, avr_ldi_expression): Use it.
1180 * config/tc-i370.c (md_assemble): Add cast for argument to print
1182 * config/tc-tic54x.c (subsym_substitute): Likewise.
1183 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1184 opindex field of fr_cgen structure into a pointer so that it can
1185 be stored in a frag.
1186 * config/tc-mn10300.c (md_assemble): Likewise.
1187 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1189 * config/tc-v850.c: Replace uses of (int) casts with correct
1192 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1195 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1197 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1200 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1201 a local-label reference.
1203 For older changes see ChangeLog-2005
1209 version-control: never