1 2006-06-09 Alan Modra <amodra@bigpond.net.au>
3 * config/tc-iq2000.c: Include sb.h.
5 2006-06-08 Nigel Stephens <nigel@mips.com>
7 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
8 aliases for better compatibility with SGI tools.
10 2006-06-08 Alan Modra <amodra@bigpond.net.au>
12 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
13 * Makefile.am (GASLIBS): Expand @BFDLIB@.
15 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
16 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
17 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
19 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
20 * Makefile.in: Regenerate.
21 * doc/Makefile.in: Regenerate.
22 * configure: Regenerate.
24 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
26 * po/Make-in (pdf, ps): New dummy targets.
28 2006-06-07 Julian Brown <julian@codesourcery.com>
30 * config/tc-arm.c (stdarg.h): include.
31 (arm_it): Add uncond_value field. Add isvec and issingle to operand
33 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
34 REG_TYPE_NSDQ (single, double or quad vector reg).
35 (reg_expected_msgs): Update.
36 (BAD_FPU): Add macro for unsupported FPU instruction error.
37 (parse_neon_type): Support 'd' as an alias for .f64.
38 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
40 (parse_vfp_reg_list): Don't update first arg on error.
41 (parse_neon_mov): Support extra syntax for VFP moves.
42 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
43 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
44 (parse_operands): Support isvec, issingle operands fields, new parse
46 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
48 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
49 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
50 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
51 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
53 (neon_shape): Redefine in terms of above.
54 (neon_shape_class): New enumeration, table of shape classes.
55 (neon_shape_el): New enumeration. One element of a shape.
56 (neon_shape_el_size): Register widths of above, where appropriate.
57 (neon_shape_info): New struct. Info for shape table.
58 (neon_shape_tab): New array.
59 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
60 (neon_check_shape): Rewrite as...
61 (neon_select_shape): New function to classify instruction shapes,
62 driven by new table neon_shape_tab array.
63 (neon_quad): New function. Return 1 if shape should set Q flag in
64 instructions (or equivalent), 0 otherwise.
65 (type_chk_of_el_type): Support F64.
66 (el_type_of_type_chk): Likewise.
67 (neon_check_type): Add support for VFP type checking (VFP data
68 elements fill their containing registers).
69 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
70 in thumb mode for VFP instructions.
71 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
72 and encode the current instruction as if it were that opcode.
73 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
74 arguments, call function in PFN.
75 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
76 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
77 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
78 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
79 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
80 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
81 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
82 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
83 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
84 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
85 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
86 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
87 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
88 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
89 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
91 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
92 between VFP and Neon turns out to belong to Neon. Perform
93 architecture check and fill in condition field if appropriate.
94 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
95 (do_neon_cvt): Add support for VFP variants of instructions.
96 (neon_cvt_flavour): Extend to cover VFP conversions.
97 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
99 (do_neon_ldr_str): Handle single-precision VFP load/store.
100 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
101 NS_NULL not NS_IGNORE.
102 (opcode_tag): Add OT_csuffixF for operands which either take a
103 conditional suffix, or have 0xF in the condition field.
104 (md_assemble): Add support for OT_csuffixF.
105 (NCE): Replace macro with...
106 (NCE_tag, NCE, NCEF): New macros.
107 (nCE): Replace macro with...
108 (nCE_tag, nCE, nCEF): New macros.
109 (insns): Add support for VFP insns or VFP versions of insns msr,
110 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
111 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
112 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
113 VFP/Neon insns together.
115 2006-06-07 Alan Modra <amodra@bigpond.net.au>
116 Ladislav Michl <ladis@linux-mips.org>
118 * app.c: Don't include headers already included by as.h.
120 * atof-generic.c: Likewise.
122 * dwarf2dbg.c: Likewise.
124 * input-file.c: Likewise.
125 * input-scrub.c: Likewise.
127 * output-file.c: Likewise.
130 * config/bfin-lex.l: Likewise.
131 * config/obj-coff.h: Likewise.
132 * config/obj-elf.h: Likewise.
133 * config/obj-som.h: Likewise.
134 * config/tc-arc.c: Likewise.
135 * config/tc-arm.c: Likewise.
136 * config/tc-avr.c: Likewise.
137 * config/tc-bfin.c: Likewise.
138 * config/tc-cris.c: Likewise.
139 * config/tc-d10v.c: Likewise.
140 * config/tc-d30v.c: Likewise.
141 * config/tc-dlx.h: Likewise.
142 * config/tc-fr30.c: Likewise.
143 * config/tc-frv.c: Likewise.
144 * config/tc-h8300.c: Likewise.
145 * config/tc-hppa.c: Likewise.
146 * config/tc-i370.c: Likewise.
147 * config/tc-i860.c: Likewise.
148 * config/tc-i960.c: Likewise.
149 * config/tc-ip2k.c: Likewise.
150 * config/tc-iq2000.c: Likewise.
151 * config/tc-m32c.c: Likewise.
152 * config/tc-m32r.c: Likewise.
153 * config/tc-maxq.c: Likewise.
154 * config/tc-mcore.c: Likewise.
155 * config/tc-mips.c: Likewise.
156 * config/tc-mmix.c: Likewise.
157 * config/tc-mn10200.c: Likewise.
158 * config/tc-mn10300.c: Likewise.
159 * config/tc-msp430.c: Likewise.
160 * config/tc-mt.c: Likewise.
161 * config/tc-ns32k.c: Likewise.
162 * config/tc-openrisc.c: Likewise.
163 * config/tc-ppc.c: Likewise.
164 * config/tc-s390.c: Likewise.
165 * config/tc-sh.c: Likewise.
166 * config/tc-sh64.c: Likewise.
167 * config/tc-sparc.c: Likewise.
168 * config/tc-tic30.c: Likewise.
169 * config/tc-tic4x.c: Likewise.
170 * config/tc-tic54x.c: Likewise.
171 * config/tc-v850.c: Likewise.
172 * config/tc-vax.c: Likewise.
173 * config/tc-xc16x.c: Likewise.
174 * config/tc-xstormy16.c: Likewise.
175 * config/tc-xtensa.c: Likewise.
176 * config/tc-z80.c: Likewise.
177 * config/tc-z8k.c: Likewise.
178 * macro.h: Don't include sb.h or ansidecl.h.
179 * sb.h: Don't include stdio.h or ansidecl.h.
180 * cond.c: Include sb.h.
181 * itbl-lex.l: Include as.h instead of other system headers.
182 * itbl-parse.y: Likewise.
183 * itbl-ops.c: Similarly.
184 * itbl-ops.h: Don't include as.h or ansidecl.h.
185 * config/bfin-defs.h: Don't include bfd.h or as.h.
186 * config/bfin-parse.y: Include as.h instead of other system headers.
188 2006-06-06 Ben Elliston <bje@au.ibm.com>
189 Anton Blanchard <anton@samba.org>
191 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
192 (md_show_usage): Document it.
193 (ppc_setup_opcodes): Test power6 opcode flag bits.
194 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
196 2006-06-06 Thiemo Seufer <ths@mips.com>
197 Chao-ying Fu <fu@mips.com>
199 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
200 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
201 (macro_build): Update comment.
202 (mips_ip): Allow DSP64 instructions for MIPS64R2.
203 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
205 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
206 MIPS_CPU_ASE_MDMX flags for sb1.
208 2006-06-05 Thiemo Seufer <ths@mips.com>
210 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
212 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
213 (mips_ip): Make overflowed/underflowed constant arguments in DSP
214 and MT instructions a fatal error. Use INSERT_OPERAND where
215 appropriate. Improve warnings for break and wait code overflows.
216 Use symbolic constant of OP_MASK_COPZ.
217 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
219 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
221 * po/Make-in (top_builddir): Define.
223 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
225 * doc/Makefile.am (TEXI2DVI): Define.
226 * doc/Makefile.in: Regenerate.
227 * doc/c-arc.texi: Fix typo.
229 2006-06-01 Alan Modra <amodra@bigpond.net.au>
231 * config/obj-ieee.c: Delete.
232 * config/obj-ieee.h: Delete.
233 * Makefile.am (OBJ_FORMATS): Remove ieee.
234 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
235 (obj-ieee.o): Remove rule.
236 * Makefile.in: Regenerate.
237 * configure.in (atof): Remove tahoe.
238 (OBJ_MAYBE_IEEE): Don't define.
239 * configure: Regenerate.
240 * config.in: Regenerate.
241 * doc/Makefile.in: Regenerate.
242 * po/POTFILES.in: Regenerate.
244 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
246 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
247 and LIBINTL_DEP everywhere.
249 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
250 * acinclude.m4: Include new gettext macros.
251 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
252 Remove local code for po/Makefile.
253 * Makefile.in, configure, doc/Makefile.in: Regenerated.
255 2006-05-30 Nick Clifton <nickc@redhat.com>
257 * po/es.po: Updated Spanish translation.
259 2006-05-06 Denis Chertykov <denisc@overta.ru>
261 * doc/c-avr.texi: New file.
262 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
263 * doc/all.texi: Set AVR
264 * doc/as.texinfo: Include c-avr.texi
266 2006-05-28 Jie Zhang <jie.zhang@analog.com>
268 * config/bfin-parse.y (check_macfunc): Loose the condition of
269 calling check_multiply_halfregs ().
271 2006-05-25 Jie Zhang <jie.zhang@analog.com>
273 * config/bfin-parse.y (asm_1): Better check and deal with
274 vector and scalar Multiply 16-Bit Operands instructions.
276 2006-05-24 Nick Clifton <nickc@redhat.com>
278 * config/tc-hppa.c: Convert to ISO C90 format.
279 * config/tc-hppa.h: Likewise.
281 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
282 Randolph Chung <randolph@tausq.org>
284 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
285 is_tls_ieoff, is_tls_leoff): Define.
286 (fix_new_hppa): Handle TLS.
287 (cons_fix_new_hppa): Likewise.
289 (md_apply_fix): Handle TLS relocs.
290 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
292 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
294 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
296 2006-05-23 Thiemo Seufer <ths@mips.com>
297 David Ung <davidu@mips.com>
298 Nigel Stephens <nigel@mips.com>
301 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
302 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
303 ISA_HAS_MXHC1): New macros.
304 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
305 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
306 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
307 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
308 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
309 (mips_after_parse_args): Change default handling of float register
310 size to account for 32bit code with 64bit FP. Better sanity checking
311 of ISA/ASE/ABI option combinations.
312 (s_mipsset): Support switching of GPR and FPR sizes via
313 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
315 (mips_elf_final_processing): We should record the use of 64bit FP
316 registers in 32bit code but we don't, because ELF header flags are
318 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
319 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
320 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
321 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
322 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
323 missing -march options. Document .set arch=CPU. Move .set smartmips
324 to ASE page. Use @code for .set FOO examples.
326 2006-05-23 Jie Zhang <jie.zhang@analog.com>
328 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
331 2006-05-23 Jie Zhang <jie.zhang@analog.com>
333 * config/bfin-defs.h (bfin_equals): Remove declaration.
334 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
335 * config/tc-bfin.c (bfin_name_is_register): Remove.
336 (bfin_equals): Remove.
337 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
338 (bfin_name_is_register): Remove declaration.
340 2006-05-19 Thiemo Seufer <ths@mips.com>
341 Nigel Stephens <nigel@mips.com>
343 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
344 (mips_oddfpreg_ok): New function.
347 2006-05-19 Thiemo Seufer <ths@mips.com>
348 David Ung <davidu@mips.com>
350 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
351 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
352 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
353 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
354 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
355 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
356 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
357 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
358 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
359 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
360 reg_names_o32, reg_names_n32n64): Define register classes.
361 (reg_lookup): New function, use register classes.
362 (md_begin): Reserve register names in the symbol table. Simplify
364 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
366 (mips16_ip): Use reg_lookup.
367 (tc_get_register): Likewise.
368 (tc_mips_regname_to_dw2regnum): New function.
370 2006-05-19 Thiemo Seufer <ths@mips.com>
372 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
373 Un-constify string argument.
374 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
376 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
378 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
380 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
382 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
384 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
387 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
389 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
390 cfloat/m68881 to correct architecture before using it.
392 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
394 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
397 2006-05-15 Paul Brook <paul@codesourcery.com>
399 * config/tc-arm.c (arm_adjust_symtab): Use
400 bfd_is_arm_special_symbol_name.
402 2006-05-15 Bob Wilson <bob.wilson@acm.org>
404 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
405 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
406 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
407 Handle errors from calls to xtensa_opcode_is_* functions.
409 2006-05-14 Thiemo Seufer <ths@mips.com>
411 * config/tc-mips.c (macro_build): Test for currently active
413 (mips16_ip): Reject invalid opcodes.
415 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
417 * doc/as.texinfo: Rename "Index" to "AS Index",
418 and "ABORT" to "ABORT (COFF)".
420 2006-05-11 Paul Brook <paul@codesourcery.com>
422 * config/tc-arm.c (parse_half): New function.
423 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
424 (parse_operands): Ditto.
425 (do_mov16): Reject invalid relocations.
426 (do_t_mov16): Ditto. Use Thumb reloc numbers.
427 (insns): Replace Iffff with HALF.
428 (md_apply_fix): Add MOVW and MOVT relocs.
429 (tc_gen_reloc): Ditto.
430 * doc/c-arm.texi: Document relocation operators
432 2006-05-11 Paul Brook <paul@codesourcery.com>
434 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
436 2006-05-11 Thiemo Seufer <ths@mips.com>
438 * config/tc-mips.c (append_insn): Don't check the range of j or
441 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
443 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
444 relocs against external symbols for WinCE targets.
445 (md_apply_fix): Likewise.
447 2006-05-09 David Ung <davidu@mips.com>
449 * config/tc-mips.c (append_insn): Only warn about an out-of-range
452 2006-05-09 Nick Clifton <nickc@redhat.com>
454 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
455 against symbols which are not going to be placed into the symbol
458 2006-05-09 Ben Elliston <bje@au.ibm.com>
460 * expr.c (operand): Remove `if (0 && ..)' statement and
461 subsequently unused target_op label. Collapse `if (1 || ..)'
463 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
464 separately above the switch.
466 2006-05-08 Nick Clifton <nickc@redhat.com>
469 * config/tc-msp430.c (line_separator_character): Define as |.
471 2006-05-08 Thiemo Seufer <ths@mips.com>
472 Nigel Stephens <nigel@mips.com>
473 David Ung <davidu@mips.com>
475 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
476 (mips_opts): Likewise.
477 (file_ase_smartmips): New variable.
478 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
479 (macro_build): Handle SmartMIPS instructions.
481 (md_longopts): Add argument handling for smartmips.
482 (md_parse_options, mips_after_parse_args): Likewise.
483 (s_mipsset): Add .set smartmips support.
484 (md_show_usage): Document -msmartmips/-mno-smartmips.
485 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
487 * doc/c-mips.texi: Likewise.
489 2006-05-08 Alan Modra <amodra@bigpond.net.au>
491 * write.c (relax_segment): Add pass count arg. Don't error on
492 negative org/space on first two passes.
493 (relax_seg_info): New struct.
494 (relax_seg, write_object_file): Adjust.
495 * write.h (relax_segment): Update prototype.
497 2006-05-05 Julian Brown <julian@codesourcery.com>
499 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
501 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
502 architecture version checks.
503 (insns): Allow overlapping instructions to be used in VFP mode.
505 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
508 * config/obj-elf.c (obj_elf_change_section): Allow user
509 specified SHF_ALPHA_GPREL.
511 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
513 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
514 for PMEM related expressions.
516 2006-05-05 Nick Clifton <nickc@redhat.com>
519 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
520 insertion of a directory separator character into a string at a
521 given offset. Uses heuristics to decide when to use a backslash
522 character rather than a forward-slash character.
523 (dwarf2_directive_loc): Use the macro.
524 (out_debug_info): Likewise.
526 2006-05-05 Thiemo Seufer <ths@mips.com>
527 David Ung <davidu@mips.com>
529 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
531 (macro): Add new case M_CACHE_AB.
533 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
535 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
536 (opcode_lookup): Issue a warning for opcode with
537 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
538 identical to OT_cinfix3.
539 (TxC3w, TC3w, tC3w): New.
540 (insns): Use tC3w and TC3w for comparison instructions with
543 2006-05-04 Alan Modra <amodra@bigpond.net.au>
545 * subsegs.h (struct frchain): Delete frch_seg.
546 (frchain_root): Delete.
547 (seg_info): Define as macro.
548 * subsegs.c (frchain_root): Delete.
549 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
550 (subsegs_begin, subseg_change): Adjust for above.
551 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
552 rather than to one big list.
553 (subseg_get): Don't special case abs, und sections.
554 (subseg_new, subseg_force_new): Don't set frchainP here.
556 (subsegs_print_statistics): Adjust frag chain control list traversal.
557 * debug.c (dmp_frags): Likewise.
558 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
559 at frchain_root. Make use of known frchain ordering.
560 (last_frag_for_seg): Likewise.
561 (get_frag_fix): Likewise. Add seg param.
562 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
563 * write.c (chain_frchains_together_1): Adjust for struct frchain.
564 (SUB_SEGMENT_ALIGN): Likewise.
565 (subsegs_finish): Adjust frchain list traversal.
566 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
567 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
568 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
569 (xtensa_fix_b_j_loop_end_frags): Likewise.
570 (xtensa_fix_close_loop_end_frags): Likewise.
571 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
572 (retrieve_segment_info): Delete frch_seg initialisation.
574 2006-05-03 Alan Modra <amodra@bigpond.net.au>
576 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
577 * config/obj-elf.h (obj_sec_set_private_data): Delete.
578 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
579 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
581 2006-05-02 Joseph Myers <joseph@codesourcery.com>
583 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
585 (md_apply_fix3): Multiply offset by 4 here for
586 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
588 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
589 Jan Beulich <jbeulich@novell.com>
591 * config/tc-i386.c (output_invalid_buf): Change size for
593 * config/tc-tic30.c (output_invalid_buf): Likewise.
595 * config/tc-i386.c (output_invalid): Cast none-ascii char to
597 * config/tc-tic30.c (output_invalid): Likewise.
599 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
601 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
602 (TEXI2POD): Use AM_MAKEINFOFLAGS.
603 (asconfig.texi): Don't set top_srcdir.
604 * doc/as.texinfo: Don't use top_srcdir.
605 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
607 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
609 * config/tc-i386.c (output_invalid_buf): Change size to 16.
610 * config/tc-tic30.c (output_invalid_buf): Likewise.
612 * config/tc-i386.c (output_invalid): Use snprintf instead of
614 * config/tc-ia64.c (declare_register_set): Likewise.
615 (emit_one_bundle): Likewise.
616 (check_dependencies): Likewise.
617 * config/tc-tic30.c (output_invalid): Likewise.
619 2006-05-02 Paul Brook <paul@codesourcery.com>
621 * config/tc-arm.c (arm_optimize_expr): New function.
622 * config/tc-arm.h (md_optimize_expr): Define
623 (arm_optimize_expr): Add prototype.
624 (TC_FORCE_RELOCATION_SUB_SAME): Define.
626 2006-05-02 Ben Elliston <bje@au.ibm.com>
628 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
631 * sb.h (sb_list_vector): Move to sb.c.
632 * sb.c (free_list): Use type of sb_list_vector directly.
633 (sb_build): Fix off-by-one error in assertion about `size'.
635 2006-05-01 Ben Elliston <bje@au.ibm.com>
637 * listing.c (listing_listing): Remove useless loop.
638 * macro.c (macro_expand): Remove is_positional local variable.
639 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
640 and simplify surrounding expressions, where possible.
641 (assign_symbol): Likewise.
642 (s_weakref): Likewise.
643 * symbols.c (colon): Likewise.
645 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
647 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
649 2006-04-30 Thiemo Seufer <ths@mips.com>
650 David Ung <davidu@mips.com>
652 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
653 (mips_immed): New table that records various handling of udi
654 instruction patterns.
655 (mips_ip): Adds udi handling.
657 2006-04-28 Alan Modra <amodra@bigpond.net.au>
659 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
660 of list rather than beginning.
662 2006-04-26 Julian Brown <julian@codesourcery.com>
664 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
665 (is_quarter_float): Rename from above. Simplify slightly.
666 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
668 (parse_neon_mov): Parse floating-point constants.
669 (neon_qfloat_bits): Fix encoding.
670 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
671 preference to integer encoding when using the F32 type.
673 2006-04-26 Julian Brown <julian@codesourcery.com>
675 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
676 zero-initialising structures containing it will lead to invalid types).
677 (arm_it): Add vectype to each operand.
678 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
680 (neon_typed_alias): New structure. Extra information for typed
682 (reg_entry): Add neon type info field.
683 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
684 Break out alternative syntax for coprocessor registers, etc. into...
685 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
686 out from arm_reg_parse.
687 (parse_neon_type): Move. Return SUCCESS/FAIL.
688 (first_error): New function. Call to ensure first error which occurs is
690 (parse_neon_operand_type): Parse exactly one type.
691 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
692 (parse_typed_reg_or_scalar): New function. Handle core of both
693 arm_typed_reg_parse and parse_scalar.
694 (arm_typed_reg_parse): Parse a register with an optional type.
695 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
697 (parse_scalar): Parse a Neon scalar with optional type.
698 (parse_reg_list): Use first_error.
699 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
700 (neon_alias_types_same): New function. Return true if two (alias) types
702 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
704 (insert_reg_alias): Return new reg_entry not void.
705 (insert_neon_reg_alias): New function. Insert type/index information as
706 well as register for alias.
707 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
708 make typed register aliases accordingly.
709 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
711 (s_unreq): Delete type information if present.
712 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
713 (s_arm_unwind_save_mmxwcg): Likewise.
714 (s_arm_unwind_movsp): Likewise.
715 (s_arm_unwind_setfp): Likewise.
716 (parse_shift): Likewise.
717 (parse_shifter_operand): Likewise.
718 (parse_address): Likewise.
719 (parse_tb): Likewise.
720 (tc_arm_regname_to_dw2regnum): Likewise.
721 (md_pseudo_table): Add dn, qn.
722 (parse_neon_mov): Handle typed operands.
723 (parse_operands): Likewise.
724 (neon_type_mask): Add N_SIZ.
725 (N_ALLMODS): New macro.
726 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
727 (el_type_of_type_chk): Add some safeguards.
728 (modify_types_allowed): Fix logic bug.
729 (neon_check_type): Handle operands with types.
730 (neon_three_same): Remove redundant optional arg handling.
731 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
732 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
733 (do_neon_step): Adjust accordingly.
734 (neon_cmode_for_logic_imm): Use first_error.
735 (do_neon_bitfield): Call neon_check_type.
736 (neon_dyadic): Rename to...
737 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
738 to allow modification of type of the destination.
739 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
740 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
741 (do_neon_compare): Make destination be an untyped bitfield.
742 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
743 (neon_mul_mac): Return early in case of errors.
744 (neon_move_immediate): Use first_error.
745 (neon_mac_reg_scalar_long): Fix type to include scalar.
746 (do_neon_dup): Likewise.
747 (do_neon_mov): Likewise (in several places).
748 (do_neon_tbl_tbx): Fix type.
749 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
750 (do_neon_ld_dup): Exit early in case of errors and/or use
752 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
753 Handle .dn/.qn directives.
754 (REGDEF): Add zero for reg_entry neon field.
756 2006-04-26 Julian Brown <julian@codesourcery.com>
758 * config/tc-arm.c (limits.h): Include.
759 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
760 (fpu_vfp_v3_or_neon_ext): Declare constants.
761 (neon_el_type): New enumeration of types for Neon vector elements.
762 (neon_type_el): New struct. Define type and size of a vector element.
763 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
765 (neon_type): Define struct. The type of an instruction.
766 (arm_it): Add 'vectype' for the current instruction.
767 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
768 (vfp_sp_reg_pos): Rename to...
769 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
771 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
772 (Neon D or Q register).
773 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
775 (GE_OPT_PREFIX_BIG): Define constant, for use in...
776 (my_get_expression): Allow above constant as argument to accept
777 64-bit constants with optional prefix.
778 (arm_reg_parse): Add extra argument to return the specific type of
779 register in when either a D or Q register (REG_TYPE_NDQ) is
780 requested. Can be NULL.
781 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
782 (parse_reg_list): Update for new arm_reg_parse args.
783 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
784 (parse_neon_el_struct_list): New function. Parse element/structure
785 register lists for VLD<n>/VST<n> instructions.
786 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
787 (s_arm_unwind_save_mmxwr): Likewise.
788 (s_arm_unwind_save_mmxwcg): Likewise.
789 (s_arm_unwind_movsp): Likewise.
790 (s_arm_unwind_setfp): Likewise.
791 (parse_big_immediate): New function. Parse an immediate, which may be
792 64 bits wide. Put results in inst.operands[i].
793 (parse_shift): Update for new arm_reg_parse args.
794 (parse_address): Likewise. Add parsing of alignment specifiers.
795 (parse_neon_mov): Parse the operands of a VMOV instruction.
796 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
797 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
798 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
799 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
800 (parse_operands): Handle new codes above.
801 (encode_arm_vfp_sp_reg): Rename to...
802 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
803 selected VFP version only supports D0-D15.
804 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
805 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
806 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
807 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
808 encode_arm_vfp_reg name, and allow 32 D regs.
809 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
810 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
812 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
813 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
814 constant-load and conversion insns introduced with VFPv3.
815 (neon_tab_entry): New struct.
816 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
817 those which are the targets of pseudo-instructions.
818 (neon_opc): Enumerate opcodes, use as indices into...
819 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
820 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
821 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
822 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
824 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
826 (neon_type_mask): New. Compact type representation for type checking.
827 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
828 permitted type combinations.
829 (N_IGNORE_TYPE): New macro.
830 (neon_check_shape): New function. Check an instruction shape for
831 multiple alternatives. Return the specific shape for the current
833 (neon_modify_type_size): New function. Modify a vector type and size,
834 depending on the bit mask in argument 1.
835 (neon_type_promote): New function. Convert a given "key" type (of an
836 operand) into the correct type for a different operand, based on a bit
838 (type_chk_of_el_type): New function. Convert a type and size into the
839 compact representation used for type checking.
840 (el_type_of_type_ckh): New function. Reverse of above (only when a
841 single bit is set in the bit mask).
842 (modify_types_allowed): New function. Alter a mask of allowed types
843 based on a bit mask of modifications.
844 (neon_check_type): New function. Check the type of the current
845 instruction against the variable argument list. The "key" type of the
846 instruction is returned.
847 (neon_dp_fixup): New function. Fill in and modify instruction bits for
848 a Neon data-processing instruction depending on whether we're in ARM
849 mode or Thumb-2 mode.
850 (neon_logbits): New function.
851 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
852 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
853 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
854 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
855 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
856 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
857 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
858 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
859 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
860 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
861 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
862 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
863 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
864 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
865 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
866 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
867 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
868 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
869 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
870 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
871 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
872 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
873 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
874 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
875 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
877 (parse_neon_type): New function. Parse Neon type specifier.
878 (opcode_lookup): Allow parsing of Neon type specifiers.
879 (REGNUM2, REGSETH, REGSET2): New macros.
880 (reg_names): Add new VFPv3 and Neon registers.
881 (NUF, nUF, NCE, nCE): New macros for opcode table.
882 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
883 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
884 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
885 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
886 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
887 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
888 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
889 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
890 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
891 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
892 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
893 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
894 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
895 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
897 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
898 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
899 (arm_option_cpu_value): Add vfp3 and neon.
900 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
903 2006-04-25 Bob Wilson <bob.wilson@acm.org>
905 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
906 syntax instead of hardcoded opcodes with ".w18" suffixes.
907 (wide_branch_opcode): New.
908 (build_transition): Use it to check for wide branch opcodes with
909 either ".w18" or ".w15" suffixes.
911 2006-04-25 Bob Wilson <bob.wilson@acm.org>
913 * config/tc-xtensa.c (xtensa_create_literal_symbol,
914 xg_assemble_literal, xg_assemble_literal_space): Do not set the
915 frag's is_literal flag.
917 2006-04-25 Bob Wilson <bob.wilson@acm.org>
919 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
921 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
923 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
924 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
925 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
926 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
927 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
929 2005-04-20 Paul Brook <paul@codesourcery.com>
931 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
933 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
935 2006-04-19 Alan Modra <amodra@bigpond.net.au>
937 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
938 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
939 Make some cpus unsupported on ELF. Run "make dep-am".
940 * Makefile.in: Regenerate.
942 2006-04-19 Alan Modra <amodra@bigpond.net.au>
944 * configure.in (--enable-targets): Indent help message.
945 * configure: Regenerate.
947 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
950 * config/tc-i386.c (i386_immediate): Check illegal immediate
953 2006-04-18 Alan Modra <amodra@bigpond.net.au>
955 * config/tc-i386.c: Formatting.
956 (output_disp, output_imm): ISO C90 params.
958 * frags.c (frag_offset_fixed_p): Constify args.
959 * frags.h (frag_offset_fixed_p): Ditto.
961 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
962 (COFF_MAGIC): Delete.
964 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
966 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
968 * po/POTFILES.in: Regenerated.
970 2006-04-16 Mark Mitchell <mark@codesourcery.com>
972 * doc/as.texinfo: Mention that some .type syntaxes are not
973 supported on all architectures.
975 2006-04-14 Sterling Augustine <sterling@tensilica.com>
977 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
978 instructions when such transformations have been disabled.
980 2006-04-10 Sterling Augustine <sterling@tensilica.com>
982 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
983 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
984 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
985 decoding the loop instructions. Remove current_offset variable.
986 (xtensa_fix_short_loop_frags): Likewise.
987 (min_bytes_to_other_loop_end): Remove current_offset argument.
989 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
991 * config/tc-z80.c (z80_optimize_expr): Removed.
992 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
994 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
996 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
997 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
998 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
999 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1000 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1001 at90can64, at90usb646, at90usb647, at90usb1286 and
1003 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1005 2006-04-07 Paul Brook <paul@codesourcery.com>
1007 * config/tc-arm.c (parse_operands): Set default error message.
1009 2006-04-07 Paul Brook <paul@codesourcery.com>
1011 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1013 2006-04-07 Paul Brook <paul@codesourcery.com>
1015 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1017 2006-04-07 Paul Brook <paul@codesourcery.com>
1019 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1020 (move_or_literal_pool): Handle Thumb-2 instructions.
1021 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1023 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1026 * config/tc-i386.c (match_template): Move 64-bit operand tests
1029 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1031 * po/Make-in: Add install-html target.
1032 * Makefile.am: Add install-html and install-html-recursive targets.
1033 * Makefile.in: Regenerate.
1034 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1035 * configure: Regenerate.
1036 * doc/Makefile.am: Add install-html and install-html-am targets.
1037 * doc/Makefile.in: Regenerate.
1039 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1041 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1044 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1045 Daniel Jacobowitz <dan@codesourcery.com>
1047 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1048 (GOTT_BASE, GOTT_INDEX): New.
1049 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1050 GOTT_INDEX when generating VxWorks PIC.
1051 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1052 use the generic *-*-vxworks* stanza instead.
1054 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1057 * frags.c (frag_offset_fixed_p): New function.
1058 * frags.h (frag_offset_fixed_p): Declare.
1059 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1060 (resolve_expression): Likewise.
1062 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1064 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1065 of the same length but different numbers of slots.
1067 2006-03-30 Andreas Schwab <schwab@suse.de>
1069 * configure.in: Fix help string for --enable-targets option.
1070 * configure: Regenerate.
1072 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1074 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1075 (m68k_ip): ... here. Use for all chips. Protect against buffer
1076 overrun and avoid excessive copying.
1078 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1079 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1080 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1081 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1082 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1083 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1084 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1085 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1086 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1087 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1088 (struct m68k_cpu): Change chip field to control_regs.
1089 (current_chip): Remove.
1090 (control_regs): New.
1091 (m68k_archs, m68k_extensions): Adjust.
1092 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1093 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1094 (find_cf_chip): Reimplement for new organization of cpu table.
1095 (select_control_regs): Remove.
1097 (struct save_opts): Save control regs, not chip.
1098 (s_save, s_restore): Adjust.
1099 (m68k_lookup_cpu): Give deprecated warning when necessary.
1100 (m68k_init_arch): Adjust.
1101 (md_show_usage): Adjust for new cpu table organization.
1103 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1105 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1106 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1107 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1109 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1110 (any_gotrel): New rule.
1111 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1112 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1114 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1115 (bfin_pic_ptr): New function.
1116 (md_pseudo_table): Add it for ".picptr".
1117 (OPTION_FDPIC): New macro.
1118 (md_longopts): Add -mfdpic.
1119 (md_parse_option): Handle it.
1120 (md_begin): Set BFD flags.
1121 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1122 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1124 * Makefile.am (bfin-parse.o): Update dependencies.
1125 (DEPTC_bfin_elf): Likewise.
1126 * Makefile.in: Regenerate.
1128 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1130 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1131 mcfemac instead of mcfmac.
1133 2006-03-23 Michael Matz <matz@suse.de>
1135 * config/tc-i386.c (type_names): Correct placement of 'static'.
1136 (reloc): Map some more relocs to their 64 bit counterpart when
1138 (output_insn): Work around breakage if DEBUG386 is defined.
1139 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1140 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1141 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1142 different from i386.
1143 (output_imm): Ditto.
1144 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1146 (md_convert_frag): Jumps can now be larger than 2GB away, error
1148 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1149 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1151 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1152 Daniel Jacobowitz <dan@codesourcery.com>
1153 Phil Edwards <phil@codesourcery.com>
1154 Zack Weinberg <zack@codesourcery.com>
1155 Mark Mitchell <mark@codesourcery.com>
1156 Nathan Sidwell <nathan@codesourcery.com>
1158 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1159 (md_begin): Complain about -G being used for PIC. Don't change
1160 the text, data and bss alignments on VxWorks.
1161 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1162 generating VxWorks PIC.
1163 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1164 (macro): Likewise, but do not treat la $25 specially for
1165 VxWorks PIC, and do not handle jal.
1166 (OPTION_MVXWORKS_PIC): New macro.
1167 (md_longopts): Add -mvxworks-pic.
1168 (md_parse_option): Don't complain about using PIC and -G together here.
1169 Handle OPTION_MVXWORKS_PIC.
1170 (md_estimate_size_before_relax): Always use the first relaxation
1171 sequence on VxWorks.
1172 * config/tc-mips.h (VXWORKS_PIC): New.
1174 2006-03-21 Paul Brook <paul@codesourcery.com>
1176 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1178 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1180 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1181 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1182 (get_loop_align_size): New.
1183 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1184 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1185 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1186 (get_noop_aligned_address): Use get_loop_align_size.
1187 (get_aligned_diff): Likewise.
1189 2006-03-21 Paul Brook <paul@codesourcery.com>
1191 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1193 2006-03-20 Paul Brook <paul@codesourcery.com>
1195 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1196 (do_t_branch): Encode branches inside IT blocks as unconditional.
1197 (do_t_cps): New function.
1198 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1199 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1200 (opcode_lookup): Allow conditional suffixes on all instructions in
1202 (md_assemble): Advance condexec state before checking for errors.
1203 (insns): Use do_t_cps.
1205 2006-03-20 Paul Brook <paul@codesourcery.com>
1207 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1208 outputting the insn.
1210 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1212 * config/tc-vax.c: Update copyright year.
1213 * config/tc-vax.h: Likewise.
1215 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1217 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1219 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1221 2006-03-17 Paul Brook <paul@codesourcery.com>
1223 * config/tc-arm.c (insns): Add ldm and stm.
1225 2006-03-17 Ben Elliston <bje@au.ibm.com>
1228 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1230 2006-03-16 Paul Brook <paul@codesourcery.com>
1232 * config/tc-arm.c (insns): Add "svc".
1234 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1236 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1237 flag and avoid double underscore prefixes.
1239 2006-03-10 Paul Brook <paul@codesourcery.com>
1241 * config/tc-arm.c (md_begin): Handle EABIv5.
1242 (arm_eabis): Add EF_ARM_EABI_VER5.
1243 * doc/c-arm.texi: Document -meabi=5.
1245 2006-03-10 Ben Elliston <bje@au.ibm.com>
1247 * app.c (do_scrub_chars): Simplify string handling.
1249 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1250 Daniel Jacobowitz <dan@codesourcery.com>
1251 Zack Weinberg <zack@codesourcery.com>
1252 Nathan Sidwell <nathan@codesourcery.com>
1253 Paul Brook <paul@codesourcery.com>
1254 Ricardo Anguiano <anguiano@codesourcery.com>
1255 Phil Edwards <phil@codesourcery.com>
1257 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1258 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1260 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1261 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1262 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1264 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1266 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1267 even when using the text-section-literals option.
1269 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1271 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1273 (m68k_ip): <case 'J'> Check we have some control regs.
1274 (md_parse_option): Allow raw arch switch.
1275 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1276 whether 68881 or cfloat was meant by -mfloat.
1277 (md_show_usage): Adjust extension display.
1278 (m68k_elf_final_processing): Adjust.
1280 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1282 * config/tc-avr.c (avr_mod_hash_value): New function.
1283 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1284 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1285 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1286 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1288 (tc_gen_reloc): Handle substractions of symbols, if possible do
1289 fixups, abort otherwise.
1290 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1291 tc_fix_adjustable): Define.
1293 2006-03-02 James E Wilson <wilson@specifix.com>
1295 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1296 change the template, then clear md.slot[curr].end_of_insn_group.
1298 2006-02-28 Jan Beulich <jbeulich@novell.com>
1300 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1302 2006-02-28 Jan Beulich <jbeulich@novell.com>
1305 * macro.c (getstring): Don't treat parentheses special anymore.
1306 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1307 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1310 2006-02-28 Mat <mat@csail.mit.edu>
1312 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1314 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1316 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1318 (CFI_signal_frame): Define.
1319 (cfi_pseudo_table): Add .cfi_signal_frame.
1320 (dot_cfi): Handle CFI_signal_frame.
1321 (output_cie): Handle cie->signal_frame.
1322 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1323 different. Copy signal_frame from FDE to newly created CIE.
1324 * doc/as.texinfo: Document .cfi_signal_frame.
1326 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1328 * doc/Makefile.am: Add html target.
1329 * doc/Makefile.in: Regenerate.
1330 * po/Make-in: Add html target.
1332 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1334 * config/tc-i386.c (output_insn): Support Intel Merom New
1337 * config/tc-i386.h (CpuMNI): New.
1338 (CpuUnknownFlags): Add CpuMNI.
1340 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1342 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1343 (hpriv_reg_table): New table for hyperprivileged registers.
1344 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1347 2006-02-24 DJ Delorie <dj@redhat.com>
1349 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1350 (tc_gen_reloc): Don't define.
1351 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1352 (OPTION_LINKRELAX): New.
1353 (md_longopts): Add it.
1355 (md_parse_options): Set it.
1356 (md_assemble): Emit relaxation relocs as needed.
1357 (md_convert_frag): Emit relaxation relocs as needed.
1358 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1359 (m32c_apply_fix): New.
1360 (tc_gen_reloc): New.
1361 (m32c_force_relocation): Force out jump relocs when relaxing.
1362 (m32c_fix_adjustable): Return false if relaxing.
1364 2006-02-24 Paul Brook <paul@codesourcery.com>
1366 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1367 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1368 (struct asm_barrier_opt): Define.
1369 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1370 (parse_psr): Accept V7M psr names.
1371 (parse_barrier): New function.
1372 (enum operand_parse_code): Add OP_oBARRIER.
1373 (parse_operands): Implement OP_oBARRIER.
1374 (do_barrier): New function.
1375 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1376 (do_t_cpsi): Add V7M restrictions.
1377 (do_t_mrs, do_t_msr): Validate V7M variants.
1378 (md_assemble): Check for NULL variants.
1379 (v7m_psrs, barrier_opt_names): New tables.
1380 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1381 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1382 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1383 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1384 (struct cpu_arch_ver_table): Define.
1385 (cpu_arch_ver): New.
1386 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1387 Tag_CPU_arch_profile.
1388 * doc/c-arm.texi: Document new cpu and arch options.
1390 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1392 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1394 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1396 * config/tc-ia64.c: Update copyright years.
1398 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1400 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1403 2005-02-22 Paul Brook <paul@codesourcery.com>
1405 * config/tc-arm.c (do_pld): Remove incorrect write to
1407 (encode_thumb32_addr_mode): Use correct operand.
1409 2006-02-21 Paul Brook <paul@codesourcery.com>
1411 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1413 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1414 Anil Paranjape <anilp1@kpitcummins.com>
1415 Shilin Shakti <shilins@kpitcummins.com>
1417 * Makefile.am: Add xc16x related entry.
1418 * Makefile.in: Regenerate.
1419 * configure.in: Added xc16x related entry.
1420 * configure: Regenerate.
1421 * config/tc-xc16x.h: New file
1422 * config/tc-xc16x.c: New file
1423 * doc/c-xc16x.texi: New file for xc16x
1424 * doc/all.texi: Entry for xc16x
1425 * doc/Makefile.texi: Added c-xc16x.texi
1426 * NEWS: Announce the support for the new target.
1428 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1430 * configure.tgt: set emulation for mips-*-netbsd*
1432 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1434 * config.in: Rebuilt.
1436 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1438 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1439 from 1, not 0, in error messages.
1440 (md_assemble): Simplify special-case check for ENTRY instructions.
1441 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1442 operand in error message.
1444 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1446 * configure.tgt (arm-*-linux-gnueabi*): Change to
1449 2006-02-10 Nick Clifton <nickc@redhat.com>
1451 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1452 32-bit value is propagated into the upper bits of a 64-bit long.
1454 * config/tc-arc.c (init_opcode_tables): Fix cast.
1455 (arc_extoper, md_operand): Likewise.
1457 2006-02-09 David Heine <dlheine@tensilica.com>
1459 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1460 each relaxation step.
1462 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1464 * configure.in (CHECK_DECLS): Add vsnprintf.
1465 * configure: Regenerate.
1466 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1467 include/declare here, but...
1468 * as.h: Move code detecting VARARGS idiom to the top.
1469 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1470 (vsnprintf): Declare if not already declared.
1472 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1474 * as.c (close_output_file): New.
1475 (main): Register close_output_file with xatexit before
1476 dump_statistics. Don't call output_file_close.
1478 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1480 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1481 mcf5329_control_regs): New.
1482 (not_current_architecture, selected_arch, selected_cpu): New.
1483 (m68k_archs, m68k_extensions): New.
1484 (archs): Renamed to ...
1485 (m68k_cpus): ... here. Adjust.
1487 (md_pseudo_table): Add arch and cpu directives.
1488 (find_cf_chip, m68k_ip): Adjust table scanning.
1489 (no_68851, no_68881): Remove.
1490 (md_assemble): Lazily initialize.
1491 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1492 (md_init_after_args): Move functionality to m68k_init_arch.
1493 (mri_chip): Adjust table scanning.
1494 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1495 options with saner parsing.
1496 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1497 m68k_init_arch): New.
1498 (s_m68k_cpu, s_m68k_arch): New.
1499 (md_show_usage): Adjust.
1500 (m68k_elf_final_processing): Set CF EF flags.
1501 * config/tc-m68k.h (m68k_init_after_args): Remove.
1502 (tc_init_after_args): Remove.
1503 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1504 (M68k-Directives): Document .arch and .cpu directives.
1506 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1508 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1509 synonyms for equ and defl.
1510 (z80_cons_fix_new): New function.
1511 (emit_byte): Disallow relative jumps to absolute locations.
1512 (emit_data): Only handle defb, prototype changed, because defb is
1513 now handled as pseudo-op rather than an instruction.
1514 (instab): Entries for defb,defw,db,dw moved from here...
1515 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1516 Add entries for def24,def32,d24,d32.
1517 (md_assemble): Improved error handling.
1518 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1519 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1520 (z80_cons_fix_new): Declare.
1521 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1522 (def24,d24,def32,d32): New pseudo-ops.
1524 2006-02-02 Paul Brook <paul@codesourcery.com>
1526 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1528 2005-02-02 Paul Brook <paul@codesourcery.com>
1530 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1531 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1532 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1533 T2_OPCODE_RSB): Define.
1534 (thumb32_negate_data_op): New function.
1535 (md_apply_fix): Use it.
1537 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1539 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1541 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1542 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1544 (relaxation_requirements): Add pfinish_frag argument and use it to
1545 replace setting tinsn->record_fix fields.
1546 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1547 and vinsn_to_insnbuf. Remove references to record_fix and
1548 slot_sub_symbols fields.
1549 (xtensa_mark_narrow_branches): Delete unused code.
1550 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1552 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1554 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1555 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1556 of the record_fix field. Simplify error messages for unexpected
1558 (set_expr_symbol_offset_diff): Delete.
1560 2006-01-31 Paul Brook <paul@codesourcery.com>
1562 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1564 2006-01-31 Paul Brook <paul@codesourcery.com>
1565 Richard Earnshaw <rearnsha@arm.com>
1567 * config/tc-arm.c: Use arm_feature_set.
1568 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1569 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1570 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1573 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1574 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1575 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1576 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1578 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1579 (arm_opts): Move old cpu/arch options from here...
1580 (arm_legacy_opts): ... to here.
1581 (md_parse_option): Search arm_legacy_opts.
1582 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1583 (arm_float_abis, arm_eabis): Make const.
1585 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1587 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1589 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1591 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1592 in load immediate intruction.
1594 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1596 * config/bfin-parse.y (value_match): Use correct conversion
1597 specifications in template string for __FILE__ and __LINE__.
1601 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1603 Introduce TLS descriptors for i386 and x86_64.
1604 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1605 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1606 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1607 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1608 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1610 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1611 (lex_got): Handle @tlsdesc and @tlscall.
1612 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1614 2006-01-11 Nick Clifton <nickc@redhat.com>
1616 Fixes for building on 64-bit hosts:
1617 * config/tc-avr.c (mod_index): New union to allow conversion
1618 between pointers and integers.
1619 (md_begin, avr_ldi_expression): Use it.
1620 * config/tc-i370.c (md_assemble): Add cast for argument to print
1622 * config/tc-tic54x.c (subsym_substitute): Likewise.
1623 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1624 opindex field of fr_cgen structure into a pointer so that it can
1625 be stored in a frag.
1626 * config/tc-mn10300.c (md_assemble): Likewise.
1627 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1629 * config/tc-v850.c: Replace uses of (int) casts with correct
1632 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1635 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1637 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1640 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1641 a local-label reference.
1643 For older changes see ChangeLog-2005
1649 version-control: never
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