1 2006-08-08 DJ Delorie <dj@redhat.com>
3 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
4 vs full symbols so that we never have more than one pointer value
5 for any given symbol in our symbol table.
7 2006-08-08 Sterling Augustine <sterling@tensilica.com>
9 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
10 and emit DW_AT_ranges when code in compilation unit is not
12 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
14 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
15 (out_debug_ranges): New function to emit .debug_ranges section
16 when code is not contiguous.
18 2006-08-08 Nick Clifton <nickc@redhat.com>
20 * config/tc-arm.c (WARN_DEPRECATED): Enable.
22 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
24 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
26 (pe_directive_secrel) [TE_PE]: New function.
27 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
29 [TE_PE]: Handle secrel32.
30 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
32 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
33 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
34 (md_section_align): Only round section sizes here for AOUT
36 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
37 (tc_pe_dwarf2_emit_offset): New function.
38 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
39 (cons_fix_new_arm): Handle O_secrel.
40 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
41 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
42 of OBJ_ELF only block.
43 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
44 tc_pe_dwarf2_emit_offset.
46 2006-08-04 Richard Sandiford <richard@codesourcery.com>
48 * config/tc-sh.c (apply_full_field_fix): New function.
49 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
50 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
51 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
52 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
54 2006-08-03 Nick Clifton <nickc@redhat.com>
57 * config.in: Regenerate.
59 2006-08-03 Joseph Myers <joseph@codesourcery.com>
61 * config/tc-arm.c (parse_operands): Handle invalid register name
64 2006-08-03 Joseph Myers <joseph@codesourcery.com>
66 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
67 (parse_operands): Handle it.
68 (insns): Use it for tmcr and tmrc.
70 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
73 * config/tc-i386.c (md_parse_option): Treat any target starting
74 with elf64_x86_64 as a viable target for the -64 switch.
75 (i386_target_format): For 64-bit ELF flavoured output use
77 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
79 2006-08-02 Nick Clifton <nickc@redhat.com>
82 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
84 * configure.in: Run BFD_BINARY_FOPEN.
85 * configure: Regenerate.
86 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
89 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
91 * config/tc-i386.c (md_assemble): Don't update
94 2006-08-01 Thiemo Seufer <ths@mips.com>
96 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
98 2006-08-01 Thiemo Seufer <ths@mips.com>
100 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
101 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
102 BFD_RELOC_32 and BFD_RELOC_16.
103 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
104 md_convert_frag, md_obj_end): Fix comment formatting.
106 2006-07-31 Thiemo Seufer <ths@mips.com>
108 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
109 handling for BFD_RELOC_MIPS16_JMP.
111 2006-07-24 Andreas Schwab <schwab@suse.de>
114 * read.c (read_a_source_file): Ignore unknown text after line
115 comment character. Fix misleading comment.
117 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
119 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
120 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
121 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
122 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
123 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
124 doc/c-z80.texi, doc/internals.texi: Fix some typos.
126 2006-07-21 Nick Clifton <nickc@redhat.com>
128 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
131 2006-07-20 Thiemo Seufer <ths@mips.com>
132 Nigel Stephens <nigel@mips.com>
134 * config/tc-mips.c (md_parse_option): Don't infer optimisation
135 options from debug options.
137 2006-07-20 Thiemo Seufer <ths@mips.com>
139 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
140 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
142 2006-07-19 Paul Brook <paul@codesourcery.com>
144 * config/tc-arm.c (insns): Fix rbit Arm opcode.
146 2006-07-18 Paul Brook <paul@codesourcery.com>
148 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
149 (md_convert_frag): Use correct reloc for add_pc. Use
150 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
151 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
152 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
154 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
156 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
157 when file and line unknown.
159 2006-07-17 Thiemo Seufer <ths@mips.com>
161 * read.c (s_struct): Use IS_ELF.
162 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
163 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
164 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
165 s_mips_mask): Likewise.
167 2006-07-16 Thiemo Seufer <ths@mips.com>
168 David Ung <davidu@mips.com>
170 * read.c (s_struct): Handle ELF section changing.
171 * config/tc-mips.c (s_align): Leave enabling auto-align to the
173 (s_change_sec): Try section changing only if we output ELF.
175 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
177 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
179 (smallest_imm_type): Remove Cpu086.
180 (i386_target_format): Likewise.
182 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
185 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
186 Michael Meissner <michael.meissner@amd.com>
188 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
189 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
190 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
192 (i386_align_code): Ditto.
193 (md_assemble_code): Add support for insertq/extrq instructions,
194 swapping as needed for intel syntax.
195 (swap_imm_operands): New function to swap immediate operands.
196 (swap_operands): Deal with 4 operand instructions.
197 (build_modrm_byte): Add support for insertq instruction.
199 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
201 * config/tc-i386.h (Size64): Fix a typo in comment.
203 2006-07-12 Nick Clifton <nickc@redhat.com>
205 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
206 fixup_segment() to repeat a range check on a value that has
207 already been checked here.
209 2006-07-07 James E Wilson <wilson@specifix.com>
211 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
213 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
214 Nick Clifton <nickc@redhat.com>
217 * doc/as.texi: Fix spelling typo: branchs => branches.
218 * doc/c-m68hc11.texi: Likewise.
219 * config/tc-m68hc11.c: Likewise.
220 Support old spelling of command line switch for backwards
223 2006-07-04 Thiemo Seufer <ths@mips.com>
224 David Ung <davidu@mips.com>
226 * config/tc-mips.c (s_is_linkonce): New function.
227 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
228 weak, external, and linkonce symbols.
229 (pic_need_relax): Use s_is_linkonce.
231 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
233 * doc/as.texinfo (Org): Remove space.
234 (P2align): Add "@var{abs-expr},".
236 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
238 * config/tc-i386.c (cpu_arch_tune_set): New.
239 (cpu_arch_isa): Likewise.
240 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
241 nops with short or long nop sequences based on -march=/.arch
243 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
244 set cpu_arch_tune and cpu_arch_tune_flags.
245 (md_parse_option): For -march=, set cpu_arch_isa and set
246 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
247 0. Set cpu_arch_tune_set to 1 for -mtune=.
248 (i386_target_format): Don't set cpu_arch_tune.
250 2006-06-23 Nigel Stephens <nigel@mips.com>
252 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
253 generated .sbss.* and .gnu.linkonce.sb.*.
255 2006-06-23 Thiemo Seufer <ths@mips.com>
256 David Ung <davidu@mips.com>
258 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
260 * config/tc-mips.c (label_list): Define per-segment label_list.
261 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
262 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
263 mips_from_file_after_relocs, mips_define_label): Use per-segment
266 2006-06-22 Thiemo Seufer <ths@mips.com>
268 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
269 (append_insn): Use it.
270 (md_apply_fix): Whitespace formatting.
271 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
272 mips16_extended_frag): Remove register specifier.
273 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
276 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
278 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
279 a directive saving VFP registers for ARMv6 or later.
280 (s_arm_unwind_save): Add parameter arch_v6 and call
281 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
283 (md_pseudo_table): Add entry for new "vsave" directive.
284 * doc/c-arm.texi: Correct error in example for "save"
285 directive (fstmdf -> fstmdx). Also document "vsave" directive.
287 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
288 Anatoly Sokolov <aesok@post.ru>
290 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
291 and atmega644p devices. Rename atmega164/atmega324 devices to
292 atmega164p/atmega324p.
293 * doc/c-avr.texi: Document new mcu and arch options.
295 2006-06-17 Nick Clifton <nickc@redhat.com>
297 * config/tc-arm.c (enum parse_operand_result): Move outside of
298 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
300 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
302 * config/tc-i386.h (processor_type): New.
303 (arch_entry): Add type.
305 * config/tc-i386.c (cpu_arch_tune): New.
306 (cpu_arch_tune_flags): Likewise.
307 (cpu_arch_isa_flags): Likewise.
309 (set_cpu_arch): Also update cpu_arch_isa_flags.
310 (md_assemble): Update cpu_arch_isa_flags.
312 (OPTION_MTUNE): Likewise.
313 (md_longopts): Add -march= and -mtune=.
314 (md_parse_option): Support -march= and -mtune=.
315 (md_show_usage): Add -march=CPU/-mtune=CPU.
316 (i386_target_format): Also update cpu_arch_isa_flags,
317 cpu_arch_tune and cpu_arch_tune_flags.
319 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
321 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
323 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
325 * config/tc-arm.c (enum parse_operand_result): New.
326 (struct group_reloc_table_entry): New.
327 (enum group_reloc_type): New.
328 (group_reloc_table): New array.
329 (find_group_reloc_table_entry): New function.
330 (parse_shifter_operand_group_reloc): New function.
331 (parse_address_main): New function, incorporating code
332 from the old parse_address function. To be used via...
333 (parse_address): wrapper for parse_address_main; and
334 (parse_address_group_reloc): new function, likewise.
335 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
336 OP_ADDRGLDRS, OP_ADDRGLDC.
337 (parse_operands): Support for these new operand codes.
338 New macro po_misc_or_fail_no_backtrack.
339 (encode_arm_cp_address): Preserve group relocations.
340 (insns): Modify to use the above operand codes where group
341 relocations are permitted.
342 (md_apply_fix): Handle the group relocations
343 ALU_PC_G0_NC through LDC_SB_G2.
344 (tc_gen_reloc): Likewise.
345 (arm_force_relocation): Leave group relocations for the linker.
346 (arm_fix_adjustable): Likewise.
348 2006-06-15 Julian Brown <julian@codesourcery.com>
350 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
351 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
354 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
356 * config/tc-i386.c (process_suffix): Don't add rex64 for
359 2006-06-09 Thiemo Seufer <ths@mips.com>
361 * config/tc-mips.c (mips_ip): Maintain argument count.
363 2006-06-09 Alan Modra <amodra@bigpond.net.au>
365 * config/tc-iq2000.c: Include sb.h.
367 2006-06-08 Nigel Stephens <nigel@mips.com>
369 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
370 aliases for better compatibility with SGI tools.
372 2006-06-08 Alan Modra <amodra@bigpond.net.au>
374 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
375 * Makefile.am (GASLIBS): Expand @BFDLIB@.
377 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
378 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
379 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
381 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
382 * Makefile.in: Regenerate.
383 * doc/Makefile.in: Regenerate.
384 * configure: Regenerate.
386 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
388 * po/Make-in (pdf, ps): New dummy targets.
390 2006-06-07 Julian Brown <julian@codesourcery.com>
392 * config/tc-arm.c (stdarg.h): include.
393 (arm_it): Add uncond_value field. Add isvec and issingle to operand
395 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
396 REG_TYPE_NSDQ (single, double or quad vector reg).
397 (reg_expected_msgs): Update.
398 (BAD_FPU): Add macro for unsupported FPU instruction error.
399 (parse_neon_type): Support 'd' as an alias for .f64.
400 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
402 (parse_vfp_reg_list): Don't update first arg on error.
403 (parse_neon_mov): Support extra syntax for VFP moves.
404 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
405 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
406 (parse_operands): Support isvec, issingle operands fields, new parse
408 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
410 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
411 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
412 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
413 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
415 (neon_shape): Redefine in terms of above.
416 (neon_shape_class): New enumeration, table of shape classes.
417 (neon_shape_el): New enumeration. One element of a shape.
418 (neon_shape_el_size): Register widths of above, where appropriate.
419 (neon_shape_info): New struct. Info for shape table.
420 (neon_shape_tab): New array.
421 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
422 (neon_check_shape): Rewrite as...
423 (neon_select_shape): New function to classify instruction shapes,
424 driven by new table neon_shape_tab array.
425 (neon_quad): New function. Return 1 if shape should set Q flag in
426 instructions (or equivalent), 0 otherwise.
427 (type_chk_of_el_type): Support F64.
428 (el_type_of_type_chk): Likewise.
429 (neon_check_type): Add support for VFP type checking (VFP data
430 elements fill their containing registers).
431 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
432 in thumb mode for VFP instructions.
433 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
434 and encode the current instruction as if it were that opcode.
435 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
436 arguments, call function in PFN.
437 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
438 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
439 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
440 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
441 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
442 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
443 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
444 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
445 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
446 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
447 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
448 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
449 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
450 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
451 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
453 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
454 between VFP and Neon turns out to belong to Neon. Perform
455 architecture check and fill in condition field if appropriate.
456 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
457 (do_neon_cvt): Add support for VFP variants of instructions.
458 (neon_cvt_flavour): Extend to cover VFP conversions.
459 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
461 (do_neon_ldr_str): Handle single-precision VFP load/store.
462 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
463 NS_NULL not NS_IGNORE.
464 (opcode_tag): Add OT_csuffixF for operands which either take a
465 conditional suffix, or have 0xF in the condition field.
466 (md_assemble): Add support for OT_csuffixF.
467 (NCE): Replace macro with...
468 (NCE_tag, NCE, NCEF): New macros.
469 (nCE): Replace macro with...
470 (nCE_tag, nCE, nCEF): New macros.
471 (insns): Add support for VFP insns or VFP versions of insns msr,
472 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
473 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
474 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
475 VFP/Neon insns together.
477 2006-06-07 Alan Modra <amodra@bigpond.net.au>
478 Ladislav Michl <ladis@linux-mips.org>
480 * app.c: Don't include headers already included by as.h.
482 * atof-generic.c: Likewise.
484 * dwarf2dbg.c: Likewise.
486 * input-file.c: Likewise.
487 * input-scrub.c: Likewise.
489 * output-file.c: Likewise.
492 * config/bfin-lex.l: Likewise.
493 * config/obj-coff.h: Likewise.
494 * config/obj-elf.h: Likewise.
495 * config/obj-som.h: Likewise.
496 * config/tc-arc.c: Likewise.
497 * config/tc-arm.c: Likewise.
498 * config/tc-avr.c: Likewise.
499 * config/tc-bfin.c: Likewise.
500 * config/tc-cris.c: Likewise.
501 * config/tc-d10v.c: Likewise.
502 * config/tc-d30v.c: Likewise.
503 * config/tc-dlx.h: Likewise.
504 * config/tc-fr30.c: Likewise.
505 * config/tc-frv.c: Likewise.
506 * config/tc-h8300.c: Likewise.
507 * config/tc-hppa.c: Likewise.
508 * config/tc-i370.c: Likewise.
509 * config/tc-i860.c: Likewise.
510 * config/tc-i960.c: Likewise.
511 * config/tc-ip2k.c: Likewise.
512 * config/tc-iq2000.c: Likewise.
513 * config/tc-m32c.c: Likewise.
514 * config/tc-m32r.c: Likewise.
515 * config/tc-maxq.c: Likewise.
516 * config/tc-mcore.c: Likewise.
517 * config/tc-mips.c: Likewise.
518 * config/tc-mmix.c: Likewise.
519 * config/tc-mn10200.c: Likewise.
520 * config/tc-mn10300.c: Likewise.
521 * config/tc-msp430.c: Likewise.
522 * config/tc-mt.c: Likewise.
523 * config/tc-ns32k.c: Likewise.
524 * config/tc-openrisc.c: Likewise.
525 * config/tc-ppc.c: Likewise.
526 * config/tc-s390.c: Likewise.
527 * config/tc-sh.c: Likewise.
528 * config/tc-sh64.c: Likewise.
529 * config/tc-sparc.c: Likewise.
530 * config/tc-tic30.c: Likewise.
531 * config/tc-tic4x.c: Likewise.
532 * config/tc-tic54x.c: Likewise.
533 * config/tc-v850.c: Likewise.
534 * config/tc-vax.c: Likewise.
535 * config/tc-xc16x.c: Likewise.
536 * config/tc-xstormy16.c: Likewise.
537 * config/tc-xtensa.c: Likewise.
538 * config/tc-z80.c: Likewise.
539 * config/tc-z8k.c: Likewise.
540 * macro.h: Don't include sb.h or ansidecl.h.
541 * sb.h: Don't include stdio.h or ansidecl.h.
542 * cond.c: Include sb.h.
543 * itbl-lex.l: Include as.h instead of other system headers.
544 * itbl-parse.y: Likewise.
545 * itbl-ops.c: Similarly.
546 * itbl-ops.h: Don't include as.h or ansidecl.h.
547 * config/bfin-defs.h: Don't include bfd.h or as.h.
548 * config/bfin-parse.y: Include as.h instead of other system headers.
550 2006-06-06 Ben Elliston <bje@au.ibm.com>
551 Anton Blanchard <anton@samba.org>
553 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
554 (md_show_usage): Document it.
555 (ppc_setup_opcodes): Test power6 opcode flag bits.
556 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
558 2006-06-06 Thiemo Seufer <ths@mips.com>
559 Chao-ying Fu <fu@mips.com>
561 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
562 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
563 (macro_build): Update comment.
564 (mips_ip): Allow DSP64 instructions for MIPS64R2.
565 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
567 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
568 MIPS_CPU_ASE_MDMX flags for sb1.
570 2006-06-05 Thiemo Seufer <ths@mips.com>
572 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
574 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
575 (mips_ip): Make overflowed/underflowed constant arguments in DSP
576 and MT instructions a fatal error. Use INSERT_OPERAND where
577 appropriate. Improve warnings for break and wait code overflows.
578 Use symbolic constant of OP_MASK_COPZ.
579 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
581 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
583 * po/Make-in (top_builddir): Define.
585 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
587 * doc/Makefile.am (TEXI2DVI): Define.
588 * doc/Makefile.in: Regenerate.
589 * doc/c-arc.texi: Fix typo.
591 2006-06-01 Alan Modra <amodra@bigpond.net.au>
593 * config/obj-ieee.c: Delete.
594 * config/obj-ieee.h: Delete.
595 * Makefile.am (OBJ_FORMATS): Remove ieee.
596 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
597 (obj-ieee.o): Remove rule.
598 * Makefile.in: Regenerate.
599 * configure.in (atof): Remove tahoe.
600 (OBJ_MAYBE_IEEE): Don't define.
601 * configure: Regenerate.
602 * config.in: Regenerate.
603 * doc/Makefile.in: Regenerate.
604 * po/POTFILES.in: Regenerate.
606 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
608 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
609 and LIBINTL_DEP everywhere.
611 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
612 * acinclude.m4: Include new gettext macros.
613 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
614 Remove local code for po/Makefile.
615 * Makefile.in, configure, doc/Makefile.in: Regenerated.
617 2006-05-30 Nick Clifton <nickc@redhat.com>
619 * po/es.po: Updated Spanish translation.
621 2006-05-06 Denis Chertykov <denisc@overta.ru>
623 * doc/c-avr.texi: New file.
624 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
625 * doc/all.texi: Set AVR
626 * doc/as.texinfo: Include c-avr.texi
628 2006-05-28 Jie Zhang <jie.zhang@analog.com>
630 * config/bfin-parse.y (check_macfunc): Loose the condition of
631 calling check_multiply_halfregs ().
633 2006-05-25 Jie Zhang <jie.zhang@analog.com>
635 * config/bfin-parse.y (asm_1): Better check and deal with
636 vector and scalar Multiply 16-Bit Operands instructions.
638 2006-05-24 Nick Clifton <nickc@redhat.com>
640 * config/tc-hppa.c: Convert to ISO C90 format.
641 * config/tc-hppa.h: Likewise.
643 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
644 Randolph Chung <randolph@tausq.org>
646 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
647 is_tls_ieoff, is_tls_leoff): Define.
648 (fix_new_hppa): Handle TLS.
649 (cons_fix_new_hppa): Likewise.
651 (md_apply_fix): Handle TLS relocs.
652 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
654 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
656 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
658 2006-05-23 Thiemo Seufer <ths@mips.com>
659 David Ung <davidu@mips.com>
660 Nigel Stephens <nigel@mips.com>
663 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
664 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
665 ISA_HAS_MXHC1): New macros.
666 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
667 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
668 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
669 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
670 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
671 (mips_after_parse_args): Change default handling of float register
672 size to account for 32bit code with 64bit FP. Better sanity checking
673 of ISA/ASE/ABI option combinations.
674 (s_mipsset): Support switching of GPR and FPR sizes via
675 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
677 (mips_elf_final_processing): We should record the use of 64bit FP
678 registers in 32bit code but we don't, because ELF header flags are
680 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
681 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
682 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
683 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
684 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
685 missing -march options. Document .set arch=CPU. Move .set smartmips
686 to ASE page. Use @code for .set FOO examples.
688 2006-05-23 Jie Zhang <jie.zhang@analog.com>
690 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
693 2006-05-23 Jie Zhang <jie.zhang@analog.com>
695 * config/bfin-defs.h (bfin_equals): Remove declaration.
696 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
697 * config/tc-bfin.c (bfin_name_is_register): Remove.
698 (bfin_equals): Remove.
699 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
700 (bfin_name_is_register): Remove declaration.
702 2006-05-19 Thiemo Seufer <ths@mips.com>
703 Nigel Stephens <nigel@mips.com>
705 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
706 (mips_oddfpreg_ok): New function.
709 2006-05-19 Thiemo Seufer <ths@mips.com>
710 David Ung <davidu@mips.com>
712 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
713 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
714 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
715 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
716 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
717 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
718 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
719 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
720 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
721 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
722 reg_names_o32, reg_names_n32n64): Define register classes.
723 (reg_lookup): New function, use register classes.
724 (md_begin): Reserve register names in the symbol table. Simplify
726 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
728 (mips16_ip): Use reg_lookup.
729 (tc_get_register): Likewise.
730 (tc_mips_regname_to_dw2regnum): New function.
732 2006-05-19 Thiemo Seufer <ths@mips.com>
734 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
735 Un-constify string argument.
736 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
738 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
740 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
742 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
744 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
746 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
749 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
751 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
752 cfloat/m68881 to correct architecture before using it.
754 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
756 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
759 2006-05-15 Paul Brook <paul@codesourcery.com>
761 * config/tc-arm.c (arm_adjust_symtab): Use
762 bfd_is_arm_special_symbol_name.
764 2006-05-15 Bob Wilson <bob.wilson@acm.org>
766 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
767 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
768 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
769 Handle errors from calls to xtensa_opcode_is_* functions.
771 2006-05-14 Thiemo Seufer <ths@mips.com>
773 * config/tc-mips.c (macro_build): Test for currently active
775 (mips16_ip): Reject invalid opcodes.
777 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
779 * doc/as.texinfo: Rename "Index" to "AS Index",
780 and "ABORT" to "ABORT (COFF)".
782 2006-05-11 Paul Brook <paul@codesourcery.com>
784 * config/tc-arm.c (parse_half): New function.
785 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
786 (parse_operands): Ditto.
787 (do_mov16): Reject invalid relocations.
788 (do_t_mov16): Ditto. Use Thumb reloc numbers.
789 (insns): Replace Iffff with HALF.
790 (md_apply_fix): Add MOVW and MOVT relocs.
791 (tc_gen_reloc): Ditto.
792 * doc/c-arm.texi: Document relocation operators
794 2006-05-11 Paul Brook <paul@codesourcery.com>
796 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
798 2006-05-11 Thiemo Seufer <ths@mips.com>
800 * config/tc-mips.c (append_insn): Don't check the range of j or
803 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
805 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
806 relocs against external symbols for WinCE targets.
807 (md_apply_fix): Likewise.
809 2006-05-09 David Ung <davidu@mips.com>
811 * config/tc-mips.c (append_insn): Only warn about an out-of-range
814 2006-05-09 Nick Clifton <nickc@redhat.com>
816 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
817 against symbols which are not going to be placed into the symbol
820 2006-05-09 Ben Elliston <bje@au.ibm.com>
822 * expr.c (operand): Remove `if (0 && ..)' statement and
823 subsequently unused target_op label. Collapse `if (1 || ..)'
825 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
826 separately above the switch.
828 2006-05-08 Nick Clifton <nickc@redhat.com>
831 * config/tc-msp430.c (line_separator_character): Define as |.
833 2006-05-08 Thiemo Seufer <ths@mips.com>
834 Nigel Stephens <nigel@mips.com>
835 David Ung <davidu@mips.com>
837 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
838 (mips_opts): Likewise.
839 (file_ase_smartmips): New variable.
840 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
841 (macro_build): Handle SmartMIPS instructions.
843 (md_longopts): Add argument handling for smartmips.
844 (md_parse_options, mips_after_parse_args): Likewise.
845 (s_mipsset): Add .set smartmips support.
846 (md_show_usage): Document -msmartmips/-mno-smartmips.
847 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
849 * doc/c-mips.texi: Likewise.
851 2006-05-08 Alan Modra <amodra@bigpond.net.au>
853 * write.c (relax_segment): Add pass count arg. Don't error on
854 negative org/space on first two passes.
855 (relax_seg_info): New struct.
856 (relax_seg, write_object_file): Adjust.
857 * write.h (relax_segment): Update prototype.
859 2006-05-05 Julian Brown <julian@codesourcery.com>
861 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
863 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
864 architecture version checks.
865 (insns): Allow overlapping instructions to be used in VFP mode.
867 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
870 * config/obj-elf.c (obj_elf_change_section): Allow user
871 specified SHF_ALPHA_GPREL.
873 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
875 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
876 for PMEM related expressions.
878 2006-05-05 Nick Clifton <nickc@redhat.com>
881 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
882 insertion of a directory separator character into a string at a
883 given offset. Uses heuristics to decide when to use a backslash
884 character rather than a forward-slash character.
885 (dwarf2_directive_loc): Use the macro.
886 (out_debug_info): Likewise.
888 2006-05-05 Thiemo Seufer <ths@mips.com>
889 David Ung <davidu@mips.com>
891 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
893 (macro): Add new case M_CACHE_AB.
895 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
897 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
898 (opcode_lookup): Issue a warning for opcode with
899 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
900 identical to OT_cinfix3.
901 (TxC3w, TC3w, tC3w): New.
902 (insns): Use tC3w and TC3w for comparison instructions with
905 2006-05-04 Alan Modra <amodra@bigpond.net.au>
907 * subsegs.h (struct frchain): Delete frch_seg.
908 (frchain_root): Delete.
909 (seg_info): Define as macro.
910 * subsegs.c (frchain_root): Delete.
911 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
912 (subsegs_begin, subseg_change): Adjust for above.
913 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
914 rather than to one big list.
915 (subseg_get): Don't special case abs, und sections.
916 (subseg_new, subseg_force_new): Don't set frchainP here.
918 (subsegs_print_statistics): Adjust frag chain control list traversal.
919 * debug.c (dmp_frags): Likewise.
920 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
921 at frchain_root. Make use of known frchain ordering.
922 (last_frag_for_seg): Likewise.
923 (get_frag_fix): Likewise. Add seg param.
924 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
925 * write.c (chain_frchains_together_1): Adjust for struct frchain.
926 (SUB_SEGMENT_ALIGN): Likewise.
927 (subsegs_finish): Adjust frchain list traversal.
928 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
929 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
930 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
931 (xtensa_fix_b_j_loop_end_frags): Likewise.
932 (xtensa_fix_close_loop_end_frags): Likewise.
933 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
934 (retrieve_segment_info): Delete frch_seg initialisation.
936 2006-05-03 Alan Modra <amodra@bigpond.net.au>
938 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
939 * config/obj-elf.h (obj_sec_set_private_data): Delete.
940 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
941 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
943 2006-05-02 Joseph Myers <joseph@codesourcery.com>
945 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
947 (md_apply_fix3): Multiply offset by 4 here for
948 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
950 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
951 Jan Beulich <jbeulich@novell.com>
953 * config/tc-i386.c (output_invalid_buf): Change size for
955 * config/tc-tic30.c (output_invalid_buf): Likewise.
957 * config/tc-i386.c (output_invalid): Cast none-ascii char to
959 * config/tc-tic30.c (output_invalid): Likewise.
961 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
963 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
964 (TEXI2POD): Use AM_MAKEINFOFLAGS.
965 (asconfig.texi): Don't set top_srcdir.
966 * doc/as.texinfo: Don't use top_srcdir.
967 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
969 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
971 * config/tc-i386.c (output_invalid_buf): Change size to 16.
972 * config/tc-tic30.c (output_invalid_buf): Likewise.
974 * config/tc-i386.c (output_invalid): Use snprintf instead of
976 * config/tc-ia64.c (declare_register_set): Likewise.
977 (emit_one_bundle): Likewise.
978 (check_dependencies): Likewise.
979 * config/tc-tic30.c (output_invalid): Likewise.
981 2006-05-02 Paul Brook <paul@codesourcery.com>
983 * config/tc-arm.c (arm_optimize_expr): New function.
984 * config/tc-arm.h (md_optimize_expr): Define
985 (arm_optimize_expr): Add prototype.
986 (TC_FORCE_RELOCATION_SUB_SAME): Define.
988 2006-05-02 Ben Elliston <bje@au.ibm.com>
990 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
993 * sb.h (sb_list_vector): Move to sb.c.
994 * sb.c (free_list): Use type of sb_list_vector directly.
995 (sb_build): Fix off-by-one error in assertion about `size'.
997 2006-05-01 Ben Elliston <bje@au.ibm.com>
999 * listing.c (listing_listing): Remove useless loop.
1000 * macro.c (macro_expand): Remove is_positional local variable.
1001 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1002 and simplify surrounding expressions, where possible.
1003 (assign_symbol): Likewise.
1004 (s_weakref): Likewise.
1005 * symbols.c (colon): Likewise.
1007 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1009 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1011 2006-04-30 Thiemo Seufer <ths@mips.com>
1012 David Ung <davidu@mips.com>
1014 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1015 (mips_immed): New table that records various handling of udi
1016 instruction patterns.
1017 (mips_ip): Adds udi handling.
1019 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1021 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1022 of list rather than beginning.
1024 2006-04-26 Julian Brown <julian@codesourcery.com>
1026 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1027 (is_quarter_float): Rename from above. Simplify slightly.
1028 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1030 (parse_neon_mov): Parse floating-point constants.
1031 (neon_qfloat_bits): Fix encoding.
1032 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1033 preference to integer encoding when using the F32 type.
1035 2006-04-26 Julian Brown <julian@codesourcery.com>
1037 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1038 zero-initialising structures containing it will lead to invalid types).
1039 (arm_it): Add vectype to each operand.
1040 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1042 (neon_typed_alias): New structure. Extra information for typed
1044 (reg_entry): Add neon type info field.
1045 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1046 Break out alternative syntax for coprocessor registers, etc. into...
1047 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1048 out from arm_reg_parse.
1049 (parse_neon_type): Move. Return SUCCESS/FAIL.
1050 (first_error): New function. Call to ensure first error which occurs is
1052 (parse_neon_operand_type): Parse exactly one type.
1053 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1054 (parse_typed_reg_or_scalar): New function. Handle core of both
1055 arm_typed_reg_parse and parse_scalar.
1056 (arm_typed_reg_parse): Parse a register with an optional type.
1057 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1059 (parse_scalar): Parse a Neon scalar with optional type.
1060 (parse_reg_list): Use first_error.
1061 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1062 (neon_alias_types_same): New function. Return true if two (alias) types
1064 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1066 (insert_reg_alias): Return new reg_entry not void.
1067 (insert_neon_reg_alias): New function. Insert type/index information as
1068 well as register for alias.
1069 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1070 make typed register aliases accordingly.
1071 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1073 (s_unreq): Delete type information if present.
1074 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1075 (s_arm_unwind_save_mmxwcg): Likewise.
1076 (s_arm_unwind_movsp): Likewise.
1077 (s_arm_unwind_setfp): Likewise.
1078 (parse_shift): Likewise.
1079 (parse_shifter_operand): Likewise.
1080 (parse_address): Likewise.
1081 (parse_tb): Likewise.
1082 (tc_arm_regname_to_dw2regnum): Likewise.
1083 (md_pseudo_table): Add dn, qn.
1084 (parse_neon_mov): Handle typed operands.
1085 (parse_operands): Likewise.
1086 (neon_type_mask): Add N_SIZ.
1087 (N_ALLMODS): New macro.
1088 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1089 (el_type_of_type_chk): Add some safeguards.
1090 (modify_types_allowed): Fix logic bug.
1091 (neon_check_type): Handle operands with types.
1092 (neon_three_same): Remove redundant optional arg handling.
1093 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1094 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1095 (do_neon_step): Adjust accordingly.
1096 (neon_cmode_for_logic_imm): Use first_error.
1097 (do_neon_bitfield): Call neon_check_type.
1098 (neon_dyadic): Rename to...
1099 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1100 to allow modification of type of the destination.
1101 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1102 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1103 (do_neon_compare): Make destination be an untyped bitfield.
1104 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1105 (neon_mul_mac): Return early in case of errors.
1106 (neon_move_immediate): Use first_error.
1107 (neon_mac_reg_scalar_long): Fix type to include scalar.
1108 (do_neon_dup): Likewise.
1109 (do_neon_mov): Likewise (in several places).
1110 (do_neon_tbl_tbx): Fix type.
1111 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1112 (do_neon_ld_dup): Exit early in case of errors and/or use
1114 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1115 Handle .dn/.qn directives.
1116 (REGDEF): Add zero for reg_entry neon field.
1118 2006-04-26 Julian Brown <julian@codesourcery.com>
1120 * config/tc-arm.c (limits.h): Include.
1121 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1122 (fpu_vfp_v3_or_neon_ext): Declare constants.
1123 (neon_el_type): New enumeration of types for Neon vector elements.
1124 (neon_type_el): New struct. Define type and size of a vector element.
1125 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1127 (neon_type): Define struct. The type of an instruction.
1128 (arm_it): Add 'vectype' for the current instruction.
1129 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1130 (vfp_sp_reg_pos): Rename to...
1131 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1133 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1134 (Neon D or Q register).
1135 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1137 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1138 (my_get_expression): Allow above constant as argument to accept
1139 64-bit constants with optional prefix.
1140 (arm_reg_parse): Add extra argument to return the specific type of
1141 register in when either a D or Q register (REG_TYPE_NDQ) is
1142 requested. Can be NULL.
1143 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1144 (parse_reg_list): Update for new arm_reg_parse args.
1145 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1146 (parse_neon_el_struct_list): New function. Parse element/structure
1147 register lists for VLD<n>/VST<n> instructions.
1148 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1149 (s_arm_unwind_save_mmxwr): Likewise.
1150 (s_arm_unwind_save_mmxwcg): Likewise.
1151 (s_arm_unwind_movsp): Likewise.
1152 (s_arm_unwind_setfp): Likewise.
1153 (parse_big_immediate): New function. Parse an immediate, which may be
1154 64 bits wide. Put results in inst.operands[i].
1155 (parse_shift): Update for new arm_reg_parse args.
1156 (parse_address): Likewise. Add parsing of alignment specifiers.
1157 (parse_neon_mov): Parse the operands of a VMOV instruction.
1158 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1159 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1160 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1161 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1162 (parse_operands): Handle new codes above.
1163 (encode_arm_vfp_sp_reg): Rename to...
1164 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1165 selected VFP version only supports D0-D15.
1166 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1167 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1168 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1169 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1170 encode_arm_vfp_reg name, and allow 32 D regs.
1171 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1172 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1174 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1175 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1176 constant-load and conversion insns introduced with VFPv3.
1177 (neon_tab_entry): New struct.
1178 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1179 those which are the targets of pseudo-instructions.
1180 (neon_opc): Enumerate opcodes, use as indices into...
1181 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1182 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1183 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1184 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1186 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1188 (neon_type_mask): New. Compact type representation for type checking.
1189 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1190 permitted type combinations.
1191 (N_IGNORE_TYPE): New macro.
1192 (neon_check_shape): New function. Check an instruction shape for
1193 multiple alternatives. Return the specific shape for the current
1195 (neon_modify_type_size): New function. Modify a vector type and size,
1196 depending on the bit mask in argument 1.
1197 (neon_type_promote): New function. Convert a given "key" type (of an
1198 operand) into the correct type for a different operand, based on a bit
1200 (type_chk_of_el_type): New function. Convert a type and size into the
1201 compact representation used for type checking.
1202 (el_type_of_type_ckh): New function. Reverse of above (only when a
1203 single bit is set in the bit mask).
1204 (modify_types_allowed): New function. Alter a mask of allowed types
1205 based on a bit mask of modifications.
1206 (neon_check_type): New function. Check the type of the current
1207 instruction against the variable argument list. The "key" type of the
1208 instruction is returned.
1209 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1210 a Neon data-processing instruction depending on whether we're in ARM
1211 mode or Thumb-2 mode.
1212 (neon_logbits): New function.
1213 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1214 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1215 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1216 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1217 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1218 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1219 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1220 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1221 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1222 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1223 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1224 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1225 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1226 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1227 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1228 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1229 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1230 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1231 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1232 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1233 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1234 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1235 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1236 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1237 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1239 (parse_neon_type): New function. Parse Neon type specifier.
1240 (opcode_lookup): Allow parsing of Neon type specifiers.
1241 (REGNUM2, REGSETH, REGSET2): New macros.
1242 (reg_names): Add new VFPv3 and Neon registers.
1243 (NUF, nUF, NCE, nCE): New macros for opcode table.
1244 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1245 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1246 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1247 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1248 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1249 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1250 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1251 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1252 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1253 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1254 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1255 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1256 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1257 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1259 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1260 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1261 (arm_option_cpu_value): Add vfp3 and neon.
1262 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1265 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1267 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1268 syntax instead of hardcoded opcodes with ".w18" suffixes.
1269 (wide_branch_opcode): New.
1270 (build_transition): Use it to check for wide branch opcodes with
1271 either ".w18" or ".w15" suffixes.
1273 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1275 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1276 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1277 frag's is_literal flag.
1279 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1281 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1283 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1285 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1286 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1287 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1288 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1289 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1291 2005-04-20 Paul Brook <paul@codesourcery.com>
1293 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1295 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1297 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1299 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1300 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1301 Make some cpus unsupported on ELF. Run "make dep-am".
1302 * Makefile.in: Regenerate.
1304 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1306 * configure.in (--enable-targets): Indent help message.
1307 * configure: Regenerate.
1309 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1312 * config/tc-i386.c (i386_immediate): Check illegal immediate
1315 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1317 * config/tc-i386.c: Formatting.
1318 (output_disp, output_imm): ISO C90 params.
1320 * frags.c (frag_offset_fixed_p): Constify args.
1321 * frags.h (frag_offset_fixed_p): Ditto.
1323 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1324 (COFF_MAGIC): Delete.
1326 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1328 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1330 * po/POTFILES.in: Regenerated.
1332 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1334 * doc/as.texinfo: Mention that some .type syntaxes are not
1335 supported on all architectures.
1337 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1339 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1340 instructions when such transformations have been disabled.
1342 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1344 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1345 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1346 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1347 decoding the loop instructions. Remove current_offset variable.
1348 (xtensa_fix_short_loop_frags): Likewise.
1349 (min_bytes_to_other_loop_end): Remove current_offset argument.
1351 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1353 * config/tc-z80.c (z80_optimize_expr): Removed.
1354 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1356 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1358 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1359 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1360 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1361 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1362 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1363 at90can64, at90usb646, at90usb647, at90usb1286 and
1365 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1367 2006-04-07 Paul Brook <paul@codesourcery.com>
1369 * config/tc-arm.c (parse_operands): Set default error message.
1371 2006-04-07 Paul Brook <paul@codesourcery.com>
1373 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1375 2006-04-07 Paul Brook <paul@codesourcery.com>
1377 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1379 2006-04-07 Paul Brook <paul@codesourcery.com>
1381 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1382 (move_or_literal_pool): Handle Thumb-2 instructions.
1383 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1385 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1388 * config/tc-i386.c (match_template): Move 64-bit operand tests
1391 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1393 * po/Make-in: Add install-html target.
1394 * Makefile.am: Add install-html and install-html-recursive targets.
1395 * Makefile.in: Regenerate.
1396 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1397 * configure: Regenerate.
1398 * doc/Makefile.am: Add install-html and install-html-am targets.
1399 * doc/Makefile.in: Regenerate.
1401 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1403 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1406 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1407 Daniel Jacobowitz <dan@codesourcery.com>
1409 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1410 (GOTT_BASE, GOTT_INDEX): New.
1411 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1412 GOTT_INDEX when generating VxWorks PIC.
1413 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1414 use the generic *-*-vxworks* stanza instead.
1416 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1419 * frags.c (frag_offset_fixed_p): New function.
1420 * frags.h (frag_offset_fixed_p): Declare.
1421 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1422 (resolve_expression): Likewise.
1424 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1426 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1427 of the same length but different numbers of slots.
1429 2006-03-30 Andreas Schwab <schwab@suse.de>
1431 * configure.in: Fix help string for --enable-targets option.
1432 * configure: Regenerate.
1434 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1436 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1437 (m68k_ip): ... here. Use for all chips. Protect against buffer
1438 overrun and avoid excessive copying.
1440 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1441 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1442 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1443 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1444 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1445 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1446 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1447 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1448 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1449 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1450 (struct m68k_cpu): Change chip field to control_regs.
1451 (current_chip): Remove.
1452 (control_regs): New.
1453 (m68k_archs, m68k_extensions): Adjust.
1454 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1455 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1456 (find_cf_chip): Reimplement for new organization of cpu table.
1457 (select_control_regs): Remove.
1459 (struct save_opts): Save control regs, not chip.
1460 (s_save, s_restore): Adjust.
1461 (m68k_lookup_cpu): Give deprecated warning when necessary.
1462 (m68k_init_arch): Adjust.
1463 (md_show_usage): Adjust for new cpu table organization.
1465 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1467 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1468 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1469 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1471 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1472 (any_gotrel): New rule.
1473 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1474 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1476 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1477 (bfin_pic_ptr): New function.
1478 (md_pseudo_table): Add it for ".picptr".
1479 (OPTION_FDPIC): New macro.
1480 (md_longopts): Add -mfdpic.
1481 (md_parse_option): Handle it.
1482 (md_begin): Set BFD flags.
1483 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1484 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1486 * Makefile.am (bfin-parse.o): Update dependencies.
1487 (DEPTC_bfin_elf): Likewise.
1488 * Makefile.in: Regenerate.
1490 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1492 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1493 mcfemac instead of mcfmac.
1495 2006-03-23 Michael Matz <matz@suse.de>
1497 * config/tc-i386.c (type_names): Correct placement of 'static'.
1498 (reloc): Map some more relocs to their 64 bit counterpart when
1500 (output_insn): Work around breakage if DEBUG386 is defined.
1501 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1502 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1503 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1504 different from i386.
1505 (output_imm): Ditto.
1506 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1508 (md_convert_frag): Jumps can now be larger than 2GB away, error
1510 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1511 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1513 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1514 Daniel Jacobowitz <dan@codesourcery.com>
1515 Phil Edwards <phil@codesourcery.com>
1516 Zack Weinberg <zack@codesourcery.com>
1517 Mark Mitchell <mark@codesourcery.com>
1518 Nathan Sidwell <nathan@codesourcery.com>
1520 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1521 (md_begin): Complain about -G being used for PIC. Don't change
1522 the text, data and bss alignments on VxWorks.
1523 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1524 generating VxWorks PIC.
1525 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1526 (macro): Likewise, but do not treat la $25 specially for
1527 VxWorks PIC, and do not handle jal.
1528 (OPTION_MVXWORKS_PIC): New macro.
1529 (md_longopts): Add -mvxworks-pic.
1530 (md_parse_option): Don't complain about using PIC and -G together here.
1531 Handle OPTION_MVXWORKS_PIC.
1532 (md_estimate_size_before_relax): Always use the first relaxation
1533 sequence on VxWorks.
1534 * config/tc-mips.h (VXWORKS_PIC): New.
1536 2006-03-21 Paul Brook <paul@codesourcery.com>
1538 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1540 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1542 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1543 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1544 (get_loop_align_size): New.
1545 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1546 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1547 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1548 (get_noop_aligned_address): Use get_loop_align_size.
1549 (get_aligned_diff): Likewise.
1551 2006-03-21 Paul Brook <paul@codesourcery.com>
1553 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1555 2006-03-20 Paul Brook <paul@codesourcery.com>
1557 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1558 (do_t_branch): Encode branches inside IT blocks as unconditional.
1559 (do_t_cps): New function.
1560 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1561 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1562 (opcode_lookup): Allow conditional suffixes on all instructions in
1564 (md_assemble): Advance condexec state before checking for errors.
1565 (insns): Use do_t_cps.
1567 2006-03-20 Paul Brook <paul@codesourcery.com>
1569 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1570 outputting the insn.
1572 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1574 * config/tc-vax.c: Update copyright year.
1575 * config/tc-vax.h: Likewise.
1577 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1579 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1581 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1583 2006-03-17 Paul Brook <paul@codesourcery.com>
1585 * config/tc-arm.c (insns): Add ldm and stm.
1587 2006-03-17 Ben Elliston <bje@au.ibm.com>
1590 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1592 2006-03-16 Paul Brook <paul@codesourcery.com>
1594 * config/tc-arm.c (insns): Add "svc".
1596 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1598 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1599 flag and avoid double underscore prefixes.
1601 2006-03-10 Paul Brook <paul@codesourcery.com>
1603 * config/tc-arm.c (md_begin): Handle EABIv5.
1604 (arm_eabis): Add EF_ARM_EABI_VER5.
1605 * doc/c-arm.texi: Document -meabi=5.
1607 2006-03-10 Ben Elliston <bje@au.ibm.com>
1609 * app.c (do_scrub_chars): Simplify string handling.
1611 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1612 Daniel Jacobowitz <dan@codesourcery.com>
1613 Zack Weinberg <zack@codesourcery.com>
1614 Nathan Sidwell <nathan@codesourcery.com>
1615 Paul Brook <paul@codesourcery.com>
1616 Ricardo Anguiano <anguiano@codesourcery.com>
1617 Phil Edwards <phil@codesourcery.com>
1619 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1620 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1622 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1623 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1624 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1626 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1628 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1629 even when using the text-section-literals option.
1631 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1633 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1635 (m68k_ip): <case 'J'> Check we have some control regs.
1636 (md_parse_option): Allow raw arch switch.
1637 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1638 whether 68881 or cfloat was meant by -mfloat.
1639 (md_show_usage): Adjust extension display.
1640 (m68k_elf_final_processing): Adjust.
1642 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1644 * config/tc-avr.c (avr_mod_hash_value): New function.
1645 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1646 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1647 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1648 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1650 (tc_gen_reloc): Handle substractions of symbols, if possible do
1651 fixups, abort otherwise.
1652 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1653 tc_fix_adjustable): Define.
1655 2006-03-02 James E Wilson <wilson@specifix.com>
1657 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1658 change the template, then clear md.slot[curr].end_of_insn_group.
1660 2006-02-28 Jan Beulich <jbeulich@novell.com>
1662 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1664 2006-02-28 Jan Beulich <jbeulich@novell.com>
1667 * macro.c (getstring): Don't treat parentheses special anymore.
1668 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1669 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1672 2006-02-28 Mat <mat@csail.mit.edu>
1674 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1676 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1678 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1680 (CFI_signal_frame): Define.
1681 (cfi_pseudo_table): Add .cfi_signal_frame.
1682 (dot_cfi): Handle CFI_signal_frame.
1683 (output_cie): Handle cie->signal_frame.
1684 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1685 different. Copy signal_frame from FDE to newly created CIE.
1686 * doc/as.texinfo: Document .cfi_signal_frame.
1688 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1690 * doc/Makefile.am: Add html target.
1691 * doc/Makefile.in: Regenerate.
1692 * po/Make-in: Add html target.
1694 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1696 * config/tc-i386.c (output_insn): Support Intel Merom New
1699 * config/tc-i386.h (CpuMNI): New.
1700 (CpuUnknownFlags): Add CpuMNI.
1702 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1704 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1705 (hpriv_reg_table): New table for hyperprivileged registers.
1706 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1709 2006-02-24 DJ Delorie <dj@redhat.com>
1711 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1712 (tc_gen_reloc): Don't define.
1713 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1714 (OPTION_LINKRELAX): New.
1715 (md_longopts): Add it.
1717 (md_parse_options): Set it.
1718 (md_assemble): Emit relaxation relocs as needed.
1719 (md_convert_frag): Emit relaxation relocs as needed.
1720 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1721 (m32c_apply_fix): New.
1722 (tc_gen_reloc): New.
1723 (m32c_force_relocation): Force out jump relocs when relaxing.
1724 (m32c_fix_adjustable): Return false if relaxing.
1726 2006-02-24 Paul Brook <paul@codesourcery.com>
1728 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1729 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1730 (struct asm_barrier_opt): Define.
1731 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1732 (parse_psr): Accept V7M psr names.
1733 (parse_barrier): New function.
1734 (enum operand_parse_code): Add OP_oBARRIER.
1735 (parse_operands): Implement OP_oBARRIER.
1736 (do_barrier): New function.
1737 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1738 (do_t_cpsi): Add V7M restrictions.
1739 (do_t_mrs, do_t_msr): Validate V7M variants.
1740 (md_assemble): Check for NULL variants.
1741 (v7m_psrs, barrier_opt_names): New tables.
1742 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1743 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1744 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1745 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1746 (struct cpu_arch_ver_table): Define.
1747 (cpu_arch_ver): New.
1748 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1749 Tag_CPU_arch_profile.
1750 * doc/c-arm.texi: Document new cpu and arch options.
1752 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1754 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1756 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1758 * config/tc-ia64.c: Update copyright years.
1760 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1762 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1765 2005-02-22 Paul Brook <paul@codesourcery.com>
1767 * config/tc-arm.c (do_pld): Remove incorrect write to
1769 (encode_thumb32_addr_mode): Use correct operand.
1771 2006-02-21 Paul Brook <paul@codesourcery.com>
1773 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1775 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1776 Anil Paranjape <anilp1@kpitcummins.com>
1777 Shilin Shakti <shilins@kpitcummins.com>
1779 * Makefile.am: Add xc16x related entry.
1780 * Makefile.in: Regenerate.
1781 * configure.in: Added xc16x related entry.
1782 * configure: Regenerate.
1783 * config/tc-xc16x.h: New file
1784 * config/tc-xc16x.c: New file
1785 * doc/c-xc16x.texi: New file for xc16x
1786 * doc/all.texi: Entry for xc16x
1787 * doc/Makefile.texi: Added c-xc16x.texi
1788 * NEWS: Announce the support for the new target.
1790 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1792 * configure.tgt: set emulation for mips-*-netbsd*
1794 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1796 * config.in: Rebuilt.
1798 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1800 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1801 from 1, not 0, in error messages.
1802 (md_assemble): Simplify special-case check for ENTRY instructions.
1803 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1804 operand in error message.
1806 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1808 * configure.tgt (arm-*-linux-gnueabi*): Change to
1811 2006-02-10 Nick Clifton <nickc@redhat.com>
1813 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1814 32-bit value is propagated into the upper bits of a 64-bit long.
1816 * config/tc-arc.c (init_opcode_tables): Fix cast.
1817 (arc_extoper, md_operand): Likewise.
1819 2006-02-09 David Heine <dlheine@tensilica.com>
1821 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1822 each relaxation step.
1824 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1826 * configure.in (CHECK_DECLS): Add vsnprintf.
1827 * configure: Regenerate.
1828 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1829 include/declare here, but...
1830 * as.h: Move code detecting VARARGS idiom to the top.
1831 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1832 (vsnprintf): Declare if not already declared.
1834 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1836 * as.c (close_output_file): New.
1837 (main): Register close_output_file with xatexit before
1838 dump_statistics. Don't call output_file_close.
1840 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1842 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1843 mcf5329_control_regs): New.
1844 (not_current_architecture, selected_arch, selected_cpu): New.
1845 (m68k_archs, m68k_extensions): New.
1846 (archs): Renamed to ...
1847 (m68k_cpus): ... here. Adjust.
1849 (md_pseudo_table): Add arch and cpu directives.
1850 (find_cf_chip, m68k_ip): Adjust table scanning.
1851 (no_68851, no_68881): Remove.
1852 (md_assemble): Lazily initialize.
1853 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1854 (md_init_after_args): Move functionality to m68k_init_arch.
1855 (mri_chip): Adjust table scanning.
1856 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1857 options with saner parsing.
1858 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1859 m68k_init_arch): New.
1860 (s_m68k_cpu, s_m68k_arch): New.
1861 (md_show_usage): Adjust.
1862 (m68k_elf_final_processing): Set CF EF flags.
1863 * config/tc-m68k.h (m68k_init_after_args): Remove.
1864 (tc_init_after_args): Remove.
1865 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1866 (M68k-Directives): Document .arch and .cpu directives.
1868 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1870 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1871 synonyms for equ and defl.
1872 (z80_cons_fix_new): New function.
1873 (emit_byte): Disallow relative jumps to absolute locations.
1874 (emit_data): Only handle defb, prototype changed, because defb is
1875 now handled as pseudo-op rather than an instruction.
1876 (instab): Entries for defb,defw,db,dw moved from here...
1877 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1878 Add entries for def24,def32,d24,d32.
1879 (md_assemble): Improved error handling.
1880 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1881 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1882 (z80_cons_fix_new): Declare.
1883 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1884 (def24,d24,def32,d32): New pseudo-ops.
1886 2006-02-02 Paul Brook <paul@codesourcery.com>
1888 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1890 2005-02-02 Paul Brook <paul@codesourcery.com>
1892 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1893 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1894 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1895 T2_OPCODE_RSB): Define.
1896 (thumb32_negate_data_op): New function.
1897 (md_apply_fix): Use it.
1899 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1901 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1903 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1904 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1906 (relaxation_requirements): Add pfinish_frag argument and use it to
1907 replace setting tinsn->record_fix fields.
1908 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1909 and vinsn_to_insnbuf. Remove references to record_fix and
1910 slot_sub_symbols fields.
1911 (xtensa_mark_narrow_branches): Delete unused code.
1912 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1914 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1916 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1917 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1918 of the record_fix field. Simplify error messages for unexpected
1920 (set_expr_symbol_offset_diff): Delete.
1922 2006-01-31 Paul Brook <paul@codesourcery.com>
1924 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1926 2006-01-31 Paul Brook <paul@codesourcery.com>
1927 Richard Earnshaw <rearnsha@arm.com>
1929 * config/tc-arm.c: Use arm_feature_set.
1930 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1931 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1932 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1935 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1936 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1937 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1938 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1940 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1941 (arm_opts): Move old cpu/arch options from here...
1942 (arm_legacy_opts): ... to here.
1943 (md_parse_option): Search arm_legacy_opts.
1944 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1945 (arm_float_abis, arm_eabis): Make const.
1947 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1949 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1951 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1953 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1954 in load immediate intruction.
1956 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1958 * config/bfin-parse.y (value_match): Use correct conversion
1959 specifications in template string for __FILE__ and __LINE__.
1963 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1965 Introduce TLS descriptors for i386 and x86_64.
1966 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1967 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1968 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1969 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1970 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1972 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1973 (lex_got): Handle @tlsdesc and @tlscall.
1974 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1976 2006-01-11 Nick Clifton <nickc@redhat.com>
1978 Fixes for building on 64-bit hosts:
1979 * config/tc-avr.c (mod_index): New union to allow conversion
1980 between pointers and integers.
1981 (md_begin, avr_ldi_expression): Use it.
1982 * config/tc-i370.c (md_assemble): Add cast for argument to print
1984 * config/tc-tic54x.c (subsym_substitute): Likewise.
1985 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1986 opindex field of fr_cgen structure into a pointer so that it can
1987 be stored in a frag.
1988 * config/tc-mn10300.c (md_assemble): Likewise.
1989 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1991 * config/tc-v850.c: Replace uses of (int) casts with correct
1994 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1997 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1999 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2002 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2003 a local-label reference.
2005 For older changes see ChangeLog-2005
2011 version-control: never
OSDN Git Service
