1 2006-05-23 Thiemo Seufer <ths@mips.com>
2 David Ung <davidu@mips.com>
3 Nigel Stephens <nigel@mips.com>
6 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
7 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
8 ISA_HAS_MXHC1): New macros.
9 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
10 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
11 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
12 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
13 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
14 (mips_after_parse_args): Change default handling of float register
15 size to account for 32bit code with 64bit FP. Better sanity checking
16 of ISA/ASE/ABI option combinations.
17 (s_mipsset): Support switching of GPR and FPR sizes via
18 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
20 (mips_elf_final_processing): We should record the use of 64bit FP
21 registers in 32bit code but we don't, because ELF header flags are
23 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
24 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
25 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
26 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
27 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
28 missing -march options. Document .set arch=CPU. Move .set smartmips
29 to ASE page. Use @code for .set FOO examples.
31 2006-05-23 Jie Zhang <jie.zhang@analog.com>
33 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
36 2006-05-23 Jie Zhang <jie.zhang@analog.com>
38 * config/bfin-defs.h (bfin_equals): Remove declaration.
39 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
40 * config/tc-bfin.c (bfin_name_is_register): Remove.
41 (bfin_equals): Remove.
42 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
43 (bfin_name_is_register): Remove declaration.
45 2006-05-19 Thiemo Seufer <ths@mips.com>
46 Nigel Stephens <nigel@mips.com>
48 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
49 (mips_oddfpreg_ok): New function.
52 2006-05-19 Thiemo Seufer <ths@mips.com>
53 David Ung <davidu@mips.com>
55 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
56 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
57 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
58 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
59 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
60 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
61 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
62 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
63 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
64 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
65 reg_names_o32, reg_names_n32n64): Define register classes.
66 (reg_lookup): New function, use register classes.
67 (md_begin): Reserve register names in the symbol table. Simplify
69 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
71 (mips16_ip): Use reg_lookup.
72 (tc_get_register): Likewise.
73 (tc_mips_regname_to_dw2regnum): New function.
75 2006-05-19 Thiemo Seufer <ths@mips.com>
77 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
78 Un-constify string argument.
79 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
81 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
83 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
85 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
87 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
89 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
92 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
94 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
95 cfloat/m68881 to correct architecture before using it.
97 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
99 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
102 2006-05-15 Paul Brook <paul@codesourcery.com>
104 * config/tc-arm.c (arm_adjust_symtab): Use
105 bfd_is_arm_special_symbol_name.
107 2006-05-15 Bob Wilson <bob.wilson@acm.org>
109 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
110 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
111 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
112 Handle errors from calls to xtensa_opcode_is_* functions.
114 2006-05-14 Thiemo Seufer <ths@mips.com>
116 * config/tc-mips.c (macro_build): Test for currently active
118 (mips16_ip): Reject invalid opcodes.
120 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
122 * doc/as.texinfo: Rename "Index" to "AS Index",
123 and "ABORT" to "ABORT (COFF)".
125 2006-05-11 Paul Brook <paul@codesourcery.com>
127 * config/tc-arm.c (parse_half): New function.
128 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
129 (parse_operands): Ditto.
130 (do_mov16): Reject invalid relocations.
131 (do_t_mov16): Ditto. Use Thumb reloc numbers.
132 (insns): Replace Iffff with HALF.
133 (md_apply_fix): Add MOVW and MOVT relocs.
134 (tc_gen_reloc): Ditto.
135 * doc/c-arm.texi: Document relocation operators
137 2006-05-11 Paul Brook <paul@codesourcery.com>
139 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
141 2006-05-11 Thiemo Seufer <ths@mips.com>
143 * config/tc-mips.c (append_insn): Don't check the range of j or
146 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
148 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
149 relocs against external symbols for WinCE targets.
150 (md_apply_fix): Likewise.
152 2006-05-09 David Ung <davidu@mips.com>
154 * config/tc-mips.c (append_insn): Only warn about an out-of-range
157 2006-05-09 Nick Clifton <nickc@redhat.com>
159 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
160 against symbols which are not going to be placed into the symbol
163 2006-05-09 Ben Elliston <bje@au.ibm.com>
165 * expr.c (operand): Remove `if (0 && ..)' statement and
166 subsequently unused target_op label. Collapse `if (1 || ..)'
168 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
169 separately above the switch.
171 2006-05-08 Nick Clifton <nickc@redhat.com>
174 * config/tc-msp430.c (line_separator_character): Define as |.
176 2006-05-08 Thiemo Seufer <ths@mips.com>
177 Nigel Stephens <nigel@mips.com>
178 David Ung <davidu@mips.com>
180 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
181 (mips_opts): Likewise.
182 (file_ase_smartmips): New variable.
183 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
184 (macro_build): Handle SmartMIPS instructions.
186 (md_longopts): Add argument handling for smartmips.
187 (md_parse_options, mips_after_parse_args): Likewise.
188 (s_mipsset): Add .set smartmips support.
189 (md_show_usage): Document -msmartmips/-mno-smartmips.
190 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
192 * doc/c-mips.texi: Likewise.
194 2006-05-08 Alan Modra <amodra@bigpond.net.au>
196 * write.c (relax_segment): Add pass count arg. Don't error on
197 negative org/space on first two passes.
198 (relax_seg_info): New struct.
199 (relax_seg, write_object_file): Adjust.
200 * write.h (relax_segment): Update prototype.
202 2006-05-05 Julian Brown <julian@codesourcery.com>
204 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
206 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
207 architecture version checks.
208 (insns): Allow overlapping instructions to be used in VFP mode.
210 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
213 * config/obj-elf.c (obj_elf_change_section): Allow user
214 specified SHF_ALPHA_GPREL.
216 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
218 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
219 for PMEM related expressions.
221 2006-05-05 Nick Clifton <nickc@redhat.com>
224 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
225 insertion of a directory separator character into a string at a
226 given offset. Uses heuristics to decide when to use a backslash
227 character rather than a forward-slash character.
228 (dwarf2_directive_loc): Use the macro.
229 (out_debug_info): Likewise.
231 2006-05-05 Thiemo Seufer <ths@mips.com>
232 David Ung <davidu@mips.com>
234 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
236 (macro): Add new case M_CACHE_AB.
238 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
240 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
241 (opcode_lookup): Issue a warning for opcode with
242 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
243 identical to OT_cinfix3.
244 (TxC3w, TC3w, tC3w): New.
245 (insns): Use tC3w and TC3w for comparison instructions with
248 2006-05-04 Alan Modra <amodra@bigpond.net.au>
250 * subsegs.h (struct frchain): Delete frch_seg.
251 (frchain_root): Delete.
252 (seg_info): Define as macro.
253 * subsegs.c (frchain_root): Delete.
254 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
255 (subsegs_begin, subseg_change): Adjust for above.
256 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
257 rather than to one big list.
258 (subseg_get): Don't special case abs, und sections.
259 (subseg_new, subseg_force_new): Don't set frchainP here.
261 (subsegs_print_statistics): Adjust frag chain control list traversal.
262 * debug.c (dmp_frags): Likewise.
263 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
264 at frchain_root. Make use of known frchain ordering.
265 (last_frag_for_seg): Likewise.
266 (get_frag_fix): Likewise. Add seg param.
267 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
268 * write.c (chain_frchains_together_1): Adjust for struct frchain.
269 (SUB_SEGMENT_ALIGN): Likewise.
270 (subsegs_finish): Adjust frchain list traversal.
271 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
272 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
273 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
274 (xtensa_fix_b_j_loop_end_frags): Likewise.
275 (xtensa_fix_close_loop_end_frags): Likewise.
276 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
277 (retrieve_segment_info): Delete frch_seg initialisation.
279 2006-05-03 Alan Modra <amodra@bigpond.net.au>
281 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
282 * config/obj-elf.h (obj_sec_set_private_data): Delete.
283 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
284 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
286 2006-05-02 Joseph Myers <joseph@codesourcery.com>
288 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
290 (md_apply_fix3): Multiply offset by 4 here for
291 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
293 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
294 Jan Beulich <jbeulich@novell.com>
296 * config/tc-i386.c (output_invalid_buf): Change size for
298 * config/tc-tic30.c (output_invalid_buf): Likewise.
300 * config/tc-i386.c (output_invalid): Cast none-ascii char to
302 * config/tc-tic30.c (output_invalid): Likewise.
304 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
306 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
307 (TEXI2POD): Use AM_MAKEINFOFLAGS.
308 (asconfig.texi): Don't set top_srcdir.
309 * doc/as.texinfo: Don't use top_srcdir.
310 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
312 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
314 * config/tc-i386.c (output_invalid_buf): Change size to 16.
315 * config/tc-tic30.c (output_invalid_buf): Likewise.
317 * config/tc-i386.c (output_invalid): Use snprintf instead of
319 * config/tc-ia64.c (declare_register_set): Likewise.
320 (emit_one_bundle): Likewise.
321 (check_dependencies): Likewise.
322 * config/tc-tic30.c (output_invalid): Likewise.
324 2006-05-02 Paul Brook <paul@codesourcery.com>
326 * config/tc-arm.c (arm_optimize_expr): New function.
327 * config/tc-arm.h (md_optimize_expr): Define
328 (arm_optimize_expr): Add prototype.
329 (TC_FORCE_RELOCATION_SUB_SAME): Define.
331 2006-05-02 Ben Elliston <bje@au.ibm.com>
333 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
336 * sb.h (sb_list_vector): Move to sb.c.
337 * sb.c (free_list): Use type of sb_list_vector directly.
338 (sb_build): Fix off-by-one error in assertion about `size'.
340 2006-05-01 Ben Elliston <bje@au.ibm.com>
342 * listing.c (listing_listing): Remove useless loop.
343 * macro.c (macro_expand): Remove is_positional local variable.
344 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
345 and simplify surrounding expressions, where possible.
346 (assign_symbol): Likewise.
347 (s_weakref): Likewise.
348 * symbols.c (colon): Likewise.
350 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
352 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
354 2006-04-30 Thiemo Seufer <ths@mips.com>
355 David Ung <davidu@mips.com>
357 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
358 (mips_immed): New table that records various handling of udi
359 instruction patterns.
360 (mips_ip): Adds udi handling.
362 2006-04-28 Alan Modra <amodra@bigpond.net.au>
364 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
365 of list rather than beginning.
367 2006-04-26 Julian Brown <julian@codesourcery.com>
369 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
370 (is_quarter_float): Rename from above. Simplify slightly.
371 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
373 (parse_neon_mov): Parse floating-point constants.
374 (neon_qfloat_bits): Fix encoding.
375 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
376 preference to integer encoding when using the F32 type.
378 2006-04-26 Julian Brown <julian@codesourcery.com>
380 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
381 zero-initialising structures containing it will lead to invalid types).
382 (arm_it): Add vectype to each operand.
383 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
385 (neon_typed_alias): New structure. Extra information for typed
387 (reg_entry): Add neon type info field.
388 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
389 Break out alternative syntax for coprocessor registers, etc. into...
390 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
391 out from arm_reg_parse.
392 (parse_neon_type): Move. Return SUCCESS/FAIL.
393 (first_error): New function. Call to ensure first error which occurs is
395 (parse_neon_operand_type): Parse exactly one type.
396 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
397 (parse_typed_reg_or_scalar): New function. Handle core of both
398 arm_typed_reg_parse and parse_scalar.
399 (arm_typed_reg_parse): Parse a register with an optional type.
400 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
402 (parse_scalar): Parse a Neon scalar with optional type.
403 (parse_reg_list): Use first_error.
404 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
405 (neon_alias_types_same): New function. Return true if two (alias) types
407 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
409 (insert_reg_alias): Return new reg_entry not void.
410 (insert_neon_reg_alias): New function. Insert type/index information as
411 well as register for alias.
412 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
413 make typed register aliases accordingly.
414 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
416 (s_unreq): Delete type information if present.
417 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
418 (s_arm_unwind_save_mmxwcg): Likewise.
419 (s_arm_unwind_movsp): Likewise.
420 (s_arm_unwind_setfp): Likewise.
421 (parse_shift): Likewise.
422 (parse_shifter_operand): Likewise.
423 (parse_address): Likewise.
424 (parse_tb): Likewise.
425 (tc_arm_regname_to_dw2regnum): Likewise.
426 (md_pseudo_table): Add dn, qn.
427 (parse_neon_mov): Handle typed operands.
428 (parse_operands): Likewise.
429 (neon_type_mask): Add N_SIZ.
430 (N_ALLMODS): New macro.
431 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
432 (el_type_of_type_chk): Add some safeguards.
433 (modify_types_allowed): Fix logic bug.
434 (neon_check_type): Handle operands with types.
435 (neon_three_same): Remove redundant optional arg handling.
436 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
437 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
438 (do_neon_step): Adjust accordingly.
439 (neon_cmode_for_logic_imm): Use first_error.
440 (do_neon_bitfield): Call neon_check_type.
441 (neon_dyadic): Rename to...
442 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
443 to allow modification of type of the destination.
444 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
445 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
446 (do_neon_compare): Make destination be an untyped bitfield.
447 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
448 (neon_mul_mac): Return early in case of errors.
449 (neon_move_immediate): Use first_error.
450 (neon_mac_reg_scalar_long): Fix type to include scalar.
451 (do_neon_dup): Likewise.
452 (do_neon_mov): Likewise (in several places).
453 (do_neon_tbl_tbx): Fix type.
454 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
455 (do_neon_ld_dup): Exit early in case of errors and/or use
457 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
458 Handle .dn/.qn directives.
459 (REGDEF): Add zero for reg_entry neon field.
461 2006-04-26 Julian Brown <julian@codesourcery.com>
463 * config/tc-arm.c (limits.h): Include.
464 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
465 (fpu_vfp_v3_or_neon_ext): Declare constants.
466 (neon_el_type): New enumeration of types for Neon vector elements.
467 (neon_type_el): New struct. Define type and size of a vector element.
468 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
470 (neon_type): Define struct. The type of an instruction.
471 (arm_it): Add 'vectype' for the current instruction.
472 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
473 (vfp_sp_reg_pos): Rename to...
474 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
476 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
477 (Neon D or Q register).
478 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
480 (GE_OPT_PREFIX_BIG): Define constant, for use in...
481 (my_get_expression): Allow above constant as argument to accept
482 64-bit constants with optional prefix.
483 (arm_reg_parse): Add extra argument to return the specific type of
484 register in when either a D or Q register (REG_TYPE_NDQ) is
485 requested. Can be NULL.
486 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
487 (parse_reg_list): Update for new arm_reg_parse args.
488 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
489 (parse_neon_el_struct_list): New function. Parse element/structure
490 register lists for VLD<n>/VST<n> instructions.
491 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
492 (s_arm_unwind_save_mmxwr): Likewise.
493 (s_arm_unwind_save_mmxwcg): Likewise.
494 (s_arm_unwind_movsp): Likewise.
495 (s_arm_unwind_setfp): Likewise.
496 (parse_big_immediate): New function. Parse an immediate, which may be
497 64 bits wide. Put results in inst.operands[i].
498 (parse_shift): Update for new arm_reg_parse args.
499 (parse_address): Likewise. Add parsing of alignment specifiers.
500 (parse_neon_mov): Parse the operands of a VMOV instruction.
501 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
502 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
503 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
504 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
505 (parse_operands): Handle new codes above.
506 (encode_arm_vfp_sp_reg): Rename to...
507 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
508 selected VFP version only supports D0-D15.
509 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
510 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
511 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
512 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
513 encode_arm_vfp_reg name, and allow 32 D regs.
514 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
515 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
517 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
518 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
519 constant-load and conversion insns introduced with VFPv3.
520 (neon_tab_entry): New struct.
521 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
522 those which are the targets of pseudo-instructions.
523 (neon_opc): Enumerate opcodes, use as indices into...
524 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
525 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
526 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
527 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
529 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
531 (neon_type_mask): New. Compact type representation for type checking.
532 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
533 permitted type combinations.
534 (N_IGNORE_TYPE): New macro.
535 (neon_check_shape): New function. Check an instruction shape for
536 multiple alternatives. Return the specific shape for the current
538 (neon_modify_type_size): New function. Modify a vector type and size,
539 depending on the bit mask in argument 1.
540 (neon_type_promote): New function. Convert a given "key" type (of an
541 operand) into the correct type for a different operand, based on a bit
543 (type_chk_of_el_type): New function. Convert a type and size into the
544 compact representation used for type checking.
545 (el_type_of_type_ckh): New function. Reverse of above (only when a
546 single bit is set in the bit mask).
547 (modify_types_allowed): New function. Alter a mask of allowed types
548 based on a bit mask of modifications.
549 (neon_check_type): New function. Check the type of the current
550 instruction against the variable argument list. The "key" type of the
551 instruction is returned.
552 (neon_dp_fixup): New function. Fill in and modify instruction bits for
553 a Neon data-processing instruction depending on whether we're in ARM
554 mode or Thumb-2 mode.
555 (neon_logbits): New function.
556 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
557 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
558 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
559 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
560 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
561 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
562 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
563 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
564 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
565 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
566 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
567 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
568 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
569 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
570 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
571 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
572 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
573 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
574 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
575 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
576 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
577 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
578 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
579 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
580 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
582 (parse_neon_type): New function. Parse Neon type specifier.
583 (opcode_lookup): Allow parsing of Neon type specifiers.
584 (REGNUM2, REGSETH, REGSET2): New macros.
585 (reg_names): Add new VFPv3 and Neon registers.
586 (NUF, nUF, NCE, nCE): New macros for opcode table.
587 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
588 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
589 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
590 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
591 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
592 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
593 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
594 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
595 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
596 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
597 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
598 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
599 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
600 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
602 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
603 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
604 (arm_option_cpu_value): Add vfp3 and neon.
605 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
608 2006-04-25 Bob Wilson <bob.wilson@acm.org>
610 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
611 syntax instead of hardcoded opcodes with ".w18" suffixes.
612 (wide_branch_opcode): New.
613 (build_transition): Use it to check for wide branch opcodes with
614 either ".w18" or ".w15" suffixes.
616 2006-04-25 Bob Wilson <bob.wilson@acm.org>
618 * config/tc-xtensa.c (xtensa_create_literal_symbol,
619 xg_assemble_literal, xg_assemble_literal_space): Do not set the
620 frag's is_literal flag.
622 2006-04-25 Bob Wilson <bob.wilson@acm.org>
624 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
626 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
628 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
629 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
630 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
631 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
632 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
634 2005-04-20 Paul Brook <paul@codesourcery.com>
636 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
638 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
640 2006-04-19 Alan Modra <amodra@bigpond.net.au>
642 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
643 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
644 Make some cpus unsupported on ELF. Run "make dep-am".
645 * Makefile.in: Regenerate.
647 2006-04-19 Alan Modra <amodra@bigpond.net.au>
649 * configure.in (--enable-targets): Indent help message.
650 * configure: Regenerate.
652 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
655 * config/tc-i386.c (i386_immediate): Check illegal immediate
658 2006-04-18 Alan Modra <amodra@bigpond.net.au>
660 * config/tc-i386.c: Formatting.
661 (output_disp, output_imm): ISO C90 params.
663 * frags.c (frag_offset_fixed_p): Constify args.
664 * frags.h (frag_offset_fixed_p): Ditto.
666 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
667 (COFF_MAGIC): Delete.
669 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
671 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
673 * po/POTFILES.in: Regenerated.
675 2006-04-16 Mark Mitchell <mark@codesourcery.com>
677 * doc/as.texinfo: Mention that some .type syntaxes are not
678 supported on all architectures.
680 2006-04-14 Sterling Augustine <sterling@tensilica.com>
682 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
683 instructions when such transformations have been disabled.
685 2006-04-10 Sterling Augustine <sterling@tensilica.com>
687 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
688 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
689 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
690 decoding the loop instructions. Remove current_offset variable.
691 (xtensa_fix_short_loop_frags): Likewise.
692 (min_bytes_to_other_loop_end): Remove current_offset argument.
694 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
696 * config/tc-z80.c (z80_optimize_expr): Removed.
697 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
699 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
701 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
702 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
703 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
704 atmega644, atmega329, atmega3290, atmega649, atmega6490,
705 atmega406, atmega640, atmega1280, atmega1281, at90can32,
706 at90can64, at90usb646, at90usb647, at90usb1286 and
708 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
710 2006-04-07 Paul Brook <paul@codesourcery.com>
712 * config/tc-arm.c (parse_operands): Set default error message.
714 2006-04-07 Paul Brook <paul@codesourcery.com>
716 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
718 2006-04-07 Paul Brook <paul@codesourcery.com>
720 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
722 2006-04-07 Paul Brook <paul@codesourcery.com>
724 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
725 (move_or_literal_pool): Handle Thumb-2 instructions.
726 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
728 2006-04-07 Alan Modra <amodra@bigpond.net.au>
731 * config/tc-i386.c (match_template): Move 64-bit operand tests
734 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
736 * po/Make-in: Add install-html target.
737 * Makefile.am: Add install-html and install-html-recursive targets.
738 * Makefile.in: Regenerate.
739 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
740 * configure: Regenerate.
741 * doc/Makefile.am: Add install-html and install-html-am targets.
742 * doc/Makefile.in: Regenerate.
744 2006-04-06 Alan Modra <amodra@bigpond.net.au>
746 * frags.c (frag_offset_fixed_p): Reinitialise offset before
749 2006-04-05 Richard Sandiford <richard@codesourcery.com>
750 Daniel Jacobowitz <dan@codesourcery.com>
752 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
753 (GOTT_BASE, GOTT_INDEX): New.
754 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
755 GOTT_INDEX when generating VxWorks PIC.
756 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
757 use the generic *-*-vxworks* stanza instead.
759 2006-04-04 Alan Modra <amodra@bigpond.net.au>
762 * frags.c (frag_offset_fixed_p): New function.
763 * frags.h (frag_offset_fixed_p): Declare.
764 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
765 (resolve_expression): Likewise.
767 2006-04-03 Sterling Augustine <sterling@tensilica.com>
769 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
770 of the same length but different numbers of slots.
772 2006-03-30 Andreas Schwab <schwab@suse.de>
774 * configure.in: Fix help string for --enable-targets option.
775 * configure: Regenerate.
777 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
779 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
780 (m68k_ip): ... here. Use for all chips. Protect against buffer
781 overrun and avoid excessive copying.
783 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
784 m68020_control_regs, m68040_control_regs, m68060_control_regs,
785 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
786 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
787 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
788 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
789 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
790 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
791 mcf5282_ctrl, mcfv4e_ctrl): ... these.
792 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
793 (struct m68k_cpu): Change chip field to control_regs.
794 (current_chip): Remove.
796 (m68k_archs, m68k_extensions): Adjust.
797 (m68k_cpus): Reorder to be in cpu number order. Adjust.
798 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
799 (find_cf_chip): Reimplement for new organization of cpu table.
800 (select_control_regs): Remove.
802 (struct save_opts): Save control regs, not chip.
803 (s_save, s_restore): Adjust.
804 (m68k_lookup_cpu): Give deprecated warning when necessary.
805 (m68k_init_arch): Adjust.
806 (md_show_usage): Adjust for new cpu table organization.
808 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
810 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
811 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
812 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
814 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
815 (any_gotrel): New rule.
816 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
817 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
819 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
820 (bfin_pic_ptr): New function.
821 (md_pseudo_table): Add it for ".picptr".
822 (OPTION_FDPIC): New macro.
823 (md_longopts): Add -mfdpic.
824 (md_parse_option): Handle it.
825 (md_begin): Set BFD flags.
826 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
827 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
829 * Makefile.am (bfin-parse.o): Update dependencies.
830 (DEPTC_bfin_elf): Likewise.
831 * Makefile.in: Regenerate.
833 2006-03-25 Richard Sandiford <richard@codesourcery.com>
835 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
836 mcfemac instead of mcfmac.
838 2006-03-23 Michael Matz <matz@suse.de>
840 * config/tc-i386.c (type_names): Correct placement of 'static'.
841 (reloc): Map some more relocs to their 64 bit counterpart when
843 (output_insn): Work around breakage if DEBUG386 is defined.
844 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
845 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
846 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
849 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
851 (md_convert_frag): Jumps can now be larger than 2GB away, error
853 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
854 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
856 2006-03-22 Richard Sandiford <richard@codesourcery.com>
857 Daniel Jacobowitz <dan@codesourcery.com>
858 Phil Edwards <phil@codesourcery.com>
859 Zack Weinberg <zack@codesourcery.com>
860 Mark Mitchell <mark@codesourcery.com>
861 Nathan Sidwell <nathan@codesourcery.com>
863 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
864 (md_begin): Complain about -G being used for PIC. Don't change
865 the text, data and bss alignments on VxWorks.
866 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
867 generating VxWorks PIC.
868 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
869 (macro): Likewise, but do not treat la $25 specially for
870 VxWorks PIC, and do not handle jal.
871 (OPTION_MVXWORKS_PIC): New macro.
872 (md_longopts): Add -mvxworks-pic.
873 (md_parse_option): Don't complain about using PIC and -G together here.
874 Handle OPTION_MVXWORKS_PIC.
875 (md_estimate_size_before_relax): Always use the first relaxation
877 * config/tc-mips.h (VXWORKS_PIC): New.
879 2006-03-21 Paul Brook <paul@codesourcery.com>
881 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
883 2006-03-21 Sterling Augustine <sterling@tensilica.com>
885 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
886 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
887 (get_loop_align_size): New.
888 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
889 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
890 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
891 (get_noop_aligned_address): Use get_loop_align_size.
892 (get_aligned_diff): Likewise.
894 2006-03-21 Paul Brook <paul@codesourcery.com>
896 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
898 2006-03-20 Paul Brook <paul@codesourcery.com>
900 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
901 (do_t_branch): Encode branches inside IT blocks as unconditional.
902 (do_t_cps): New function.
903 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
904 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
905 (opcode_lookup): Allow conditional suffixes on all instructions in
907 (md_assemble): Advance condexec state before checking for errors.
908 (insns): Use do_t_cps.
910 2006-03-20 Paul Brook <paul@codesourcery.com>
912 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
915 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
917 * config/tc-vax.c: Update copyright year.
918 * config/tc-vax.h: Likewise.
920 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
922 * config/tc-vax.c (md_chars_to_number): Used only locally, so
924 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
926 2006-03-17 Paul Brook <paul@codesourcery.com>
928 * config/tc-arm.c (insns): Add ldm and stm.
930 2006-03-17 Ben Elliston <bje@au.ibm.com>
933 * doc/as.texinfo (Ident): Document this directive more thoroughly.
935 2006-03-16 Paul Brook <paul@codesourcery.com>
937 * config/tc-arm.c (insns): Add "svc".
939 2006-03-13 Bob Wilson <bob.wilson@acm.org>
941 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
942 flag and avoid double underscore prefixes.
944 2006-03-10 Paul Brook <paul@codesourcery.com>
946 * config/tc-arm.c (md_begin): Handle EABIv5.
947 (arm_eabis): Add EF_ARM_EABI_VER5.
948 * doc/c-arm.texi: Document -meabi=5.
950 2006-03-10 Ben Elliston <bje@au.ibm.com>
952 * app.c (do_scrub_chars): Simplify string handling.
954 2006-03-07 Richard Sandiford <richard@codesourcery.com>
955 Daniel Jacobowitz <dan@codesourcery.com>
956 Zack Weinberg <zack@codesourcery.com>
957 Nathan Sidwell <nathan@codesourcery.com>
958 Paul Brook <paul@codesourcery.com>
959 Ricardo Anguiano <anguiano@codesourcery.com>
960 Phil Edwards <phil@codesourcery.com>
962 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
963 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
965 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
966 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
967 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
969 2006-03-06 Bob Wilson <bob.wilson@acm.org>
971 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
972 even when using the text-section-literals option.
974 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
976 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
978 (m68k_ip): <case 'J'> Check we have some control regs.
979 (md_parse_option): Allow raw arch switch.
980 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
981 whether 68881 or cfloat was meant by -mfloat.
982 (md_show_usage): Adjust extension display.
983 (m68k_elf_final_processing): Adjust.
985 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
987 * config/tc-avr.c (avr_mod_hash_value): New function.
988 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
989 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
990 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
991 instead of int avr_ldi_expression: use avr_mod_hash_value instead
993 (tc_gen_reloc): Handle substractions of symbols, if possible do
994 fixups, abort otherwise.
995 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
996 tc_fix_adjustable): Define.
998 2006-03-02 James E Wilson <wilson@specifix.com>
1000 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1001 change the template, then clear md.slot[curr].end_of_insn_group.
1003 2006-02-28 Jan Beulich <jbeulich@novell.com>
1005 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1007 2006-02-28 Jan Beulich <jbeulich@novell.com>
1010 * macro.c (getstring): Don't treat parentheses special anymore.
1011 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1012 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1015 2006-02-28 Mat <mat@csail.mit.edu>
1017 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1019 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1021 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1023 (CFI_signal_frame): Define.
1024 (cfi_pseudo_table): Add .cfi_signal_frame.
1025 (dot_cfi): Handle CFI_signal_frame.
1026 (output_cie): Handle cie->signal_frame.
1027 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1028 different. Copy signal_frame from FDE to newly created CIE.
1029 * doc/as.texinfo: Document .cfi_signal_frame.
1031 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1033 * doc/Makefile.am: Add html target.
1034 * doc/Makefile.in: Regenerate.
1035 * po/Make-in: Add html target.
1037 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1039 * config/tc-i386.c (output_insn): Support Intel Merom New
1042 * config/tc-i386.h (CpuMNI): New.
1043 (CpuUnknownFlags): Add CpuMNI.
1045 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1047 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1048 (hpriv_reg_table): New table for hyperprivileged registers.
1049 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1052 2006-02-24 DJ Delorie <dj@redhat.com>
1054 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1055 (tc_gen_reloc): Don't define.
1056 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1057 (OPTION_LINKRELAX): New.
1058 (md_longopts): Add it.
1060 (md_parse_options): Set it.
1061 (md_assemble): Emit relaxation relocs as needed.
1062 (md_convert_frag): Emit relaxation relocs as needed.
1063 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1064 (m32c_apply_fix): New.
1065 (tc_gen_reloc): New.
1066 (m32c_force_relocation): Force out jump relocs when relaxing.
1067 (m32c_fix_adjustable): Return false if relaxing.
1069 2006-02-24 Paul Brook <paul@codesourcery.com>
1071 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1072 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1073 (struct asm_barrier_opt): Define.
1074 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1075 (parse_psr): Accept V7M psr names.
1076 (parse_barrier): New function.
1077 (enum operand_parse_code): Add OP_oBARRIER.
1078 (parse_operands): Implement OP_oBARRIER.
1079 (do_barrier): New function.
1080 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1081 (do_t_cpsi): Add V7M restrictions.
1082 (do_t_mrs, do_t_msr): Validate V7M variants.
1083 (md_assemble): Check for NULL variants.
1084 (v7m_psrs, barrier_opt_names): New tables.
1085 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1086 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1087 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1088 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1089 (struct cpu_arch_ver_table): Define.
1090 (cpu_arch_ver): New.
1091 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1092 Tag_CPU_arch_profile.
1093 * doc/c-arm.texi: Document new cpu and arch options.
1095 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1097 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1099 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1101 * config/tc-ia64.c: Update copyright years.
1103 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1105 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1108 2005-02-22 Paul Brook <paul@codesourcery.com>
1110 * config/tc-arm.c (do_pld): Remove incorrect write to
1112 (encode_thumb32_addr_mode): Use correct operand.
1114 2006-02-21 Paul Brook <paul@codesourcery.com>
1116 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1118 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1119 Anil Paranjape <anilp1@kpitcummins.com>
1120 Shilin Shakti <shilins@kpitcummins.com>
1122 * Makefile.am: Add xc16x related entry.
1123 * Makefile.in: Regenerate.
1124 * configure.in: Added xc16x related entry.
1125 * configure: Regenerate.
1126 * config/tc-xc16x.h: New file
1127 * config/tc-xc16x.c: New file
1128 * doc/c-xc16x.texi: New file for xc16x
1129 * doc/all.texi: Entry for xc16x
1130 * doc/Makefile.texi: Added c-xc16x.texi
1131 * NEWS: Announce the support for the new target.
1133 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1135 * configure.tgt: set emulation for mips-*-netbsd*
1137 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1139 * config.in: Rebuilt.
1141 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1143 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1144 from 1, not 0, in error messages.
1145 (md_assemble): Simplify special-case check for ENTRY instructions.
1146 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1147 operand in error message.
1149 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1151 * configure.tgt (arm-*-linux-gnueabi*): Change to
1154 2006-02-10 Nick Clifton <nickc@redhat.com>
1156 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1157 32-bit value is propagated into the upper bits of a 64-bit long.
1159 * config/tc-arc.c (init_opcode_tables): Fix cast.
1160 (arc_extoper, md_operand): Likewise.
1162 2006-02-09 David Heine <dlheine@tensilica.com>
1164 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1165 each relaxation step.
1167 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1169 * configure.in (CHECK_DECLS): Add vsnprintf.
1170 * configure: Regenerate.
1171 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1172 include/declare here, but...
1173 * as.h: Move code detecting VARARGS idiom to the top.
1174 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1175 (vsnprintf): Declare if not already declared.
1177 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1179 * as.c (close_output_file): New.
1180 (main): Register close_output_file with xatexit before
1181 dump_statistics. Don't call output_file_close.
1183 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1185 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1186 mcf5329_control_regs): New.
1187 (not_current_architecture, selected_arch, selected_cpu): New.
1188 (m68k_archs, m68k_extensions): New.
1189 (archs): Renamed to ...
1190 (m68k_cpus): ... here. Adjust.
1192 (md_pseudo_table): Add arch and cpu directives.
1193 (find_cf_chip, m68k_ip): Adjust table scanning.
1194 (no_68851, no_68881): Remove.
1195 (md_assemble): Lazily initialize.
1196 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1197 (md_init_after_args): Move functionality to m68k_init_arch.
1198 (mri_chip): Adjust table scanning.
1199 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1200 options with saner parsing.
1201 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1202 m68k_init_arch): New.
1203 (s_m68k_cpu, s_m68k_arch): New.
1204 (md_show_usage): Adjust.
1205 (m68k_elf_final_processing): Set CF EF flags.
1206 * config/tc-m68k.h (m68k_init_after_args): Remove.
1207 (tc_init_after_args): Remove.
1208 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1209 (M68k-Directives): Document .arch and .cpu directives.
1211 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1213 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1214 synonyms for equ and defl.
1215 (z80_cons_fix_new): New function.
1216 (emit_byte): Disallow relative jumps to absolute locations.
1217 (emit_data): Only handle defb, prototype changed, because defb is
1218 now handled as pseudo-op rather than an instruction.
1219 (instab): Entries for defb,defw,db,dw moved from here...
1220 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1221 Add entries for def24,def32,d24,d32.
1222 (md_assemble): Improved error handling.
1223 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1224 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1225 (z80_cons_fix_new): Declare.
1226 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1227 (def24,d24,def32,d32): New pseudo-ops.
1229 2006-02-02 Paul Brook <paul@codesourcery.com>
1231 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1233 2005-02-02 Paul Brook <paul@codesourcery.com>
1235 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1236 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1237 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1238 T2_OPCODE_RSB): Define.
1239 (thumb32_negate_data_op): New function.
1240 (md_apply_fix): Use it.
1242 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1244 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1246 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1247 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1249 (relaxation_requirements): Add pfinish_frag argument and use it to
1250 replace setting tinsn->record_fix fields.
1251 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1252 and vinsn_to_insnbuf. Remove references to record_fix and
1253 slot_sub_symbols fields.
1254 (xtensa_mark_narrow_branches): Delete unused code.
1255 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1257 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1259 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1260 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1261 of the record_fix field. Simplify error messages for unexpected
1263 (set_expr_symbol_offset_diff): Delete.
1265 2006-01-31 Paul Brook <paul@codesourcery.com>
1267 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1269 2006-01-31 Paul Brook <paul@codesourcery.com>
1270 Richard Earnshaw <rearnsha@arm.com>
1272 * config/tc-arm.c: Use arm_feature_set.
1273 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1274 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1275 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1278 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1279 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1280 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1281 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1283 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1284 (arm_opts): Move old cpu/arch options from here...
1285 (arm_legacy_opts): ... to here.
1286 (md_parse_option): Search arm_legacy_opts.
1287 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1288 (arm_float_abis, arm_eabis): Make const.
1290 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1292 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1294 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1296 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1297 in load immediate intruction.
1299 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1301 * config/bfin-parse.y (value_match): Use correct conversion
1302 specifications in template string for __FILE__ and __LINE__.
1306 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1308 Introduce TLS descriptors for i386 and x86_64.
1309 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1310 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1311 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1312 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1313 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1315 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1316 (lex_got): Handle @tlsdesc and @tlscall.
1317 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1319 2006-01-11 Nick Clifton <nickc@redhat.com>
1321 Fixes for building on 64-bit hosts:
1322 * config/tc-avr.c (mod_index): New union to allow conversion
1323 between pointers and integers.
1324 (md_begin, avr_ldi_expression): Use it.
1325 * config/tc-i370.c (md_assemble): Add cast for argument to print
1327 * config/tc-tic54x.c (subsym_substitute): Likewise.
1328 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1329 opindex field of fr_cgen structure into a pointer so that it can
1330 be stored in a frag.
1331 * config/tc-mn10300.c (md_assemble): Likewise.
1332 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1334 * config/tc-v850.c: Replace uses of (int) casts with correct
1337 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1340 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1342 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1345 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1346 a local-label reference.
1348 For older changes see ChangeLog-2005
1354 version-control: never