1 2006-06-09 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (mips_ip): Maintain argument count.
5 2006-06-09 Alan Modra <amodra@bigpond.net.au>
7 * config/tc-iq2000.c: Include sb.h.
9 2006-06-08 Nigel Stephens <nigel@mips.com>
11 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
12 aliases for better compatibility with SGI tools.
14 2006-06-08 Alan Modra <amodra@bigpond.net.au>
16 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
17 * Makefile.am (GASLIBS): Expand @BFDLIB@.
19 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
20 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
21 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
23 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
24 * Makefile.in: Regenerate.
25 * doc/Makefile.in: Regenerate.
26 * configure: Regenerate.
28 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
30 * po/Make-in (pdf, ps): New dummy targets.
32 2006-06-07 Julian Brown <julian@codesourcery.com>
34 * config/tc-arm.c (stdarg.h): include.
35 (arm_it): Add uncond_value field. Add isvec and issingle to operand
37 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
38 REG_TYPE_NSDQ (single, double or quad vector reg).
39 (reg_expected_msgs): Update.
40 (BAD_FPU): Add macro for unsupported FPU instruction error.
41 (parse_neon_type): Support 'd' as an alias for .f64.
42 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
44 (parse_vfp_reg_list): Don't update first arg on error.
45 (parse_neon_mov): Support extra syntax for VFP moves.
46 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
47 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
48 (parse_operands): Support isvec, issingle operands fields, new parse
50 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
52 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
53 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
54 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
55 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
57 (neon_shape): Redefine in terms of above.
58 (neon_shape_class): New enumeration, table of shape classes.
59 (neon_shape_el): New enumeration. One element of a shape.
60 (neon_shape_el_size): Register widths of above, where appropriate.
61 (neon_shape_info): New struct. Info for shape table.
62 (neon_shape_tab): New array.
63 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
64 (neon_check_shape): Rewrite as...
65 (neon_select_shape): New function to classify instruction shapes,
66 driven by new table neon_shape_tab array.
67 (neon_quad): New function. Return 1 if shape should set Q flag in
68 instructions (or equivalent), 0 otherwise.
69 (type_chk_of_el_type): Support F64.
70 (el_type_of_type_chk): Likewise.
71 (neon_check_type): Add support for VFP type checking (VFP data
72 elements fill their containing registers).
73 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
74 in thumb mode for VFP instructions.
75 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
76 and encode the current instruction as if it were that opcode.
77 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
78 arguments, call function in PFN.
79 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
80 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
81 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
82 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
83 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
84 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
85 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
86 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
87 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
88 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
89 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
90 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
91 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
92 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
93 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
95 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
96 between VFP and Neon turns out to belong to Neon. Perform
97 architecture check and fill in condition field if appropriate.
98 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
99 (do_neon_cvt): Add support for VFP variants of instructions.
100 (neon_cvt_flavour): Extend to cover VFP conversions.
101 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
103 (do_neon_ldr_str): Handle single-precision VFP load/store.
104 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
105 NS_NULL not NS_IGNORE.
106 (opcode_tag): Add OT_csuffixF for operands which either take a
107 conditional suffix, or have 0xF in the condition field.
108 (md_assemble): Add support for OT_csuffixF.
109 (NCE): Replace macro with...
110 (NCE_tag, NCE, NCEF): New macros.
111 (nCE): Replace macro with...
112 (nCE_tag, nCE, nCEF): New macros.
113 (insns): Add support for VFP insns or VFP versions of insns msr,
114 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
115 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
116 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
117 VFP/Neon insns together.
119 2006-06-07 Alan Modra <amodra@bigpond.net.au>
120 Ladislav Michl <ladis@linux-mips.org>
122 * app.c: Don't include headers already included by as.h.
124 * atof-generic.c: Likewise.
126 * dwarf2dbg.c: Likewise.
128 * input-file.c: Likewise.
129 * input-scrub.c: Likewise.
131 * output-file.c: Likewise.
134 * config/bfin-lex.l: Likewise.
135 * config/obj-coff.h: Likewise.
136 * config/obj-elf.h: Likewise.
137 * config/obj-som.h: Likewise.
138 * config/tc-arc.c: Likewise.
139 * config/tc-arm.c: Likewise.
140 * config/tc-avr.c: Likewise.
141 * config/tc-bfin.c: Likewise.
142 * config/tc-cris.c: Likewise.
143 * config/tc-d10v.c: Likewise.
144 * config/tc-d30v.c: Likewise.
145 * config/tc-dlx.h: Likewise.
146 * config/tc-fr30.c: Likewise.
147 * config/tc-frv.c: Likewise.
148 * config/tc-h8300.c: Likewise.
149 * config/tc-hppa.c: Likewise.
150 * config/tc-i370.c: Likewise.
151 * config/tc-i860.c: Likewise.
152 * config/tc-i960.c: Likewise.
153 * config/tc-ip2k.c: Likewise.
154 * config/tc-iq2000.c: Likewise.
155 * config/tc-m32c.c: Likewise.
156 * config/tc-m32r.c: Likewise.
157 * config/tc-maxq.c: Likewise.
158 * config/tc-mcore.c: Likewise.
159 * config/tc-mips.c: Likewise.
160 * config/tc-mmix.c: Likewise.
161 * config/tc-mn10200.c: Likewise.
162 * config/tc-mn10300.c: Likewise.
163 * config/tc-msp430.c: Likewise.
164 * config/tc-mt.c: Likewise.
165 * config/tc-ns32k.c: Likewise.
166 * config/tc-openrisc.c: Likewise.
167 * config/tc-ppc.c: Likewise.
168 * config/tc-s390.c: Likewise.
169 * config/tc-sh.c: Likewise.
170 * config/tc-sh64.c: Likewise.
171 * config/tc-sparc.c: Likewise.
172 * config/tc-tic30.c: Likewise.
173 * config/tc-tic4x.c: Likewise.
174 * config/tc-tic54x.c: Likewise.
175 * config/tc-v850.c: Likewise.
176 * config/tc-vax.c: Likewise.
177 * config/tc-xc16x.c: Likewise.
178 * config/tc-xstormy16.c: Likewise.
179 * config/tc-xtensa.c: Likewise.
180 * config/tc-z80.c: Likewise.
181 * config/tc-z8k.c: Likewise.
182 * macro.h: Don't include sb.h or ansidecl.h.
183 * sb.h: Don't include stdio.h or ansidecl.h.
184 * cond.c: Include sb.h.
185 * itbl-lex.l: Include as.h instead of other system headers.
186 * itbl-parse.y: Likewise.
187 * itbl-ops.c: Similarly.
188 * itbl-ops.h: Don't include as.h or ansidecl.h.
189 * config/bfin-defs.h: Don't include bfd.h or as.h.
190 * config/bfin-parse.y: Include as.h instead of other system headers.
192 2006-06-06 Ben Elliston <bje@au.ibm.com>
193 Anton Blanchard <anton@samba.org>
195 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
196 (md_show_usage): Document it.
197 (ppc_setup_opcodes): Test power6 opcode flag bits.
198 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
200 2006-06-06 Thiemo Seufer <ths@mips.com>
201 Chao-ying Fu <fu@mips.com>
203 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
204 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
205 (macro_build): Update comment.
206 (mips_ip): Allow DSP64 instructions for MIPS64R2.
207 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
209 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
210 MIPS_CPU_ASE_MDMX flags for sb1.
212 2006-06-05 Thiemo Seufer <ths@mips.com>
214 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
216 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
217 (mips_ip): Make overflowed/underflowed constant arguments in DSP
218 and MT instructions a fatal error. Use INSERT_OPERAND where
219 appropriate. Improve warnings for break and wait code overflows.
220 Use symbolic constant of OP_MASK_COPZ.
221 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
223 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
225 * po/Make-in (top_builddir): Define.
227 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
229 * doc/Makefile.am (TEXI2DVI): Define.
230 * doc/Makefile.in: Regenerate.
231 * doc/c-arc.texi: Fix typo.
233 2006-06-01 Alan Modra <amodra@bigpond.net.au>
235 * config/obj-ieee.c: Delete.
236 * config/obj-ieee.h: Delete.
237 * Makefile.am (OBJ_FORMATS): Remove ieee.
238 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
239 (obj-ieee.o): Remove rule.
240 * Makefile.in: Regenerate.
241 * configure.in (atof): Remove tahoe.
242 (OBJ_MAYBE_IEEE): Don't define.
243 * configure: Regenerate.
244 * config.in: Regenerate.
245 * doc/Makefile.in: Regenerate.
246 * po/POTFILES.in: Regenerate.
248 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
250 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
251 and LIBINTL_DEP everywhere.
253 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
254 * acinclude.m4: Include new gettext macros.
255 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
256 Remove local code for po/Makefile.
257 * Makefile.in, configure, doc/Makefile.in: Regenerated.
259 2006-05-30 Nick Clifton <nickc@redhat.com>
261 * po/es.po: Updated Spanish translation.
263 2006-05-06 Denis Chertykov <denisc@overta.ru>
265 * doc/c-avr.texi: New file.
266 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
267 * doc/all.texi: Set AVR
268 * doc/as.texinfo: Include c-avr.texi
270 2006-05-28 Jie Zhang <jie.zhang@analog.com>
272 * config/bfin-parse.y (check_macfunc): Loose the condition of
273 calling check_multiply_halfregs ().
275 2006-05-25 Jie Zhang <jie.zhang@analog.com>
277 * config/bfin-parse.y (asm_1): Better check and deal with
278 vector and scalar Multiply 16-Bit Operands instructions.
280 2006-05-24 Nick Clifton <nickc@redhat.com>
282 * config/tc-hppa.c: Convert to ISO C90 format.
283 * config/tc-hppa.h: Likewise.
285 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
286 Randolph Chung <randolph@tausq.org>
288 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
289 is_tls_ieoff, is_tls_leoff): Define.
290 (fix_new_hppa): Handle TLS.
291 (cons_fix_new_hppa): Likewise.
293 (md_apply_fix): Handle TLS relocs.
294 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
296 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
298 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
300 2006-05-23 Thiemo Seufer <ths@mips.com>
301 David Ung <davidu@mips.com>
302 Nigel Stephens <nigel@mips.com>
305 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
306 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
307 ISA_HAS_MXHC1): New macros.
308 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
309 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
310 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
311 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
312 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
313 (mips_after_parse_args): Change default handling of float register
314 size to account for 32bit code with 64bit FP. Better sanity checking
315 of ISA/ASE/ABI option combinations.
316 (s_mipsset): Support switching of GPR and FPR sizes via
317 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
319 (mips_elf_final_processing): We should record the use of 64bit FP
320 registers in 32bit code but we don't, because ELF header flags are
322 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
323 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
324 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
325 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
326 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
327 missing -march options. Document .set arch=CPU. Move .set smartmips
328 to ASE page. Use @code for .set FOO examples.
330 2006-05-23 Jie Zhang <jie.zhang@analog.com>
332 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
335 2006-05-23 Jie Zhang <jie.zhang@analog.com>
337 * config/bfin-defs.h (bfin_equals): Remove declaration.
338 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
339 * config/tc-bfin.c (bfin_name_is_register): Remove.
340 (bfin_equals): Remove.
341 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
342 (bfin_name_is_register): Remove declaration.
344 2006-05-19 Thiemo Seufer <ths@mips.com>
345 Nigel Stephens <nigel@mips.com>
347 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
348 (mips_oddfpreg_ok): New function.
351 2006-05-19 Thiemo Seufer <ths@mips.com>
352 David Ung <davidu@mips.com>
354 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
355 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
356 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
357 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
358 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
359 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
360 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
361 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
362 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
363 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
364 reg_names_o32, reg_names_n32n64): Define register classes.
365 (reg_lookup): New function, use register classes.
366 (md_begin): Reserve register names in the symbol table. Simplify
368 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
370 (mips16_ip): Use reg_lookup.
371 (tc_get_register): Likewise.
372 (tc_mips_regname_to_dw2regnum): New function.
374 2006-05-19 Thiemo Seufer <ths@mips.com>
376 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
377 Un-constify string argument.
378 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
380 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
382 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
384 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
386 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
388 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
391 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
393 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
394 cfloat/m68881 to correct architecture before using it.
396 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
398 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
401 2006-05-15 Paul Brook <paul@codesourcery.com>
403 * config/tc-arm.c (arm_adjust_symtab): Use
404 bfd_is_arm_special_symbol_name.
406 2006-05-15 Bob Wilson <bob.wilson@acm.org>
408 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
409 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
410 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
411 Handle errors from calls to xtensa_opcode_is_* functions.
413 2006-05-14 Thiemo Seufer <ths@mips.com>
415 * config/tc-mips.c (macro_build): Test for currently active
417 (mips16_ip): Reject invalid opcodes.
419 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
421 * doc/as.texinfo: Rename "Index" to "AS Index",
422 and "ABORT" to "ABORT (COFF)".
424 2006-05-11 Paul Brook <paul@codesourcery.com>
426 * config/tc-arm.c (parse_half): New function.
427 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
428 (parse_operands): Ditto.
429 (do_mov16): Reject invalid relocations.
430 (do_t_mov16): Ditto. Use Thumb reloc numbers.
431 (insns): Replace Iffff with HALF.
432 (md_apply_fix): Add MOVW and MOVT relocs.
433 (tc_gen_reloc): Ditto.
434 * doc/c-arm.texi: Document relocation operators
436 2006-05-11 Paul Brook <paul@codesourcery.com>
438 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
440 2006-05-11 Thiemo Seufer <ths@mips.com>
442 * config/tc-mips.c (append_insn): Don't check the range of j or
445 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
447 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
448 relocs against external symbols for WinCE targets.
449 (md_apply_fix): Likewise.
451 2006-05-09 David Ung <davidu@mips.com>
453 * config/tc-mips.c (append_insn): Only warn about an out-of-range
456 2006-05-09 Nick Clifton <nickc@redhat.com>
458 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
459 against symbols which are not going to be placed into the symbol
462 2006-05-09 Ben Elliston <bje@au.ibm.com>
464 * expr.c (operand): Remove `if (0 && ..)' statement and
465 subsequently unused target_op label. Collapse `if (1 || ..)'
467 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
468 separately above the switch.
470 2006-05-08 Nick Clifton <nickc@redhat.com>
473 * config/tc-msp430.c (line_separator_character): Define as |.
475 2006-05-08 Thiemo Seufer <ths@mips.com>
476 Nigel Stephens <nigel@mips.com>
477 David Ung <davidu@mips.com>
479 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
480 (mips_opts): Likewise.
481 (file_ase_smartmips): New variable.
482 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
483 (macro_build): Handle SmartMIPS instructions.
485 (md_longopts): Add argument handling for smartmips.
486 (md_parse_options, mips_after_parse_args): Likewise.
487 (s_mipsset): Add .set smartmips support.
488 (md_show_usage): Document -msmartmips/-mno-smartmips.
489 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
491 * doc/c-mips.texi: Likewise.
493 2006-05-08 Alan Modra <amodra@bigpond.net.au>
495 * write.c (relax_segment): Add pass count arg. Don't error on
496 negative org/space on first two passes.
497 (relax_seg_info): New struct.
498 (relax_seg, write_object_file): Adjust.
499 * write.h (relax_segment): Update prototype.
501 2006-05-05 Julian Brown <julian@codesourcery.com>
503 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
505 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
506 architecture version checks.
507 (insns): Allow overlapping instructions to be used in VFP mode.
509 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
512 * config/obj-elf.c (obj_elf_change_section): Allow user
513 specified SHF_ALPHA_GPREL.
515 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
517 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
518 for PMEM related expressions.
520 2006-05-05 Nick Clifton <nickc@redhat.com>
523 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
524 insertion of a directory separator character into a string at a
525 given offset. Uses heuristics to decide when to use a backslash
526 character rather than a forward-slash character.
527 (dwarf2_directive_loc): Use the macro.
528 (out_debug_info): Likewise.
530 2006-05-05 Thiemo Seufer <ths@mips.com>
531 David Ung <davidu@mips.com>
533 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
535 (macro): Add new case M_CACHE_AB.
537 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
539 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
540 (opcode_lookup): Issue a warning for opcode with
541 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
542 identical to OT_cinfix3.
543 (TxC3w, TC3w, tC3w): New.
544 (insns): Use tC3w and TC3w for comparison instructions with
547 2006-05-04 Alan Modra <amodra@bigpond.net.au>
549 * subsegs.h (struct frchain): Delete frch_seg.
550 (frchain_root): Delete.
551 (seg_info): Define as macro.
552 * subsegs.c (frchain_root): Delete.
553 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
554 (subsegs_begin, subseg_change): Adjust for above.
555 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
556 rather than to one big list.
557 (subseg_get): Don't special case abs, und sections.
558 (subseg_new, subseg_force_new): Don't set frchainP here.
560 (subsegs_print_statistics): Adjust frag chain control list traversal.
561 * debug.c (dmp_frags): Likewise.
562 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
563 at frchain_root. Make use of known frchain ordering.
564 (last_frag_for_seg): Likewise.
565 (get_frag_fix): Likewise. Add seg param.
566 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
567 * write.c (chain_frchains_together_1): Adjust for struct frchain.
568 (SUB_SEGMENT_ALIGN): Likewise.
569 (subsegs_finish): Adjust frchain list traversal.
570 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
571 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
572 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
573 (xtensa_fix_b_j_loop_end_frags): Likewise.
574 (xtensa_fix_close_loop_end_frags): Likewise.
575 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
576 (retrieve_segment_info): Delete frch_seg initialisation.
578 2006-05-03 Alan Modra <amodra@bigpond.net.au>
580 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
581 * config/obj-elf.h (obj_sec_set_private_data): Delete.
582 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
583 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
585 2006-05-02 Joseph Myers <joseph@codesourcery.com>
587 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
589 (md_apply_fix3): Multiply offset by 4 here for
590 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
592 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
593 Jan Beulich <jbeulich@novell.com>
595 * config/tc-i386.c (output_invalid_buf): Change size for
597 * config/tc-tic30.c (output_invalid_buf): Likewise.
599 * config/tc-i386.c (output_invalid): Cast none-ascii char to
601 * config/tc-tic30.c (output_invalid): Likewise.
603 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
605 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
606 (TEXI2POD): Use AM_MAKEINFOFLAGS.
607 (asconfig.texi): Don't set top_srcdir.
608 * doc/as.texinfo: Don't use top_srcdir.
609 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
611 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
613 * config/tc-i386.c (output_invalid_buf): Change size to 16.
614 * config/tc-tic30.c (output_invalid_buf): Likewise.
616 * config/tc-i386.c (output_invalid): Use snprintf instead of
618 * config/tc-ia64.c (declare_register_set): Likewise.
619 (emit_one_bundle): Likewise.
620 (check_dependencies): Likewise.
621 * config/tc-tic30.c (output_invalid): Likewise.
623 2006-05-02 Paul Brook <paul@codesourcery.com>
625 * config/tc-arm.c (arm_optimize_expr): New function.
626 * config/tc-arm.h (md_optimize_expr): Define
627 (arm_optimize_expr): Add prototype.
628 (TC_FORCE_RELOCATION_SUB_SAME): Define.
630 2006-05-02 Ben Elliston <bje@au.ibm.com>
632 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
635 * sb.h (sb_list_vector): Move to sb.c.
636 * sb.c (free_list): Use type of sb_list_vector directly.
637 (sb_build): Fix off-by-one error in assertion about `size'.
639 2006-05-01 Ben Elliston <bje@au.ibm.com>
641 * listing.c (listing_listing): Remove useless loop.
642 * macro.c (macro_expand): Remove is_positional local variable.
643 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
644 and simplify surrounding expressions, where possible.
645 (assign_symbol): Likewise.
646 (s_weakref): Likewise.
647 * symbols.c (colon): Likewise.
649 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
651 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
653 2006-04-30 Thiemo Seufer <ths@mips.com>
654 David Ung <davidu@mips.com>
656 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
657 (mips_immed): New table that records various handling of udi
658 instruction patterns.
659 (mips_ip): Adds udi handling.
661 2006-04-28 Alan Modra <amodra@bigpond.net.au>
663 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
664 of list rather than beginning.
666 2006-04-26 Julian Brown <julian@codesourcery.com>
668 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
669 (is_quarter_float): Rename from above. Simplify slightly.
670 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
672 (parse_neon_mov): Parse floating-point constants.
673 (neon_qfloat_bits): Fix encoding.
674 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
675 preference to integer encoding when using the F32 type.
677 2006-04-26 Julian Brown <julian@codesourcery.com>
679 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
680 zero-initialising structures containing it will lead to invalid types).
681 (arm_it): Add vectype to each operand.
682 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
684 (neon_typed_alias): New structure. Extra information for typed
686 (reg_entry): Add neon type info field.
687 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
688 Break out alternative syntax for coprocessor registers, etc. into...
689 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
690 out from arm_reg_parse.
691 (parse_neon_type): Move. Return SUCCESS/FAIL.
692 (first_error): New function. Call to ensure first error which occurs is
694 (parse_neon_operand_type): Parse exactly one type.
695 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
696 (parse_typed_reg_or_scalar): New function. Handle core of both
697 arm_typed_reg_parse and parse_scalar.
698 (arm_typed_reg_parse): Parse a register with an optional type.
699 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
701 (parse_scalar): Parse a Neon scalar with optional type.
702 (parse_reg_list): Use first_error.
703 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
704 (neon_alias_types_same): New function. Return true if two (alias) types
706 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
708 (insert_reg_alias): Return new reg_entry not void.
709 (insert_neon_reg_alias): New function. Insert type/index information as
710 well as register for alias.
711 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
712 make typed register aliases accordingly.
713 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
715 (s_unreq): Delete type information if present.
716 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
717 (s_arm_unwind_save_mmxwcg): Likewise.
718 (s_arm_unwind_movsp): Likewise.
719 (s_arm_unwind_setfp): Likewise.
720 (parse_shift): Likewise.
721 (parse_shifter_operand): Likewise.
722 (parse_address): Likewise.
723 (parse_tb): Likewise.
724 (tc_arm_regname_to_dw2regnum): Likewise.
725 (md_pseudo_table): Add dn, qn.
726 (parse_neon_mov): Handle typed operands.
727 (parse_operands): Likewise.
728 (neon_type_mask): Add N_SIZ.
729 (N_ALLMODS): New macro.
730 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
731 (el_type_of_type_chk): Add some safeguards.
732 (modify_types_allowed): Fix logic bug.
733 (neon_check_type): Handle operands with types.
734 (neon_three_same): Remove redundant optional arg handling.
735 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
736 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
737 (do_neon_step): Adjust accordingly.
738 (neon_cmode_for_logic_imm): Use first_error.
739 (do_neon_bitfield): Call neon_check_type.
740 (neon_dyadic): Rename to...
741 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
742 to allow modification of type of the destination.
743 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
744 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
745 (do_neon_compare): Make destination be an untyped bitfield.
746 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
747 (neon_mul_mac): Return early in case of errors.
748 (neon_move_immediate): Use first_error.
749 (neon_mac_reg_scalar_long): Fix type to include scalar.
750 (do_neon_dup): Likewise.
751 (do_neon_mov): Likewise (in several places).
752 (do_neon_tbl_tbx): Fix type.
753 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
754 (do_neon_ld_dup): Exit early in case of errors and/or use
756 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
757 Handle .dn/.qn directives.
758 (REGDEF): Add zero for reg_entry neon field.
760 2006-04-26 Julian Brown <julian@codesourcery.com>
762 * config/tc-arm.c (limits.h): Include.
763 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
764 (fpu_vfp_v3_or_neon_ext): Declare constants.
765 (neon_el_type): New enumeration of types for Neon vector elements.
766 (neon_type_el): New struct. Define type and size of a vector element.
767 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
769 (neon_type): Define struct. The type of an instruction.
770 (arm_it): Add 'vectype' for the current instruction.
771 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
772 (vfp_sp_reg_pos): Rename to...
773 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
775 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
776 (Neon D or Q register).
777 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
779 (GE_OPT_PREFIX_BIG): Define constant, for use in...
780 (my_get_expression): Allow above constant as argument to accept
781 64-bit constants with optional prefix.
782 (arm_reg_parse): Add extra argument to return the specific type of
783 register in when either a D or Q register (REG_TYPE_NDQ) is
784 requested. Can be NULL.
785 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
786 (parse_reg_list): Update for new arm_reg_parse args.
787 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
788 (parse_neon_el_struct_list): New function. Parse element/structure
789 register lists for VLD<n>/VST<n> instructions.
790 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
791 (s_arm_unwind_save_mmxwr): Likewise.
792 (s_arm_unwind_save_mmxwcg): Likewise.
793 (s_arm_unwind_movsp): Likewise.
794 (s_arm_unwind_setfp): Likewise.
795 (parse_big_immediate): New function. Parse an immediate, which may be
796 64 bits wide. Put results in inst.operands[i].
797 (parse_shift): Update for new arm_reg_parse args.
798 (parse_address): Likewise. Add parsing of alignment specifiers.
799 (parse_neon_mov): Parse the operands of a VMOV instruction.
800 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
801 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
802 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
803 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
804 (parse_operands): Handle new codes above.
805 (encode_arm_vfp_sp_reg): Rename to...
806 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
807 selected VFP version only supports D0-D15.
808 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
809 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
810 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
811 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
812 encode_arm_vfp_reg name, and allow 32 D regs.
813 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
814 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
816 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
817 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
818 constant-load and conversion insns introduced with VFPv3.
819 (neon_tab_entry): New struct.
820 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
821 those which are the targets of pseudo-instructions.
822 (neon_opc): Enumerate opcodes, use as indices into...
823 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
824 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
825 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
826 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
828 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
830 (neon_type_mask): New. Compact type representation for type checking.
831 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
832 permitted type combinations.
833 (N_IGNORE_TYPE): New macro.
834 (neon_check_shape): New function. Check an instruction shape for
835 multiple alternatives. Return the specific shape for the current
837 (neon_modify_type_size): New function. Modify a vector type and size,
838 depending on the bit mask in argument 1.
839 (neon_type_promote): New function. Convert a given "key" type (of an
840 operand) into the correct type for a different operand, based on a bit
842 (type_chk_of_el_type): New function. Convert a type and size into the
843 compact representation used for type checking.
844 (el_type_of_type_ckh): New function. Reverse of above (only when a
845 single bit is set in the bit mask).
846 (modify_types_allowed): New function. Alter a mask of allowed types
847 based on a bit mask of modifications.
848 (neon_check_type): New function. Check the type of the current
849 instruction against the variable argument list. The "key" type of the
850 instruction is returned.
851 (neon_dp_fixup): New function. Fill in and modify instruction bits for
852 a Neon data-processing instruction depending on whether we're in ARM
853 mode or Thumb-2 mode.
854 (neon_logbits): New function.
855 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
856 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
857 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
858 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
859 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
860 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
861 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
862 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
863 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
864 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
865 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
866 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
867 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
868 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
869 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
870 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
871 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
872 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
873 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
874 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
875 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
876 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
877 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
878 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
879 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
881 (parse_neon_type): New function. Parse Neon type specifier.
882 (opcode_lookup): Allow parsing of Neon type specifiers.
883 (REGNUM2, REGSETH, REGSET2): New macros.
884 (reg_names): Add new VFPv3 and Neon registers.
885 (NUF, nUF, NCE, nCE): New macros for opcode table.
886 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
887 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
888 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
889 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
890 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
891 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
892 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
893 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
894 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
895 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
896 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
897 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
898 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
899 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
901 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
902 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
903 (arm_option_cpu_value): Add vfp3 and neon.
904 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
907 2006-04-25 Bob Wilson <bob.wilson@acm.org>
909 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
910 syntax instead of hardcoded opcodes with ".w18" suffixes.
911 (wide_branch_opcode): New.
912 (build_transition): Use it to check for wide branch opcodes with
913 either ".w18" or ".w15" suffixes.
915 2006-04-25 Bob Wilson <bob.wilson@acm.org>
917 * config/tc-xtensa.c (xtensa_create_literal_symbol,
918 xg_assemble_literal, xg_assemble_literal_space): Do not set the
919 frag's is_literal flag.
921 2006-04-25 Bob Wilson <bob.wilson@acm.org>
923 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
925 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
927 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
928 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
929 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
930 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
931 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
933 2005-04-20 Paul Brook <paul@codesourcery.com>
935 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
937 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
939 2006-04-19 Alan Modra <amodra@bigpond.net.au>
941 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
942 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
943 Make some cpus unsupported on ELF. Run "make dep-am".
944 * Makefile.in: Regenerate.
946 2006-04-19 Alan Modra <amodra@bigpond.net.au>
948 * configure.in (--enable-targets): Indent help message.
949 * configure: Regenerate.
951 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
954 * config/tc-i386.c (i386_immediate): Check illegal immediate
957 2006-04-18 Alan Modra <amodra@bigpond.net.au>
959 * config/tc-i386.c: Formatting.
960 (output_disp, output_imm): ISO C90 params.
962 * frags.c (frag_offset_fixed_p): Constify args.
963 * frags.h (frag_offset_fixed_p): Ditto.
965 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
966 (COFF_MAGIC): Delete.
968 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
970 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
972 * po/POTFILES.in: Regenerated.
974 2006-04-16 Mark Mitchell <mark@codesourcery.com>
976 * doc/as.texinfo: Mention that some .type syntaxes are not
977 supported on all architectures.
979 2006-04-14 Sterling Augustine <sterling@tensilica.com>
981 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
982 instructions when such transformations have been disabled.
984 2006-04-10 Sterling Augustine <sterling@tensilica.com>
986 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
987 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
988 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
989 decoding the loop instructions. Remove current_offset variable.
990 (xtensa_fix_short_loop_frags): Likewise.
991 (min_bytes_to_other_loop_end): Remove current_offset argument.
993 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
995 * config/tc-z80.c (z80_optimize_expr): Removed.
996 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
998 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1000 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1001 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1002 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1003 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1004 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1005 at90can64, at90usb646, at90usb647, at90usb1286 and
1007 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1009 2006-04-07 Paul Brook <paul@codesourcery.com>
1011 * config/tc-arm.c (parse_operands): Set default error message.
1013 2006-04-07 Paul Brook <paul@codesourcery.com>
1015 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1017 2006-04-07 Paul Brook <paul@codesourcery.com>
1019 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1021 2006-04-07 Paul Brook <paul@codesourcery.com>
1023 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1024 (move_or_literal_pool): Handle Thumb-2 instructions.
1025 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1027 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1030 * config/tc-i386.c (match_template): Move 64-bit operand tests
1033 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1035 * po/Make-in: Add install-html target.
1036 * Makefile.am: Add install-html and install-html-recursive targets.
1037 * Makefile.in: Regenerate.
1038 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1039 * configure: Regenerate.
1040 * doc/Makefile.am: Add install-html and install-html-am targets.
1041 * doc/Makefile.in: Regenerate.
1043 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1045 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1048 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1049 Daniel Jacobowitz <dan@codesourcery.com>
1051 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1052 (GOTT_BASE, GOTT_INDEX): New.
1053 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1054 GOTT_INDEX when generating VxWorks PIC.
1055 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1056 use the generic *-*-vxworks* stanza instead.
1058 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1061 * frags.c (frag_offset_fixed_p): New function.
1062 * frags.h (frag_offset_fixed_p): Declare.
1063 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1064 (resolve_expression): Likewise.
1066 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1068 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1069 of the same length but different numbers of slots.
1071 2006-03-30 Andreas Schwab <schwab@suse.de>
1073 * configure.in: Fix help string for --enable-targets option.
1074 * configure: Regenerate.
1076 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1078 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1079 (m68k_ip): ... here. Use for all chips. Protect against buffer
1080 overrun and avoid excessive copying.
1082 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1083 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1084 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1085 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1086 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1087 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1088 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1089 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1090 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1091 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1092 (struct m68k_cpu): Change chip field to control_regs.
1093 (current_chip): Remove.
1094 (control_regs): New.
1095 (m68k_archs, m68k_extensions): Adjust.
1096 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1097 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1098 (find_cf_chip): Reimplement for new organization of cpu table.
1099 (select_control_regs): Remove.
1101 (struct save_opts): Save control regs, not chip.
1102 (s_save, s_restore): Adjust.
1103 (m68k_lookup_cpu): Give deprecated warning when necessary.
1104 (m68k_init_arch): Adjust.
1105 (md_show_usage): Adjust for new cpu table organization.
1107 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1109 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1110 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1111 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1113 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1114 (any_gotrel): New rule.
1115 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1116 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1118 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1119 (bfin_pic_ptr): New function.
1120 (md_pseudo_table): Add it for ".picptr".
1121 (OPTION_FDPIC): New macro.
1122 (md_longopts): Add -mfdpic.
1123 (md_parse_option): Handle it.
1124 (md_begin): Set BFD flags.
1125 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1126 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1128 * Makefile.am (bfin-parse.o): Update dependencies.
1129 (DEPTC_bfin_elf): Likewise.
1130 * Makefile.in: Regenerate.
1132 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1134 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1135 mcfemac instead of mcfmac.
1137 2006-03-23 Michael Matz <matz@suse.de>
1139 * config/tc-i386.c (type_names): Correct placement of 'static'.
1140 (reloc): Map some more relocs to their 64 bit counterpart when
1142 (output_insn): Work around breakage if DEBUG386 is defined.
1143 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1144 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1145 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1146 different from i386.
1147 (output_imm): Ditto.
1148 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1150 (md_convert_frag): Jumps can now be larger than 2GB away, error
1152 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1153 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1155 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1156 Daniel Jacobowitz <dan@codesourcery.com>
1157 Phil Edwards <phil@codesourcery.com>
1158 Zack Weinberg <zack@codesourcery.com>
1159 Mark Mitchell <mark@codesourcery.com>
1160 Nathan Sidwell <nathan@codesourcery.com>
1162 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1163 (md_begin): Complain about -G being used for PIC. Don't change
1164 the text, data and bss alignments on VxWorks.
1165 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1166 generating VxWorks PIC.
1167 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1168 (macro): Likewise, but do not treat la $25 specially for
1169 VxWorks PIC, and do not handle jal.
1170 (OPTION_MVXWORKS_PIC): New macro.
1171 (md_longopts): Add -mvxworks-pic.
1172 (md_parse_option): Don't complain about using PIC and -G together here.
1173 Handle OPTION_MVXWORKS_PIC.
1174 (md_estimate_size_before_relax): Always use the first relaxation
1175 sequence on VxWorks.
1176 * config/tc-mips.h (VXWORKS_PIC): New.
1178 2006-03-21 Paul Brook <paul@codesourcery.com>
1180 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1182 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1184 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1185 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1186 (get_loop_align_size): New.
1187 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1188 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1189 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1190 (get_noop_aligned_address): Use get_loop_align_size.
1191 (get_aligned_diff): Likewise.
1193 2006-03-21 Paul Brook <paul@codesourcery.com>
1195 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1197 2006-03-20 Paul Brook <paul@codesourcery.com>
1199 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1200 (do_t_branch): Encode branches inside IT blocks as unconditional.
1201 (do_t_cps): New function.
1202 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1203 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1204 (opcode_lookup): Allow conditional suffixes on all instructions in
1206 (md_assemble): Advance condexec state before checking for errors.
1207 (insns): Use do_t_cps.
1209 2006-03-20 Paul Brook <paul@codesourcery.com>
1211 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1212 outputting the insn.
1214 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1216 * config/tc-vax.c: Update copyright year.
1217 * config/tc-vax.h: Likewise.
1219 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1221 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1223 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1225 2006-03-17 Paul Brook <paul@codesourcery.com>
1227 * config/tc-arm.c (insns): Add ldm and stm.
1229 2006-03-17 Ben Elliston <bje@au.ibm.com>
1232 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1234 2006-03-16 Paul Brook <paul@codesourcery.com>
1236 * config/tc-arm.c (insns): Add "svc".
1238 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1240 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1241 flag and avoid double underscore prefixes.
1243 2006-03-10 Paul Brook <paul@codesourcery.com>
1245 * config/tc-arm.c (md_begin): Handle EABIv5.
1246 (arm_eabis): Add EF_ARM_EABI_VER5.
1247 * doc/c-arm.texi: Document -meabi=5.
1249 2006-03-10 Ben Elliston <bje@au.ibm.com>
1251 * app.c (do_scrub_chars): Simplify string handling.
1253 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1254 Daniel Jacobowitz <dan@codesourcery.com>
1255 Zack Weinberg <zack@codesourcery.com>
1256 Nathan Sidwell <nathan@codesourcery.com>
1257 Paul Brook <paul@codesourcery.com>
1258 Ricardo Anguiano <anguiano@codesourcery.com>
1259 Phil Edwards <phil@codesourcery.com>
1261 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1262 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1264 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1265 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1266 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1268 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1270 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1271 even when using the text-section-literals option.
1273 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1275 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1277 (m68k_ip): <case 'J'> Check we have some control regs.
1278 (md_parse_option): Allow raw arch switch.
1279 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1280 whether 68881 or cfloat was meant by -mfloat.
1281 (md_show_usage): Adjust extension display.
1282 (m68k_elf_final_processing): Adjust.
1284 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1286 * config/tc-avr.c (avr_mod_hash_value): New function.
1287 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1288 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1289 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1290 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1292 (tc_gen_reloc): Handle substractions of symbols, if possible do
1293 fixups, abort otherwise.
1294 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1295 tc_fix_adjustable): Define.
1297 2006-03-02 James E Wilson <wilson@specifix.com>
1299 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1300 change the template, then clear md.slot[curr].end_of_insn_group.
1302 2006-02-28 Jan Beulich <jbeulich@novell.com>
1304 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1306 2006-02-28 Jan Beulich <jbeulich@novell.com>
1309 * macro.c (getstring): Don't treat parentheses special anymore.
1310 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1311 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1314 2006-02-28 Mat <mat@csail.mit.edu>
1316 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1318 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1320 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1322 (CFI_signal_frame): Define.
1323 (cfi_pseudo_table): Add .cfi_signal_frame.
1324 (dot_cfi): Handle CFI_signal_frame.
1325 (output_cie): Handle cie->signal_frame.
1326 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1327 different. Copy signal_frame from FDE to newly created CIE.
1328 * doc/as.texinfo: Document .cfi_signal_frame.
1330 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1332 * doc/Makefile.am: Add html target.
1333 * doc/Makefile.in: Regenerate.
1334 * po/Make-in: Add html target.
1336 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1338 * config/tc-i386.c (output_insn): Support Intel Merom New
1341 * config/tc-i386.h (CpuMNI): New.
1342 (CpuUnknownFlags): Add CpuMNI.
1344 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1346 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1347 (hpriv_reg_table): New table for hyperprivileged registers.
1348 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1351 2006-02-24 DJ Delorie <dj@redhat.com>
1353 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1354 (tc_gen_reloc): Don't define.
1355 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1356 (OPTION_LINKRELAX): New.
1357 (md_longopts): Add it.
1359 (md_parse_options): Set it.
1360 (md_assemble): Emit relaxation relocs as needed.
1361 (md_convert_frag): Emit relaxation relocs as needed.
1362 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1363 (m32c_apply_fix): New.
1364 (tc_gen_reloc): New.
1365 (m32c_force_relocation): Force out jump relocs when relaxing.
1366 (m32c_fix_adjustable): Return false if relaxing.
1368 2006-02-24 Paul Brook <paul@codesourcery.com>
1370 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1371 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1372 (struct asm_barrier_opt): Define.
1373 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1374 (parse_psr): Accept V7M psr names.
1375 (parse_barrier): New function.
1376 (enum operand_parse_code): Add OP_oBARRIER.
1377 (parse_operands): Implement OP_oBARRIER.
1378 (do_barrier): New function.
1379 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1380 (do_t_cpsi): Add V7M restrictions.
1381 (do_t_mrs, do_t_msr): Validate V7M variants.
1382 (md_assemble): Check for NULL variants.
1383 (v7m_psrs, barrier_opt_names): New tables.
1384 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1385 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1386 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1387 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1388 (struct cpu_arch_ver_table): Define.
1389 (cpu_arch_ver): New.
1390 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1391 Tag_CPU_arch_profile.
1392 * doc/c-arm.texi: Document new cpu and arch options.
1394 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1396 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1398 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1400 * config/tc-ia64.c: Update copyright years.
1402 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1404 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1407 2005-02-22 Paul Brook <paul@codesourcery.com>
1409 * config/tc-arm.c (do_pld): Remove incorrect write to
1411 (encode_thumb32_addr_mode): Use correct operand.
1413 2006-02-21 Paul Brook <paul@codesourcery.com>
1415 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1417 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1418 Anil Paranjape <anilp1@kpitcummins.com>
1419 Shilin Shakti <shilins@kpitcummins.com>
1421 * Makefile.am: Add xc16x related entry.
1422 * Makefile.in: Regenerate.
1423 * configure.in: Added xc16x related entry.
1424 * configure: Regenerate.
1425 * config/tc-xc16x.h: New file
1426 * config/tc-xc16x.c: New file
1427 * doc/c-xc16x.texi: New file for xc16x
1428 * doc/all.texi: Entry for xc16x
1429 * doc/Makefile.texi: Added c-xc16x.texi
1430 * NEWS: Announce the support for the new target.
1432 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1434 * configure.tgt: set emulation for mips-*-netbsd*
1436 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1438 * config.in: Rebuilt.
1440 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1442 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1443 from 1, not 0, in error messages.
1444 (md_assemble): Simplify special-case check for ENTRY instructions.
1445 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1446 operand in error message.
1448 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1450 * configure.tgt (arm-*-linux-gnueabi*): Change to
1453 2006-02-10 Nick Clifton <nickc@redhat.com>
1455 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1456 32-bit value is propagated into the upper bits of a 64-bit long.
1458 * config/tc-arc.c (init_opcode_tables): Fix cast.
1459 (arc_extoper, md_operand): Likewise.
1461 2006-02-09 David Heine <dlheine@tensilica.com>
1463 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1464 each relaxation step.
1466 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1468 * configure.in (CHECK_DECLS): Add vsnprintf.
1469 * configure: Regenerate.
1470 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1471 include/declare here, but...
1472 * as.h: Move code detecting VARARGS idiom to the top.
1473 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1474 (vsnprintf): Declare if not already declared.
1476 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1478 * as.c (close_output_file): New.
1479 (main): Register close_output_file with xatexit before
1480 dump_statistics. Don't call output_file_close.
1482 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1484 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1485 mcf5329_control_regs): New.
1486 (not_current_architecture, selected_arch, selected_cpu): New.
1487 (m68k_archs, m68k_extensions): New.
1488 (archs): Renamed to ...
1489 (m68k_cpus): ... here. Adjust.
1491 (md_pseudo_table): Add arch and cpu directives.
1492 (find_cf_chip, m68k_ip): Adjust table scanning.
1493 (no_68851, no_68881): Remove.
1494 (md_assemble): Lazily initialize.
1495 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1496 (md_init_after_args): Move functionality to m68k_init_arch.
1497 (mri_chip): Adjust table scanning.
1498 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1499 options with saner parsing.
1500 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1501 m68k_init_arch): New.
1502 (s_m68k_cpu, s_m68k_arch): New.
1503 (md_show_usage): Adjust.
1504 (m68k_elf_final_processing): Set CF EF flags.
1505 * config/tc-m68k.h (m68k_init_after_args): Remove.
1506 (tc_init_after_args): Remove.
1507 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1508 (M68k-Directives): Document .arch and .cpu directives.
1510 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1512 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1513 synonyms for equ and defl.
1514 (z80_cons_fix_new): New function.
1515 (emit_byte): Disallow relative jumps to absolute locations.
1516 (emit_data): Only handle defb, prototype changed, because defb is
1517 now handled as pseudo-op rather than an instruction.
1518 (instab): Entries for defb,defw,db,dw moved from here...
1519 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1520 Add entries for def24,def32,d24,d32.
1521 (md_assemble): Improved error handling.
1522 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1523 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1524 (z80_cons_fix_new): Declare.
1525 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1526 (def24,d24,def32,d32): New pseudo-ops.
1528 2006-02-02 Paul Brook <paul@codesourcery.com>
1530 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1532 2005-02-02 Paul Brook <paul@codesourcery.com>
1534 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1535 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1536 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1537 T2_OPCODE_RSB): Define.
1538 (thumb32_negate_data_op): New function.
1539 (md_apply_fix): Use it.
1541 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1543 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1545 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1546 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1548 (relaxation_requirements): Add pfinish_frag argument and use it to
1549 replace setting tinsn->record_fix fields.
1550 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1551 and vinsn_to_insnbuf. Remove references to record_fix and
1552 slot_sub_symbols fields.
1553 (xtensa_mark_narrow_branches): Delete unused code.
1554 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1556 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1558 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1559 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1560 of the record_fix field. Simplify error messages for unexpected
1562 (set_expr_symbol_offset_diff): Delete.
1564 2006-01-31 Paul Brook <paul@codesourcery.com>
1566 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1568 2006-01-31 Paul Brook <paul@codesourcery.com>
1569 Richard Earnshaw <rearnsha@arm.com>
1571 * config/tc-arm.c: Use arm_feature_set.
1572 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1573 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1574 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1577 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1578 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1579 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1580 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1582 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1583 (arm_opts): Move old cpu/arch options from here...
1584 (arm_legacy_opts): ... to here.
1585 (md_parse_option): Search arm_legacy_opts.
1586 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1587 (arm_float_abis, arm_eabis): Make const.
1589 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1591 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1593 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1595 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1596 in load immediate intruction.
1598 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1600 * config/bfin-parse.y (value_match): Use correct conversion
1601 specifications in template string for __FILE__ and __LINE__.
1605 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1607 Introduce TLS descriptors for i386 and x86_64.
1608 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1609 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1610 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1611 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1612 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1614 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1615 (lex_got): Handle @tlsdesc and @tlscall.
1616 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1618 2006-01-11 Nick Clifton <nickc@redhat.com>
1620 Fixes for building on 64-bit hosts:
1621 * config/tc-avr.c (mod_index): New union to allow conversion
1622 between pointers and integers.
1623 (md_begin, avr_ldi_expression): Use it.
1624 * config/tc-i370.c (md_assemble): Add cast for argument to print
1626 * config/tc-tic54x.c (subsym_substitute): Likewise.
1627 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1628 opindex field of fr_cgen structure into a pointer so that it can
1629 be stored in a frag.
1630 * config/tc-mn10300.c (md_assemble): Likewise.
1631 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1633 * config/tc-v850.c: Replace uses of (int) casts with correct
1636 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1639 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1641 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1644 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1645 a local-label reference.
1647 For older changes see ChangeLog-2005
1653 version-control: never