2 * Copyright (C) 2014 The Android Open Source Project
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
17 #include "disassembler_arm64.h"
23 #include "base/logging.h"
24 #include "base/stringprintf.h"
30 // This enumeration should mirror the declarations in
31 // runtime/arch/arm64/registers_arm64.h. We do not include that file to
32 // avoid a dependency on libart.
41 void CustomDisassembler::AppendRegisterNameToOutput(
42 const vixl::Instruction* instr,
43 const vixl::CPURegister& reg) {
45 if (reg.IsRegister() && reg.Is64Bits()) {
46 if (reg.code() == TR) {
49 } else if (reg.code() == LR) {
55 // Print other register names as usual.
56 Disassembler::AppendRegisterNameToOutput(instr, reg);
59 void CustomDisassembler::VisitLoadLiteral(const vixl::Instruction* instr) {
60 Disassembler::VisitLoadLiteral(instr);
62 if (!read_literals_) {
66 void* data_address = instr->LiteralAddress<void*>();
67 vixl::Instr op = instr->Mask(vixl::LoadLiteralMask);
72 case vixl::LDRSW_x_lit: {
73 int64_t data = op == vixl::LDR_x_lit ? *reinterpret_cast<int64_t*>(data_address)
74 : *reinterpret_cast<int32_t*>(data_address);
75 AppendToOutput(" (0x%" PRIx64 " / %" PRId64 ")", data, data);
79 case vixl::LDR_d_lit: {
80 double data = (op == vixl::LDR_s_lit) ? *reinterpret_cast<float*>(data_address)
81 : *reinterpret_cast<double*>(data_address);
82 AppendToOutput(" (%g)", data);
90 void CustomDisassembler::VisitLoadStoreUnsignedOffset(const vixl::Instruction* instr) {
91 Disassembler::VisitLoadStoreUnsignedOffset(instr);
93 if (instr->Rn() == TR) {
94 int64_t offset = instr->ImmLSUnsigned() << instr->SizeLS();
95 std::ostringstream tmp_stream;
96 Thread::DumpThreadOffset<8>(tmp_stream, static_cast<uint32_t>(offset));
97 AppendToOutput(" ; %s", tmp_stream.str().c_str());
101 size_t DisassemblerArm64::Dump(std::ostream& os, const uint8_t* begin) {
102 const vixl::Instruction* instr = reinterpret_cast<const vixl::Instruction*>(begin);
103 decoder.Decode(instr);
104 os << FormatInstructionPointer(begin)
105 << StringPrintf(": %08x\t%s\n", instr->InstructionBits(), disasm.GetOutput());
106 return vixl::kInstructionSize;
109 void DisassemblerArm64::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
110 for (const uint8_t* cur = begin; cur < end; cur += vixl::kInstructionSize) {