From e69fe346b9d354511360f4031aef61f1bf06afba Mon Sep 17 00:00:00 2001 From: uros Date: Tue, 4 Sep 2007 09:02:56 +0000 Subject: [PATCH] * gcc.target/i386/sse4a-check.h: New file. * gcc.target/i386/sse4a-extract.c: Include sse4a-check.h. Remove main. * gcc.target/i386/sse4a-insert.c: Ditto. * gcc.target/i386/sse4a-montsd.c: Ditto. * gcc.target/i386/sse4a-montss.c: Ditto. * gcc.target/i386/mmx-check.h: New file. * gcc.target/i386/mmx-4.c: Include mmx-check.h. Remove main. * gcc.target/i386/builtin-apply-mmx.c: Ditto. * gcc.target/i386/sse-check.h: New file. * gcc.target/i386/pr13685: Include sse-check.h. Remove main. * gcc.target/i386/sse-3.c: Ditto. * gcc.target/i386/sse-7.c: Ditto. * gcc.target/i386/sse-9.c: Ditto. * gcc.target/i386/ssefn-3.c: Ditto. * gcc.target/i386/sse-recip.c: Ditto. * gcc.target/i386/sse-recip-vec.c: Ditto. * gcc.target/i386/20020523.c: Ditto. Rename from 20020523-2.c. * gcc.target/i386/20020523-1.c: Remove. * gcc.target/i386/sse2-lrint-vec.c: Include sse2-check.h. Remove main. * gcc.target/i386/sse2-lrintf-vec.c: Ditto. * gcc.target/i386/ssefn-4.c: Ditto. * gcc.target/i386/sse-6.c: Ditto. * gcc.target/i386/sse-10.c: Ditto. * gcc.target/i386/sse-11.c: Ditto. * gcc.target/i386/sse-18.c: Ditto. * gcc.target/i386/fpprec-1.c: Ditto. * g++.dg/other/i386-1.C: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@128069 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/testsuite/ChangeLog | 30 ++++++++++ gcc/testsuite/g++.dg/other/i386-1.C | 18 ++---- gcc/testsuite/gcc.target/i386/20020523-1.c | 68 ---------------------- .../gcc.target/i386/{20020523-2.c => 20020523.c} | 23 ++------ gcc/testsuite/gcc.target/i386/builtin-apply-mmx.c | 16 +---- gcc/testsuite/gcc.target/i386/fpprec-1.c | 17 +----- gcc/testsuite/gcc.target/i386/mmx-4.c | 39 +++++-------- gcc/testsuite/gcc.target/i386/mmx-check.h | 20 +++++++ gcc/testsuite/gcc.target/i386/pr13685.c | 18 ++---- gcc/testsuite/gcc.target/i386/sse-10.c | 12 ++-- gcc/testsuite/gcc.target/i386/sse-11.c | 28 ++------- gcc/testsuite/gcc.target/i386/sse-18.c | 18 ++---- gcc/testsuite/gcc.target/i386/sse-3.c | 27 ++------- gcc/testsuite/gcc.target/i386/sse-6.c | 42 +++++-------- gcc/testsuite/gcc.target/i386/sse-7.c | 40 ++++--------- gcc/testsuite/gcc.target/i386/sse-9.c | 17 ++---- gcc/testsuite/gcc.target/i386/sse-check.h | 20 +++++++ gcc/testsuite/gcc.target/i386/sse-recip-vec.c | 25 +------- gcc/testsuite/gcc.target/i386/sse-recip.c | 25 +------- gcc/testsuite/gcc.target/i386/sse2-lrint-vec.c | 25 +------- gcc/testsuite/gcc.target/i386/sse2-lrintf-vec.c | 25 +------- gcc/testsuite/gcc.target/i386/sse4a-check.h | 20 +++++++ gcc/testsuite/gcc.target/i386/sse4a-extract.c | 23 +------- gcc/testsuite/gcc.target/i386/sse4a-insert.c | 23 +------- gcc/testsuite/gcc.target/i386/sse4a-montsd.c | 21 +------ gcc/testsuite/gcc.target/i386/sse4a-montss.c | 21 +------ gcc/testsuite/gcc.target/i386/ssefn-3.c | 23 +++----- gcc/testsuite/gcc.target/i386/ssefn-4.c | 23 +++----- 28 files changed, 214 insertions(+), 493 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/i386/20020523-1.c rename gcc/testsuite/gcc.target/i386/{20020523-2.c => 20020523.c} (52%) create mode 100644 gcc/testsuite/gcc.target/i386/mmx-check.h create mode 100644 gcc/testsuite/gcc.target/i386/sse-check.h create mode 100644 gcc/testsuite/gcc.target/i386/sse4a-check.h diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1fcf11e92ef..465aaa29b6f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,33 @@ +2007-09-04 Uros Bizjak + + * gcc.target/i386/sse4a-check.h: New file. + * gcc.target/i386/sse4a-extract.c: Include sse4a-check.h. Remove main. + * gcc.target/i386/sse4a-insert.c: Ditto. + * gcc.target/i386/sse4a-montsd.c: Ditto. + * gcc.target/i386/sse4a-montss.c: Ditto. + * gcc.target/i386/mmx-check.h: New file. + * gcc.target/i386/mmx-4.c: Include mmx-check.h. Remove main. + * gcc.target/i386/builtin-apply-mmx.c: Ditto. + * gcc.target/i386/sse-check.h: New file. + * gcc.target/i386/pr13685: Include sse-check.h. Remove main. + * gcc.target/i386/sse-3.c: Ditto. + * gcc.target/i386/sse-7.c: Ditto. + * gcc.target/i386/sse-9.c: Ditto. + * gcc.target/i386/ssefn-3.c: Ditto. + * gcc.target/i386/sse-recip.c: Ditto. + * gcc.target/i386/sse-recip-vec.c: Ditto. + * gcc.target/i386/20020523.c: Ditto. Rename from 20020523-2.c. + * gcc.target/i386/20020523-1.c: Remove. + * gcc.target/i386/sse2-lrint-vec.c: Include sse2-check.h. Remove main. + * gcc.target/i386/sse2-lrintf-vec.c: Ditto. + * gcc.target/i386/ssefn-4.c: Ditto. + * gcc.target/i386/sse-6.c: Ditto. + * gcc.target/i386/sse-10.c: Ditto. + * gcc.target/i386/sse-11.c: Ditto. + * gcc.target/i386/sse-18.c: Ditto. + * gcc.target/i386/fpprec-1.c: Ditto. + * g++.dg/other/i386-1.C: Ditto. + 2007-09-04 Richard Guenther PR tree-optimization/33291 diff --git a/gcc/testsuite/g++.dg/other/i386-1.C b/gcc/testsuite/g++.dg/other/i386-1.C index 86316171599..84e04f042b3 100644 --- a/gcc/testsuite/g++.dg/other/i386-1.C +++ b/gcc/testsuite/g++.dg/other/i386-1.C @@ -1,30 +1,22 @@ /* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-msse2" } */ +#include "../../gcc.target/i386/sse2-check.h" + #include -#include -#include "../../gcc.dg/i386-cpuid.h" -int main(int argc, char** argv) { +static void +sse2_test (void) +{ float a = 1.0f; float b = 2.0f; float c = 3.0f; float r; - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - __m128 v = _mm_set_ps(a, b, c, 0); v = (__m128)_mm_srli_si128((__m128i)v, 4); _mm_store_ss(&r, v); if (r != 3.0f) abort (); - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/20020523-1.c b/gcc/testsuite/gcc.target/i386/20020523-1.c deleted file mode 100644 index 0fb7edc7a76..00000000000 --- a/gcc/testsuite/gcc.target/i386/20020523-1.c +++ /dev/null @@ -1,68 +0,0 @@ -/* PR target/6753 - This testcase was miscompiled because sse_mov?fcc_const0* - patterns were missing earlyclobber. */ - -/* { dg-do run } */ -/* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target nonpic } */ -/* { dg-options "-march=pentium3 -msse -ffast-math -O2" } */ - -extern void abort (void); -extern void exit (int); - -float one = 1.f; - -void bar (float f) -{ - if (__builtin_memcmp (&one, &f, sizeof (float))) - abort (); -} - -float foo (void) -{ - return 1.f; -} - -typedef struct -{ - float t; -} T; - -void bail_if_no_sse (void) -{ - int fl1, fl2; - - /* See if we can use cpuid. */ - __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;" - "pushl %0; popfl; pushfl; popl %0; popfl" - : "=&r" (fl1), "=&r" (fl2) - : "i" (0x00200000)); - if (((fl1 ^ fl2) & 0x00200000) == 0) - exit (0); - - /* See if cpuid gives capabilities. */ - __asm__ ("cpuid" : "=a" (fl1) : "0" (0) : "ebx", "ecx", "edx", "cc"); - if (fl1 == 0) - exit (0); - - /* See if capabilities include SSE (25th bit; 26 for SSE2). */ - __asm__ ("cpuid" : "=a" (fl1), "=d" (fl2) : "0" (1) : "ebx", "ecx", "cc"); - if ((fl2 & (1 << 25)) == 0) - exit (0); -} - -int main (void) -{ - int i; - T x[1]; - - bail_if_no_sse (); - for (i = 0; i < 1; i++) - { - x[i].t = foo (); - x[i].t = 0.f > x[i].t ? 0.f : x[i].t; - bar (x[i].t); - } - - exit (0); -} diff --git a/gcc/testsuite/gcc.target/i386/20020523-2.c b/gcc/testsuite/gcc.target/i386/20020523.c similarity index 52% rename from gcc/testsuite/gcc.target/i386/20020523-2.c rename to gcc/testsuite/gcc.target/i386/20020523.c index 8321530cd54..7c3490f780b 100644 --- a/gcc/testsuite/gcc.target/i386/20020523-2.c +++ b/gcc/testsuite/gcc.target/i386/20020523.c @@ -1,13 +1,11 @@ /* PR target/6753 This testcase was miscompiled because sse_mov?fcc_const0* patterns were missing earlyclobber. */ + /* { dg-do run } */ -/* { dg-require-effective-target ilp32 } */ -/* { dg-options "-march=pentium3 -msse -ffast-math -O2" } */ +/* { dg-options "-O2 -msse -mfpmath=sse -ffast-math" } */ -#include "../../gcc.dg/i386-cpuid.h" -extern void abort (void); -extern void exit (int); +#include "sse-check.h" float one = 1.f; @@ -27,27 +25,16 @@ typedef struct float t; } T; -void bail_if_no_sse (void) -{ - unsigned int edx; - /* See if capabilities include SSE (25th bit; 26 for SSE2). */ - edx = i386_cpuid(); - if (!(edx & bit_SSE)) - exit (0); -} - -int main (void) +static void +sse_test (void) { int i; T x[1]; - bail_if_no_sse (); for (i = 0; i < 1; i++) { x[i].t = foo (); x[i].t = 0.f > x[i].t ? 0.f : x[i].t; bar (x[i].t); } - - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/builtin-apply-mmx.c b/gcc/testsuite/gcc.target/i386/builtin-apply-mmx.c index 1bc58d7ec3c..d274bd5c2e9 100644 --- a/gcc/testsuite/gcc.target/i386/builtin-apply-mmx.c +++ b/gcc/testsuite/gcc.target/i386/builtin-apply-mmx.c @@ -13,7 +13,7 @@ /* { dg-options "-O2 -mmmx" } */ /* { dg-require-effective-target ilp32 } */ -#include "../../gcc.dg/i386-cpuid.h" +#include "mmx-check.h" extern void abort (void); @@ -34,19 +34,9 @@ bar (double arg) __builtin_apply_args (), 16)); } -int -main (int argc, char **argv) +static void +mmx_test (void) { - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if (!(cpu_facilities & bit_MMX)) - /* If host has no MMX support, pass. */ - return 0; - if (bar (116.0) != 117.0) abort (); - - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/fpprec-1.c b/gcc/testsuite/gcc.target/i386/fpprec-1.c index ff600b26198..0174e7c6c32 100644 --- a/gcc/testsuite/gcc.target/i386/fpprec-1.c +++ b/gcc/testsuite/gcc.target/i386/fpprec-1.c @@ -1,10 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O2 -fno-math-errno -fno-trapping-math -msse2 -mfpmath=sse" } */ -#include "../../gcc.dg/i386-cpuid.h" - -extern void abort(void); -extern int printf(const char *format, ...); +#include "sse2-check.h" double x[] = { __builtin_nan(""), __builtin_inf(), -__builtin_inf(), -0x1.fffffffffffffp+1023, 0x1.fffffffffffffp+1023, /* +-DBL_MAX */ @@ -71,20 +68,12 @@ CHECK(floor) CHECK(ceil) CHECK(trunc) -int main() +static void +sse2_test (void) { - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & bit_SSE2) != bit_SSE2) - /* If host has no SSE2 support, pass. */ - return 0; - check_round (); check_rint (); check_floor (); check_ceil (); check_trunc (); - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/mmx-4.c b/gcc/testsuite/gcc.target/i386/mmx-4.c index 74c894e0cc7..297a76fe526 100644 --- a/gcc/testsuite/gcc.target/i386/mmx-4.c +++ b/gcc/testsuite/gcc.target/i386/mmx-4.c @@ -1,14 +1,10 @@ /* { dg-do run } */ /* { dg-options "-O2 -mmmx" } */ + +#include "mmx-check.h" + #include -#include -#include #include -#include "../../gcc.dg/i386-cpuid.h" - -#ifndef NOINLINE -#define NOINLINE __attribute__ ((noinline)) -#endif #define SHIFT (4) @@ -53,15 +49,10 @@ const char *reference_mmx[] = { "" }; -int main() -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & bit_MMX) == 0) - exit (0); +static void +mmx_test (void) +{ d64.u[0] = 0x01234567; d64.u[1] = 0x01234567; @@ -85,22 +76,18 @@ int main() s64 = b64.v; - if (cpu_facilities & bit_MMX) - { - mmx_tests(); - check (buf, reference_mmx); + mmx_tests(); + check (buf, reference_mmx); #ifdef DEBUG - printf ("mmx testing:\n"); - printf (buf); - printf ("\ncomparison:\n"); - printf (comparison); + printf ("mmx testing:\n"); + printf (buf); + printf ("\ncomparison:\n"); + printf (comparison); #endif - buf[0] = '\0'; - } + buf[0] = '\0'; if (errors != 0) abort (); - exit (0); } void NOINLINE diff --git a/gcc/testsuite/gcc.target/i386/mmx-check.h b/gcc/testsuite/gcc.target/i386/mmx-check.h new file mode 100644 index 00000000000..0c6e1e9523b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/mmx-check.h @@ -0,0 +1,20 @@ +#include +#include + +#include "../../gcc.dg/i386-cpuid.h" + +static void mmx_test (void); + +int +main () +{ + unsigned long cpu_facilities; + + cpu_facilities = i386_cpuid_edx (); + + /* Run MMX test only if host has MMX support. */ + if ((cpu_facilities & bit_MMX)) + mmx_test (); + + exit (0); +} diff --git a/gcc/testsuite/gcc.target/i386/pr13685.c b/gcc/testsuite/gcc.target/i386/pr13685.c index 7c4446abf95..159112d1666 100644 --- a/gcc/testsuite/gcc.target/i386/pr13685.c +++ b/gcc/testsuite/gcc.target/i386/pr13685.c @@ -1,28 +1,20 @@ /* PR target/13685 */ /* { dg-do run } */ /* { dg-options "-Os -msse" } */ -#include -#include + +#include "sse-check.h" + #include -#include "../../gcc.dg/i386-cpuid.h" void foo (__m128 *, __m64 *, int); __m128 xmm0 = { 0 }; __m64 mm0 = { 0 }; -int -main () +static void +sse_test (void) { - unsigned long cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_CMOV)) - /* If host has no SSE support, pass. */ - return 0; - foo (&xmm0, &mm0, 4); - return 0; } void diff --git a/gcc/testsuite/gcc.target/i386/sse-10.c b/gcc/testsuite/gcc.target/i386/sse-10.c index 7956619e495..3116e80d3a9 100644 --- a/gcc/testsuite/gcc.target/i386/sse-10.c +++ b/gcc/testsuite/gcc.target/i386/sse-10.c @@ -2,7 +2,7 @@ /* { dg-do run } */ /* { dg-options "-O1 -msse2 -mfpmath=sse -mno-accumulate-outgoing-args -fno-omit-frame-pointer" } */ -#include "../../gcc.dg/i386-cpuid.h" +#include "sse2-check.h" typedef _Complex double complex_16; @@ -21,14 +21,10 @@ test (complex_16 a[5][5]) } } -int main() +static void +sse2_test (void) { static complex_16 work[5][5]; - unsigned long cpu_facilities; - cpu_facilities = i386_cpuid (); - if (cpu_facilities & bit_SSE2) - test (work); - - return 0; + test (work); } diff --git a/gcc/testsuite/gcc.target/i386/sse-11.c b/gcc/testsuite/gcc.target/i386/sse-11.c index 36312932c84..3745dbf7f60 100644 --- a/gcc/testsuite/gcc.target/i386/sse-11.c +++ b/gcc/testsuite/gcc.target/i386/sse-11.c @@ -1,10 +1,10 @@ /* PR rtl-optimization/21239 */ /* { dg-do run } */ /* { dg-options "-O2 -msse2" } */ -#include -#include "../../gcc.dg/i386-cpuid.h" -extern void abort (void); +#include "sse2-check.h" + +#include void foo (unsigned int x, double *y, const double *z) @@ -49,8 +49,8 @@ bar (unsigned int x, float *y, const float *z) } } -void __attribute__((noinline)) -run_tests (void) +static void +sse2_test (void) { unsigned int i; double a[16], b[16]; @@ -72,21 +72,3 @@ run_tests (void) abort (); } } - -int -main () -{ - unsigned long cpu_facilities; - unsigned int i; - double a[19], b[19]; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - - run_tests (); - return 0; -} diff --git a/gcc/testsuite/gcc.target/i386/sse-18.c b/gcc/testsuite/gcc.target/i386/sse-18.c index 83fc6d38efb..fc0224f8f6d 100644 --- a/gcc/testsuite/gcc.target/i386/sse-18.c +++ b/gcc/testsuite/gcc.target/i386/sse-18.c @@ -1,8 +1,10 @@ /* { dg-do run } */ /* { dg-options "-O3 -msse2" } */ -extern void abort(void); + +#include "sse2-check.h" + #include -#include "../../gcc.dg/i386-cpuid.h" + __m128i foo (char) __attribute__((noinline)); __m128i foo (char x) { return _mm_set1_epi8(x); @@ -12,18 +14,11 @@ __m128i bar (char x) { return _mm_set_epi8 (x,x,x,x,x,x,x,x,x,x,x,x,x,x,x,x); } -main() { +static void +sse2_test (void) { int i, j; union u { __m128i v; char c[16]; }; union u x, y; - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; for (i = -128; i <= 127; i++) { @@ -33,6 +28,5 @@ main() { if (x.c[j] != y.c[j]) abort(); } - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/sse-3.c b/gcc/testsuite/gcc.target/i386/sse-3.c index b09adda8660..338b7c60ba7 100644 --- a/gcc/testsuite/gcc.target/i386/sse-3.c +++ b/gcc/testsuite/gcc.target/i386/sse-3.c @@ -1,10 +1,10 @@ /* PR target/21149 */ /* { dg-do run } */ /* { dg-options "-O2 -msse" } */ -#include -#include "../../gcc.dg/i386-cpuid.h" -extern void abort (void); +#include "sse-check.h" + +#include void __attribute__((noinline)) @@ -28,26 +28,9 @@ foo (__m128 *x) check (w, 0, 0, 2, -3); } -void -__attribute__((noinline)) -run_tests (void) +static void +sse_test (void) { __m128 y = _mm_set_ps (-3, 2, 1, 9); foo (&y); } - -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - - run_tests (); - return 0; -} diff --git a/gcc/testsuite/gcc.target/i386/sse-6.c b/gcc/testsuite/gcc.target/i386/sse-6.c index fbec564e675..237a46372bc 100644 --- a/gcc/testsuite/gcc.target/i386/sse-6.c +++ b/gcc/testsuite/gcc.target/i386/sse-6.c @@ -1,14 +1,10 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse2" } */ -#include -#include -#include -#include -#include "../../gcc.dg/i386-cpuid.h" -#ifndef NOINLINE -#define NOINLINE __attribute__ ((noinline)) -#endif +#include "sse2-check.h" + +#include +#include #define SHIFT (4) @@ -60,17 +56,9 @@ const char *reference_sse2[] = { "" }; -int main() +static void +sse2_test (void) { - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - /* If host has no vector support, pass. */ - exit (0); - a128.s[0] = 0x01234567; a128.s[1] = 0x01234567; a128.s[2] = 0x01234567; @@ -108,22 +96,18 @@ int main() s128 = b128.v; - if (cpu_facilities & bit_SSE2) - { - sse2_tests(); - check (buf, reference_sse2); + sse2_tests(); + check (buf, reference_sse2); #ifdef DEBUG - printf ("sse2 testing:\n"); - printf (buf); - printf ("\ncomparison:\n"); - printf (comparison); + printf ("sse2 testing:\n"); + printf (buf); + printf ("\ncomparison:\n"); + printf (comparison); #endif - buf[0] = '\0'; - } + buf[0] = '\0'; if (errors != 0) abort (); - exit (0); } void NOINLINE diff --git a/gcc/testsuite/gcc.target/i386/sse-7.c b/gcc/testsuite/gcc.target/i386/sse-7.c index 0196d28dfea..0ba0d65c63c 100644 --- a/gcc/testsuite/gcc.target/i386/sse-7.c +++ b/gcc/testsuite/gcc.target/i386/sse-7.c @@ -1,14 +1,10 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse" } */ + +#include "sse-check.h" + #include -#include -#include #include -#include "../../gcc.dg/i386-cpuid.h" - -#ifndef NOINLINE -#define NOINLINE __attribute__ ((noinline)) -#endif #define SHIFT (4) @@ -36,37 +32,25 @@ const char *reference_sse[] = { "" }; -int main() +static void +sse_test (void) { - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_CMOV)) - /* If host has no vector support, pass. */ - exit (0); - e64.t = 0x0123456789abcdefULL; m64_64 = e64.v; - if (cpu_facilities & bit_SSE) - { - sse_tests(); - check (buf, reference_sse); + sse_tests(); + check (buf, reference_sse); #ifdef DEBUG - printf ("sse testing:\n"); - printf (buf); - printf ("\ncomparison:\n"); - printf (comparison); + printf ("sse testing:\n"); + printf (buf); + printf ("\ncomparison:\n"); + printf (comparison); #endif - buf[0] = '\0'; - } + buf[0] = '\0'; if (errors != 0) abort (); - exit (0); } void NOINLINE diff --git a/gcc/testsuite/gcc.target/i386/sse-9.c b/gcc/testsuite/gcc.target/i386/sse-9.c index e0bd676d731..0106cb52f63 100644 --- a/gcc/testsuite/gcc.target/i386/sse-9.c +++ b/gcc/testsuite/gcc.target/i386/sse-9.c @@ -1,25 +1,19 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse" } */ + +#include "sse-check.h" + #include -#include #include #include -#include "../../gcc.dg/i386-cpuid.h" -int -main() +static void +sse_test (void) { int alignment, n; void *ptr; int errors = 0; const char test [] = "This is a test."; - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & bit_SSE) != bit_SSE ) - /* If host has no vector support, pass. */ - exit (0); for (alignment = 1; alignment <= (1 << 20); alignment += alignment) { @@ -40,5 +34,4 @@ main() if (errors != 0) abort (); - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/sse-check.h b/gcc/testsuite/gcc.target/i386/sse-check.h new file mode 100644 index 00000000000..2fb14e61e0b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-check.h @@ -0,0 +1,20 @@ +#include +#include + +#include "../../gcc.dg/i386-cpuid.h" + +static void sse_test (void); + +int +main () +{ + unsigned long cpu_facilities; + + cpu_facilities = i386_cpuid_edx (); + + /* Run SSE test only if host has SSE support. */ + if ((cpu_facilities & bit_SSE)) + sse_test (); + + exit (0); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-recip-vec.c b/gcc/testsuite/gcc.target/i386/sse-recip-vec.c index d142aa07db3..24ee1ac821e 100644 --- a/gcc/testsuite/gcc.target/i386/sse-recip-vec.c +++ b/gcc/testsuite/gcc.target/i386/sse-recip-vec.c @@ -1,15 +1,14 @@ /* { dg-do run } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse -mfpmath=sse -mrecip" } */ -#include "../../gcc.dg/i386-cpuid.h" +#include "sse-check.h" extern float sqrtf (float); -extern void abort (void); #define N 8 -int __attribute__((noinline)) -main1 () +static void +sse_test (void) { float a[N] = { 0.f, 18.f, 108.f, 324.f, 720.f, 1944.f, 3087.f, 5832.f }; float b[N] = { 1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f }; @@ -30,22 +29,4 @@ main1 () if (r[i] != rc[i]) abort(); } - - return 0; -} - -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - - main1 (); - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/sse-recip.c b/gcc/testsuite/gcc.target/i386/sse-recip.c index 2d7dff91452..b673f400b43 100644 --- a/gcc/testsuite/gcc.target/i386/sse-recip.c +++ b/gcc/testsuite/gcc.target/i386/sse-recip.c @@ -1,15 +1,14 @@ /* { dg-do run } */ /* { dg-options "-O2 -ffast-math -msse -mfpmath=sse -mrecip" } */ -#include "../../gcc.dg/i386-cpuid.h" +#include "sse-check.h" extern float sqrtf (float); -extern void abort (void); #define N 8 -int __attribute__((noinline)) -main1 () +static void +sse_test (void) { float a[N] = { 0.f, 18.f, 108.f, 324.f, 720.f, 1944.f, 3087.f, 5832.f }; float b[N] = { 1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f }; @@ -30,22 +29,4 @@ main1 () if (r[i] != rc[i]) abort(); } - - return 0; -} - -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - - main1 (); - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/sse2-lrint-vec.c b/gcc/testsuite/gcc.target/i386/sse2-lrint-vec.c index 35a7ac8dbb0..a6db5c4b56b 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-lrint-vec.c +++ b/gcc/testsuite/gcc.target/i386/sse2-lrint-vec.c @@ -1,15 +1,14 @@ /* { dg-do run } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2" } */ -#include "../../gcc.dg/i386-cpuid.h" +#include "sse2-check.h" extern long lrint (double); -extern void abort (void); #define N 32 -int __attribute__((noinline)) -main1 () +static void +sse2_test (void) { double a[N] = {0.4,3.5,6.6,9.4,12.5,15.6,18.4,21.5,24.6,27.4,30.5,33.6,36.4,39.5,42.6,45.4,0.5,3.6,6.4,9.5,12.6,15.4,18.5,21.6,24.4,27.5,30.6,33.4,36.5,39.6,42.4,45.5}; long r[N]; @@ -27,22 +26,4 @@ main1 () if (r[i] != lrint (a[i])) abort(); } - - return 0; -} - -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - - main1 (); - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/sse2-lrintf-vec.c b/gcc/testsuite/gcc.target/i386/sse2-lrintf-vec.c index dc4ae93b7a2..eb74f831d01 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-lrintf-vec.c +++ b/gcc/testsuite/gcc.target/i386/sse2-lrintf-vec.c @@ -1,15 +1,14 @@ /* { dg-do run } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2" } */ -#include "../../gcc.dg/i386-cpuid.h" +#include "sse2-check.h" extern long lrintf (float); -extern void abort (void); #define N 32 -int __attribute__((noinline)) -main1 () +static void +sse2_test (void) { float a[N] = {0.4,3.5,6.6,9.4,12.5,15.6,18.4,21.5,24.6,27.4,30.5,33.6,36.4,39.5,42.6,45.4,0.5,3.6,6.4,9.5,12.6,15.4,18.5,21.6,24.4,27.5,30.6,33.4,36.5,39.6,42.4,45.5}; long r[N]; @@ -27,22 +26,4 @@ main1 () if (r[i] != lrintf (a[i])) abort(); } - - return 0; -} - -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV)) - /* If host has no vector support, pass. */ - return 0; - - main1 (); - return 0; } diff --git a/gcc/testsuite/gcc.target/i386/sse4a-check.h b/gcc/testsuite/gcc.target/i386/sse4a-check.h new file mode 100644 index 00000000000..388ce650f5f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4a-check.h @@ -0,0 +1,20 @@ +#include +#include + +#include "../../gcc.dg/i386-cpuid.h" + +static void sse4a_test (void); + +int +main () +{ + unsigned long cpu_facilities; + + cpu_facilities = i386_extended_cpuid_ecx (); + + /* Run SSE4a test only if host has SSE4a support. */ + if ((cpu_facilities & bit_SSE4a)) + sse4a_test (); + + exit (0); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4a-extract.c b/gcc/testsuite/gcc.target/i386/sse4a-extract.c index 28291ff7dda..5fb190e44b6 100644 --- a/gcc/testsuite/gcc.target/i386/sse4a-extract.c +++ b/gcc/testsuite/gcc.target/i386/sse4a-extract.c @@ -1,11 +1,10 @@ /* { dg-do run } */ /* { dg-require-effective-target sse4a } */ /* { dg-options "-O2 -msse4a" } */ -#include -#include -#include "../../gcc.dg/i386-cpuid.h" -static void sse4a_test (void); +#include "sse4a-check.h" + +#include typedef union { @@ -13,20 +12,6 @@ typedef union __m128i vec; } LI; -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_extended_cpuid_ecx (); - - /* Run SSE4a test only if host has SSE4a support. */ - if ((cpu_facilities & bit_SSE4a)) - sse4a_test (); - - exit (0); -} - static long long sse4a_test_extrq (long long in) { @@ -96,6 +81,4 @@ sse4a_test (void) if (fail != 0) abort (); - - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/sse4a-insert.c b/gcc/testsuite/gcc.target/i386/sse4a-insert.c index 0c7d0a6c840..c1bd1006d7e 100644 --- a/gcc/testsuite/gcc.target/i386/sse4a-insert.c +++ b/gcc/testsuite/gcc.target/i386/sse4a-insert.c @@ -1,11 +1,10 @@ /* { dg-do run } */ /* { dg-require-effective-target sse4a } */ /* { dg-options "-O2 -msse4a" } */ -#include -#include -#include "../../gcc.dg/i386-cpuid.h" -static void sse4a_test (void); +#include "sse4a-check.h" + +#include typedef union { @@ -13,20 +12,6 @@ typedef union __m128i vec; } LI; -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_extended_cpuid_ecx (); - - /* Run SSE4a test only if host has SSE4a support. */ - if ((cpu_facilities & bit_SSE4a)) - sse4a_test (); - - exit (0); -} - static long long sse4a_test_insert (long long in1, long long in2) { @@ -106,6 +91,4 @@ sse4a_test (void) if (fail != 0) abort (); - - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/sse4a-montsd.c b/gcc/testsuite/gcc.target/i386/sse4a-montsd.c index 5abbf1335e9..1cc067db62f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4a-montsd.c +++ b/gcc/testsuite/gcc.target/i386/sse4a-montsd.c @@ -1,26 +1,11 @@ /* { dg-do run } */ /* { dg-require-effective-target sse4a } */ /* { dg-options "-O2 -msse4a" } */ -#include -#include -#include "../../gcc.dg/i386-cpuid.h" - -static void sse4a_test (void); - -int -main () -{ - unsigned long cpu_facilities; - cpu_facilities = i386_extended_cpuid_ecx (); +#include "sse4a-check.h" - /* Run SSE4a test only if host has SSE4a support. */ - if ((cpu_facilities & bit_SSE4a)) - sse4a_test (); +#include - exit (0); -} - static void sse4a_test_movntsd (double *out, double *in) { @@ -60,6 +45,4 @@ sse4a_test (void) if (fail != 0) abort (); - - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/sse4a-montss.c b/gcc/testsuite/gcc.target/i386/sse4a-montss.c index d64f8bafe8f..41e80e83ddb 100644 --- a/gcc/testsuite/gcc.target/i386/sse4a-montss.c +++ b/gcc/testsuite/gcc.target/i386/sse4a-montss.c @@ -1,25 +1,10 @@ /* { dg-do run } */ /* { dg-require-effective-target sse4a } */ /* { dg-options "-O2 -msse4a" } */ -#include -#include -#include "../../gcc.dg/i386-cpuid.h" - -static void sse4a_test (void); - -int -main () -{ - unsigned long cpu_facilities; - - cpu_facilities = i386_extended_cpuid_ecx (); - /* Run SSE4a test only if host has SSE4a support. */ - if ((cpu_facilities & bit_SSE4a)) - sse4a_test (); +#include "sse4a-check.h" - exit (0); -} +#include static void sse4a_test_movntss (float *out, float *in) @@ -60,6 +45,4 @@ sse4a_test (void) if (fail != 0) abort (); - - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/ssefn-3.c b/gcc/testsuite/gcc.target/i386/ssefn-3.c index 2d895f6f4fe..adf72cce18a 100644 --- a/gcc/testsuite/gcc.target/i386/ssefn-3.c +++ b/gcc/testsuite/gcc.target/i386/ssefn-3.c @@ -3,8 +3,10 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse -mfpmath=sse" } */ + +#include "sse-check.h" + #include -#include "../../gcc.dg/i386-cpuid.h" static float xs (void) { @@ -26,18 +28,11 @@ double yd (double a) return xd () * a; } -int main() +static void +sse_test (void) { - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if (cpu_facilities & bit_SSE) - { - assert (ys (1) == xs ()); - assert (ys (2) == xs () * 2); - assert (yd (1) == xd ()); - assert (yd (2) == xd () * 2); - } - return 0; + assert (ys (1) == xs ()); + assert (ys (2) == xs () * 2); + assert (yd (1) == xd ()); + assert (yd (2) == xd () * 2); } diff --git a/gcc/testsuite/gcc.target/i386/ssefn-4.c b/gcc/testsuite/gcc.target/i386/ssefn-4.c index c9d8c7aaba3..eacdfa79392 100644 --- a/gcc/testsuite/gcc.target/i386/ssefn-4.c +++ b/gcc/testsuite/gcc.target/i386/ssefn-4.c @@ -3,8 +3,10 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse2 -mfpmath=sse" } */ + +#include "sse2-check.h" + #include -#include "../../gcc.dg/i386-cpuid.h" static float xs (void) { @@ -26,18 +28,11 @@ double yd (double a) return xd () * a; } -int main() +static void +sse2_test (void) { - unsigned long cpu_facilities; - - cpu_facilities = i386_cpuid (); - - if (cpu_facilities & bit_SSE2) - { - assert (ys (1) == xs ()); - assert (ys (2) == xs () * 2); - assert (yd (1) == xd ()); - assert (yd (2) == xd () * 2); - } - return 0; + assert (ys (1) == xs ()); + assert (ys (2) == xs () * 2); + assert (yd (1) == xd ()); + assert (yd (2) == xd () * 2); } -- 2.11.0