From cbc9c660a51c0a5b80181b96a680dd888e6ad00b Mon Sep 17 00:00:00 2001 From: hjl Date: Thu, 22 May 2008 12:43:16 +0000 Subject: [PATCH] 2008-05-22 H.J. Lu * defaults.h (UNITS_PER_SIMD_WORD): Add scalar mode as argument. * doc/tm.texi (UNITS_PER_SIMD_WORD): Likewise. * tree-vect-analyze.c (vect_compute_data_ref_alignment): Replace UNITS_PER_SIMD_WORD with GET_MODE_SIZE (TYPE_MODE (vectype)). (vect_update_misalignment_for_peel): Likewise. (vector_alignment_reachable_p): Likewise. * tree-vect-transform.c (vectorizable_load): Likewise. * tree-vectorizer.c (vect_supportable_dr_alignment): Likewise. * tree-vectorizer.c (get_vectype_for_scalar_type): Pass mode of scalar_type to UNITS_PER_SIMD_WORD. * config/arm/arm.h (UNITS_PER_SIMD_WORD): Updated. * config/i386/i386.h (UNITS_PER_SIMD_WORD): Likewise. * config/mips/mips.h (UNITS_PER_SIMD_WORD): Likewise. * config/rs6000/rs6000.h (UNITS_PER_SIMD_WORD): Likewise. * config/sparc/sparc.h (UNITS_PER_SIMD_WORD): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@135759 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 21 +++++++++++++++++++++ gcc/config/arm/arm.h | 2 +- gcc/config/i386/i386.h | 2 +- gcc/config/mips/mips.h | 3 ++- gcc/config/rs6000/rs6000.h | 2 +- gcc/config/sparc/sparc.h | 2 +- gcc/defaults.h | 2 +- gcc/doc/tm.texi | 10 +++++----- gcc/tree-vect-analyze.c | 9 +++++---- gcc/tree-vect-transform.c | 3 ++- gcc/tree-vectorizer.c | 18 ++++++++++-------- 11 files changed, 50 insertions(+), 24 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eda2ea21c1c..50754f75dbe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,24 @@ +2008-05-22 H.J. Lu + + * defaults.h (UNITS_PER_SIMD_WORD): Add scalar mode as argument. + * doc/tm.texi (UNITS_PER_SIMD_WORD): Likewise. + + * tree-vect-analyze.c (vect_compute_data_ref_alignment): Replace + UNITS_PER_SIMD_WORD with GET_MODE_SIZE (TYPE_MODE (vectype)). + (vect_update_misalignment_for_peel): Likewise. + (vector_alignment_reachable_p): Likewise. + * tree-vect-transform.c (vectorizable_load): Likewise. + * tree-vectorizer.c (vect_supportable_dr_alignment): Likewise. + + * tree-vectorizer.c (get_vectype_for_scalar_type): Pass mode of + scalar_type to UNITS_PER_SIMD_WORD. + + * config/arm/arm.h (UNITS_PER_SIMD_WORD): Updated. + * config/i386/i386.h (UNITS_PER_SIMD_WORD): Likewise. + * config/mips/mips.h (UNITS_PER_SIMD_WORD): Likewise. + * config/rs6000/rs6000.h (UNITS_PER_SIMD_WORD): Likewise. + * config/sparc/sparc.h (UNITS_PER_SIMD_WORD): Likewise. + 2008-05-22 Ira Rosen PR tree-optimization/36293 diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 7f10a5797d8..b77a2ac5b8f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -506,7 +506,7 @@ extern int arm_arch_hwdiv; /* Use the option -mvectorize-with-neon-quad to override the use of doubleword registers when autovectorizing for Neon, at least until multiple vector widths are supported properly by the middle-end. */ -#define UNITS_PER_SIMD_WORD \ +#define UNITS_PER_SIMD_WORD(MODE) \ (TARGET_NEON ? (TARGET_NEON_VECTORIZE_QUAD ? 16 : 8) : UNITS_PER_WORD) /* True if natural alignment is used for doubleword types. */ diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 9d36a1ff49f..72ead0795c2 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1132,7 +1132,7 @@ do { \ /* ??? No autovectorization into MMX or 3DNOW until we can reliably place emms and femms instructions. */ -#define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD) +#define UNITS_PER_SIMD_WORD(MODE) (TARGET_SSE ? 16 : UNITS_PER_WORD) #define VALID_DFP_MODE_P(MODE) \ ((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode) diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 765552778b5..6d3c18feb46 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1193,7 +1193,8 @@ enum mips_code_readable_setting { /* The number of bytes in a double. */ #define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT) -#define UNITS_PER_SIMD_WORD (TARGET_PAIRED_SINGLE_FLOAT ? 8 : UNITS_PER_WORD) +#define UNITS_PER_SIMD_WORD(MODE) \ + (TARGET_PAIRED_SINGLE_FLOAT ? 8 : UNITS_PER_WORD) /* Set the sizes of the core types. */ #define SHORT_TYPE_SIZE 16 diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 269a6021c96..442f72708b0 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -899,7 +899,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops; #define PAIRED_VECTOR_MODE(MODE) \ ((MODE) == V2SFmode) -#define UNITS_PER_SIMD_WORD \ +#define UNITS_PER_SIMD_WORD(MODE) \ (TARGET_ALTIVEC ? UNITS_PER_ALTIVEC_WORD \ : (TARGET_SPE ? UNITS_PER_SPE_WORD : (TARGET_PAIRED_FLOAT ? \ UNITS_PER_PAIRED_WORD : UNITS_PER_WORD))) diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 6e9e3ea54e4..ef60292cef3 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -606,7 +606,7 @@ extern struct sparc_cpu_select sparc_select[]; #define MIN_UNITS_PER_WORD 4 #endif -#define UNITS_PER_SIMD_WORD (TARGET_VIS ? 8 : UNITS_PER_WORD) +#define UNITS_PER_SIMD_WORD(MODE) (TARGET_VIS ? 8 : UNITS_PER_WORD) /* Now define the sizes of the C data types. */ diff --git a/gcc/defaults.h b/gcc/defaults.h index cc41b6e6612..ff5b5c01cf3 100644 --- a/gcc/defaults.h +++ b/gcc/defaults.h @@ -739,7 +739,7 @@ along with GCC; see the file COPYING3. If not see /* By default, only attempt to parallelize bitwise operations, and possibly adds/subtracts using bit-twiddling. */ #ifndef UNITS_PER_SIMD_WORD -#define UNITS_PER_SIMD_WORD UNITS_PER_WORD +#define UNITS_PER_SIMD_WORD(MODE) UNITS_PER_WORD #endif /* Determine whether __cxa_atexit, rather than atexit, is used to diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 91448a71a42..12a2740173b 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -990,11 +990,11 @@ Minimum number of units in a word. If this is undefined, the default is smallest value that @code{UNITS_PER_WORD} can have at run-time. @end defmac -@defmac UNITS_PER_SIMD_WORD -Number of units in the vectors that the vectorizer can produce. -The default is equal to @code{UNITS_PER_WORD}, because the vectorizer -can do some transformations even in absence of specialized @acronym{SIMD} -hardware. +@defmac UNITS_PER_SIMD_WORD (@var{mode}) +Number of units in the vectors that the vectorizer can produce for +scalar mode @var{mode}. The default is equal to @code{UNITS_PER_WORD}, +because the vectorizer can do some transformations even in absence of +specialized @acronym{SIMD} hardware. @end defmac @defmac POINTER_SIZE diff --git a/gcc/tree-vect-analyze.c b/gcc/tree-vect-analyze.c index 66d83a5c328..18d7bb8bab1 100644 --- a/gcc/tree-vect-analyze.c +++ b/gcc/tree-vect-analyze.c @@ -1370,6 +1370,7 @@ vect_compute_data_ref_alignment (struct data_reference *dr) misalign = DR_INIT (dr); aligned_to = DR_ALIGNED_TO (dr); base_addr = DR_BASE_ADDRESS (dr); + vectype = STMT_VINFO_VECTYPE (stmt_info); /* In case the dataref is in an inner-loop of the loop that is being vectorized (LOOP), we use the base and misalignment information @@ -1382,7 +1383,7 @@ vect_compute_data_ref_alignment (struct data_reference *dr) tree step = DR_STEP (dr); HOST_WIDE_INT dr_step = TREE_INT_CST_LOW (step); - if (dr_step % UNITS_PER_SIMD_WORD == 0) + if (dr_step % GET_MODE_SIZE (TYPE_MODE (vectype)) == 0) { if (vect_print_dump_info (REPORT_ALIGNMENT)) fprintf (vect_dump, "inner step divides the vector-size."); @@ -1399,7 +1400,6 @@ vect_compute_data_ref_alignment (struct data_reference *dr) } base = build_fold_indirect_ref (base_addr); - vectype = STMT_VINFO_VECTYPE (stmt_info); alignment = ssize_int (TYPE_ALIGN (vectype)/BITS_PER_UNIT); if ((aligned_to && tree_int_cst_compare (aligned_to, alignment) < 0) @@ -1541,8 +1541,9 @@ vect_update_misalignment_for_peel (struct data_reference *dr, && known_alignment_for_access_p (dr_peel)) { int misal = DR_MISALIGNMENT (dr); + tree vectype = STMT_VINFO_VECTYPE (stmt_info); misal += npeel * dr_size; - misal %= UNITS_PER_SIMD_WORD; + misal %= GET_MODE_SIZE (TYPE_MODE (vectype)); SET_DR_MISALIGNMENT (dr, misal); return; } @@ -1622,7 +1623,7 @@ vector_alignment_reachable_p (struct data_reference *dr) if (!known_alignment_for_access_p (dr)) return false; - elem_size = UNITS_PER_SIMD_WORD / nelements; + elem_size = GET_MODE_SIZE (TYPE_MODE (vectype)) / nelements; mis_in_elements = DR_MISALIGNMENT (dr) / elem_size; if ((nelements - mis_in_elements) % DR_GROUP_SIZE (stmt_info)) diff --git a/gcc/tree-vect-transform.c b/gcc/tree-vect-transform.c index 1f6a13b7bcc..72e87ef1e41 100644 --- a/gcc/tree-vect-transform.c +++ b/gcc/tree-vect-transform.c @@ -5780,7 +5780,8 @@ vectorizable_load (tree stmt, block_stmt_iterator *bsi, tree *vec_stmt, nested within an outer-loop that is being vectorized. */ if (nested_in_vect_loop_p (loop, stmt) - && (TREE_INT_CST_LOW (DR_STEP (dr)) % UNITS_PER_SIMD_WORD != 0)) + && (TREE_INT_CST_LOW (DR_STEP (dr)) + % GET_MODE_SIZE (TYPE_MODE (vectype)) != 0)) { gcc_assert (alignment_support_scheme != dr_explicit_realign_optimized); compute_in_loop = true; diff --git a/gcc/tree-vectorizer.c b/gcc/tree-vectorizer.c index d374a0640d2..c513dda7652 100644 --- a/gcc/tree-vectorizer.c +++ b/gcc/tree-vectorizer.c @@ -1806,12 +1806,12 @@ get_vectype_for_scalar_type (tree scalar_type) int nunits; tree vectype; - if (nbytes == 0 || nbytes >= UNITS_PER_SIMD_WORD) + if (nbytes == 0 || nbytes >= UNITS_PER_SIMD_WORD (inner_mode)) return NULL_TREE; - /* FORNOW: Only a single vector size per target (UNITS_PER_SIMD_WORD) + /* FORNOW: Only a single vector size per mode (UNITS_PER_SIMD_WORD) is expected. */ - nunits = UNITS_PER_SIMD_WORD / nbytes; + nunits = UNITS_PER_SIMD_WORD (inner_mode) / nbytes; vectype = build_vector_type (scalar_type, nunits); if (vect_print_dump_info (REPORT_DETAILS)) @@ -1937,11 +1937,13 @@ vect_supportable_dr_alignment (struct data_reference *dr) && (!targetm.vectorize.builtin_mask_for_load || targetm.vectorize.builtin_mask_for_load ())) { - if (nested_in_vect_loop - && TREE_INT_CST_LOW (DR_STEP (dr)) != UNITS_PER_SIMD_WORD) - return dr_explicit_realign; - else - return dr_explicit_realign_optimized; + tree vectype = STMT_VINFO_VECTYPE (stmt_info); + if (nested_in_vect_loop + && (TREE_INT_CST_LOW (DR_STEP (dr)) + != GET_MODE_SIZE (TYPE_MODE (vectype)))) + return dr_explicit_realign; + else + return dr_explicit_realign_optimized; } if (optab_handler (movmisalign_optab, mode)->insn_code != -- 2.11.0