From a2f10148179386c5dd12797f07c9addfb52fcb5b Mon Sep 17 00:00:00 2001 From: amodra Date: Sun, 23 Aug 2009 03:53:02 +0000 Subject: [PATCH] PR target/41081 * config/rs6000/rs6000.md (rotlsi3_64, ashlsi3_64, lshrsi3_64, ashrsi3_64): New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@151025 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.md | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cce751b2ed9..2163e002589 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,12 @@ 2009-08-23 Alan Modra PR target/41081 + * config/rs6000/rs6000.md (rotlsi3_64, ashlsi3_64, lshrsi3_64, + ashrsi3_64): New. + +2009-08-23 Alan Modra + + PR target/41081 * fwprop.c (try_fwprop_subst): Allow multiple sets. (get_reg_use_in): New function. (forward_propagate_subreg): Propagate through subreg of zero_extend diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 9524fe81f13..ea046d3e920 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4367,6 +4367,17 @@ {rlinm|rlwinm} %0,%1,%h2,0xffffffff" [(set_attr "type" "var_shift_rotate,integer")]) +(define_insn "*rotlsi3_64" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") + (zero_extend:DI + (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r") + (match_operand:SI 2 "reg_or_cint_operand" "r,i"))))] + "TARGET_64BIT" + "@ + {rlnm|rlwnm} %0,%1,%2,0xffffffff + {rlinm|rlwinm} %0,%1,%h2,0xffffffff" + [(set_attr "type" "var_shift_rotate,integer")]) + (define_insn "*rotlsi3_internal2" [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y") (compare:CC (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r") @@ -4711,6 +4722,17 @@ {sli|slwi} %0,%1,%h2" [(set_attr "type" "var_shift_rotate,shift")]) +(define_insn "*ashlsi3_64" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") + (zero_extend:DI + (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r,r") + (match_operand:SI 2 "reg_or_cint_operand" "r,i"))))] + "TARGET_POWERPC64" + "@ + {sl|slw} %0,%1,%2 + {sli|slwi} %0,%1,%h2" + [(set_attr "type" "var_shift_rotate,shift")]) + (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y") (compare:CC (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r") @@ -4948,6 +4970,17 @@ {sri|srwi} %0,%1,%h2" [(set_attr "type" "integer,var_shift_rotate,shift")]) +(define_insn "*lshrsi3_64" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") + (zero_extend:DI + (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r") + (match_operand:SI 2 "reg_or_cint_operand" "r,i"))))] + "TARGET_POWERPC64" + "@ + {sr|srw} %0,%1,%2 + {sri|srwi} %0,%1,%h2" + [(set_attr "type" "var_shift_rotate,shift")]) + (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,?y,?y,?y") (compare:CC (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r,r,r") @@ -5376,6 +5409,17 @@ {srai|srawi} %0,%1,%h2" [(set_attr "type" "var_shift_rotate,shift")]) +(define_insn "*ashrsi3_64" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") + (sign_extend:DI + (ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r") + (match_operand:SI 2 "reg_or_cint_operand" "r,i"))))] + "TARGET_POWERPC64" + "@ + {sra|sraw} %0,%1,%2 + {srai|srawi} %0,%1,%h2" + [(set_attr "type" "var_shift_rotate,shift")]) + (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y") (compare:CC (ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r") -- 2.11.0