From 30bf33292ccd5a0fac46de202f59be6b56960e77 Mon Sep 17 00:00:00 2001 From: ghazi Date: Sun, 23 Dec 2001 04:59:13 +0000 Subject: [PATCH] * 1750a.h (datalbl, jmplbl): Declare array size explicitly. * a29k.h (a29k_debug_reg_map): Likewise. * arc.h (arc_regno_reg_class): Likewise. * c4x-protos.h (c4x_regclass_map, c4x_caller_save_map): Likewise. * convex.h (regno_reg_class, reg_class_from_letter): Likewise. * d30v.h (regno_reg_class, reg_class_from_letter): Likewise. * i386.h (regclass_map): Likewise. * m32r.h (m32r_hard_regno_mode_ok, m32r_punct_chars): Likewise. * mcore.h (regno_reg_class): Likewise. * mips.h (mips_print_operand_punct, mips_char_to_class): Likewise. * ns32k.h (regclass_map): Likewise. * pj.h (pj_debugreg_renumber_vec): Likewise. * s390.h (regclass_map): Likewise. * sh.h (regno_reg_class): Likewise. * sparc.h (sparc_regno_reg_class): Likewise. * hard-reg-set.h (reg_class_contents): Likewise. * machmode.h (class_narrowest_mode): Likewise. f: * bld.c (ffebld_arity_op_): Declare array size explicitly. * bld.h (ffebld_arity_op_): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@48281 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 22 ++++++++++++++++++++++ gcc/config/1750a/1750a.h | 4 ++-- gcc/config/a29k/a29k.h | 2 +- gcc/config/arc/arc.h | 4 ++-- gcc/config/c4x/c4x-protos.h | 4 ++-- gcc/config/convex/convex.h | 4 ++-- gcc/config/d30v/d30v.h | 4 ++-- gcc/config/i386/i386.h | 2 +- gcc/config/m32r/m32r.h | 4 ++-- gcc/config/mcore/mcore.h | 2 +- gcc/config/mips/mips.h | 4 ++-- gcc/config/ns32k/ns32k.h | 2 +- gcc/config/pj/pj.h | 2 +- gcc/config/s390/s390.h | 2 +- gcc/config/sh/sh.h | 2 +- gcc/config/sparc/sparc.h | 2 +- gcc/f/ChangeLog | 5 +++++ gcc/f/bld.c | 2 +- gcc/f/bld.h | 2 +- gcc/hard-reg-set.h | 2 +- gcc/machmode.h | 2 +- 21 files changed, 53 insertions(+), 26 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 654025098ec..ebefea5cdc1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,25 @@ +2001-12-22 Kaveh R. Ghazi + + * 1750a.h (datalbl, jmplbl): Declare array size explicitly. + * a29k.h (a29k_debug_reg_map): Likewise. + * arc.h (arc_regno_reg_class): Likewise. + * c4x-protos.h (c4x_regclass_map, c4x_caller_save_map): Likewise. + * convex.h (regno_reg_class, reg_class_from_letter): Likewise. + * d30v.h (regno_reg_class, reg_class_from_letter): Likewise. + * i386.h (regclass_map): Likewise. + * m32r.h (m32r_hard_regno_mode_ok, m32r_punct_chars): Likewise. + * mcore.h (regno_reg_class): Likewise. + * mips.h (mips_print_operand_punct, mips_char_to_class): + Likewise. + * ns32k.h (regclass_map): Likewise. + * pj.h (pj_debugreg_renumber_vec): Likewise. + * s390.h (regclass_map): Likewise. + * sh.h (regno_reg_class): Likewise. + * sparc.h (sparc_regno_reg_class): Likewise. + + * hard-reg-set.h (reg_class_contents): Likewise. + * machmode.h (class_narrowest_mode): Likewise. + 2001-12-22 David Edelsohn * loop.c (scan_loop, move_movables, count_one_set): Do not diff --git a/gcc/config/1750a/1750a.h b/gcc/config/1750a/1750a.h index bca9d356b9a..f69f05a09e0 100644 --- a/gcc/config/1750a/1750a.h +++ b/gcc/config/1750a/1750a.h @@ -62,8 +62,8 @@ enum section { Init, Normal, Konst, Static }; #define DATALBL_ARRSIZ 256 #define JMPLBL_ARRSIZ 256 #ifndef __datalbl -extern struct datalabel_array datalbl[]; -extern struct jumplabel_array jmplbl[]; +extern struct datalabel_array datalbl[DATALBL_ARRSIZ]; +extern struct jumplabel_array jmplbl[JMPLBL_ARRSIZ]; extern int datalbl_ndx, jmplbl_ndx, label_pending, program_counter; extern enum section current_section; extern const char *const sectname[4]; diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index 18b2a631c51..d470cf131fb 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -1416,7 +1416,7 @@ literal_section () \ /* How to renumber registers for dbx and gdb. */ -extern int a29k_debug_reg_map[]; +extern int a29k_debug_reg_map[FIRST_PSEUDO_REGISTER]; #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO] /* Switch into a generic section. */ diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index d31ccdbc252..f6212d16895 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -464,7 +464,7 @@ enum reg_class { Return the class number of the smallest class containing reg number REGNO. This could be a conditional expression or could index an array. */ -extern enum reg_class arc_regno_reg_class[]; +extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER]; #define REGNO_REG_CLASS(REGNO) \ (arc_regno_reg_class[REGNO]) @@ -1332,7 +1332,7 @@ arc_final_prescan_insn (INSN, OPVEC, NOPERANDS) /* A C expression which evaluates to true if CODE is a valid punctuation character for use in the `PRINT_OPERAND' macro. */ -extern char arc_punct_chars[]; +extern char arc_punct_chars[256]; #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ arc_punct_chars[(unsigned char) (CHAR)] diff --git a/gcc/config/c4x/c4x-protos.h b/gcc/config/c4x/c4x-protos.h index be39ca2aade..1cd7fce9c50 100644 --- a/gcc/config/c4x/c4x-protos.h +++ b/gcc/config/c4x/c4x-protos.h @@ -287,8 +287,8 @@ extern struct rtx_def *c4x_compare_op1; /* Operand 1 for comparisons. */ #endif /* RTX_CODE */ /* Smallest class containing REGNO. */ -extern enum reg_class c4x_regclass_map[]; -extern enum machine_mode c4x_caller_save_map[]; +extern enum reg_class c4x_regclass_map[FIRST_PSEUDO_REGISTER]; +extern enum machine_mode c4x_caller_save_map[FIRST_PSEUDO_REGISTER]; extern int c4x_rpts_cycles; /* Max cycles for RPTS. */ extern int c4x_cpu_version; /* Cpu version C30/31/32/40/44. */ diff --git a/gcc/config/convex/convex.h b/gcc/config/convex/convex.h index 16fb2a43b55..1b9322040e0 100644 --- a/gcc/config/convex/convex.h +++ b/gcc/config/convex/convex.h @@ -1365,8 +1365,8 @@ enum reg_class { extern int target_cpu; extern int current_section_is_text; -extern enum reg_class regno_reg_class[]; -extern enum reg_class reg_class_from_letter[]; +extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; +extern enum reg_class reg_class_from_letter[256]; extern char regno_ok_for_index_p_base[]; #define regno_ok_for_index_p (regno_ok_for_index_p_base + 1) diff --git a/gcc/config/d30v/d30v.h b/gcc/config/d30v/d30v.h index c0098a1cc91..3f65511043d 100644 --- a/gcc/config/d30v/d30v.h +++ b/gcc/config/d30v/d30v.h @@ -1503,7 +1503,7 @@ enum reg_class REGNO. In general there is more than one such class; choose a class which is "minimal", meaning that no smaller class also contains the register. */ -extern enum reg_class regno_reg_class[]; +extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; #define REGNO_REG_CLASS(REGNO) regno_reg_class[ (REGNO) ] /* A macro whose definition is the name of the class to which a valid base @@ -1533,7 +1533,7 @@ extern enum reg_class regno_reg_class[]; 'V', 'X' 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ -extern enum reg_class reg_class_from_letter[]; +extern enum reg_class reg_class_from_letter[256]; #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter[(unsigned char)(CHAR)] /* A C expression which is nonzero if register number NUM is suitable for use diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 7e30c3146c8..6f324065d21 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -3136,7 +3136,7 @@ extern const char *ix86_branch_cost_string; /* values 1-5: see jump.c */ extern int ix86_regparm; /* ix86_regparm_string as a number */ extern int ix86_preferred_stack_boundary; /* preferred stack boundary alignment in bits */ extern int ix86_branch_cost; /* values 1-5: see jump.c */ -extern enum reg_class const regclass_map[]; /* smalled class containing REGNO */ +extern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */ extern struct rtx_def *ix86_compare_op0; /* operand 0 for comparisons */ extern struct rtx_def *ix86_compare_op1; /* operand 1 for comparisons */ diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index e24368054ef..354a80d1ff1 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -651,7 +651,7 @@ extern enum m32r_sdata m32r_sdata; ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ -extern unsigned int m32r_hard_regno_mode_ok[]; +extern unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER]; extern unsigned int m32r_mode_class[]; #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0) @@ -1823,7 +1823,7 @@ do { \ /* A C expression which evaluates to true if CODE is a valid punctuation character for use in the `PRINT_OPERAND' macro. */ -extern char m32r_punct_chars[]; +extern char m32r_punct_chars[256]; #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ m32r_punct_chars[(unsigned char) (CHAR)] diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h index 61c8c6bb769..77454611056 100644 --- a/gcc/config/mcore/mcore.h +++ b/gcc/config/mcore/mcore.h @@ -530,7 +530,7 @@ enum reg_class reg number REGNO. This could be a conditional expression or could index an array. */ -extern int regno_reg_class[]; +extern int regno_reg_class[FIRST_PSEUDO_REGISTER]; #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] /* When defined, the compiler allows registers explicitly used in the diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index a9a77ee3798..96662c5ca4d 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -119,7 +119,7 @@ enum block_move_type { }; extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */ -extern char mips_print_operand_punct[]; /* print_operand punctuation chars */ +extern char mips_print_operand_punct[256]; /* print_operand punctuation chars */ extern const char *current_function_file; /* filename current function is in */ extern int num_source_filenames; /* current .file # */ extern int inside_function; /* != 0 if inside of a function */ @@ -2083,7 +2083,7 @@ extern const enum reg_class mips_regno_to_class[]; 'z' FP Status register 'b' All registers */ -extern enum reg_class mips_char_to_class[]; +extern enum reg_class mips_char_to_class[256]; #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[(unsigned char)(C)] diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h index 1822c189b5e..62be8cb2f71 100644 --- a/gcc/config/ns32k/ns32k.h +++ b/gcc/config/ns32k/ns32k.h @@ -1407,7 +1407,7 @@ do { \ #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR) extern unsigned int ns32k_reg_class_contents[N_REG_CLASSES][1]; -extern enum reg_class regclass_map[]; /* smallest class containing REGNO */ +extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smallest class containing REGNO */ /* Local variables: diff --git a/gcc/config/pj/pj.h b/gcc/config/pj/pj.h index 87606fc283c..49db122e373 100644 --- a/gcc/config/pj/pj.h +++ b/gcc/config/pj/pj.h @@ -1253,7 +1253,7 @@ do { fputs (current_function_varargs || current_function_stdarg \ #define CAN_DEBUG_WITHOUT_FP /* How to renumber registers for dbx and gdb. */ -extern short pj_debugreg_renumber_vec[]; +extern short pj_debugreg_renumber_vec[FIRST_PSEUDO_REGISTER]; #define DBX_REGISTER_NUMBER(REG) (pj_debugreg_renumber_vec[REG]) diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index 9b85fb4d0fb..b1583399a07 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -524,7 +524,7 @@ enum reg_class #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) -extern enum reg_class regclass_map[]; /* smalled class containing REGNO */ +extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */ /* The class value for index registers, and the one for base regs. */ diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index c43470317ac..aa94109be5f 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -804,7 +804,7 @@ enum reg_class reg number REGNO. This could be a conditional expression or could index an array. */ -extern int regno_reg_class[]; +extern int regno_reg_class[FIRST_PSEUDO_REGISTER]; #define REGNO_REG_CLASS(REGNO) regno_reg_class[(REGNO)] /* When defined, the compiler allows registers explicitly used in the diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 1a6547cc3b0..0eb98cc0ebd 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1302,7 +1302,7 @@ enum reg_class { NO_REGS, FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS, reg number REGNO. This could be a conditional expression or could index an array. */ -extern enum reg_class sparc_regno_reg_class[]; +extern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; #define REGNO_REG_CLASS(REGNO) sparc_regno_reg_class[(REGNO)] diff --git a/gcc/f/ChangeLog b/gcc/f/ChangeLog index 909a63a8b2e..313074a3dca 100644 --- a/gcc/f/ChangeLog +++ b/gcc/f/ChangeLog @@ -1,3 +1,8 @@ +Sat Dec 22 16:01:51 2001 Kaveh R. Ghazi + + * bld.c (ffebld_arity_op_): Declare array size explicitly. + * bld.h (ffebld_arity_op_): Likewise. + 2001-12-20 Joseph S. Myers * config-lang.in (diff_excludes): Remove. diff --git a/gcc/f/bld.c b/gcc/f/bld.c index 41a79d6488c..9161419bdc9 100644 --- a/gcc/f/bld.c +++ b/gcc/f/bld.c @@ -46,7 +46,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA /* Externals defined here. */ -const ffebldArity ffebld_arity_op_[] +const ffebldArity ffebld_arity_op_[(int) FFEBLD_op] = { #define FFEBLD_OP(KWD,NAME,ARITY) ARITY, diff --git a/gcc/f/bld.h b/gcc/f/bld.h index 5f8bedebaad..e7285e62b01 100644 --- a/gcc/f/bld.h +++ b/gcc/f/bld.h @@ -474,7 +474,7 @@ struct _ffebld_pool_stack_ /* Global objects accessed by users of this module. */ -extern const ffebldArity ffebld_arity_op_[]; +extern const ffebldArity ffebld_arity_op_[(int) FFEBLD_op]; extern struct _ffebld_pool_stack_ ffebld_pool_stack_; /* Declare functions with prototypes. */ diff --git a/gcc/hard-reg-set.h b/gcc/hard-reg-set.h index a4ac4d02634..db96aa9c03c 100644 --- a/gcc/hard-reg-set.h +++ b/gcc/hard-reg-set.h @@ -452,7 +452,7 @@ extern int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER]; /* For each reg class, a HARD_REG_SET saying which registers are in it. */ -extern HARD_REG_SET reg_class_contents[]; +extern HARD_REG_SET reg_class_contents[N_REG_CLASSES]; /* For each reg class, number of regs it contains. */ diff --git a/gcc/machmode.h b/gcc/machmode.h index 9b2ad8f2d1e..0f285e36524 100644 --- a/gcc/machmode.h +++ b/gcc/machmode.h @@ -148,7 +148,7 @@ extern unsigned get_mode_alignment PARAMS ((enum machine_mode)); /* For each class, get the narrowest mode in that class. */ -extern const enum machine_mode class_narrowest_mode[]; +extern const enum machine_mode class_narrowest_mode[(int) MAX_MODE_CLASS]; #define GET_CLASS_NARROWEST_MODE(CLASS) class_narrowest_mode[(int) (CLASS)] /* Define the integer modes whose sizes are BITS_PER_UNIT and BITS_PER_WORD -- 2.11.0