From 228c5b30d9d78a439ae1362646cbcee6493057e8 Mon Sep 17 00:00:00 2001 From: jsm28 Date: Sat, 23 Feb 2002 12:59:09 +0000 Subject: [PATCH] * doc/contribute.texi, doc/extend.texi, doc/install.texi, doc/invoke.texi, doc/md.texi, doc/passes.texi, doc/rtl.texi, doc/standards.texi, doc/tm.texi: Remove trailing whitespace. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@49991 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/doc/contribute.texi | 2 +- gcc/doc/extend.texi | 8 ++++---- gcc/doc/install.texi | 28 ++++++++++++++-------------- gcc/doc/invoke.texi | 16 ++++++++-------- gcc/doc/md.texi | 26 +++++++++++++------------- gcc/doc/passes.texi | 2 +- gcc/doc/rtl.texi | 2 +- gcc/doc/standards.texi | 2 +- gcc/doc/tm.texi | 20 ++++++++++---------- 10 files changed, 59 insertions(+), 53 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 69c95cf5e5e..7845935daa9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2002-02-23 Joseph S. Myers + + * doc/contribute.texi, doc/extend.texi, doc/install.texi, + doc/invoke.texi, doc/md.texi, doc/passes.texi, doc/rtl.texi, + doc/standards.texi, doc/tm.texi: Remove trailing whitespace. + 2002-02-23 Jakub Jelinek PR optimization/5747 diff --git a/gcc/doc/contribute.texi b/gcc/doc/contribute.texi index f9a5f970af2..0aec26842b8 100644 --- a/gcc/doc/contribute.texi +++ b/gcc/doc/contribute.texi @@ -15,7 +15,7 @@ If you would like to work on improvements to GCC, please read the advice at these URLs: @smallexample -@uref{http://gcc.gnu.org/contribute.html} +@uref{http://gcc.gnu.org/contribute.html} @uref{http://gcc.gnu.org/contributewhy.html} @end smallexample diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 68d0146bad8..cc4e25d0feb 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -2556,7 +2556,7 @@ An attribute specifier list may appear immediately before the comma, than a function definition. At present, such attribute specifiers apply to the declared object or function, but in future they may attach to the outermost adjacent declarator. In simple cases there is no difference, -but, for example, in +but, for example, in @smallexample void (****f)(void) __attribute__((noreturn)); @@ -2615,7 +2615,7 @@ declaration @code{T D} specifies the type @var{type-qualifier-and-attribute-specifier-list} @var{Type}'' for @var{ident}. -For example, +For example, @smallexample void (__attribute__((noreturn)) ****f) (void); @@ -4634,7 +4634,7 @@ for (i = 0; i < n; i++) @} @end smallexample -Data prefetch does not generate faults if @var{addr} is invalid, but +Data prefetch does not generate faults if @var{addr} is invalid, but the address expression itself must be valid. For example, a prefetch of @code{p->next} will not fault if @code{p->next} is not a valid address, but evaluation will fault if @code{p} is not a valid address. @@ -5713,7 +5713,7 @@ vector signed int vec_all_gt (vector unsigned char, vector signed int vec_all_gt (vector signed char, vector signed char); vector signed int vec_all_gt (vector signed short, vector unsigned short); -vector signed int vec_all_gt (vector unsigned short, +vector signed int vec_all_gt (vector unsigned short, vector signed short); vector signed int vec_all_gt (vector unsigned short, vector unsigned short); diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index f4f89a38bde..afffb870b83 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -615,7 +615,7 @@ single-float, biendian, softfloat. @item powerpc*-*-*, rs6000*-*-* aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos, biendian, -sysv, aix. +sysv, aix. @end table @@ -863,7 +863,7 @@ Now that GCC is configured, you are ready to build the compiler and runtime libraries. We @strong{highly} recommend that GCC be built using GNU make; -other versions may work, then again they might not. +other versions may work, then again they might not. GNU make is required for compiling GNAT, the Ada compiler. (For example, many broken versions of make will fail if you use the @@ -921,7 +921,7 @@ gperf. @item Build target tools for use by the compiler such as binutils (bfd, binutils, gas, gprof, ld, and opcodes) -if they have been individually linked +if they have been individually linked or moved into the top level GCC source tree before configuring. @item @@ -1050,7 +1050,7 @@ source distribution): @end example At the moment, the GNAT library and several tools for GNAT are not built -by @samp{make bootstrap}. You have to invoke +by @samp{make bootstrap}. You have to invoke @samp{make gnatlib_and_tools} in the @file{@var{objdir}/gcc} subdirectory before proceeding with the next steps. @@ -1059,10 +1059,10 @@ following commands (assuming @command{make} is GNU make): @example cd @var{objdir} - @var{srcdir}/configure --enable-languages=c,ada + @var{srcdir}/configure --enable-languages=c,ada cd @var{srcdir}/gcc/ada touch treeprs.ads [es]info.h nmake.ad[bs] - cd @var{objdir} + cd @var{objdir} make bootstrap cd gcc make gnatlib_and_tools @@ -2167,7 +2167,7 @@ bootstrap}. @heading @anchor{hppa*-hp-hpux11}hppa*-hp-hpux11 GCC 3.0 supports HP-UX 11. You must use GNU binutils 2.11 or above on -this platform. Thread support is not currently implemented for this +this platform. Thread support is not currently implemented for this platform, so @option{--enable-threads} does not work. See @uref{http://gcc.gnu.org/ml/gcc-prs/2002-01/msg00551.html} and @uref{http://gcc.gnu.org/ml/gcc-bugs/2002-01/msg00663.html}. @@ -2777,7 +2777,7 @@ does not happen on 3.1. You absolutely @strong{must} use GNU sed and GNU make on this platform. -On NeXTSTEP 3.x where x < 3 the build of GCC will abort during +On NeXTSTEP 3.x where x < 3 the build of GCC will abort during stage1 with an error message like this: @example @@ -3082,10 +3082,10 @@ to increase its table size for switch statements with the optimization option, you also need to use @option{-Olimit 3000}. To enable debugging under IRIX 5, you must use GNU @command{as} 2.11.2 -or later, +or later, and use the @option{--with-gnu-as} configure option when configuring GCC. GNU @command{as} is distributed as part of the binutils package. -When using release 2.11.2, you need to apply a patch +When using release 2.11.2, you need to apply a patch @uref{http://sources.redhat.com/ml/binutils/2001-07/msg00352.html,,http://sources.redhat.com/ml/binutils/2001-07/msg00352.html} which will be included in the next release of binutils. @@ -3360,14 +3360,14 @@ can be safely ignored; the stage 3 compiler is correct.
@end html @heading @anchor{s390-*-linux*}s390-*-linux* -S/390 system running Linux for S/390@. +S/390 system running Linux for S/390@. @html

@end html @heading @anchor{s390x-*-linux*}s390x-*-linux* -zSeries system (64 Bit) running Linux for zSeries@. +zSeries system (64 Bit) running Linux for zSeries@. @html

@@ -3488,7 +3488,7 @@ the hosts that run GCC itself. Second, Sun says that 106950-03 is only a partial fix for bug 4210064, but Sun doesn't know whether the partial fix is adequate for GCC@. Revision -08 or later should fix the bug. The current (as of 2001-09-24) revision is -14, and is included in -the Solaris 7 Recommended Patch Cluster. +the Solaris 7 Recommended Patch Cluster. @end itemize @@ -3685,7 +3685,7 @@ This target is for Xtensa systems running GNU/Linux. It supports ELF shared objects and the GNU C library (glibc). It also generates position-independent code (PIC) regardless of whether the @option{-fpic} or @option{-fPIC} options are used. In other -respects, this target is the same as the +respects, this target is the same as the @uref{#xtensa-*-elf,,@samp{xtensa-*-elf}} target. @html diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a0e44d584a5..1b91a10f5c0 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -2586,7 +2586,7 @@ appropriate may not be detected. This option has no effect unless @item -Wno-deprecated-declarations @opindex Wno-deprecated-declarations Do not warn about uses of functions, variables, and types marked as -deprecated by using the @code{deprecated} attribute. +deprecated by using the @code{deprecated} attribute. (@pxref{Function Attributes}, @pxref{Variable Attributes}, @pxref{Type Attributes}.) @@ -8319,7 +8319,7 @@ arithmetic instead of IEEE single and double precision. @opindex mexplicit-relocs @opindex mno-explicit-relocs Older Alpha assemblers provided no way to generate symbol relocations -except via assembler macros. Use of these macros does not allow +except via assembler macros. Use of these macros does not allow optimial instruction scheduling. GNU binutils as of version 2.12 supports a new syntax that allows the compiler to explicitly mark which relocations should apply to which instructions. This option @@ -8330,7 +8330,7 @@ the assembler when it is built and sets the default accordingly. @itemx -mlarge-data @opindex msmall-data @opindex mlarge-data -When @option{-mexplicit-relocs} is in effect, static data is +When @option{-mexplicit-relocs} is in effect, static data is accessed via @dfn{gp-relative} relocations. When @option{-msmall-data} is used, objects 8 bytes long or smaller are placed in a @dfn{small data area} (the @code{.sdata} and @code{.sbss} sections) and are accessed via @@ -9321,7 +9321,7 @@ generates IEEE floating-point instructions. This is the default. @itemx -mno-backchain @opindex mbackchain @opindex mno-backchain -Generate (or do not generate) code which maintains an explicit +Generate (or do not generate) code which maintains an explicit backchain within the stack frame that points to the caller's frame. This is currently needed to allow debugging. The default is to generate the backchain. @@ -9330,8 +9330,8 @@ generate the backchain. @itemx -mno-small-exec @opindex msmall-exec @opindex mno-small-exec -Generate (or do not generate) code using the @code{bras} instruction -to do subroutine calls. +Generate (or do not generate) code using the @code{bras} instruction +to do subroutine calls. This only works reliably if the total executable size does not exceed 64k. The default is to use the @code{basr} instruction instead, which does not have this limitation. @@ -9344,14 +9344,14 @@ When @option{-m31} is specified, generate code compliant to the Linux for S/390 ABI@. When @option{-m64} is specified, generate code compliant to the Linux for zSeries ABI@. This allows GCC in particular to generate 64-bit instructions. For the @samp{s390} -targets, the default is @option{-m31}, while the @samp{s390x} +targets, the default is @option{-m31}, while the @samp{s390x} targets default to @option{-m64}. @item -mmvcle @itemx -mno-mvcle @opindex mmvcle @opindex mno-mvcle -Generate (or do not generate) code using the @code{mvcle} instruction +Generate (or do not generate) code using the @code{mvcle} instruction to perform block moves. When @option{-mno-mvcle} is specifed, use a @code{mvc} loop instead. This is the default. diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index ca59a6c69e0..2bb3d1824e9 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -185,10 +185,10 @@ Here is an actual example of an instruction pattern, for the 68000/68020. (match_operand:SI 0 "general_operand" "rm"))] "" "* -@{ +@{ if (TARGET_68020 || ! ADDRESS_REG_P (operands[0])) return \"tstl %0\"; - return \"cmpl #0,%0\"; + return \"cmpl #0,%0\"; @}") @end example @@ -200,10 +200,10 @@ This can also be written using braced strings: [(set (cc0) (match_operand:SI 0 "general_operand" "rm"))] "" -@{ +@{ if (TARGET_68020 || ! ADDRESS_REG_P (operands[0])) return "tstl %0"; - return "cmpl #0,%0"; + return "cmpl #0,%0"; @}) @end example @@ -2208,7 +2208,7 @@ register. See the discussion of the @code{SECONDARY_RELOAD_CLASS} macro in @pxref{Register Classes}. There are special restrictions on the form of the @code{match_operand}s -used in these patterns. First, only the predicate for the reload +used in these patterns. First, only the predicate for the reload operand is examined, i.e., @code{reload_in} examines operand 1, but not the predicates for operand 0 or 2. Second, there may be only one alternative in the constraints. Third, only a single register class @@ -3955,7 +3955,7 @@ are not valid. The splitter is allowed to split jump instructions into sequence of jumps or create new jumps in while splitting non-jump instructions. As the central flowgraph and branch prediction information needs to be updated, -several restriction apply. +several restriction apply. Splitting of jump instruction into sequence that over by another jump instruction is always valid, as compiler expect identical behavior of new @@ -4004,7 +4004,7 @@ from i386.md: "TARGET_ZERO_EXTEND_WITH_AND && !optimize_size" "#" "&& reload_completed" - [(parallel [(set (match_dup 0) + [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (const_int 65535))) (clobber (reg:CC 17))])] "" @@ -4041,7 +4041,7 @@ For example: @smallexample -(include "filestuff") +(include "filestuff") @end smallexample @@ -4050,14 +4050,14 @@ specifies the include file to be in @file{gcc/config/target/filestuff}. The directory @file{gcc/config/target} is regarded as the default directory. -Machine descriptions may be split up into smaller more manageable subsections -and placed into subdirectories. +Machine descriptions may be split up into smaller more manageable subsections +and placed into subdirectories. By specifying: @smallexample -(include "BOGUS/filestuff") +(include "BOGUS/filestuff") @end smallexample @@ -4066,10 +4066,10 @@ the include file is specified to be in @file{gcc/config/@var{target}/BOGUS/files Specifying an absolute path for the include file such as; @smallexample -(include "/u2/BOGUS/filestuff") +(include "/u2/BOGUS/filestuff") @end smallexample -is permitted but is not encouraged. +is permitted but is not encouraged. @subsection RTL Generation Tool Options for Directory Search @cindex directory options .md diff --git a/gcc/doc/passes.texi b/gcc/doc/passes.texi index f248056a941..6ca5b856550 100644 --- a/gcc/doc/passes.texi +++ b/gcc/doc/passes.texi @@ -130,7 +130,7 @@ representation, before converting into RTL code. @cindex inline on trees, automatic Currently, the main optimization performed here is tree-based inlining. -This is implemented in @file{tree-inline.c} and used by both C and C++. +This is implemented in @file{tree-inline.c} and used by both C and C++. Note that tree based inlining turns off rtx based inlining (since it's more powerful, it would be a waste of time to do rtx based inlining in addition). diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index b523aa42ce7..2151047ea89 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.texi @@ -2317,7 +2317,7 @@ either wrap around or use saturating addition depending on the value of a special control register: @example -(parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3) +(parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3) (reg:SI 4)] 0)) (use (reg:SI 1))]) @end example diff --git a/gcc/doc/standards.texi b/gcc/doc/standards.texi index 5d5ed0c9a9b..eead5c2f616 100644 --- a/gcc/doc/standards.texi +++ b/gcc/doc/standards.texi @@ -164,7 +164,7 @@ recent version, while @uref{http://www.toodarkpark.org/computers/objc/} is an older example. @uref{http://www.gnustep.org} includes useful information as well. -@xref{Top, GNAT Reference Manual, About This Guide, gnat_rm, +@xref{Top, GNAT Reference Manual, About This Guide, gnat_rm, GNAT Reference Manual}, for information on standard conformance and compatibility of the Ada compiler. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 891559afa70..edee7e3a09a 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -1604,10 +1604,10 @@ in which function addresses are always even, according to @findex TARGET_VTABLE_USES_DESCRIPTORS @item TARGET_VTABLE_USES_DESCRIPTORS Normally, the C++ compiler uses function pointers in vtables. This -macro allows the target to change to use ``function descriptors'' +macro allows the target to change to use ``function descriptors'' instead. Function descriptors are found on targets for whom a function pointer is actually a small data structure. Normally the -data structure consists of the actual code address plus a data +data structure consists of the actual code address plus a data pointer to which the function's data is relative. If vtables are used, the value of this macro should be the number @@ -1729,10 +1729,10 @@ exit, if the register is used within the function. @cindex call-used register @cindex call-clobbered register @cindex call-saved register -Like @code{CALL_USED_REGISTERS} except this macro doesn't require -that the entire set of @code{FIXED_REGISTERS} be included. +Like @code{CALL_USED_REGISTERS} except this macro doesn't require +that the entire set of @code{FIXED_REGISTERS} be included. (@code{CALL_USED_REGISTERS} must be a superset of @code{FIXED_REGISTERS}). -This macro is optional. If not specified, it defaults to the value +This macro is optional. If not specified, it defaults to the value of @code{CALL_USED_REGISTERS}. @findex HARD_REGNO_CALL_PART_CLOBBERED @@ -2805,7 +2805,7 @@ and @file{unwind-ia64.c}. @var{context} is an @code{_Unwind_Context}; for the address of the code being executed and @code{context->cfa} for the stack pointer value. If the frame can be decoded, the register save addresses should be updated in @var{fs} and the macro should branch to -@var{success}. If the frame cannot be decoded, the macro should do +@var{success}. If the frame cannot be decoded, the macro should do nothing. @end table @@ -5770,7 +5770,7 @@ Output assembly directives to switch to section @var{name}. The section should have attributes as specified by @var{flags}, which is a bit mask of the @code{SECTION_*} flags defined in @file{output.h}. If @var{align} is nonzero, it contains an alignment in bytes to be used for the section, -otherwise some target default should be used. Only targets that must +otherwise some target default should be used. Only targets that must specify an alignment within the section directive need pay attention to @var{align} -- we will still use @code{ASM_OUTPUT_ALIGN}. @end deftypefn @@ -6481,7 +6481,7 @@ Termination functions are handled similarly. This method will be chosen as the default by @file{target-def.h} if @code{TARGET_ASM_NAMED_SECTION} is defined. A target that does not -support arbitrary sections, but does support special designated +support arbitrary sections, but does support special designated constructor and destructor sections may define @code{CTORS_SECTION_ASM_OP} and @code{DTORS_SECTION_ASM_OP} to achieve the same effect. @@ -6591,7 +6591,7 @@ the object format requires an explicit initialization function, then a function called @code{_GLOBAL__DI} will be generated. This function and the following one are used by collect2 when linking a -shared library that needs constructors or destructors, or has DWARF2 +shared library that needs constructors or destructors, or has DWARF2 exception tables embedded in the code. @item COLLECT_SHARED_FINI_FUNC (@var{stream}, @var{func}) @@ -6872,7 +6872,7 @@ first variant. If this macro is defined, you may use constructs of the form @smallexample -@samp{@{option0|option1|option2@dots{}@}} +@samp{@{option0|option1|option2@dots{}@}} @end smallexample @noindent in the output templates of patterns (@pxref{Output Template}) or in the -- 2.11.0