From 10d617cb1b462ab28ec901ea8ef116ceb78c8fcc Mon Sep 17 00:00:00 2001 From: steven Date: Mon, 3 May 2010 17:47:47 +0000 Subject: [PATCH] * doc/tm.texi (defmac SMALL_REGISTER_CLASSES): Remove. (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Add documentation, based on the above, for new target hook. * hooks.c (hook_bool_mode_true): New generic hook. * hooks.h (hook_bool_mode_true): Add prototype. * target.h (struct gcc_target): Add small_register_classes_for_mode_p target hook. * target-def.h (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): New default target hook, set to hook_bool_mode_false. * regs.h: Remove default definition of SMALL_REGISTER_CLASSES. * reload.c (push_secondary_reload): Replace SMALL_REGISTER_CLASSES with targetm.small_register_classes_for_mode_p. (find_reusable_reload): Likewise. (combine_reloads): Likewise. * reload1.c (reload_as_needed): Likewise. * cse.c (approx_reg_cost_1, hash_rtx_cb): Likewise. * ifcvt.c (noce_process_if_block, check_cond_move_block, dead_or_predicable): Likewise. * regmove.c (optimize_reg_copy_1): Likewise. * calls.c (prepare_call_address): Likewise. (precompute_register_parameters): Likewise. * config/sh/sh.h: Replace SMALL_REGISTER_CLASSES with new target hook definition. * config/sh/sh.c (sh_small_register_classes_for_mode_p): Add implementation of the hook that considers all register classes small except for SH64. (sh_override_options): Use the new hook. * config/sh/sh-protos.h (sh_small_register_classes_for_mode_p): Add prototype. * config/arm/arm.h: Replace SMALL_REGISTER_CLASSES with new target hook definition. * config/arm/arm.c (arm_small_register_classes_for_mode_p): Add implementation of the hook that considers all register classes small for THUMB1. * config/arm/arm-protos.h (arm_small_register_classes_for_mode_p): Add prototype. * config/mips/mips.h: Replace SMALL_REGISTER_CLASSES with new target hook definition. * config/mips/mips.c (mips_small_register_classes_for_mode_p): Add implementation of the hook that considers all register classes small for MIPS16. * config/mips/mips-protos.h (mips_small_register_classes_for_mode_p): Add prototype. * config/i386/i386.h: Replace SMALL_REGISTER_CLASSES with new target hook definition. * config/m32c/m32c.h: Likewise. * config/pdp11/pdp11.h: Likewise. * config/avr/avr.h: Likewise. * config/xtensa/xtensa.h: Likewise. * config/m68hc11/m68hc11.h: Likewise. * config/mn10300/mn10300.h: Likewise. * config/mcore/mcore.h: Likewise. * config/h8300/h8300.h: Likewise. * config/bfin/bfin.h: Likewise. * config/iq2000/iq2000.h: Remove SMALL_REGISTER_CLASSES definition. * config/rx/rx.h: Remove SMALL_REGISTER_CLASSES definition. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@158997 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 66 +++++++++++++++++++++++++++++++++++++++++++ gcc/config/mips/mips-protos.h | 1 + gcc/config/mips/mips.h | 20 ++++++++----- gcc/config/sh/sh.c | 12 ++++++-- gcc/doc/tm.texi | 51 ++++++++++++++++++++------------- gcc/target-def.h | 7 ++++- gcc/target.h | 6 ++++ 7 files changed, 134 insertions(+), 29 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 485dfbe4e5e..727f89724ce 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,69 @@ +2010-05-03 Steven Bosscher + + * doc/tm.texi (defmac SMALL_REGISTER_CLASSES): Remove. + (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Add documentation, + based on the above, for new target hook. + + * hooks.c (hook_bool_mode_true): New generic hook. + * hooks.h (hook_bool_mode_true): Add prototype. + + * target.h (struct gcc_target): Add small_register_classes_for_mode_p + target hook. + * target-def.h (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): New default + target hook, set to hook_bool_mode_false. + * regs.h: Remove default definition of SMALL_REGISTER_CLASSES. + * reload.c (push_secondary_reload): Replace SMALL_REGISTER_CLASSES + with targetm.small_register_classes_for_mode_p. + (find_reusable_reload): Likewise. + (combine_reloads): Likewise. + * reload1.c (reload_as_needed): Likewise. + * cse.c (approx_reg_cost_1, hash_rtx_cb): Likewise. + * ifcvt.c (noce_process_if_block, check_cond_move_block, + dead_or_predicable): Likewise. + * regmove.c (optimize_reg_copy_1): Likewise. + * calls.c (prepare_call_address): Likewise. + (precompute_register_parameters): Likewise. + + * config/sh/sh.h: Replace SMALL_REGISTER_CLASSES with new target + hook definition. + * config/sh/sh.c (sh_small_register_classes_for_mode_p): Add + implementation of the hook that considers all register classes + small except for SH64. + (sh_override_options): Use the new hook. + * config/sh/sh-protos.h (sh_small_register_classes_for_mode_p): + Add prototype. + + * config/arm/arm.h: Replace SMALL_REGISTER_CLASSES with new target + hook definition. + * config/arm/arm.c (arm_small_register_classes_for_mode_p): Add + implementation of the hook that considers all register classes + small for THUMB1. + * config/arm/arm-protos.h (arm_small_register_classes_for_mode_p): + Add prototype. + + * config/mips/mips.h: Replace SMALL_REGISTER_CLASSES with new target + hook definition. + * config/mips/mips.c (mips_small_register_classes_for_mode_p): Add + implementation of the hook that considers all register classes + small for MIPS16. + * config/mips/mips-protos.h (mips_small_register_classes_for_mode_p): + Add prototype. + + * config/i386/i386.h: Replace SMALL_REGISTER_CLASSES with new target + hook definition. + * config/m32c/m32c.h: Likewise. + * config/pdp11/pdp11.h: Likewise. + * config/avr/avr.h: Likewise. + * config/xtensa/xtensa.h: Likewise. + * config/m68hc11/m68hc11.h: Likewise. + * config/mn10300/mn10300.h: Likewise. + * config/mcore/mcore.h: Likewise. + * config/h8300/h8300.h: Likewise. + * config/bfin/bfin.h: Likewise. + + * config/iq2000/iq2000.h: Remove SMALL_REGISTER_CLASSES definition. + * config/rx/rx.h: Remove SMALL_REGISTER_CLASSES definition. + 2010-05-03 Anatoly Sokolov * double-int.h (tree_to_double_int): Remove macro. diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index e4fbb32b959..89a00072839 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -291,6 +291,7 @@ extern rtx mips_function_value (const_tree, const_tree, enum machine_mode); extern bool mips_cannot_change_mode_class (enum machine_mode, enum machine_mode, enum reg_class); +extern bool mips_small_register_classes_for_mode_p (enum machine_mode); extern bool mips_dangerous_for_la25_p (rtx); extern bool mips_modes_tieable_p (enum machine_mode, enum machine_mode); extern enum reg_class mips_preferred_reload_class (rtx, enum reg_class); diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index dcac46ba45a..d5c98a6ffb8 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. MIPS version. Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998 - 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by A. Lichnewsky (lich@inria.inria.fr). Changed by Michael Meissner (meissner@osf.org). @@ -228,7 +228,7 @@ enum mips_code_readable_setting { #define TARGET_GPWORD \ (TARGET_ABICALLS \ && !TARGET_ABSOLUTE_ABICALLS \ - && !(mips_abi == ABI_64 && TARGET_IRIX6)) + && !(mips_abi == ABI_64 && TARGET_IRIX)) /* True if the output must have a writable .eh_frame. See ASM_PREFERRED_EH_DATA_FORMAT for details. */ @@ -369,6 +369,7 @@ enum mips_code_readable_setting { #define TARGET_SYNC_AFTER_SC (!TARGET_OCTEON) /* IRIX specific stuff. */ +#define TARGET_IRIX 0 #define TARGET_IRIX6 0 /* Define preprocessor macros for the -march and -mtune options. @@ -395,7 +396,7 @@ enum mips_code_readable_setting { do \ { \ /* Everyone but IRIX defines this to mips. */ \ - if (!TARGET_IRIX6) \ + if (!TARGET_IRIX) \ builtin_assert ("machine=mips"); \ \ builtin_assert ("cpu=mips"); \ @@ -415,7 +416,7 @@ enum mips_code_readable_setting { if (TARGET_64BIT) \ builtin_define ("__mips64"); \ \ - if (!TARGET_IRIX6) \ + if (!TARGET_IRIX) \ { \ /* Treat _R3000 and _R4000 like register-size \ defines, which is how they've historically \ @@ -536,9 +537,7 @@ enum mips_code_readable_setting { \ /* These defines reflect the ABI in use, not whether the \ FPU is directly accessible. */ \ - if (TARGET_NO_FLOAT) \ - builtin_define ("__mips_no_float"); \ - else if (TARGET_HARD_FLOAT_ABI) \ + if (TARGET_HARD_FLOAT_ABI) \ builtin_define ("__mips_hard_float"); \ else \ builtin_define ("__mips_soft_float"); \ @@ -2007,6 +2006,13 @@ enum reg_class #define INDEX_REG_CLASS NO_REGS +/* When this hook returns true for MODE, the compiler allows + registers explicitly used in the rtl to be used as spill registers + but prevents the compiler from extending the lifetime of these + registers. */ +#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \ + mips_small_register_classes_for_mode_p + /* We generally want to put call-clobbered registers ahead of call-saved ones. (IRA expects this.) */ diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index a3084b91a0b..c3293fe05a5 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -865,7 +865,7 @@ sh_override_options (void) || (TARGET_SHMEDIA && !TARGET_PT_FIXED)) flag_no_function_cse = 1; - if (SMALL_REGISTER_CLASSES) + if (targetm.small_register_classes_for_mode_p (VOIDmode)) \ { /* Never run scheduling before reload, since that can break global alloc, and generates slower code anyway due @@ -9311,7 +9311,7 @@ get_free_reg (HARD_REG_SET regs_live) if (! TEST_HARD_REG_BIT (regs_live, 1)) return gen_rtx_REG (Pmode, 1); - /* Hard reg 1 is live; since this is a SMALL_REGISTER_CLASSES target, + /* Hard reg 1 is live; since this is a small register classes target, there shouldn't be anything but a jump before the function end. */ gcc_assert (!TEST_HARD_REG_BIT (regs_live, 7)); return gen_rtx_REG (Pmode, 7); @@ -11252,6 +11252,14 @@ sh_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, return 0; } +/* Return true if registers in machine mode MODE will likely be + allocated to registers in small register classes. */ + +static bool +sh_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) +{ + return (! TARGET_SHMEDIA); +} /* If ADDRESS refers to a CODE_LABEL, add NUSES to the number of times that label is used. */ diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index a20d48c9f9c..3a36314d00f 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2868,25 +2868,6 @@ Do not define this macro if you do not define is @code{BITS_PER_WORD} bits wide is correct for your machine. @end defmac -@defmac SMALL_REGISTER_CLASSES -On some machines, it is risky to let hard registers live across arbitrary -insns. Typically, these machines have instructions that require values -to be in specific registers (like an accumulator), and reload will fail -if the required hard register is used for another purpose across such an -insn. - -Define @code{SMALL_REGISTER_CLASSES} to be an expression with a nonzero -value on these machines. When this macro has a nonzero value, the -compiler will try to minimize the lifetime of hard registers. - -It is always safe to define this macro with a nonzero value, but if you -unnecessarily define it, you will reduce the amount of optimizations -that can be performed in some cases. If you do not define this macro -with a nonzero value when it is required, the compiler will run out of -spill registers and print a fatal error message. For most machines, you -should not define this macro at all. -@end defmac - @defmac CLASS_LIKELY_SPILLED_P (@var{class}) A C expression whose value is nonzero if pseudos that have been assigned to registers of class @var{class} would likely be spilled because @@ -4360,6 +4341,38 @@ insns involving vector mode @var{mode}. At the very least, it must have move patterns for this mode. @end deftypefn +@deftypefn {Target Hook} bool TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P (enum machine_mode @var{mode}) +Define this to return nonzero for machine modes for which the port has +small register classes. If this target hook returns nonzero for a given +@var{mode}, the compiler will try to minimize the lifetime of registers +in @var{mode}. The hook may be called with @code{VOIDmode} as argument. +In this case, the hook is expected to return nonzero if it returns nonzero +for any mode. + +On some machines, it is risky to let hard registers live across arbitrary +insns. Typically, these machines have instructions that require values +to be in specific registers (like an accumulator), and reload will fail +if the required hard register is used for another purpose across such an +insn. + +Passes before reload do not know which hard registers will be used +in an instruction, but the machine modes of the registers set or used in +the instruction are already known. And for some machines, register +classes are small for, say, integer registers but not for floating point +registers. For example, the AMD x86-64 architecture requires specific +registers for the legacy x86 integer instructions, but there are many +SSE registers for floating point operations. On such targets, a good +strategy may be to return nonzero from this hook for @code{INTEGRAL_MODE_P} +machine modes but zero for the SSE register classes. + +The default version of this hook retuns false for any mode. It is always +safe to redefine this hook to return with a nonzero value. But if you +unnecessarily define it, you will reduce the amount of optimizations +that can be performed in some cases. If you do not define this hook +to return a nonzero value when it is required, the compiler will run out +of spill registers and print a fatal error message. +@end deftypefn + @node Scalar Return @subsection How Scalar Function Values Are Returned @cindex return values in registers diff --git a/gcc/target-def.h b/gcc/target-def.h index feca6c5270c..1c734369c23 100644 --- a/gcc/target-def.h +++ b/gcc/target-def.h @@ -539,6 +539,10 @@ #define TARGET_VECTOR_MODE_SUPPORTED_P hook_bool_mode_false #endif +#ifndef TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P +#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_false +#endif + /* In hooks.c. */ #define TARGET_CANNOT_MODIFY_JUMPS_P hook_bool_void_false #define TARGET_BRANCH_TARGET_REGISTER_CLASS \ @@ -975,6 +979,7 @@ TARGET_ADDR_SPACE_HOOKS, \ TARGET_SCALAR_MODE_SUPPORTED_P, \ TARGET_VECTOR_MODE_SUPPORTED_P, \ + TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P, \ TARGET_RTX_COSTS, \ TARGET_ADDRESS_COST, \ TARGET_ALLOCATE_INITIAL_VALUE, \ @@ -986,7 +991,7 @@ TARGET_MACHINE_DEPENDENT_REORG, \ TARGET_BUILD_BUILTIN_VA_LIST, \ TARGET_FN_ABI_VA_LIST, \ - TARGET_CANONICAL_VA_LIST_TYPE, \ + TARGET_CANONICAL_VA_LIST_TYPE, \ TARGET_EXPAND_BUILTIN_VA_START, \ TARGET_GIMPLIFY_VA_ARG_EXPR, \ TARGET_GET_PCH_VALIDITY, \ diff --git a/gcc/target.h b/gcc/target.h index 62a1bcc3d7e..6ff7d1d639e 100644 --- a/gcc/target.h +++ b/gcc/target.h @@ -762,6 +762,12 @@ struct gcc_target for further details. */ bool (* vector_mode_supported_p) (enum machine_mode mode); + /* True for MODE if the target expects that registers in this mode will + be allocated to registers in a small register class. The compiler is + allowed to use registers explicitly used in the rtl as spill registers + but it should prevent extending the lifetime of these registers. */ + bool (* small_register_classes_for_mode_p) (enum machine_mode mode); + /* Compute a (partial) cost for rtx X. Return true if the complete cost has been computed, and false if subexpressions should be scanned. In either case, *TOTAL contains the cost result. */ -- 2.11.0