From 005acfe031fcf1711ec15ab7335ec1d4ec4c0393 Mon Sep 17 00:00:00 2001 From: davem Date: Tue, 21 Feb 2012 01:37:42 +0000 Subject: [PATCH] Explain why we don't use RDPC for sparc PIC register setup. * config/sparc/sparc.md (load_pcrel_sym): Explain why we don't use the "rd %pc" instruction on v9 for PIC register loads. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184422 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 5 +++++ gcc/config/sparc/sparc.md | 4 ++++ 2 files changed, 9 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e12e596ed1d..df2419a5b45 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-02-20 David S. Miller + + * config/sparc/sparc.md (load_pcrel_sym): Explain why we + don't use the "rd %pc" instruction on v9 for PIC register loads. + 2012-02-20 Aldy Hernandez PR middle-end/52141 diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index f70acd37337..c0c1ef8ac38 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -1352,6 +1352,10 @@ ;; Load in operand 0 the (absolute) address of operand 1, which is a symbolic ;; value subject to a PC-relative relocation. Operand 2 is a helper function ;; that adds the PC value at the call point to register #(operand 3). +;; +;; Even on V9 we use this call sequence with a stub, instead of "rd %pc, ..." +;; because the RDPC instruction is extremely expensive and incurs a complete +;; instruction pipeline flush. (define_insn "load_pcrel_sym" [(set (match_operand:P 0 "register_operand" "=r") -- 2.11.0