From: danglin Date: Tue, 29 May 2007 01:12:58 +0000 (+0000) Subject: * doc/md.texi: Document constraints on HP PA-RISC. X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=commitdiff_plain;h=99a75a59fce86443deed363d53083dde3cbe9669 * doc/md.texi: Document constraints on HP PA-RISC. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125158 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7a2f9fc57c3..ea23ee99986 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,7 @@ 2007-05-28 John David Anglin + * doc/md.texi: Document constraints on HP PA-RISC. + * pa/constraints.md: New file. * pa.md: Include constraints.md. * pa.c (cint_ok_for_move): Avoid using CONST_OK_FOR_LETTER_P. diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 029657d3fe0..a3f1243b200 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -1775,6 +1775,77 @@ Constant that is one of -1, 4, -4, 7, 8, 12, 16, 20, 32, 48 Floating point constant that is legal for store immediate @end table +@item Hewlett-Packard PA-RISC---@file{config/pa/pa.h} +@table @code +@item a +General register 1 + +@item f +Floating point register + +@item q +Shift amount register + +@item x +Floating point register (deprecated) + +@item y +Upper floating point register (32-bit), floating point register (64-bit) + +@item Z +Any register + +@item I +Signed 11-bit integer constant + +@item J +Signed 14-bit integer constant + +@item K +Integer constant that can be deposited with a @code{zdepi} instruction + +@item L +Signed 5-bit integer constant + +@item M +Integer constant 0 + +@item N +Integer constant that can be loaded with a @code{ldil} instruction + +@item O +Integer constant whose value plus one is a power of 2 + +@item P +Integer constant that can be used for @code{and} operations in @code{depi} +and @code{extru} instructions + +@item S +Integer constant 31 + +@item U +Integer constant 63 + +@item G +Floating-point constant 0.0 + +@item A +A @code{lo_sum} data-linkage-table memory operand + +@item Q +A memory operand that can be used as the destination operand of an +integer store instruction + +@item R +A scaled or unscaled indexed memory operand + +@item T +A memory operand for floating-point loads and stores + +@item W +A register indirect memory operand +@end table + @item PowerPC and IBM RS6000---@file{config/rs6000/rs6000.h} @table @code @item b